An enhanced GaN-based HEMT device, a preparation method and application thereof

Abstract

The application discloses an enhanced GaN-based HEMT device, a preparation method and application thereof. The HEMT device comprises an epitaxial structure, a first semiconductor layer and a second semiconductor layer arranged on the first semiconductor layer, and a two-dimensional electron gas formed between the first semiconductor layer and the second semiconductor layer; and a source electrode, a drain electrode and a gate electrode formed on the second semiconductor layer, the source electrode and the drain electrode can be electrically connected through the two-dimensional electron gas, and the gate electrode is distributed between the source electrode and the drain electrode; wherein a ferroelectric layer is further arranged between the gate electrode and the second semiconductor layer, the ferroelectric layer is formed by a hexagonal ferroelectric material, and is used at least for depleting the two-dimensional electron gas under the gate electrode, so that the enhanced function of the HEMT device and the regulation of the threshold voltage are realized. The enhanced GaN-based HEMT device prepared by combining the hexagonal ferroelectric material has good threshold voltage stability and simple preparation process.

Description

Technical Field

[0001] This invention belongs to the field of semiconductor device technology, and relates to an enhanced GaN-based HEMT device, its fabrication method and application. Background Technology

[0002] Compared to traditional silicon-based materials, gallium nitride (GaN) offers advantages such as a large bandgap, high breakdown field strength, low dielectric constant, high electron saturation velocity, and low on-resistance. High electron mobility transistors (HMETs) based on GaN materials generate high two-dimensional electron gases through spontaneous polarization and piezoelectric polarization, and have been widely used in high-power electronic devices, high-frequency microwave devices, and other fields.

[0003] Traditional GaN-based HEMT devices, such as Figure 1 As shown, since the conduction band at the AlGaN / AlN / GaN interface is below the Fermi energy, see [link to details]. Figure 2 As shown, a two-dimensional electron gas is generated, and this two-dimensional electron gas is continuous. Therefore, this GaN-based HEMT device is a depletion-mode (D-mode) device, meaning it is normally on when the gate voltage is 0 and requires a negative bias voltage to turn off. However, the negative gate voltage power supply design increases design cost and power loss, which is detrimental to device integration. From the perspective of safe operation and low power consumption, enhancement-mode (E-mode) HEMT devices have greater advantages.

[0004] In existing technologies, the main methods for fabricating enhancement-mode HEMT devices include p-GaN gate structures, recessed gate structures, and fluorine ion implantation. However, all of these methods have certain drawbacks. For example, fabricating p-GaN gate structure HEMT devices requires etching a p-GaN layer tens of nanometers thick, posing challenges in terms of surface roughness, uniformity, and selectivity. Furthermore, achieving efficient p-type doping of GaN remains a challenge. Recessed gate structure HEMT devices require precise etching to a certain depth below the gate, demanding high etching accuracy, and this step introduces plasma damage, affecting the stability of the device's output power and threshold voltage. fluorine ion implantation for enhancement-mode HEMT devices introduces unavoidable material damage, and the controllability of the threshold voltage is poor. Additionally, the poor stability of fluorine ions at high temperatures leads to threshold drift and device degradation. In another approach, using a FinFET structure can enhance the control of the two-dimensional electron gas, avoiding the impact of short-channel effects on device performance. This structure, by surrounding a gate electrode or a dielectric material with a gate electrode around a two-dimensional electron gas, can achieve a positive shift in the threshold voltage, thus enabling enhancement-mode devices. However, to achieve enhancement-mode devices, i.e., a threshold voltage greater than 0, the fin width typically needs to be on the order of micrometers. This undoubtedly poses a significant challenge to the fabrication process, and traditional contact exposure methods cannot be used to fabricate enhancement-mode HEMT devices with fin structures.

[0005] In recent years, a novel approach to fabricating enhancement-mode HEMT devices has been proposed. This approach fully utilizes the polarization modulation effect of ferroelectric materials to deposit ferroelectric materials on GaN epitaxial films, offering a reliable and efficient solution for realizing enhancement-mode power devices. By leveraging the strong polarization characteristics of ferroelectric materials to deplete the two-dimensional electron gas at the ferroelectric / GaN interface and below the gate, enhancement-mode devices can be achieved. However, the ferroelectric materials used in these techniques are mostly cubic. When grown on hexagonal GaN, excessive lattice mismatch can lead to deterioration in material quality and device performance. Since the crystal quality and orientation of the ferroelectric film directly determine its remanent polarization intensity, the remanent polarization intensity of cubic ferroelectric films exhibits poor stability. Under gate voltage, partial inversion of internal polarization domains can occur, leading to instability in the depletion of the two-dimensional electron gas and thus affecting the threshold voltage stability of enhancement-mode HEMT devices.

[0006] Another important application scenario for discrete devices such as power semiconductors (HEMTs) is power chips. The main problems with silicon-based power integrated circuits are their larger footprint, higher parasitic resistance, and poor high-frequency characteristics. In contrast, GaN power integrated circuits (GaN Power ICs) can achieve switching frequencies 10 to 100 times higher than existing silicon circuits, resulting in smaller, lighter, and lower-cost systems. An important approach to GaN power integrated circuits is direct-coupled logic circuits (DCFLs). This type of integrated circuit is based on the coupled integration of enhancement-mode and depletion-mode HEMT devices. However, enhancement-mode devices typically require the fabrication of trench gate structures or local etching of p-GaN. This is incompatible with the fabrication process of depletion-mode HEMT devices. Therefore, the integration of depletion-mode and enhancement-mode HEMT devices often increases fabrication costs and reduces yield. Summary of the Invention

[0007] The main objective of this invention is to provide an enhanced GaN-based HEMT device, its fabrication method, and its applications, in order to overcome the shortcomings of the prior art.

[0008] To achieve the aforementioned objectives, the technical solution adopted by this invention includes:

[0009] One aspect of the present invention provides an enhanced GaN-based HEMT device comprising:

[0010] An epitaxial structure includes a first semiconductor layer and a second semiconductor layer disposed on the first semiconductor layer, wherein a two-dimensional electron gas is formed between the first semiconductor layer and the second semiconductor layer; and

[0011] A source, drain, and gate are formed on the second semiconductor layer, wherein the source and drain are electrically connected through the two-dimensional electron gas, and the gate is distributed between the source and drain;

[0012] A ferroelectric layer is disposed between the gate and the second semiconductor layer. The ferroelectric layer is formed of a hexagonal ferroelectric material and is used to at least deplete the two-dimensional electron gas below the gate.

[0013] Furthermore, both the ferroelectric layer and the second semiconductor layer are grown along the c-axis and are lattice-matched.

[0014] In some embodiments, the hexagonal ferroelectric material includes Al. 1-a Sc a N, where 0.05≤a≤0.4.

[0015] In some embodiments, the HEMT device includes at least one fin, the fin including at least a partial region of the first semiconductor layer and a second semiconductor layer disposed on at least a partial region of the first semiconductor layer, a gate covering the channel region of the fin, and the ferroelectric layer being distributed at least between the gate and the fin.

[0016] In some embodiments, the epitaxial structure further includes a third semiconductor layer disposed between the first semiconductor layer and the second semiconductor layer.

[0017] In some embodiments, the epitaxial structure further includes a buffer layer disposed between the substrate and the first semiconductor layer, wherein the substrate may be made of any one of silicon, silicon carbide or sapphire, and is not limited thereto.

[0018] Furthermore, the first semiconductor layer is the channel layer of the HEMT device, with a thickness of 10–500 nm, and the material may include Al. x Ga 1-x N, where 0 ≤ x ≤ 1.

[0019] Furthermore, the second semiconductor layer serves as the barrier layer of the HEMT device, with a thickness of 10–50 nm, and its material may include Al. y Ga 1-y N, where 0 ≤ y ≤ 1.

[0020] Furthermore, the third semiconductor layer is the insertion layer of the HEMT device, with a thickness of 1-5 nm, and the material can be AlN.

[0021] Furthermore, the thickness of the buffer layer is 10 nm to 10 μm, and the material may include Al. z Ga 1-z N, where 0 ≤ z ≤ 1.

[0022] Furthermore, x < y.

[0023] Furthermore, x ≤ z.

[0024] Another aspect of the present invention provides a method for fabricating a GaN-based HEMT device, comprising:

[0025] An epitaxial structure is provided, the epitaxial structure including a first semiconductor layer and a second semiconductor layer disposed on the first semiconductor layer, wherein a two-dimensional electron gas is formed between the first semiconductor layer and the second semiconductor layer;

[0026] A source and a drain are fabricated on a second semiconductor layer, and the source and drain are electrically connected through the two-dimensional electron gas; and

[0027] A ferroelectric layer in a hexagonal ferroelectric material is formed on the second semiconductor layer between the source and drain to cooperate with the gate, and then the gate is fabricated on the ferroelectric layer.

[0028] Furthermore, the preparation method further includes: processing the epitaxial structure so that at least a local region of the first semiconductor layer cooperates with a second semiconductor layer disposed on at least a local region of the first semiconductor layer to form a fin;

[0029] The ferroelectric layer and the gate are sequentially used to cover at least the channel region of the fin.

[0030] Furthermore, the preparation method specifically includes: dry etching or wet etching of the second semiconductor layer from the surface of the epitaxial structure until the first semiconductor layer is reached, so as to partially remove the first semiconductor layer and the second semiconductor layer, thereby forming the fin.

[0031] Furthermore, the HEMT device has a FinFET structure, which includes the aforementioned fin.

[0032] Furthermore, the preparation method specifically includes: forming the ferroelectric layer using any one of metal-organic vapor phase epitaxy, molecular beam epitaxy, or magnetron sputtering.

[0033] Furthermore, the preparation method specifically includes: the hexagonal ferroelectric material comprising Al 1-a Sc a N, where 0.05≤a≤0.4.

[0034] Furthermore, the fabrication method further includes the step of applying a negative bias voltage to the gate to pre-polarize the ferroelectric layer.

[0035] Furthermore, the preparation method further includes a step of passivating the HEMT device.

[0036] Another aspect of the invention provides a coupled logic circuit comprising the aforementioned enhanced GaN-based HEMT device.

[0037] Another aspect of the present invention provides a GaN power integrated circuit comprising the above-described enhancement-mode GaN-based HEMT device and a conventional depletion-mode GaN-based HEMT device.

[0038] Compared with the prior art, the novel enhanced GaN-based HEMT device and its fabrication method provided by the present invention have at least the following advantages:

[0039] 1) By using hexagonal AlScN ferroelectric material to regulate the two-dimensional electron gas between the first and second semiconductor layers, an enhancement-mode HEMT device is realized. This eliminates the need for traditional plasma etching grooves and fluorine ion implantation to achieve device enhancement, avoids the impact of plasma damage on the device's output power and threshold voltage stability, and avoids the increased process complexity and gate degradation problems caused by p-GaN secondary epitaxy or etching.

[0040] 2) Instead of using traditional ferroelectric materials to replace the barrier layer and growing them directly on GaN, AlScN hexagonal thin films are deposited on the surface of the depletion-type HEMT epitaxial structure. AlScN ferroelectric materials have a high lattice matching degree with the AlGaN barrier layer, resulting in high crystal quality and low stress levels, fully leveraging its ferroelectric properties. Its remanent polarization intensity is more than twice that of traditional ferroelectric thin films, exhibiting a strong control over the two-dimensional electron gas. Therefore, the barrier layer does not require etching a groove structure; instead, the enhanced characteristics of the HEMT device can be achieved by integrating AlScN and the depletion-type HEMT device.

[0041] 3) AlScN ferroelectric materials have a high coercive field. The gate voltage of HEMT devices operates below the coercive field, which does not affect the polarization direction and magnitude of the ferroelectric material layer. Therefore, the HEMT devices fabricated have high output current and stable threshold voltage. Attached Figure Description

[0042] To more clearly illustrate the technical solutions in the embodiments of the present invention or the prior art, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments recorded in the present invention. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0043] Figure 1 This is a schematic diagram of a depletion-type GaN-based HEMT device structure in traditional technology;

[0044] Figure 2 This is a schematic diagram of the energy band structure below the gate of a depletion-type GaN-based HEMT device in traditional technology when the gate voltage is zero.

[0045] Figure 3 This is a schematic diagram of an enhanced GaN-based HEMT device structure in a typical embodiment of the present invention;

[0046] Figure 4 This is an enhanced GaN-based HEMT device according to Embodiment 1 of the present invention. Figure 1 A schematic diagram showing the comparison of transfer characteristic curves of depletion-mode GaN-based HEMT devices;

[0047] Figure 5 This is a schematic diagram of the output characteristic curve of an enhanced GaN-based HEMT device according to Embodiment 1 of the present invention;

[0048] Figure 6 This is a schematic diagram of the energy band structure below the gate of an enhancement-mode GaN-based HEMT device in Embodiment 1 of the present invention when the gate voltage is zero;

[0049] Figure 7 This is an enhanced GaN-based HEMT device in Embodiment 2 of the present invention and Figure 1 A schematic diagram showing the comparison of transfer characteristic curves of depletion-mode GaN-based HEMT devices;

[0050] Figure 8 This is a schematic diagram of the output characteristic curve of an enhanced GaN-based HEMT device according to Embodiment 2 of the present invention;

[0051] Figure 9 This is a schematic diagram of the energy band structure below the gate of an enhanced GaN-based HEMT device in Embodiment 2 of the present invention when the gate voltage is zero;

[0052] Figure 10 This is a schematic diagram of the subgate structure of an enhancement-type GaN-based HEMT device with a fin structure provided in Embodiment 3 of the present invention;

[0053] Figure 11 This is a coupled logic circuit diagram of the GaN-based HEMT device in Embodiment 1 of the present invention and a traditional depletion-type GaN-based HEMT device without AlScN ferroelectric thin film. Detailed Implementation

[0054] In view of the deficiencies of the prior art, the inventors of this invention, through long-term research and extensive practice, have proposed the technical solution of this invention. Addressing the problem that the cubic ferroelectric thin film crystals used in the fabrication of enhanced HEMT devices have poor quality and are difficult to grow with low lattice mismatch with hexagonal GaN materials, thus affecting the output power and threshold voltage stability of enhanced HEMT devices, this invention proposes a GaN-based HEMT device based on hexagonal AlScN ferroelectric material. The following will further explain the technical solution, its implementation process, and its principle.

[0055] AlScN, as a novel ferroelectric material, maintains its hexagonal crystal structure even when the Sc content is below 40%, exhibiting high lattice matching with AlGaN, which forms the barrier layer. This results in high crystal quality and low stress levels, allowing it to fully utilize its ferroelectric properties. Furthermore, at low Sc contents, its crystal structure is similar to that of group III nitride semiconductors, with a remanent polarization exceeding 100 μC / cm². 2 Furthermore, AlScN has an adjustable bandgap from 4.5 eV to 6.2 eV, enabling integration with wide bandgap semiconductors like GaN to achieve high-density logic operations and signal processing applications.

[0056] AlScN belongs to the hexagonal crystal system, the same as group III nitride materials. AlScN and Al with different Sc compositions... 0.2 Ga 0.8 The lattice mismatch of N is shown in Table 1. It can be seen that the lattice mismatch between the two materials is small. Therefore, the AlScN ferroelectric thin film sputtered on the HEMT epitaxial wafer has high crystal quality and high polarization intensity. Depositing AlScN ferroelectric thin film on GaN-based HEMT epitaxial structure modulates the two-dimensional electron gas in the channel and increases the threshold voltage of HEMT device. Enhanced HEMT device can be fabricated while maintaining the planar structure of the device. This avoids the bottleneck problems of high etching damage and difficult etching depth control in traditional p-GaN gate, groove gate and fluorine plasma implantation process.

[0057] Table 1. A1 1-a Sc a N (0.05≤a≤0.4) and Al 0.2 Ga 0.8 N-lattice mismatch table

[0058]

[0059] Furthermore, the remanent polarization of hexagonal AlScN ferroelectric thin films is more than twice that of traditional ferroelectric thin films, exhibiting a strong depletion effect on the two-dimensional electron gas. Therefore, the barrier layer does not need to be etched to obtain a groove structure; instead, the enhancement characteristics of HEMT devices can be achieved by directly depositing AlScN thin films on its surface. At the same time, AlScN ferroelectric materials have a high coercive field, and the gate voltage of HEMT devices operates below the coercive field, which does not affect the polarization direction and magnitude of the ferroelectric material layer. Therefore, the devices have high stability in output current and threshold voltage.

[0060] The technical solution of the present invention will now be clearly and completely described with reference to the accompanying drawings and specific embodiments. Obviously, the described embodiments are only some, not all, of the embodiments of the present invention. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of the present invention.

[0061] Example 1:

[0062] Please see Figure 3 As shown, an enhancement-mode GaN-based HEMT device includes a sapphire substrate 1 and GaN buffer layer 2, GaN channel layer 3, AlN insertion layer 4, and AlGaN barrier layer 5 sequentially disposed on the sapphire substrate 1. A two-dimensional electron gas 9 is formed under the surface of the GaN channel layer 3 near the AlN insertion layer 4. A source 6 and a drain 8 are formed on the AlGaN barrier layer 5 and can be electrically connected through the two-dimensional electron gas 9. An AlScN ferroelectric layer 10 is also formed on the AlGaN barrier layer 5 between the source 6 and the drain 8, and a gate 7 is formed on the AlScN ferroelectric layer 10.

[0063] Furthermore, a method for fabricating an enhanced GaN-based HEMT device specifically includes:

[0064] 1) A sapphire substrate 1 is provided, and a GaN buffer layer 2 with a thickness of 5 μm, a GaN channel layer 3 with a thickness of 500 nm, an AlN insertion layer 4 with a thickness of 1 nm, and an AlN insertion layer 5 with a thickness of 25 nm are sequentially epitaxially grown on the sapphire substrate 1 using metal-organic vapor phase epitaxy. 0.3 Ga 0.7 N barrier layer 5, wherein a two-dimensional electron gas 9 is formed below the surface of GaN channel layer 3 near AlN insertion layer 4;

[0065] 2) In Al 0.3 Ga 0.7 On the N-barrier layer 5, the regions corresponding to the source and drain are deposited with metal Ti / Al / Ni / Au with thicknesses of 30nm / 120nm / 30nm / 50nm at a deposition rate of 6nm / min to form the source 6 and drain 8. The source 6 and drain 8 can be electrically connected through a two-dimensional electron gas 9.

[0066] 3) Under a pure N2 atmosphere, a 20 nm thick Al layer is sputtered onto the device surface in step 2) using magnetron sputtering. 0.7 Sc 0.3 N ferroelectric material layer, forming Al 0.7 Sc 0.3 The N-ferroelectric layer 10 is wherein the temperature in the growth chamber of the magnetron sputtering equipment is 400℃ and the pressure is 0.7Pa.

[0067] 4) In Al 0.7 Sc 0.3 A 30nm / 100nm thick Ni / Au metal layer is deposited on the N-ferroelectric layer 10 to form the gate 7. The gate is then used as a self-aligned etching mask to pattern the ferroelectric layer. The patterning process specifically involves removing Al from the region corresponding to the gate 7. 0.7 Sc 0.3 N-ferroelectric material layer;

[0068] 5) With source 6 and drain 8 on, a negative bias is applied to gate 7 to control Al. 0.7 Sc 0.3 The N-ferroelectric layer 10 is pre-polarized, that is, the orientation of the ferroelectric domains within the ferroelectric material is unified by applying voltage, so that the polarization intensity of the crystal reaches saturation, and the polarization direction is aligned with Al. 0.3 Ga 0.7 The N-barrier layer 5 is the opposite;

[0069] 6) The formed device is passivated by depositing a layer of SiNx on the HEMT surface using low-pressure chemical vapor deposition (LPCVD) to passivate defects on the HEMT surface, reduce device leakage current, and improve breakdown characteristics. This completes the process. Figure 3 The fabrication of the enhanced GaN-based HEMT device is shown.

[0070] For further details, please refer to Figure 4 As shown, this is the enhanced GaN-based HEMT device fabricated in this embodiment. Figure 1 The schematic diagram showing the transfer characteristic curves of the depletion-mode GaN-based HEMT device illustrates the difference between the device and the traditional depletion-mode (D-mode) GaN-based HEMT device, with a threshold voltage V of -4.9V. th In comparison, the threshold voltage V of the GaN-based HEMT device fabricated in this embodiment is... th The voltage is approximately 0.6V, meaning the device is normally off when there is no gate voltage. It only turns on when a voltage of 0.6V or higher is applied to the gate 7, thus achieving the purpose of an enhancement-mode HEMT device.

[0071] For further information, please refer to [link / reference]. Figure 5 The figure shows a schematic diagram of the output characteristic curve of the enhanced GaN-based HEMT device fabricated in this embodiment. It can be seen that the GaN-based HEMT device fabricated in this embodiment has excellent switching characteristics. That is, when the voltage V between the gate 7 and the source 6... GS When the voltage is 0V, the on-state current I of the device is... DS 3×10 -12 A, approximately no conduction current between the source and drain, the device is in a normally off state; when the gate voltage V GS When the voltage is greater than 0.6V, such as 3V, the device is in the on state.

[0072] Next, please refer to Figure 6 The diagram shown is a schematic of the energy band structure below the gate of the enhanced GaN-based HEMT device fabricated in this embodiment when the voltage of gate 7 is 0V. It can be seen that because Al... 0.7 Sc 0.3 The strong spontaneous polarization effect of N ferroelectric materials raises the conduction band at the AlGaN / AlN / GaN interface, thereby depleting the two-dimensional electron gas in the channel below gate 7 and keeping the device in a normally off state. Only when a threshold voltage V is applied to gate 7... th Only when a positive voltage is applied will a two-dimensional electron gas be reformed in the channel below the gate 7, thus turning on the device.

[0073] Example 2:

[0074] The device structure in this embodiment is the same as that in Embodiment 1. Figure 3 The device structure shown is consistent with that provided in Example 1, and the fabrication method is also similar to that provided in Example 1. The difference lies in the changes in the Al and Sc composition contents of the ferroelectric layer 10, and another difference is the adjustment of the thickness of the buffer layer and the channel layer, specifically including:

[0075] 1) A sapphire substrate 1 is provided, and a GaN buffer layer 2 with a thickness of 10 μm, a GaN channel layer 3 with a thickness of 10 nm, an AlN insertion layer 4 with a thickness of 1 nm, and an AlN insertion layer 5 with a thickness of 25 nm are sequentially epitaxially grown on the sapphire substrate 1 using metal-organic vapor phase epitaxy. 0.3 Ga 0.7 N barrier layer 5, wherein a two-dimensional electron gas 9 is formed below the surface of GaN channel layer 3 near AlN insertion layer 4;

[0076] 2) In Al 0.3 Ga 0.7 On the N-barrier layer 5, the regions corresponding to the source and drain are deposited with metal Ti / Al / Ni / Au with thicknesses of 30nm / 120nm / 30nm / 50nm at a deposition rate of 6nm / min to form the source 6 and drain 8. The source 6 and drain 8 can be electrically connected through a two-dimensional electron gas 9.

[0077] 3) Under a pure N2 atmosphere, a 20 nm thick Al layer is sputtered onto the device surface in step 2) using magnetron sputtering. 0.8 Sc 0.2 N ferroelectric material layer, forming Al 0.8 Sc 0.2 The N-ferroelectric layer 10 is wherein the temperature in the growth chamber of the magnetron sputtering equipment is 400℃ and the pressure is 0.7Pa.

[0078] 4) In the remaining Al 0.8 Sc 0.2 A 30nm / 100nm thick Ni / Au metal layer is deposited on the N-ferroelectric layer 10 to form the gate 7. The gate is then used as a self-aligned etching mask to pattern the ferroelectric layer. The patterning process specifically involves removing Al from the region corresponding to the gate 7. 0.8 Sc 0.2 N-ferroelectric layer;

[0079] 5) With source 6 and drain 8 on, a negative bias is applied to gate 7 to control Al. 0.8 Sc 0.2 The N-ferroelectric layer 10 is pre-polarized, that is, the orientation of the ferroelectric domains within the ferroelectric material is unified by applying voltage, so that the polarization intensity of the crystal reaches saturation, and the polarization direction is aligned with Al. 0.3 Ga 0.7 The N-barrier layer 5 is the opposite;

[0080] 6) The formed device is passivated by depositing a layer of SiNx on the HEMT surface using low-pressure chemical vapor deposition (LPCVD) to passivate defects on the HEMT surface, reduce device leakage current, and improve breakdown characteristics. This completes the process. Figure 3 The fabrication of the enhanced GaN-based HEMT device is shown.

[0081] For further details, please refer to Figure 7 As shown, this is the enhanced GaN-based HEMT device fabricated in this embodiment. Figure 1 The diagram shows a comparison of the transfer characteristic curves of a depletion-mode GaN-based HEMT device with the threshold voltage V of a conventional depletion-mode (D-mode) GaN-based HEMT device at -4.9V. th In comparison, the threshold voltage V of the GaN-based HEMT device fabricated in this embodiment is... th The threshold voltage is approximately 3.85V. This means that when 0V or no voltage is applied to the gate 7, the device is normally off; only when a voltage above 3.85V is applied to the gate 7 does the device turn on, achieving the purpose of an enhancement-mode HEMT device. Furthermore, in this embodiment, by adjusting the Sc component content of the ferroelectric material, the threshold voltage of the device is modulated, resulting in a threshold voltage V of the fabricated enhancement-mode GaN-based HEMT device. th Compared to the threshold voltage V of the enhancement-mode GaN-based HEMT device in Example 1 th big.

[0082] For further information, please refer to [link / reference]. Figure 8The figure shows a schematic diagram of the output characteristic curve of the enhanced GaN-based HEMT device fabricated in this embodiment. It can be seen that the GaN-based HEMT device fabricated in this embodiment has excellent switching characteristics. That is, when the voltage V between the gate 7 and the source 6... GS When the voltage is 0V, the on-state current I of the device is... DS 1.23×10 -11 A, approximately no conduction current between the source and drain, the device is in a normally off state; when the voltage V between gate 7 and source 6... GS When the voltage is greater than 3.85V, such as 4V, the device is in the on-state, and the on-state current I is... DS With the voltage V between drain 8 and source 6 DS It grows bigger and bigger.

[0083] Next, please refer to Figure 9 The diagram shown is a schematic of the energy band structure below the gate of the enhanced GaN-based HEMT device fabricated in this embodiment when the voltage of gate 7 is 0V. It can be seen that because Al... 0.8 Sc 0.2 The strong spontaneous polarization effect of N ferroelectric materials raises the conduction band at the AlGaN / AlN / GaN interface, thereby depleting the two-dimensional electron gas in the channel below gate 7 and keeping the device in a normally off state. Only when a threshold voltage V is applied to gate 7... th Only when a positive voltage is applied will a two-dimensional electron gas be reformed in the channel below the gate 7, thus turning on the device.

[0084] Example 3:

[0085] Please see Figure 10 As shown, an enhancement-mode GaN-based HEMT device with a fin structure is similar in structure to the device in Example 1, except that it includes a sapphire substrate 1 and a GaN buffer layer 2, a GaN channel layer 3, an AlN insertion layer 4, and an AlGaN barrier layer 5 sequentially disposed on the sapphire substrate 1. The GaN channel layer 3, the AlN insertion layer 4, and the AlGaN barrier layer 5 cooperate to form a fin structure, and a two-dimensional electron gas 9 is formed under the surface of the GaN channel layer 3 near the AlN insertion layer 4. The gate 7 covers the channel region of the fin structure, i.e., the region where the two-dimensional electron gas 9 is formed, and a ferroelectric layer 10 is disposed between the gate 7 and the channel region of the fin structure.

[0086] Furthermore, a method for fabricating an enhanced GaN-based HEMT device with a fin structure specifically includes:

[0087] 1) A sapphire substrate 1 is provided, and a GaN buffer layer 2 with a thickness of 10 μm, a GaN channel layer 3 with a thickness of 10 nm, and an Al layer with a thickness of 25 nm are sequentially epitaxially grown on the sapphire substrate 1 using metal-organic vapor phase epitaxy. 0.3 Ga 0.7 N barrier layer 5, wherein a two-dimensional electron gas 9 is formed below the surface of GaN channel layer 3 near AlN insertion layer 4;

[0088] 2) In Al 0.3 Ga 0.7 On the N-barrier layer 5, the regions corresponding to the source and drain are deposited with metal Ti / Al / Ni / Au with thicknesses of 30nm / 120nm / 30nm / 50nm at a deposition rate of 6nm / min to form the source 6 and drain 8. The source 6 and drain 8 can be electrically connected through a two-dimensional electron gas 9.

[0089] 3) Based on photolithography and plasma etching methods, a set (10) of fin structures are etched in the gate region. The width d of the fin is 1 micrometer and the length is 10 micrometers.

[0090] 4) Under a pure N2 atmosphere, a 20 nm thick Al layer is sputtered onto the device surface in step 3) using magnetron sputtering. 0.8 Sc 0.2 The N ferroelectric material layer is patterned to form Al 0.8 Sc 0.2 10 N-ferroelectric layer. The ferroelectric material is tightly bonded to the fin structure. The temperature in the growth chamber of the magnetron sputtering equipment is 400℃ and the pressure is 0.7Pa.

[0091] 5) In the remaining Al 0.8 Sc 0.2 A 30nm / 100nm thick Ni / Au metal layer is deposited on the N ferroelectric layer 10 to form a gate 7. This gate is then used as a self-aligned etching mask to pattern the ferroelectric layer. The patterning process specifically involves removing Al from the area corresponding to the gate 7. 0.8 Sc 0.2 N-ferroelectric layer;

[0092] 6) With source 6 and drain 8 on, a negative bias is applied to gate 7 to control Al. 0.8 Sc 0.2 The N-ferroelectric layer 10 is pre-polarized, that is, the orientation of the ferroelectric domains within the ferroelectric material is unified by applying voltage, so that the polarization intensity of the crystal reaches saturation, and the polarization direction is aligned with Al. 0.3 Ga 0.7 The N-barrier layer 5 is the opposite;

[0093] 7) The formed device is passivated by depositing a layer of SiNx on the HEMT surface using low-pressure chemical vapor deposition (LPCVD) to passivate defects on the HEMT surface, reduce leakage current, and improve breakdown characteristics. This completes the process. Figure 10 The fabrication of the enhanced GaN-based HEMT device is shown.

[0094] The enhancement-mode GaN-based HEMT device with fin structure in this embodiment benefits from the depletion effect of the two-dimensional electron gas by the strong ferroelectric properties of AlScN, which can greatly reduce the requirement for the fin width d. Even if the width d is on the micrometer scale, the presence of the AlScN ferroelectric layer can still achieve an enhancement-mode HEMT device with a threshold voltage greater than 0.

[0095] Next, please refer to Figure 11 This invention illustrates a directly coupled logic circuit consisting of a conventional depletion-type GaN-based HEMT device without an AlScN ferroelectric thin film and an enhancement-type GaN-based HEMT device with an AlScN ferroelectric thin film as described in Embodiment 1 of this invention. Compared to the coupled logic circuit consisting of a conventional depletion-type GaN-based HEMT device without an AlScN ferroelectric thin film and a conventional P-gate or grooved-gate enhancement-type GaN-based HEMT device, this invention utilizes ferroelectric AlScN materials integrated with the HEMT structure, which can greatly reduce process complexity. The process route can be based entirely on the depletion-type HEMT process without adding new processes, thus improving the efficiency and yield of device fabrication.

[0096] In summary, the AI-based solutions provided in the above embodiments of the present invention... 1-a Sc a Enhanced GaN-based HEMT devices using N (0.05≤a≤0.4) ferroelectric materials are achieved by placing Al between the gate and the barrier layer. 1-a Sc a The N-ferroelectric material layer is composed of Al 1-a Sc a Nitrogen ferroelectric materials possess high remanent polarization, depleting the two-dimensional electron gas in the channel beneath the gate. This enables the fabrication of enhanced HEMT devices while maintaining the planar structure of the device, avoiding the bottleneck problems of high etching damage and difficulty in controlling etching depth in traditional D-type gates, recessed gates, and fluorine plasma implantation processes. Furthermore, by changing Al... 1-a Sc a The Sc component content of N ferroelectric materials can modulate the threshold voltage of HEMT devices to meet more application requirements.

[0097] In addition, the inventors of this case also conducted experiments with other raw materials, process operations, and process conditions described in this specification, referring to the aforementioned embodiments, and obtained relatively ideal results in all cases.

[0098] It should be understood that the technical solutions of the present invention are not limited to the specific embodiments described above. Any technical modifications made to the technical solutions of the present invention without departing from the spirit and scope of the claims are within the scope of protection of the present invention.

Claims

1. An enhancement-gaN-based HEMT device, characterized in that... include: An epitaxial structure includes a first semiconductor layer and a second semiconductor layer disposed on the first semiconductor layer, wherein a two-dimensional electron gas is formed between the first semiconductor layer and the second semiconductor layer; And a source, drain and gate formed on the second semiconductor layer, wherein the source and drain can be electrically connected through the two-dimensional electron gas, and the gate is distributed between the source and drain; A ferroelectric layer is disposed between the gate and the second semiconductor layer. Both the ferroelectric layer and the second semiconductor layer grow along the c-axis and have matched crystal lattices. The ferroelectric layer is formed of a hexagonal ferroelectric material and serves to deplete the two-dimensional electron gas below the gate. The hexagonal ferroelectric material is Al. 1-a Sc a N, where 0.05≤a≤0.

4.

2. The enhanced GaN-based HEMT device according to claim 1, characterized in that: The thickness of the ferroelectric layer is 20~100nm.

3. The enhanced GaN-based HEMT device according to claim 1, characterized in that: The HEMT device includes at least one fin, the fin including at least a partial region of the first semiconductor layer and a second semiconductor layer disposed on at least a partial region of the first semiconductor layer, a gate covering the channel region of the fin, and the ferroelectric layer being distributed at least between the gate and the fin.

4. The enhanced GaN-based HEMT device according to claim 1, characterized in that: The epitaxial structure further includes a third semiconductor layer disposed between the first semiconductor layer and the second semiconductor layer.

5. The enhanced GaN-based HEMT device according to claim 4, characterized in that: The epitaxial structure further includes a buffer layer disposed between the substrate and the first semiconductor layer.

6. The enhanced GaN-based HEMT device according to claim 5, characterized in that: The thickness of the first semiconductor layer is 10~500nm, and the material is Al. x Ga 1-x N, where 0 ≤ x ≤ 1.

7. The enhanced GaN-based HEMT device according to claim 6, characterized in that: The second semiconductor layer has a thickness of 10~50nm and is made of Al. y Ga 1-y N, where 0 ≤ y ≤ 1.

8. The enhanced GaN-based HEMT device according to claim 4, characterized in that: The thickness of the third semiconductor layer is 1~5nm, and the material is AlN.

9. The enhanced GaN-based HEMT device according to claim 6, characterized in that: The thickness of the buffer layer is 10nm~10µm, and the material is Al. z Ga 1-z N, where 0 ≤ z ≤ 1.

10. The enhanced GaN-based HEMT device according to claim 7, characterized in that: x <y。 11. The enhanced GaN-based HEMT device according to claim 9, characterized in that: x≤z.

12. A method for fabricating an enhanced GaN-based HEMT device, characterized in that, include: An epitaxial structure is provided, the epitaxial structure including a first semiconductor layer and a second semiconductor layer disposed on the first semiconductor layer, wherein a two-dimensional electron gas is formed between the first semiconductor layer and the second semiconductor layer; Source and drain electrodes are fabricated on the second semiconductor layer, and the source and drain electrodes can be electrically connected through the two-dimensional electron gas. as well as A ferroelectric layer, which interacts with the gate, is formed on the second semiconductor layer between the source and drain electrodes using a hexagonal ferroelectric material. The gate electrode is then fabricated on this ferroelectric layer. The hexagonal ferroelectric material is Al. 1-a Sc a N, where 0.05≤a≤0.

4.

13. The preparation method according to claim 12, characterized in that, Also includes: The epitaxial structure is processed such that at least a partial region of the first semiconductor layer cooperates with a second semiconductor layer disposed on at least a partial region of the first semiconductor layer to form a fin; The ferroelectric layer and the gate are sequentially used to cover at least the channel region of the fin.

14. The preparation method according to claim 12 or 13, characterized in that, Specifically, it includes: The ferroelectric layer is formed using any one of the following methods: metal-organic vapor phase epitaxy, molecular beam epitaxy, or magnetron sputtering.

15. The preparation method according to claim 12 or 13, characterized in that, Also includes: The step of applying a negative bias voltage to the gate to pre-polarize the ferroelectric layer.

16. The preparation method according to claim 12 or 13, characterized in that, Also includes: The step of passivating the HEMT device.

17. A coupled logic circuit, characterized in that, The enhanced GaN-based HEMT device comprises any one of claims 1-11.

18. A GaN power integrated circuit, characterized in that, The enhanced GaN-based HEMT device comprises any one of claims 1-11.

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