An epitaxial structure, an LED chip, and a method for fabricating the same

Abstract

This invention provides an epitaxial structure, an LED chip, and a method for fabricating the same. The epitaxial structure includes a patterned hybrid growth substrate, an N-type semiconductor layer, an active region, and a P-type semiconductor layer. The hybrid growth substrate includes a sapphire substrate and multiple protrusion structures and a buffer layer disposed on the upper surface of the sapphire substrate. The protrusion structures are made of a corrosive material, and the bottoms of adjacent protrusion structures are close together to form bottom-connected protrusion structures. The bottom edges of some protrusion structures partially overlap with the edges of the upper surface of the sapphire substrate. Furthermore, the contact area between the buffer layer and the sapphire substrate is much smaller than the contact area between each of the protrusion structures and the sapphire substrate, enabling the LED chip to be peeled off from the sapphire substrate efficiently and at low cost using a wet peeling method.

Description

Technical Field

[0001] This invention belongs to the field of LED, and more specifically, relates to an epitaxial structure, an LED chip, and a method for manufacturing the same. Background Technology

[0002] The most common chip structure for blue-green light-emitting diodes (LEDs) is the horizontal electrode structure. While this structure is relatively inexpensive, the use of a sapphire substrate leads to poor heat dissipation, affecting reliability. This is particularly problematic in high-power lighting applications where heat dissipation is critical, where the disadvantages of the horizontal electrode structure become more pronounced. The vertical electrode structure, on the other hand, utilizes a substrate with better thermal conductivity, such as silicon, making it a key direction for LED development. Lifting technology is crucial for the vertical chip structure of blue-green LEDs. Currently, the most widely used laser lift-off technique involves laser ablation of the thin interface layer between the epitaxial structure and the substrate, effectively separating them. However, this technique requires expensive laser lift-off equipment, and the yield rate is not high, especially with the widely used 4-inch and 6-inch substrates. Due to the epitaxial process, the resulting epitaxial wafers have significant warpage, and the lift-off layers are often not on the same horizontal plane, making it more difficult to focus the laser etching points and resulting in a low yield rate.

[0003] If a wet stripping method is used, it can not only effectively improve the stripping yield, but also significantly reduce the stripping cost and the method is simple. However, since blue-green light-emitting diodes use GaN epitaxial structures grown on sapphire substrates, and sapphire substrates are not easily corroded, their epitaxial structure and GaN material system make it difficult to use a wet stripping method. Summary of the Invention

[0004] In view of this, the present invention provides an epitaxial structure, an LED chip and a method for manufacturing the same, to solve the problems of high production cost, large warpage and low yield of epitaxial wafers caused by laser lift-off of sapphire substrates in the vertical chip structure of blue-green light-emitting diodes in the prior art, and the difficulty in using wet lift-off of sapphire substrates.

[0005] To achieve the above objectives, the technical solution adopted by the present invention is as follows:

[0006] An epitaxial structure, comprising:

[0007] A patterned hybrid growth substrate, the hybrid growth substrate comprising a sapphire substrate and a plurality of protrusion structures and a buffer layer disposed on the upper surface of the sapphire substrate, wherein the protrusion structures are made of an easily corroded material;

[0008] The bottoms of adjacent protrusions are close together to form a bottom-connected protrusion structure. The bottom edge of some of the protrusions partially overlaps with the edge of the upper surface of the sapphire substrate. The periodically hollowed-out grooves of the protrusions expose the sapphire substrate. A buffer layer is provided on the exposed upper surface of the sapphire substrate. The buffer layer is connected to the sidewall of each protrusion but does not cover each protrusion. The contact area between the buffer layer and the sapphire substrate is much smaller than the contact area between each protrusion and the sapphire substrate.

[0009] A GaN stacked structure is disposed on the hybrid growth substrate. The GaN stacked structure includes an N-type semiconductor layer, an active region, and a P-type semiconductor layer stacked sequentially along a first direction. The first direction is perpendicular to the sapphire substrate and extends from the sapphire substrate toward the P-type semiconductor layer. The N-type semiconductor layer is close to the bump structure and the buffer layer.

[0010] Preferably, the transverse cross-section of each of the protruding structures gradually decreases from bottom to top; the transverse cross-section of the buffer layer gradually increases from bottom to top.

[0011] Preferably, an undoped GaN layer is provided between the hybrid growth substrate and the GaN stacked structure, and the undoped GaN layer covers the bump structure and the buffer layer, and is connected to the N-type semiconductor layer.

[0012] Preferably, the bottom width of the protrusion structure is D1, where 10um>D1>0um; the bottom width of the groove is D2, where 4um>D2>0um; the thickness of the protrusion structure is H1, where 10um>H1>0um; and the thickness of the buffer layer is H2, where 1um>H2>0um, and H1>H2.

[0013] Preferably, the surface area of ​​the sapphire substrate is S1, the contact area between each protrusion structure and the sapphire substrate is S2, and the contact area between the buffer layer and the sapphire substrate is S3, wherein S1 > S2 > S3, and the ratio of S3 to S1 is between 0 and 21.5.

[0014] Preferably, the material of the protruding structure includes one or more of the following easily corroded materials: SiO2, SiN, GaAs, AlGaAs, AlGaInP, and GaInP.

[0015] Preferably, the material of the buffer layer includes one or more of AlN, AlGaN, GaN, etc., or compounds doped with In, oxygen, or Mg.

[0016] An LED chip, comprising:

[0017] The GaN stacked structure described in any of the above claims;

[0018] A metal mirror and a bonding layer are sequentially stacked on the GaN stacked structure, and the metal mirror is disposed on the surface of the P-type semiconductor layer away from the active region.

[0019] A conductive substrate is disposed on the side surface of the bonding layer opposite to the metal reflector;

[0020] A P-type electrode is disposed on the surface of the conductive substrate opposite to the bonding layer.

[0021] An N-type electrode is stacked on the surface of the N-type semiconductor layer away from the active region.

[0022] The present invention also provides a method for manufacturing an LED chip, for use in the aforementioned LED chip, comprising the following steps:

[0023] Step S1: Fabricate a patterned hybrid growth substrate, the hybrid growth substrate including a sapphire substrate and multiple protrusion structures and a buffer layer grown on the upper surface of the sapphire substrate, the protrusion structures being made of an easily corroded material;

[0024] The bottoms of adjacent protrusions are close together to form a bottom-connected protrusion structure. The bottom edge of some of the protrusions partially overlaps with the edge of the upper surface of the sapphire substrate. The periodically hollowed-out grooves of the protrusions expose the sapphire substrate, and the buffer layer is grown on the exposed upper surface of the sapphire substrate. The buffer layer is connected to the sidewalls of each protrusion but does not cover each protrusion. The contact area between the buffer layer and the sapphire substrate is much smaller than the contact area between each protrusion and the sapphire substrate.

[0025] The transverse cross-section of each of the protruding structures gradually decreases from bottom to top; the transverse cross-section of the buffer layer gradually increases from bottom to top.

[0026] The bottom width of the protruding structure is D1, where 10um>D1>0um; the bottom width of the groove is D2, where 4um>D2>0um; the thickness of the protruding structure is H1, where 10um>H1>0um; the thickness of the buffer layer is H2, where 1um>H2>0um, and H1>H2.

[0027] The surface area of ​​the sapphire substrate is S1, the contact area between each protrusion structure and the sapphire substrate is S2, and the contact area between the buffer layer and the sapphire substrate is S3, wherein S1 > S2 > S3, and the ratio of S3 to S1 is between 0 and 21.5.

[0028] The material of the protruding structure includes one or more of the following easily corroded materials: SiO2, SiN, GaAs, AlGaAs, AlGaInP, and GaInP.

[0029] The material of the buffer layer includes one or more of AlN, AlGaN, GaN, etc., or compounds doped with In, oxygen, or Mg.

[0030] Step S2: Grow a GaN stacked structure on the hybrid growth substrate. The GaN stacked structure includes an N-type semiconductor layer, an active region, and a P-type semiconductor layer stacked sequentially along the growth direction.

[0031] Step S3: A metal mirror and a bonding layer are sequentially stacked on the GaN stacked structure. The metal mirror is disposed on the surface of the P-type semiconductor layer away from the active region.

[0032] Step S4: Bond a conductive substrate to the surface of the bonding layer;

[0033] Step S5: The sapphire substrate is peeled off by wet method, and the protrusion structure is etched away by lateral etching solution, so that the sapphire substrate can be automatically removed.

[0034] Step S6: Remove the buffer layer by dry etching;

[0035] Step S7: Fabricate a P-type electrode, which is disposed on the side surface of the conductive substrate opposite to the bonding layer.

[0036] Step S8: Fabricate an N-type electrode, which is disposed on the surface of the N-type semiconductor layer away from all source regions.

[0037] This invention also provides another method for manufacturing an LED chip, for use in the LED chip described above, comprising the following steps:

[0038] Step A1: Fabricate a patterned hybrid growth substrate, the hybrid growth substrate including a sapphire substrate and multiple protrusion structures and a buffer layer grown on the upper surface of the sapphire substrate, the protrusion structures being made of an easily corroded material;

[0039] The bottoms of adjacent protrusions are close together to form a bottom-connected protrusion structure. The bottom edge of some of the protrusions partially overlaps with the edge of the upper surface of the sapphire substrate. The periodically hollowed-out grooves of the protrusions expose the sapphire substrate, and the buffer layer is grown on the exposed upper surface of the sapphire substrate. The buffer layer is connected to the sidewalls of each protrusion but does not cover each protrusion. The contact area between the buffer layer and the sapphire substrate is much smaller than the contact area between each protrusion and the sapphire substrate.

[0040] The transverse cross-section of each of the protruding structures gradually decreases from bottom to top; the transverse cross-section of the buffer layer gradually increases from bottom to top.

[0041] The bottom width of the protruding structure is D1, where 10um>D1>0um; the bottom width of the groove is D2, where 4um>D2>0um; the thickness of the protruding structure is H1, where 10um>H1>0um; the thickness of the buffer layer is H2, where 1um>H2>0um, and H1>H2.

[0042] The surface area of ​​the sapphire substrate is S1, the contact area between each protrusion structure and the sapphire substrate is S2, and the contact area between the buffer layer and the sapphire substrate is S3, wherein S1 > S2 > S3, and the ratio of S3 to S1 is between 0 and 21.5.

[0043] The material of the protruding structure includes one or more of the following easily corroded materials: SiO2, SiN, GaAs, AlGaAs, AlGaInP, and GaInP.

[0044] The material of the buffer layer includes one or more of AlN, AlGaN, GaN, etc., or compounds doped with In, oxygen, or Mg.

[0045] Step A2: Grow an undoped GaN layer on the hybrid growth substrate, wherein the undoped GaN layer covers the protrusion structure and the buffer layer;

[0046] Step A3: Grow a GaN stacked structure on the undoped GaN layer, the stacked structure comprising an N-type semiconductor layer, an active region and a P-type semiconductor layer stacked sequentially along the growth direction;

[0047] Step A4: A metal mirror and a bonding layer are sequentially stacked on the stacked structure, wherein the metal mirror is disposed on the surface of the P-type semiconductor layer away from the active region;

[0048] Step A5: Bond a conductive substrate to the surface of the bonding layer;

[0049] Step A6: The sapphire substrate is peeled off by wet method, and the protrusion structure is etched away by lateral etching solution, so that the sapphire substrate will automatically fall off.

[0050] Step A7: Remove the buffer layer and the undoped GaN layer by dry etching;

[0051] Step A8: Fabricate a P-type electrode, which is disposed on the side surface of the conductive substrate opposite to the bonding layer.

[0052] Step A9: Fabricate an N-type electrode, which is disposed on the surface of the N-type semiconductor layer away from all source regions.

[0053] The above technical solution achieves the following results:

[0054] 1. The epitaxial structure provided by this invention, by setting a patterned hybrid growth substrate, includes a sapphire substrate and multiple protrusion structures and a buffer layer disposed on the upper surface of the sapphire substrate. The protrusion structures are made of easily corroded materials, and the bottoms of adjacent protrusion structures are close to each other to form bottom-connected protrusion structures. The bottom edges of some protrusion structures partially overlap with the edges of the upper surface of the sapphire substrate. Furthermore, the contact area between the buffer layer and the sapphire substrate is much smaller than the contact area between each of the protrusion structures and the sapphire substrate, which allows the LED chip to be peeled off from the sapphire substrate efficiently and at low cost using a wet peeling method. The buffer layer can effectively reduce the stress between the protrusion structures, which not only prevents the protrusion structures from falling off and improves the reliability of the hybrid growth substrate, but also avoids the problem of lattice mismatch between the sapphire substrate and the GaN material, which causes lattice mismatch and active region warping in the GaN stacked structure.

[0055] 2. Furthermore, by setting the transverse cross-section of each protrusion structure to gradually decrease from bottom to top, and the transverse cross-section of the buffer layer to gradually increase from bottom to top, the contact surface between the buffer layer and the GaN stacked structure is increased, the lattice mismatch of the GaN stacked structure is reduced, and the wavelength uniformity of the epitaxial structure is improved.

[0056] 3. Furthermore, by setting an undoped GaN layer and growing a GaN stacked structure on the undoped GaN layer, the crystal quality of the GaN stacked structure can be improved, further solving the problems of lattice mismatch between the sapphire substrate and the GaN stacked structure and active region warping.

[0057] 4. The LED chip provided by the present invention, by using the aforementioned GaN stacked structure, and in conjunction with the use of a metal reflector, bonding layer, conductive substrate and electrodes, can effectively improve the yield of LED chips.

[0058] 5. The LED chip manufacturing method provided by the present invention can effectively solve the problems of high cost caused by using laser lift-off equipment and low yield caused by laser ablation of epitaxial layer interface through a simple and convenient process. Attached Figure Description

[0059] To more clearly illustrate the technical solutions in the embodiments of the present invention or the prior art, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are only embodiments of the present invention. For those skilled in the art, other drawings can be obtained based on the provided drawings without creative effort.

[0060] Figure 1 This is a schematic diagram of an epitaxial structure provided in Embodiment 1 of the present invention;

[0061] Figure 2.1 This is a top view of the hybrid growth substrate provided in Embodiment 1 of the present invention;

[0062] Figure 2.2 for Figure 2.1 The diagram shows a cross-sectional view of the hybrid growth substrate along line AA.

[0063] Figure 2.3 for Figure 2.1 The diagram shows a cross-sectional view of the hybrid growth substrate along the BB line.

[0064] Figure 3 This is a schematic diagram of an epitaxial structure provided in Embodiment 2 of the present invention;

[0065] Figure 4 This is a schematic diagram of an LED chip structure provided in Embodiment 3 of the present invention;

[0066] Figure 5 This is a schematic diagram of an LED chip structure provided in Embodiment 4 of the present invention;

[0067] Figures 6.1 to 6.8 This is a schematic diagram of the structure corresponding to each step of the LED chip manufacturing method provided in Embodiment 5 of the present invention;

[0068] Figures 7.1 to 7.9 This is a schematic diagram of the structure corresponding to each step of the LED chip manufacturing method provided in Embodiment Six of the present invention.

[0069] Explanation of symbols in the diagram:

[0070] 1. Hybrid growth substrate; 11. Sapphire substrate; 12. Bump structure; 13. Buffer layer; 2. GaN stacked structure; 21. N-type semiconductor layer; 22. Active region; 23. P-type semiconductor layer; 3. Undoped GaN layer; 4. Metal mirror; 5. Bonding layer; 6. Conductive substrate; 7. P-type electrode; 8. N-type electrode; D1. Bottom width of bump structure; D2. Bottom width of groove; H1. Thickness of bump structure; H2. Thickness of buffer layer. Detailed Implementation

[0071] To make the content of this invention clearer, the technical solutions in the embodiments of this application will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of this application, and not all embodiments. Based on the embodiments in this application, all other embodiments obtained by those of ordinary skill in the art without creative effort are within the scope of protection of this application.

[0072] Many specific details are set forth in the following description in order to provide a full understanding of this application. However, this application may also be implemented in other ways different from those described herein. Those skilled in the art can make similar extensions without departing from the spirit of this application. Therefore, this application is not limited to the specific embodiments disclosed below.

[0073] Secondly, this application provides a detailed description in conjunction with schematic diagrams. When detailing the embodiments of this application, for ease of explanation, the cross-sectional views illustrating the device structure may be partially enlarged, not adhering to the usual scale. Furthermore, the schematic diagrams are merely examples and should not limit the scope of protection of this application. In addition, actual fabrication should include three-dimensional spatial dimensions of length, width, and depth.

[0074] Example 1

[0075] This embodiment provides an epitaxial structure, such as Figure 1 As shown, it includes:

[0076] The patterned hybrid growth substrate 1 includes a sapphire substrate 11 and a plurality of protrusion structures 12 and a buffer layer 13 disposed on the upper surface of the sapphire substrate 11. The protrusion structures 12 are made of easily corroded materials.

[0077] like Figures 2.1 to 2.3 As shown, the bottoms of adjacent protrusions 12 are close to each other, forming protrusions 12 connected at the bottom. The bottom edge of some protrusions 12 partially overlaps with the edge of the upper surface of the sapphire substrate 11, and the periodically hollowed-out grooves of the protrusions 12 expose the sapphire substrate 11. A buffer layer 13 is provided on the exposed upper surface of the sapphire substrate 11. The buffer layer 13 is connected to the sidewall of each protrusion 12, but does not cover each protrusion 12. The contact area between the buffer layer 13 and the sapphire substrate 11 is much smaller than the contact area between each protrusion 12 and the sapphire substrate 11.

[0078] A GaN stacked structure 2 is disposed on a hybrid growth substrate 1. The GaN stacked structure 2 includes an N-type semiconductor layer 21, an active region 22 and a P-type semiconductor layer 23 stacked sequentially along a first direction. The first direction is perpendicular to the sapphire substrate 11 and points from the sapphire substrate 11 to the P-type semiconductor layer 23. The N-type semiconductor layer 21 is close to the protrusion structure 12 and the buffer layer 13.

[0079] It should be noted that the surface of the N-type semiconductor layer 21 connected to the protrusion structure 12 and the buffer layer 13 in this embodiment will have an uneven structure, thereby forming a roughened surface.

[0080] Optionally, in this embodiment, the transverse cross-section of each protruding structure 12 gradually decreases from bottom to top; the transverse cross-section of the buffer layer 13 gradually increases from bottom to top.

[0081] It should be noted that this embodiment increases the contact area between the buffer layer 13 and the GaN stacked structure 2, reduces the lattice mismatch of the GaN stacked structure 2, and improves the wavelength uniformity of the epitaxial structure.

[0082] like Figures 2.2 to 2.3 As shown, optionally, in this embodiment, the bottom width of the protrusion structure is D1, where 10um>D1>0um; the bottom width of the groove is D2, where 4um>D2>0um; the thickness of the protrusion structure is H1, where 10um>H1>0um; and the thickness of the buffer layer is H2, where 1um>H2>0um, and H1>H2.

[0083] Optionally, in this embodiment, the surface area of ​​the sapphire substrate is S1, the contact area between each protrusion structure and the sapphire substrate is S2, and the contact area between the buffer layer and the sapphire substrate is S3, wherein S1 > S2 > S3, and the ratio of S3 to S1 is between 0 and 21.5.

[0084] Optionally, in this embodiment, the bottoms of adjacent protrusions 12 are close to each other, forming a bottom-connected array of protrusions 12.

[0085] Optionally, in this embodiment, the protrusions 12 disposed on the upper surface of the sapphire substrate 11 are of the same shape and size and are evenly distributed.

[0086] Optionally, in this embodiment, the shape of each protrusion structure 12 includes a hemispherical shape, the bottom of the protrusion structure 12 is circular, and the sidewall of the protrusion structure 12 is arc-shaped.

[0087] Optionally, in this embodiment, the material of the protrusion structure 12 includes one or more of the following easily corroded materials: SiO2, SiN, GaAs, AlGaAs, AlGaInP, and GaInP.

[0088] Optionally, in this embodiment, the material of the buffer layer 13 includes one or more of AlN, AlGaN, GaN, or compounds thereof that are doped with In, oxygen, or Mg.

[0089] This embodiment uses a patterned hybrid growth substrate 1, which includes a sapphire substrate 11 and multiple protrusions 12 and a buffer layer 13 disposed on the upper surface of the sapphire substrate 11. The protrusions 12 are made of a corrosive material, and the bottoms of adjacent protrusions 12 are close to each other, forming bottom-connected protrusions 12. The bottom edges of some protrusions 12 partially overlap with the edges of the upper surface of the sapphire substrate 11. Furthermore, the contact area between the buffer layer 13 and the sapphire substrate 11 is much smaller than the contact area between each protrusion 12 and the sapphire substrate 11, which allows the LED chip to be peeled off from the sapphire substrate 11 efficiently and at low cost using a wet peeling method. The buffer layer 13 can effectively reduce the stress between the protrusions 12, which not only prevents the protrusions 12 from falling off and improves the reliability of the hybrid growth substrate 1, but also avoids the problem of lattice mismatch between the sapphire substrate 11 and the GaN material, which causes lattice mismatch in the GaN stacked structure 2 and warping of the active region 22.

[0090] Example 2

[0091] like Figure 3 As shown, an epitaxial structure differs from the first embodiment above in that an undoped GaN layer 3 is provided between the hybrid growth substrate 1 and the GaN stacked structure 2, and the undoped GaN layer 3 covers the protrusion structure 12 and the buffer layer 13, and is connected to the N-type semiconductor layer 21.

[0092] This embodiment improves the crystal quality of the GaN stacked structure 2 by growing it on the undoped GaN layer 3, and further solves the problems of lattice mismatch between the sapphire substrate 11 and the GaN stacked structure 2, and warping of the active region 22.

[0093] Example 3

[0094] like Figure 4 As shown, an LED chip adopts the GaN stacked structure 2 of the above embodiment 1;

[0095] A metal mirror 4 and a bonding layer 5 are sequentially stacked on the GaN stacked structure 2. The metal mirror 4 is disposed on the surface of the P-type semiconductor layer 23 away from the active region 22.

[0096] A conductive substrate 6 is disposed on the side surface of the bonding layer 5 facing away from the metal reflector 4.

[0097] P-type electrode 7 is disposed on the side of the conductive substrate 6 away from the bonding layer 5.

[0098] The N-type electrode 8 is stacked on the surface of the N-type semiconductor layer 21 on the side away from the active region 22.

[0099] This embodiment adopts the GaN stacked structure 2 of the above embodiment 1. Since the surface of the N-type semiconductor layer 21 connected to the protrusion structure 12 and the buffer layer 13 in embodiment 1 has a roughened surface, it is beneficial to enhance the light extraction efficiency. In conjunction with the use of the metal reflector 4, bonding layer 5, conductive substrate 6 and electrodes, the yield and luminous efficiency of the LED chip can be effectively improved.

[0100] Example 4

[0101] like Figure 5 As shown, an LED chip adopts the GaN stacked structure 2 of the above embodiment 2;

[0102] A metal mirror 4 and a bonding layer 5 are sequentially stacked on the GaN stacked structure 2. The metal mirror 4 is disposed on the surface of the P-type semiconductor layer 23 away from the active region 22.

[0103] A conductive substrate 6 is disposed on the side surface of the bonding layer 5 facing away from the metal reflector 4.

[0104] P-type electrode 7 is disposed on the side of the conductive substrate 6 away from the bonding layer 5.

[0105] The N-type electrode 8 is stacked on the surface of the N-type semiconductor layer 21 on the side away from the active region 22.

[0106] This embodiment adopts the GaN stacked structure 2 of the above embodiment 2. Since there is an undoped GaN layer 3 between the hybrid growth substrate 1 and the GaN stacked structure 2 in embodiment 2, the growth of the GaN stacked structure 2 on the undoped GaN layer 3 can better improve the crystal quality of the GaN stacked structure 2. In addition, with the use of the metal reflector 4, bonding layer 5, conductive substrate 6 and electrodes, the yield of LED chips can be further improved.

[0107] Example 5

[0108] A method for manufacturing an LED chip, used to manufacture the LED chip of Embodiment 3 above, the method comprising the following steps:

[0109] Step S101, as follows Figure 6.1 As shown, a patterned hybrid growth substrate 1 is fabricated. The hybrid growth substrate 1 includes a sapphire substrate 11 and a plurality of protrusion structures 12 and a buffer layer 13 grown on the upper surface of the sapphire substrate 11. The protrusion structures 12 are made of easily corroded materials.

[0110] like Figures 2.1 to 2.3As shown, the bottoms of adjacent protrusions 12 are close to each other, forming protrusions 12 connected at the bottom. The bottom edge of some protrusions 12 partially overlaps with the edge of the upper surface of the sapphire substrate 11, and the periodically hollowed-out grooves of the protrusions 12 expose the sapphire substrate 11. A buffer layer 13 is grown on the exposed upper surface of the sapphire substrate 11. The buffer layer 13 is connected to the sidewall of each protrusion 12, but does not cover each protrusion 12. The contact area between the buffer layer 13 and the sapphire substrate 11 is much smaller than the contact area between each protrusion 12 and the sapphire substrate 11.

[0111] The transverse cross-section of each protruding structure 12 gradually decreases from bottom to top; the transverse cross-section of the buffer layer 13 gradually increases from bottom to top.

[0112] The bottom width of the raised structure is D1, where 10um>D1>0um; the bottom width of the groove is D2, where 4um>D2>0um; the thickness of the raised structure is H1, where 10um>H1>0um; the thickness of the buffer layer is H2, where 1um>H2>0um, and H1>H2.

[0113] The surface area of ​​the sapphire substrate is S1, the contact area between each protrusion structure and the sapphire substrate is S2, and the contact area between the buffer layer and the sapphire substrate is S3, wherein S1 > S2 > S3, and the ratio of S3 to S1 is between 0 and 21.5.

[0114] The material of the protrusion structure 12 includes one or more of the following easily corroded materials: SiO2, SiN, GaAs, AlGaAs, AlGaInP, and GaInP.

[0115] The material of the buffer layer 13 includes one or more of AlN, AlGaN, GaN, etc., or compounds doped with In, oxygen, or Mg.

[0116] Optionally, in this embodiment, the bottoms of adjacent protrusions 12 are close to each other, forming a bottom-connected array of protrusions 12.

[0117] Optionally, in this embodiment, the protrusions 12 disposed on the upper surface of the sapphire substrate 11 are of the same shape and size and are evenly distributed.

[0118] Optionally, in this embodiment, the shape of each protrusion structure 12 includes a hemispherical shape, the bottom of the protrusion structure 12 is circular, and the sidewall of the protrusion structure 12 is arc-shaped.

[0119] Step S102, as follows Figure 6.2As shown, a GaN stacked structure 2 is grown on a hybrid growth substrate 1. The GaN stacked structure 2 includes an N-type semiconductor layer 21, an active region 22, and a P-type semiconductor layer 23 stacked sequentially along the growth direction.

[0120] It should be noted that the surface of the N-type semiconductor layer 21 connected to the protrusion structure 12 and the buffer layer 13 in this embodiment will have an uneven structure, thereby forming a roughened surface.

[0121] Step S103, as follows Figure 6.3 As shown, a metal mirror 4 and a bonding layer 5 are sequentially stacked on the GaN stacked structure 2. The metal mirror 4 is disposed on the surface of the P-type semiconductor layer 23 away from the active region 22.

[0122] Step S104, as follows Figure 6.4 As shown, a conductive substrate 6 is bonded to the surface of the bonding layer 5.

[0123] Step S105, as follows Figure 6.5 As shown, the sapphire substrate 11 is peeled off by wet method, and the protrusion structure 12 is etched away by lateral etching with an etching solution, so that the sapphire substrate 11 can be automatically detached.

[0124] It should be noted that in this embodiment, the bottom edge of some of the protrusions 12 partially overlaps with the edge of the upper surface of the sapphire substrate 11 to ensure that the etching solution can etch from the periphery of the protrusions 12 inward. Also, the contact area between the buffer layer 13 and the sapphire substrate 11 is small, so the sapphire substrate 11 will automatically detach after the protrusions 12 are etched. The protrusions 12 can be removed by selecting appropriate etching solutions according to different easily corroded materials, and these etching solutions can both etch away the protrusions 12 and not affect the GaN stacked structure 2.

[0125] Step S106, as follows Figure 6.6 As shown, the buffer layer 13 is removed by dry etching.

[0126] It should be noted that in this embodiment, after removing the hybrid growth substrate 1, the roughened surface of the N-type semiconductor layer 21 is exposed.

[0127] Step S107, as follows Figure 6.7 As shown, a P-type electrode 7 is fabricated and disposed on the side of the conductive substrate 6 away from the bonding layer 5.

[0128] Step S108, as follows Figure 6.8 As shown, an N-type electrode 8 is fabricated and disposed on the surface of the N-type semiconductor layer 21 on the side away from the active region 22.

[0129] It should be noted that the N-type electrode 8 in this embodiment is disposed on the side surface of the N-type semiconductor layer 21 that is away from all source regions 22, that is, on the roughened surface of the N-type semiconductor layer 21.

[0130] This embodiment fabricates a patterned hybrid growth substrate 1, which includes a sapphire substrate 11 and multiple protrusions 12 and a buffer layer 13 grown on the upper surface of the sapphire substrate 11. The protrusions 12 are made of an easily corroded material, and the bottoms of adjacent protrusions 12 are close to each other, forming bottom-connected protrusions 12. The bottom edges of some protrusions 12 partially overlap with the edges of the upper surface of the sapphire substrate 11. Furthermore, the contact area between the buffer layer 13 and the sapphire substrate 11 is much smaller than the contact area between each protrusion 12 and the sapphire substrate 11. The protrusions 12 are etched away by lateral etching with an etching solution, allowing the sapphire substrate 11 to detach automatically. The surface of the N-type semiconductor layer 21 connected to the protrusions 12 and the buffer layer 13 has a roughened surface, which is beneficial to enhancing the light extraction efficiency. The LED chip formed by the above simple and convenient process can effectively solve the problems of high cost caused by using laser lift-off equipment and low yield caused by laser ablation of the epitaxial layer interface, and can also improve the luminous efficiency of the LED chip.

[0131] Example 6

[0132] A method for manufacturing an LED chip, used to manufacture the LED chip of Embodiment 4 above, the method comprising the following steps:

[0133] Step A101, as follows Figure 7.1 As shown, a patterned hybrid growth substrate 1 is fabricated. The hybrid growth substrate 1 includes a sapphire substrate 11 and a plurality of protrusion structures 12 and a buffer layer 13 grown on the upper surface of the sapphire substrate 11. The protrusion structures 12 are made of easily corroded materials.

[0134] like Figures 2.1 to 2.3 As shown, the bottoms of adjacent protrusions 12 are close to each other, forming protrusions 12 connected at the bottom. The bottom edge of some protrusions 12 partially overlaps with the edge of the upper surface of the sapphire substrate 11, and the periodically hollowed-out grooves of the protrusions 12 expose the sapphire substrate 11. A buffer layer 13 is grown on the exposed upper surface of the sapphire substrate 11. The buffer layer 13 is connected to the sidewall of each protrusion 12, but does not cover each protrusion 12. The contact area between the buffer layer 13 and the sapphire substrate 11 is much smaller than the contact area between each protrusion 12 and the sapphire substrate 11.

[0135] The transverse cross-section of each protruding structure 12 gradually decreases from bottom to top; the transverse cross-section of the buffer layer 13 gradually increases from bottom to top.

[0136] The bottom width of the protruding structure is D1, where 10um>D1>0um; the bottom width of the groove is D2, where 4um>D2>0um; the thickness of the protruding structure is H1, where 10um>H1>0um; the thickness of the buffer layer is H2, where 1um>H2>0um, and H1>H2.

[0137] The surface area of ​​the sapphire substrate is S1, the contact area between each protrusion structure and the sapphire substrate is S2, and the contact area between the buffer layer and the sapphire substrate is S3, wherein S1 > S2 > S3, and the ratio of S3 to S1 is between 0 and 21.5.

[0138] The material of the protrusion structure 12 includes one or more of the following easily corroded materials: SiO2, SiN, GaAs, AlGaAs, AlGaInP, and GaInP.

[0139] The material of the buffer layer 13 includes one or more of AlN, AlGaN, GaN, etc., or compounds doped with In, oxygen, or Mg.

[0140] Optionally, in this embodiment, the bottoms of adjacent protrusions 12 are close to each other, forming a bottom-connected array of protrusions 12.

[0141] Optionally, in this embodiment, the protrusions 12 disposed on the upper surface of the sapphire substrate 11 are of the same shape and size and are evenly distributed.

[0142] Optionally, in this embodiment, the shape of each protrusion structure 12 includes a hemispherical shape, the bottom of the protrusion structure 12 is circular, and the sidewall of the protrusion structure 12 is arc-shaped.

[0143] Step A102, as follows Figure 7.2 As shown, an undoped GaN layer 3 is grown on a hybrid growth substrate 1, and the undoped GaN layer 3 covers the protrusion structure 12 and the buffer layer 13.

[0144] Step A103, as follows Figure 7.3 As shown, a GaN stacked structure 2 is grown on an undoped GaN layer 3. The GaN stacked structure 2 includes an N-type semiconductor layer 21, an active region 22, and a P-type semiconductor layer 23 stacked sequentially along the growth direction.

[0145] Step A104, as follows Figure 7.4 As shown, a metal mirror 4 and a bonding layer 5 are sequentially stacked on the GaN stacked structure 2. The metal mirror 4 is disposed on the surface of the P-type semiconductor layer 23 away from the active region 22.

[0146] Step A105, as follows Figure 7.5 As shown, a conductive substrate 6 is bonded to the surface of the bonding layer 5.

[0147] Step A106, as follows Figure 7.6 As shown, the sapphire substrate 11 is peeled off by wet method, and the protrusion structure 12 is etched away by lateral etching with an etching solution, so that the sapphire substrate 11 can be automatically detached.

[0148] It should be noted that in this embodiment, the bottom edge of some of the protrusions 12 partially overlaps with the edge of the upper surface of the sapphire substrate 11 to ensure that the etching solution can etch from the periphery of the protrusions 12 inward. Also, the contact area between the buffer layer 13 and the sapphire substrate 11 is small, so the sapphire substrate 11 will automatically detach after the protrusions 12 are etched. The protrusions 12 can be removed by selecting appropriate etching solutions according to different easily corroded materials, and these etching solutions can both etch away the protrusions 12 and not affect the GaN stacked structure 2.

[0149] Step A107, as follows Figure 7.7 As shown, the buffer layer 13 and the undoped GaN layer 3 are removed by dry etching.

[0150] Step A108, as follows Figure 7.8 As shown, a P-type electrode 7 is fabricated and disposed on the side of the conductive substrate 6 away from the bonding layer 5.

[0151] Step A109, as follows Figure 7.9 As shown, an N-type electrode 8 is fabricated and disposed on the surface of the N-type semiconductor layer 21 on the side away from the active region 22.

[0152] This embodiment fabricates a patterned hybrid growth substrate 1, which includes a sapphire substrate 11 and multiple protrusions 12 and a buffer layer 13 grown on the upper surface of the sapphire substrate 11. The protrusions 12 are made of an easily corroded material, and the bottoms of adjacent protrusions 12 are close to each other, forming bottom-connected protrusions 12. The bottom edges of some protrusions 12 partially overlap with the edges of the upper surface of the sapphire substrate 11. Furthermore, the contact area between the buffer layer 13 and the sapphire substrate 11 is much smaller than the contact area between each protrusion 12 and the sapphire substrate 11. The protrusions 12 are etched away by lateral etching with an etching solution, allowing the sapphire substrate 11 to automatically detach. An undoped GaN layer 3 is also provided, and a GaN stacked structure 2 is grown on the undoped GaN layer 3, which can better improve the crystal quality of the GaN stacked structure 2. The LED chip formed by the above simple and convenient process can further improve the yield of LED chips.

[0153] Those skilled in the art should understand that, in the disclosure of this invention, the terms "lateral", "longitudinal", "upper", "lower", etc., indicate the orientation or positional relationship based on the orientation or positional relationship shown in the accompanying drawings. They are only for the convenience of describing this invention and simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, or be constructed and operated in a specific orientation. Therefore, the above terms should not be construed as limiting this invention.

[0154] It should be noted that the various embodiments in this specification are described in a progressive manner, with each embodiment focusing on the differences from other embodiments. The same or similar parts between the various embodiments can be referred to each other.

[0155] The above description of the disclosed embodiments enables those skilled in the art to make or use the invention. Various modifications to these embodiments will be readily apparent to those skilled in the art, and the general principles defined herein may be implemented in other embodiments without departing from the spirit or scope of the invention. Therefore, the invention is not to be limited to the embodiments shown herein, but is to be accorded the widest scope consistent with the principles and novel features disclosed herein.

Claims

1. An epitaxial structure, characterized in that, include: A patterned hybrid growth substrate, the hybrid growth substrate comprising a sapphire substrate and a plurality of protrusion structures and a buffer layer disposed on the upper surface of the sapphire substrate, wherein the protrusion structures are made of an easily corroded material; The protrusion structure is a single-layer structure, with the bottoms of adjacent protrusion structures close together to form a bottom-connected protrusion structure. The bottom edge of some of the protrusion structures partially overlaps with the edge of the upper surface of the sapphire substrate, and the periodically hollowed-out grooves of the protrusion structure expose the sapphire substrate. A buffer layer is provided on the exposed upper surface of the sapphire substrate. The buffer layer is connected to the sidewall of each protrusion structure but does not cover each protrusion structure. The contact area between the buffer layer and the sapphire substrate is much smaller than the contact area between each protrusion structure and the sapphire substrate. A GaN stacked structure is disposed on the hybrid growth substrate. The GaN stacked structure includes an N-type semiconductor layer, an active region, and a P-type semiconductor layer stacked sequentially along a first direction. The first direction is perpendicular to the sapphire substrate and extends from the sapphire substrate toward the P-type semiconductor layer. The N-type semiconductor layer is close to the protrusion structure and the buffer layer. An undoped GaN layer is provided between the hybrid growth substrate and the GaN stacked structure, and the undoped GaN layer covers the protrusion structure and the buffer layer, and is connected to the N-type semiconductor layer; Furthermore, the material of the buffer layer includes one or more of AlN, AlGaN, and GaN, and it is an In-doped, oxygen-doped, or Mg-doped compound; The surface area of ​​the sapphire substrate is S1, the contact area between each protrusion structure and the sapphire substrate is S2, and the contact area between the buffer layer and the sapphire substrate is S3, wherein S1 > S2 > S3, and the ratio of S3 to S1 ranges from 0 to 21.

5.

2. The epitaxial structure according to claim 1, characterized in that: The transverse cross-section of each of the protruding structures gradually decreases from bottom to top; the transverse cross-section of the buffer layer gradually increases from bottom to top.

3. The epitaxial structure according to claim 1, characterized in that: The bottom width of the raised structure is D1, where 10um>D1>0um; the bottom width of the groove is D2, where 4um>D2>0um; the thickness of the raised structure is H1, where 10um>H1>0um; the thickness of the buffer layer is H2, where 1um>H2>0um, and H1>H2.

4. The epitaxial structure according to claim 1, characterized in that: The material of the protruding structure includes one or more of the following easily corroded materials: SiO2, SiN, GaAs, AlGaAs, AlGaInP, and GaInP.

5. An LED chip, characterized in that, include: The GaN stacked structure described in any one of claims 1-4 is adopted; A metal mirror and a bonding layer are sequentially stacked on the GaN stacked structure, and the metal mirror is disposed on the surface of the P-type semiconductor layer away from the active region. A conductive substrate is disposed on the side surface of the bonding layer opposite to the metal reflector; A P-type electrode is disposed on the surface of the conductive substrate opposite to the bonding layer. An N-type electrode is stacked on the surface of the N-type semiconductor layer away from the active region.

6. A method for manufacturing an LED chip, used in the LED chip of claim 5, characterized in that, The manufacturing method includes the following steps: Step A1: Fabricate a patterned hybrid growth substrate, the hybrid growth substrate including a sapphire substrate and multiple protrusion structures and a buffer layer grown on the upper surface of the sapphire substrate, the protrusion structures being made of an easily corroded material; The protrusion structure is a single-layer structure, with the bottoms of adjacent protrusion structures close together to form a bottom-connected protrusion structure. The bottom edge of some of the protrusion structures partially overlaps with the edge of the upper surface of the sapphire substrate, and the periodically hollowed-out grooves of the protrusion structure expose the sapphire substrate. The buffer layer is grown on the exposed upper surface of the sapphire substrate. The buffer layer is connected to the sidewalls of each protrusion structure but does not cover each protrusion structure. The contact area between the buffer layer and the sapphire substrate is much smaller than the contact area between each protrusion structure and the sapphire substrate. The transverse cross-section of each of the protruding structures gradually decreases from bottom to top; the transverse cross-section of the buffer layer gradually increases from bottom to top. The bottom width of the protruding structure is D1, where 10um>D1>0um; the bottom width of the groove is D2, where 4um>D2>0um; the thickness of the protruding structure is H1, where 10um>H1>0um; the thickness of the buffer layer is H2, where 1um>H2>0um, and H1>H2. The surface area of ​​the sapphire substrate is S1, the contact area between each protrusion structure and the sapphire substrate is S2, and the contact area between the buffer layer and the sapphire substrate is S3, wherein S1 > S2 > S3, and the ratio of S3 to S1 is between 0 and 21.

5. The material of the protruding structure includes one or more of the following easily corroded materials: SiO2, SiN, GaAs, AlGaAs, AlGaInP, and GaInP. The buffer layer is composed of one or more of AlN, AlGaN, and GaN, and is an In-doped, oxygen-doped, or Mg-doped compound. Step A2: Grow an undoped GaN layer on the hybrid growth substrate, wherein the undoped GaN layer covers the protrusion structure and the buffer layer; Step A3: Grow a GaN stacked structure on the undoped GaN layer. The GaN stacked structure includes an N-type semiconductor layer, an active region, and a P-type semiconductor layer stacked sequentially along the growth direction. Step A4: A metal mirror and a bonding layer are sequentially stacked on the GaN stacked structure. The metal mirror is disposed on the surface of the P-type semiconductor layer away from the active region. Step A5: Bond a conductive substrate to the surface of the bonding layer; Step A6: The sapphire substrate is peeled off by wet method, and the protrusion structure is etched away by lateral etching solution, so that the sapphire substrate will automatically fall off. Step A7: Remove the buffer layer and the undoped GaN layer by dry etching; Step A8: Fabricate a P-type electrode, which is disposed on the side surface of the conductive substrate opposite to the bonding layer. Step A9: Fabricate an N-type electrode, which is disposed on the surface of the N-type semiconductor layer away from all source regions.

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