Heat dissipation assembly for reducing electromagnetic noise of chip, chip packaging assembly and electronic device

Abstract

The application discloses a heat dissipation assembly for reducing electromagnetic noise of a chip, a chip packaging assembly and electronic equipment. The heat dissipation assembly comprises a heat sink, a sealing ring and a suppression ring; the suppression ring is connected between the sealing ring and the heat sink and is used for surrounding the chip; the heat dissipation assembly is used for jointly surrounding a substrate carrying the chip to form a closed space, so that the chip is located in the closed space; and the suppression ring is used for shielding electromagnetic waves radiated by the chip.

Description

Technical Field

[0001] This application relates to the technical field of chips, and in particular to a heat dissipation component, chip packaging component, and electronic device for reducing electromagnetic noise in chips. Background Technology

[0002] With the surge in chip power consumption, die packaging has gradually become the mainstream process for high-power chip packaging to improve heat dissipation. However, simulations have revealed that chip packaging components based on die packaging technology also exhibit strong radiated power, resulting in higher electromagnetic noise. Summary of the Invention

[0003] The purpose of this application is to provide a heat dissipation component, a chip packaging component, and an electronic device for reducing electromagnetic noise in chips, so as to solve the problem of high electromagnetic noise in existing chip packaging components.

[0004] To address the aforementioned technical problems, this application provides a heat dissipation component for reducing electromagnetic noise in a chip. The heat dissipation component includes a heat sink, a sealing ring, and a suppression ring. The suppression ring is connected between the sealing ring and the heat sink and surrounds the chip. The heat dissipation component, together with a substrate carrying the chip, forms a closed space, and the chip is located within the closed space. The suppression ring shields the electromagnetic waves radiated by the chip. It should be understood that, based on the shielding effect of the suppression ring, compared to existing die-packaged chip packaging components, this heat dissipation component ensures both heat dissipation benefits and lower electromagnetic noise in the chip packaging component. In the high-frequency range above 20 GHz, the corresponding chip packaging component maintains good electromagnetic noise suppression, keeping the radiated power of electromagnetic waves in this high-frequency range at a low level to reduce electromagnetic pollution and the possibility of crosstalk between the electromagnetic waves and radio frequency circuits.

[0005] In some embodiments, the suppression ring is located on the side of the sealing ring facing the heat sink. When this heat dissipation component is used in a chip package assembly, the cooperation of the suppression ring, heat sink, and sealing ring allows the heat dissipation component to meet the heat dissipation requirements of the chip package assembly while also suppressing the chip from radiating electromagnetic waves to the outside of the chip package assembly, thereby reducing the electromagnetic noise of the chip package assembly.

[0006] In some embodiments, the heat sink includes a heat sink body and an annular support, the annular support being located on one side of the heat sink body and spaced apart from the sealing ring; the suppression ring is partially or entirely sandwiched between the annular support and the sealing ring. When this heat sink assembly is used in a chip package assembly, through the cooperation of the suppression ring, the heat sink, and the sealing ring, the heat sink assembly can not only meet the heat dissipation requirements of the chip package assembly, but also suppress the chip from radiating electromagnetic waves to the outside of the chip package assembly, thereby reducing the electromagnetic noise of the chip package assembly.

[0007] In some embodiments, the suppression ring includes a first annular portion and a second annular portion, the first annular portion being sandwiched between the annular support and the sealing ring, and the second annular portion being sandwiched between the radiator body and the sealing ring.

[0008] In some embodiments, the suppression ring is seamlessly connected to the sealing ring and the heat sink. Therefore, there are no gaps between the sealing ring, the suppression ring, and the heat sink, improving the shielding effect of the heat dissipation assembly on electromagnetic waves radiated from the chip.

[0009] In some embodiments, the suppression ring is a flexible conductive pad, which is sandwiched between the sealing ring and the heat sink through elastic deformation. This suppression ring has a certain degree of elasticity, and therefore, while shielding electromagnetic waves, it can also buffer and protect the chip, reducing the pressure exerted on the chip.

[0010] In some embodiments, the conductive pad includes an elastic inner core and a conductive outer layer, the conductive outer layer enclosing the elastic inner core. The elastic inner core provides the conductive pad with a certain degree of elasticity to achieve good overlap. The conductive outer layer enables electrical connection between the conductive pad and the heat sink or sealing ring, ensuring effective shielding against electromagnetic waves radiated from the chip.

[0011] In some embodiments, the elastic inner core is a foamed material, and the conductive outer layer is a conductive fiber cloth. The foamed material can be, for example, a polyurethane-based material with a certain degree of elasticity; the conductive fiber cloth can be, for example, a nickel / copper (Ni / Cu)-based material with high conductivity.

[0012] In some embodiments, the conductive pad is conductive foam. It should be understood that conductive sponge also has conductive and compressible properties, enabling good overlap with sealing rings and heat sinks, as well as providing electromagnetic wave shielding.

[0013] This application also provides another heat dissipation component for reducing chip electromagnetic noise. The heat dissipation component includes a heat sink, a sealing ring, and a suppression ring. The suppression ring is located between the sealing ring and the heat sink and surrounds the chip. The heat dissipation component, together with the substrate carrying the chip, forms a closed space, and the chip is located within the closed space. The suppression ring absorbs electromagnetic waves radiated by the chip. It should be understood that the suppression ring in this embodiment can be connected to at least one of the sealing ring and the heat sink; that is, a certain gap can be maintained between the sealing ring, the suppression ring, and the heat sink. Based on the absorption and attenuation effect of the suppression ring on electromagnetic waves, compared to existing bare die packaged chip packaging components, the electromagnetic waves radiated by the chip are also difficult to penetrate to the outside through the gap. Therefore, the chip packaging component using the heat dissipation component can have lower electromagnetic noise. In the high-frequency range above 20 GHz, the chip packaging component still maintains a good electromagnetic noise suppression effect, so that the radiated power of electromagnetic waves in this high-frequency range remains at a low level, thereby reducing electromagnetic pollution and lowering the possibility of crosstalk between the chip and radio frequency circuits.

[0014] In some embodiments, the suppression ring is located on the side of the sealing ring facing the heat sink. When this heat dissipation component is used in a chip package assembly, the cooperation of the suppression ring, heat sink, and sealing ring allows the heat dissipation component to meet the heat dissipation requirements of the chip package assembly while also suppressing the chip from radiating electromagnetic waves to the outside of the chip package assembly, thereby reducing the electromagnetic noise of the chip package assembly.

[0015] In some embodiments, the heat sink includes a heat sink body and an annular support, the annular support being located on one side of the heat sink body and spaced apart from the sealing ring; the suppression ring is partially or entirely located between the annular support and the sealing ring. When this heat sink assembly is used in a chip package assembly, through the cooperation of the suppression ring, the heat sink, and the sealing ring, the heat sink assembly can meet the heat dissipation requirements of the chip package assembly while also suppressing the chip from radiating electromagnetic waves to the outside of the chip package assembly, thereby reducing the electromagnetic noise of the chip package assembly.

[0016] In some embodiments, the suppression ring includes a first annular portion and a second annular portion, the first annular portion being located between the annular support and the sealing ring, and the second annular portion being located between the radiator body and the sealing ring.

[0017] In some embodiments, the suppression ring is a ring-shaped structure made of a microwave absorbing material. The microwave absorbing material may be, for example, graphite, graphene, carbon fiber, magnetic ceramics, conductive polymers, etc.

[0018] In some embodiments, the first annular portion is a conductive pad; or, the first annular portion is an annular structure made of a microwave absorbing material.

[0019] In some embodiments, the second annular portion is a conductive pad; or, the first annular portion is an annular structure made of a microwave absorbing material. When the second annular portion is a conductive pad, it can also reduce the pressure exerted on the chip.

[0020] This application also provides another heat dissipation component for reducing electromagnetic noise of a chip, the heat dissipation component comprising: a heat sink and a suppression ring; the suppression ring is located on one side of the heat sink and is used to surround the chip; the heat dissipation component is used to form a closed space together with a substrate carrying the chip, and to place the chip within the closed space; wherein, the suppression ring is a conductive pad, or the suppression ring is a ring structure made of a microwave absorbing material.

[0021] This application also provides a chip packaging assembly, which includes: a chip, a substrate, and a heat dissipation component for reducing electromagnetic noise of the chip as described in the above embodiments. The chip is disposed on the substrate, and the substrate and the heat dissipation component together surround and form a closed space, with the chip located within the closed space.

[0022] This application also provides an electronic device, which includes the chip packaging assembly for reducing electromagnetic noise described in the above embodiments. The electronic device may be a router or a switch.

[0023] This application, through the cooperation of a suppression ring and related structures, enables the heat dissipation component to meet heat dissipation requirements while suppressing electromagnetic waves radiated from the chip to the outside of the chip package component, thereby reducing the electromagnetic noise of the chip package component and lowering the possibility of crosstalk between it and the radio frequency circuit. Attached Figure Description

[0024] Figure 1 This is a schematic diagram of existing chip packaging components.

[0025] Figure 2 and Figure 3 This is a schematic diagram of a chip packaging component according to an embodiment of this application.

[0026] Figure 4 This is a top view of a substrate, sealing ring, and chip according to an embodiment of this application.

[0027] Figure 5 This is a simulation test data diagram of the electromagnetic noise shielding effect of a chip packaging component according to an embodiment of this application.

[0028] Figure 6 This is a graph showing the pressure test data of the chip in the existing chip packaging assembly.

[0029] Figure 7This is a graph showing the pressure test data of a chip in a chip packaging assembly according to an embodiment of this application.

[0030] Figures 8 to 10 This is a schematic diagram of a chip packaging component according to another embodiment of this application.

[0031] Figure 11 This is a schematic diagram of a chip packaging component according to another embodiment of this application.

[0032] Figure 12 This is a schematic diagram of a chip packaging component according to another embodiment of this application.

[0033] Figure 13 This is a schematic diagram of a chip packaging component according to another embodiment of this application. Detailed Implementation

[0034] The technical solutions in the embodiments of this application will be clearly and completely described below with reference to the accompanying drawings.

[0035] Please refer to Figure 1 As chip integration increases, chips gain greater processing power. However, this also leads to a surge in power consumption. It's understood that chips with higher power consumption generate more heat during operation, which needs to be dissipated promptly. To address this, and to improve heat dissipation, the industry has increasingly adopted die packaging to replace lid packaging in recent years, creating die-packaged chip components.

[0036] It should be understood that in the die-packaged chip packaging assembly, the chip 110 is disposed on the substrate 100, a seal ring 120 is provided around the chip 110, and the metal cover 122 that originally covered the chip 110 is removed. Because the metal cover 122 on the chip 110 is removed, the chip 110 can be connected to the heat sink 130 through a thermal interface material (TIM) 112, and directly conduct heat to the heat sink 130 to achieve heat dissipation. Based on this, the heat dissipation benefit of the die-packaged chip packaging assembly is improved, which can meet the heat dissipation requirements of the chip.

[0037] However, after removing the metal cap 122, a significant height difference remains between the substrate 100 and the heat sink 130 in the chip packaging assembly. Although the sealing ring 120 surrounds the chip 110, due to factors such as component manufacturing tolerances, packaging requirements, and subsequent testing, the sealing ring 120 cannot effectively shield the area between the substrate 100 and the heat sink 130. This results in a gap between the sealing ring 120 and the heat sink 130; and / or, a gap can also easily form between the substrate 100 and the sealing ring 120.

[0038] Based on these gaps, the die-packaged chip 110 is more likely to radiate electromagnetic waves to the outside of the chip package assembly, and these radiated electromagnetic waves are electromagnetic noise. Simulations of the die-packaged chip package assembly revealed that, compared to the metal-capped chip package assembly, the die-packaged chip package assembly radiates electromagnetic waves with stronger radiated power; that is, the die-packaged chip package assembly has stronger electromagnetic noise.

[0039] Because the higher the frequency of electromagnetic waves, the shorter their corresponding wavelength, high-frequency electromagnetic waves are more likely to radiate outwards through narrow gaps compared to low-frequency electromagnetic waves. For example, simulations have shown that in the 20–35 GHz high-frequency range, the electromagnetic noise radiated by die-packaged chips is 5–10 dB higher than that of metal-capped chip packages. Therefore, high-frequency electromagnetic waves are more difficult to suppress in die-packaged chips, and these radiated waves not only generate electromagnetic noise but also easily cause electromagnetic pollution and interfere with external circuits or signals.

[0040] It should be understood that when die-packaged chip components are used in electronic devices, the electromagnetic noise radiated by the chip component poses a risk of interfering with radio frequency (RF) circuits; conversely, electromagnetic waves radiated through RF circuits also pose a risk of interfering with the chip component. This crosstalk can negatively impact the performance of electronic devices. For example, in the 5–6 GHz frequency band, electromagnetic noise radiated by the chip component can easily cause crosstalk to RF circuits, affecting their normal operation; similarly, electromagnetic waves radiated through RF circuits and their corresponding antennas can also easily cause crosstalk to the chip component, affecting its normal operation.

[0041] Chip packaging assemblies based on bare die packaging suffer from problems such as strong electromagnetic noise and radio frequency interference. This application provides a heat dissipation component, a chip packaging assembly, and an electronic device using the chip packaging assembly. In each embodiment, the heat dissipation component is integrated into the chip packaging assembly as part of it, but this is not a limitation. In other embodiments, the heat dissipation component can also be a relatively independent component; during assembly, the heat dissipation component, along with a substrate, chip, and other structures, is assembled to form the chip packaging assembly.

[0042] In some embodiments, the electronic device may be, for example, a router, a switch, etc. It should be understood that the electronic device may also include structures such as radio frequency circuits and filters, without limitation.

[0043] Please refer to Figure 2The chip packaging assembly 11a provided in this application includes a substrate 100, a chip 110, and a heat dissipation assembly 200; wherein the heat dissipation assembly 200 further includes a sealing ring 120, a suppression ring 140, and a heat sink 130. In some embodiments, the suppression ring 140 surrounds the chip 110, which can shield the electromagnetic waves radiated by the chip 110, thereby reducing the electromagnetic noise of the chip packaging assembly 11a and reducing electromagnetic pollution. In other embodiments, the suppression ring 140 can absorb the electromagnetic waves radiated by the chip 110, which can also reduce electromagnetic noise and reduce electromagnetic pollution. It should be understood that the suppression ring 140 provided in various embodiments of this application can be flexible (e.g., a conductive pad mentioned below) or rigid (e.g., a ring structure made of a wave-absorbing material mentioned below). The suppression ring 140 has the characteristic of suppressing electromagnetic wave radiation; wherein, the characteristic of suppressing electromagnetic wave radiation can, for example, shield electromagnetic waves or absorb electromagnetic waves. In some embodiments, the material of the suppression ring can be, for example, a sealing ring 120, a suppression ring 140, or a heat sink 130.

[0044] In some embodiments, the suppression ring 140 is located on one side of the sealing ring 120 and away from the substrate 100; that is, the suppression ring 140 connects the sealing ring 120 and the heat sink 130 to reduce or even eliminate the gap between the sealing ring 120 and the heat sink 130. It should be understood that the substrate 100 and the heat sink assembly 200 together form a closed space, within which the chip 110 is disposed. The material of the heat sink 130 can be, for example, a metallic or non-metallic thermally conductive material. Through the cooperation of the suppression ring 140, the heat sink 130, and the sealing ring 120, electromagnetic waves radiated by the chip 110 located within the closed space to the outside of the chip package assembly 11a can be suppressed, thereby reducing the electromagnetic noise of the chip package assembly 11a and lowering the possibility of crosstalk between it and the radio frequency circuit.

[0045] It should be understood that the chip packaging components of each embodiment are merely illustrative examples of radio frequency circuits, and are not limited to radio frequency circuits. The chip packaging components of each embodiment can also reduce the possibility of crosstalk with other chip packaging components, and this is not a limitation.

[0046] In some embodiments, the inhibition ring 140 can be fixed by adhesive backing; or, the inhibition ring 140 can be fixed by dispensing adhesive, without limitation. For example, the inhibition ring 140 is fixed to the sealing ring 120 by adhesive backing, and the heat sink 130 is subsequently locked by screws or other means, with the inhibition ring 140 located between the sealing ring 120 and the heat sink 130.

[0047] When the suppression ring is flexible, it can be held between the sealing ring and the heat sink by elastic deformation to block the gap between the sealing ring and the heat sink; when the suppression ring is rigid, the installation height of the heat sink can be controlled to make the gap between the sealing ring, the suppression ring and the heat sink smaller or no gap, thus ensuring the suppression effect on electromagnetic waves.

[0048] It should be understood that in the chip packaging assembly 11a provided in the various embodiments of this application, by disposing the suppression ring 140 between the sealing ring 120 and the heat sink 130, the portion of the electromagnetic waves radiated by the chip 110 in the high-frequency range (e.g., 20-35 GHz) is also difficult to radiate to the outside. Therefore, the chip packaging assembly 11a of each embodiment can have a stronger electromagnetic noise suppression effect, and while ensuring the heat dissipation benefits of the chip 110, the electromagnetic noise of the chip packaging assembly 11a can be reduced to ensure the normal operation of the chip packaging assembly 11a.

[0049] In some embodiments, the heat sink may also have a boss (not shown) that protrudes toward the chip and substrate. Based on this, a heat sink with a boss can more easily contact the chip to conduct heat dissipated by the chip.

[0050] It should be understood that, through the cooperation of the suppression ring 140, the heat sink 130, and the sealing ring 120, the electromagnetic waves radiated by the chip 110 are difficult to penetrate to the outside, and the electromagnetic waves from the outside are also difficult to penetrate into the enclosed space. Based on this, the radiated power of the electromagnetic waves radiated outward by the chip packaging assembly 11a can be reduced, thereby reducing the possibility of the chip 110 affecting the radio frequency circuit; in addition, the possibility of the electromagnetic waves radiated by the radio frequency circuit affecting the chip 110 can also be reduced.

[0051] In some embodiments, the suppression ring 140 is a conductive pad. This conductive pad has a certain degree of elasticity and can be compressed to a certain extent. Based on this, by controlling the amount of compression of the conductive pad, it can maintain a good overlap with the sealing ring 120 and the heat sink 130 through elastic deformation, minimizing gaps between the heat sink 130 and the sealing ring 120, thereby reducing the possibility of electromagnetic waves radiated by the chip 110 penetrating to the outside.

[0052] In some embodiments, the conductive pad can be seamlessly connected between the sealing ring 120 and the heat sink 130 to eliminate the original gap between the sealing ring 120 and the heat sink 130; and a closed space is formed between the substrate 100, the sealing ring 120, the conductive pad, and the heat sink 130. Based on this, electromagnetic waves radiated by the chip 110 are more difficult to penetrate to the outside, thus giving the chip package assembly 11a better electromagnetic noise suppression.

[0053] For example, the conductive pad is sandwiched between the sealing ring 120 and the heat sink 130 and away from the substrate 100. By controlling the installation distance of the heat sink 130 relative to the substrate 100, the compression of the conductive pad is controlled at 40%. The conductive pad is stably fixed between the sealing ring 120 and the heat sink 130 through elastic deformation. This allows the conductive pad to have a certain resilience and eliminates the gap between the sealing ring 120 and the heat sink 130 as much as possible.

[0054] In some embodiments, based on the elastic properties of the conductive pad, during the installation of the heat sink 130, the conductive pad can also act as a buffer to protect the chip 110, thereby reducing the pressure on the chip 110. It should be understood that when the heat sink 130 is fixed by means of screws or other methods, as the distance between the heat sink 130 and the substrate 100 decreases, the heat sink 130 will gradually squeeze and compress the conductive pad. Since the conductive pad has a rebound force to return to its initial state, this rebound force can reduce the force exerted by the heat sink 130 on the chip 110, thereby reducing the pressure on the chip.

[0055] In some embodiments, the conductive pad includes an elastic inner core and a conductive outer layer, with the conductive outer layer enclosing the elastic inner core. The elastic inner core provides the conductive pad with a certain degree of elasticity to achieve good overlap. The conductive outer layer enables electrical connection between the conductive pad and structures such as the heat sink 130 and the sealing ring 120, ensuring effective shielding of electromagnetic waves radiated by the chip 110.

[0056] In some embodiments, the elastic core is a foamed material. This foamed material can be, for example, a material with a certain degree of elasticity, such as polyurethane.

[0057] In some embodiments, the conductive outer layer is a conductive fiber cloth. This conductive fiber cloth may be, for example, a material with high conductivity such as nickel / copper (Ni / Cu).

[0058] In some embodiments, the conductive pad can also be a conductive sponge. This conductive sponge also possesses conductive and compressible properties, enabling good overlap with the sealing ring 120 and the heat sink 130, as well as providing electromagnetic wave shielding. It should be understood that the conductive sponge has a wider compression range than the conductive pad, which includes an elastic inner core and a conductive outer layer; for example, the compression range of the conductive pad is 30%–50%, while the compression range of the conductive sponge is 40%–60%. When using conductive sponge as the suppression ring 140, a larger size of conductive sponge can be used to ensure good overlap between it and the sealing ring 120, the conductive sponge, and the heat sink 130.

[0059] In some other embodiments, the suppression ring 140 is an annular structure made of absorbing material and is located between the sealing ring 120 and the heat sink 130 to absorb and attenuate electromagnetic waves radiated by the chip 110. It should be understood that, unlike a conductive pad, the annular structure may be located on one side of the sealing ring 120 and facing the heat sink 130; or, the annular structure may also be located on one side of the heat sink 130 and facing the sealing ring 120.

[0060] The following explanation uses an example where the annular structure is located on one side of the sealing ring 120 and faces the heat sink 130. Please refer to [link / reference needed]. Figure 3 This application provides a chip packaging assembly 11b, which, compared to chip packaging assembly 11a, features a suppression ring 140 of the heat dissipation assembly 200 that is a ring-shaped structure made of a microwave absorbing material. This ring-shaped structure may not be in contact with the heat sink 130; that is, a certain gap may exist between the ring-shaped structure and the heat sink 130, and it does not need to maintain a connection with the sealing ring 120 and the heat sink 130 like a conductive pad. Corresponding to the positional relationship between the ring-shaped structure and the sealing ring 120 and the heat sink 130, the formed enclosed space can retain a certain gap, without needing to be completely sealed.

[0061] It should be understood that when the ring structure is applied to the chip packaging components (11a, 11b) of the various embodiments, the electromagnetic waves radiated by the chip 110 will be absorbed and attenuated by the ring structure as they pass through the gap, based on the absorption and attenuation effect of the ring structure on electromagnetic waves. By absorbing and attenuating the electromagnetic waves radiated by the chip 110, the ring structure can convert electromagnetic energy into heat energy or other forms of energy and dissipate it, thereby reducing the radiation power of the electromagnetic waves radiated outward by the chip 110 and reducing electromagnetic noise.

[0062] In some other embodiments, when the annular structure is located on one side of the heat sink 130 and faces the sealing ring 120, there may be a certain gap between the annular structure and the sealing ring 120, which is not limited.

[0063] In some embodiments, the absorbing material may be, for example, graphite, graphene, carbon fiber, magnetic ceramics, conductive polymers, etc.

[0064] It should be understood that the chip packaging assemblies in each embodiment are mainly illustrated using conductive pads as suppression rings. However, the suppression ring in each embodiment can also be a ring structure to achieve a similar effect of reducing electromagnetic noise. Furthermore, when the suppression ring is a ring structure, it does not need to completely block the gap between the sealing ring and the heat sink; that is, after the heat sink is installed, a certain gap can still exist between the heat sink, the ring structure, and the sealing ring. Through the absorption and attenuation of electromagnetic waves by the ring structure, the electromagnetic waves radiated by the chip are also difficult to penetrate to the outside through the gap. This can also reduce the electromagnetic noise of the chip packaging assembly, ensuring the normal operation of the chip packaging assembly.

[0065] In some embodiments, the shape of the suppression ring 140 may be, for example, a circular ring, a hexagonal square, or a square square. It should be understood that this application does not limit the width, thickness, or other dimensions of the suppression ring 140; the shape of the suppression ring 140 can be adaptively designed according to the actual structural requirements of the chip packaging components (11a, 11b), and is not limited thereto. In other embodiments, the shape of the suppression ring 140 may also be an elliptical ring, etc.

[0066] In some embodiments, the cross-sectional shape of the suppression ring 140 along its radial direction can be, for example, rectangular, semi-circular, or circular. It should be understood that this application does not limit the cross-sectional shape of the suppression ring 140; the cross-sectional shape of the suppression ring 140 can be adaptively designed according to the actual structural requirements of the chip packaging components (11a, 11b), and is not limited thereto. In other embodiments, the cross-sectional shape of the suppression ring 140 can also be trapezoidal, D-shaped, or circumscribed. Here, circumscribed refers to the portion of a circle that is cut off by a straight line; a semi-circle is a special case of circumscribed.

[0067] In some embodiments, the chip packaging assembly (11a, 11b) further includes a circuit board 150 located on one side of the substrate 100 and away from the chip 110; that is, the chip 110 and the circuit board 150 are located on opposite sides of the substrate 100. The circuit board 150 can be electrically connected to the chip 110 via conductive balls 152 to cooperate with the chip 110 in realizing functions such as communication and data processing. The conductive balls 152 can be, for example, conductive solder balls.

[0068] In some embodiments, the chip packaging assembly (11a, 11b) further includes an electronic component 160 disposed on the circuit board 150 and located around the substrate 100. The electronic component 160 may be, for example, a capacitor, an inductor, or a resistor.

[0069] Please refer to this simultaneously. Figure 2 and Figure 4The chip packaging component 11a of each embodiment will be described below through specific examples. The relevant parameters of the chip packaging component are as follows:

[0070] The power consumption of the chip 110 is as follows: SoC (System on Chip) - 372W (Max), HBM (High Bandwidth Memory) - 17.7W (Max).

[0071] TIM material 112: Carbon fiber thermal pad or PCM (Phase Change Material), covering ≥90% of the area of ​​chip 110, with a thermal resistance ≤0.2Kcm2 / W.

[0072] Serdes (Serializer / DESerializer): Maximum rate 58Gbps PAM4 (Pulse Amplitude Modulation).

[0073] Packaging: bare die package, the size of chip 110 is 29.75x25.45mm, the size of substrate 100 is 70x72.5mm, the shape of sealing ring 120 is basically the same as that of substrate 100, and the narrowest side width of sealing ring 120 is 3mm.

[0074] Suppression Ring 140: Suppression Ring 140 is a conductive pad with an elastic inner core made of polyurethane foam and a conductive outer layer made of nickel / copper conductive fiber cloth. The surface resistance is ≤0.1Ω, the size is 72x74.5x4mm, the initial thickness is 2mm, and the compression range is 30-50%.

[0075] The shortest distance between the heat sink 130 and the sealing ring 120 is 1.2 mm, and the suppression ring 140 is sandwiched between the heat sink 130 and the sealing ring 120 through elastic deformation. The compression of the suppression ring 140 is approximately 40%, which can be verified by the ratio between the initial thickness of the suppression ring 140 (e.g., 2 mm) and the shortest distance between the heat sink 130 and the sealing ring 120 (e.g., 1.2 mm).

[0076] Figure 5 For simulation test data on the electromagnetic noise shielding effect of the chip packaging assembly, please refer to [reference needed]. Figure 5 Under the premise of the same excitation source power, the radiated power (or electromagnetic noise) of the chip packaging assembly in each embodiment of this application is basically the same as that of the metal-capped chip packaging assembly. In the 2-30 GHz frequency band, the radiated power radiated outward by the chip packaging assembly in each embodiment can maintain a low level.

[0077] Compared to die-packaged chip packaging assemblies, the chip packaging assemblies of each embodiment can ensure heat dissipation benefits while minimizing electromagnetic noise.

[0078] It should be understood that in the high-frequency range above 20 GHz, the chip packaging components of the various embodiments of this application still maintain a good electromagnetic noise suppression effect, and the radiated power of electromagnetic waves in this high-frequency range remains at a low level.

[0079] Based on this, when the chip packaging components of the various embodiments of this application are applied to electronic devices, the electromagnetic noise of the chip packaging components can maintain a small radiated power over a wide frequency range, thereby reducing the possibility of crosstalk with radio frequency circuits.

[0080] Figure 6 This is a graph showing the pressure test data of chips in existing chip packaging components. Figure 7 This is a graph showing the pressure test data of the chip in the chip packaging assembly of this application embodiment. Please refer to it simultaneously. Figure 6 and Figure 7 Compared to chips without conductive pads, chips protected by conductive pads experience less overall pressure. It should be understood that, thanks to the protection of these conductive pads, chip packaging assemblies can have better pressure resistance, ensuring structural stability during assembly, transportation, and other processes.

[0081] Please refer to Figure 8 Another chip packaging assembly 12a provided in this application includes a substrate 100, a chip 110, a sealing ring 120, a heat sink 130, and a suppression ring 140. However, unlike the chip packaging assemblies (11a, 11b) of the above embodiments, the heat sink 130 of this embodiment includes a heat sink body 132 and an annular support 134. The annular support 134 is located on one side of the heat sink body 132 and extends toward the substrate 100. The annular support 134 of the heat sink 130 extends to be spaced apart from the sealing ring 120, and the suppression ring 140 is disposed between the annular support 134 and the sealing ring 120.

[0082] It should be understood that by placing the suppression ring 140 between the annular support 134 and the sealing ring 120 in an overlapping manner, the suppression ring 140 can also reduce or even eliminate the gap between the heat sink 130 and the sealing ring 120, thereby suppressing the electromagnetic waves radiated by the chip 110 and reducing the electromagnetic noise of the chip package assembly 12a. Furthermore, the chip package assembly 12a and the radio frequency circuit are less likely to interfere with each other, ensuring their respective normal operation.

[0083] In other embodiments, the suppression ring may also be located between the heat sink body and the sealing ring, which can also shield the electromagnetic waves radiated by the chip to reduce the electromagnetic noise of the chip package assembly.

[0084] Please refer to Figure 8 In some embodiments, the annular support 134 is located outside the sealing ring 120, but this is not a limitation. Please refer to... Figure 9 Another chip packaging assembly 12b provided in this application embodiment, compared with chip packaging assembly 12a, has its annular support 134 located inside the sealing ring 120. Please refer to... Figure 10 Another chip packaging component 12c provided in this application embodiment has an annular support 134 located on the side of the sealing ring 120 away from the substrate 100, compared with the chip packaging component 12a.

[0085] It should be understood that the structures of the chip packaging components (12b, 12c) are similar to those of the chip packaging component 12a, and both can achieve similar functions to the chip packaging component 12a, in order to suppress the electromagnetic waves radiated by the chip 110 and reduce the electromagnetic noise of the chip packaging components (12b, 12c), which will not be elaborated here.

[0086] Please refer to Figure 11 This application provides another chip packaging assembly 13. Compared to the chip packaging assemblies (12a, 12b, 12c) in the above embodiments, the suppression ring 140 of this embodiment includes a first annular portion 142 and a second annular portion 144. Both the first annular portion 142 and the second annular portion 144 are annular. The first annular portion 142 extends along the axial direction of the suppression ring 140, and the second annular portion 144 extends along the radial direction of the suppression ring 140. Thus, along the radial direction of the suppression ring 140, the cross-section of the suppression ring 140 is generally "L" shaped. The first annular portion 142 is disposed between the annular support 134 and the sealing ring 120, and the second annular portion 144 is disposed between the heat sink body 132 and the sealing ring 120, so as to cooperate to suppress the electromagnetic waves radiated by the chip 110. This can reduce the electromagnetic noise of the chip packaging assembly and reduce the possibility of crosstalk with the radio frequency circuit.

[0087] In some embodiments, the first annular portion 142 may be, for example, an annular structure made of a wave-absorbing material; or, the first annular portion 142 may be, for example, a conductive pad. The second annular portion 144 may be, for example, a conductive pad. Based on this, the second annular portion 144 can reduce the pressure on the chip 110 while achieving the function of shielding electromagnetic waves.

[0088] In some other embodiments, the first annular portion 142 and the second annular portion 144 may be an integral annular structure made of a microwave absorbing material; or, the first annular portion 142 and the second annular portion 144 may be an integral conductive pad.

[0089] Please refer to Figure 12 This application provides another chip packaging assembly 14, which includes a substrate 100, a chip 110, a sealing ring 120, a heat sink 130, and a suppression ring 140. Unlike the chip packaging assemblies of the above embodiments (11a, 11b, 12a, 12b, 12c, 13), the suppression ring 140 of this embodiment is directly disposed around the substrate 100 and the heat sink 130, and is located inside the sealing ring 120. The substrate 100, the suppression ring 140, and the heat sink 130 together form a closed space, within which the chip 110 is located.

[0090] Based on this, the electromagnetic waves radiated by chip 110 are directly suppressed by the suppression ring 140 and the heat sink 130. Similar to the chip package assemblies (11a, 11b, 12a, 12b, 12c, 13) in the above embodiments, the electromagnetic waves radiated by chip 110 are difficult to penetrate to the outside of the chip package assembly 14. This also reduces the possibility of chip 110 radiating electromagnetic waves outward, thereby reducing the electromagnetic noise of the chip package assembly 14. In addition, the chip package assembly 14 is less prone to crosstalk with the radio frequency circuit.

[0091] In some embodiments, when the suppression ring 140 is a conductive pad, since the conductive pad is directly located between the substrate 100 and the heat sink 130, the size of the conductive pad in this embodiment will be larger than that of the related structures in the above embodiments (e.g., the conductive pad located between the sealing ring 120 and the heat sink 130). Correspondingly, the elasticity variation range of the conductive pad is larger; technicians can more easily control the rebound force of the conductive pad to improve the compatibility of the conductive pad and better protect the chip 110.

[0092] For example, if the compression range of the conductive pad is controlled within 30% to 40%, and the thickness of the conductive pad between the sealing ring 120 and the heat sink 130 is 2 mm, then the elastic variation range of the conductive pad is 0.6 mm to 0.8 mm; while the thickness of the conductive pad between the substrate 100 and the heat sink 130 is 6 mm, then the elastic variation range of the conductive pad is 1.8 mm to 2.4 mm. Therefore, compared to a 2 mm thick conductive pad, a 6 mm thick conductive pad can have a larger adjustment range. During subsequent installation of the heat sink 130, technicians can relatively easily adjust the distance between the heat sink 130 and the substrate 100 to adjust the compression amount of the conductive pad and achieve the encapsulation of the chip packaging assembly 14.

[0093] Please refer to Figure 13 This application provides another chip packaging assembly 15, which includes a substrate 100, a chip 110, a heat sink 130, and a suppression ring 140. Unlike the chip packaging assemblies 14 in the above embodiments, this chip packaging assembly 15 does not have a sealing ring 120. The suppression ring 140 is disposed around the substrate 100 and the heat sink 130 to form a closed space together with the substrate 100 and the heat sink 130. It should be understood that in this embodiment, the electromagnetic waves radiated by the chip 110 can also be suppressed through the cooperation of the substrate 100, the heat sink 130, and the suppression ring 140, thereby reducing the electromagnetic noise of the chip packaging assembly 15. In addition, the chip packaging assembly 15 is less prone to crosstalk with the radio frequency circuit.

[0094] The above description is a specific embodiment of this application. It should be noted that for those skilled in the art, several improvements and modifications can be made without departing from the principle of this application, and these improvements and modifications are also considered to be within the scope of protection of this application.

Claims

1. A heat dissipation component for reducing electromagnetic noise in a chip, characterized in that, The heat dissipation assembly is used for dissipating heat of a chip, the chip is packaged on a substrate, and a seal ring is arranged on the substrate and surrounds the chip; The heat dissipation assembly comprises a heat sink, a thermal interface material and a suppression ring, the suppression ring is connected between the seal ring and the heat sink and surrounds the chip when the heat dissipation assembly is connected with the chip, the suppression ring is used for shielding electromagnetic waves radiated by the chip, and the thermal interface material is arranged between the heat sink and the chip; The heat dissipation assembly is used for forming a closed space together with the substrate, and the chip and the thermal interface material are located in the closed space.

2. The heat dissipating assembly of claim 1, wherein, The suppression ring is located on a side of the seal ring facing the heat sink.

3. The heat dissipating assembly of claim 1, wherein, The heat sink comprises a heat sink body and a ring-shaped support, the ring-shaped support is located on a side of the heat sink body and is arranged in a spaced manner with the seal ring, and the suppression ring is partially or entirely clamped between the ring-shaped support and the seal ring.

4. The heat dissipating assembly of claim 3, wherein, The suppression ring comprises a first ring-shaped part and a second ring-shaped part, the first ring-shaped part is clamped between the ring-shaped support and the seal ring, and the second ring-shaped part is clamped between the heat sink body and the seal ring.

5. The heat dissipating assembly of any one of claims 1 to 4, wherein, The suppression ring is seamlessly connected with the seal ring and the heat sink.

6. The heat dissipating assembly of any one of claims 1 to 5, wherein, The suppression ring is a flexible conductive gasket, and the conductive gasket is clamped between the seal ring and the heat sink through elastic deformation.

7. The heat dissipating assembly of claim 6, wherein, The conductive gasket comprises an elastic inner core and a conductive outer layer, and the conductive outer layer wraps the elastic inner core.

8. The heat dissipating assembly of claim 7, wherein, The elastic inner core is foamed material, and the conductive outer layer is conductive fiber cloth.

9. The heat dissipating assembly of claim 6, wherein, The conductive gasket is conductive foam.

10. A heat dissipation assembly for reducing electromagnetic noise of a chip, the heat dissipation assembly comprising: The heat dissipation assembly is used for dissipating heat of a chip, the chip is packaged on a substrate, and a seal ring is arranged on the substrate and surrounds the chip; The heat dissipation assembly comprises a heat sink, a thermal interface material and a suppression ring, the suppression ring is connected between the seal ring and the heat sink and surrounds the chip when the heat dissipation assembly is connected with the chip, the suppression ring is used for shielding electromagnetic waves radiated by the chip, and the thermal interface material is arranged between the heat sink and the chip; The heat dissipation assembly is used for forming a closed space together with the substrate, and the chip and the thermal interface material are located in the closed space.

11. The heat dissipating assembly of claim 10, wherein, The suppression ring is located on a side of the seal ring facing the heat sink.

12. The heat dissipating assembly of claim 10, wherein, The heat sink comprises a heat sink body and a ring-shaped support, the ring-shaped support is located on a side of the heat sink body and is arranged in a spaced manner with the seal ring, and the suppression ring is partially or entirely clamped between the ring-shaped support and the seal ring.

13. The heat dissipating assembly of claim 12, wherein, The suppression ring comprises a first ring-shaped part and a second ring-shaped part, the first ring-shaped part is clamped between the ring-shaped support and the seal ring, and the second ring-shaped part is clamped between the heat sink body and the seal ring.

14. The heat dissipating assembly of any one of claims 10 to 13, wherein, The suppression ring is a ring-shaped structural member made of a wave-absorbing material.

15. A heat dissipation assembly for reducing electromagnetic noise of a chip, the heat dissipation assembly comprising: The heat dissipation assembly is used for dissipating heat of a chip, the chip is packaged on a substrate, and a seal ring is arranged on the substrate and surrounds the chip; The heat dissipation assembly comprises a heat sink, a thermal interface material and a suppression ring; The suppression ring is an electrically conductive gasket, and when the heat dissipation assembly is connected with the chip, the thermal interface material is arranged between the heat sink and the chip, and the electrically conductive gasket is clamped between the substrate and the heat sink through elastic deformation. Alternatively, the suppression ring is an annular structure made of a wave-absorbing material, and when the heat dissipation assembly is connected with the chip, the thermal interface material is arranged between the heat sink and the chip, and the suppression ring is arranged between the substrate and the heat sink, and the distance between the suppression ring and the chip is different from the distance between the sealing ring and the chip in the radial direction of the suppression ring. The heat dissipation assembly is used to form a closed space together with the substrate, and the chip and the thermal interface material are located in the closed space.

16. A chip package assembly, comprising: The chip packaging assembly comprises a circuit board, a chip, a substrate, and the heat dissipation assembly for reducing electromagnetic noise of the chip according to any one of claims 1 to 15. The chip is packaged on the substrate, the substrate is provided with a sealing ring and the sealing ring surrounds the chip, the substrate and the heat dissipation assembly form a closed space together, the chip is located in the closed space, and the substrate is located on the circuit board.

17. An electronic device, comprising: The chip packaging assembly comprises the chip packaging assembly according to claim 16. The chip packaging assembly comprises the chip packaging assembly according to claim 16.

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