Inertial sensor and preparation method thereof

Abstract

Disclosed are an inertial sensor and a method for fabricating the same. The method includes: forming a first dielectric layer and a first conductive layer on a first substrate; forming a first opening in the first conductive layer to expose a portion of the surface of the first dielectric layer; forming a protective layer on the first conductive layer, the protective layer covering a portion of the first conductive layer, the sidewalls of the first opening, and the surface of the first dielectric layer exposed by the first opening; forming a second dielectric layer having a second opening on a portion of the first conductive layer and the protective layer; forming a second conductive layer on the second dielectric layer, the second conductive layer filling the second opening; forming a first bonding structure on the second conductive layer; patterning the second conductive layer to form a third opening; removing a portion of the second dielectric layer through the third opening to form a cavity and a movable mass; and removing the first conductive layer in the cavity and the portion of the protective layer exposed on the surface of the first dielectric layer. The inertial sensor and method for fabricating the same according to embodiments of the present invention ensure the reliability of the inertial sensor through the protective layer.

Description

Technical Field

[0001] The present invention relates to the field of semiconductor technology, and in particular to an inertial sensor and a preparation method thereof. Background Art

[0002] Surface processing is one of the most common manufacturing processes for microelectromechanical systems (MEMS). It uses a semiconductor substrate as the base and prepares three-dimensional micromechanical structures through multiple thin film deposition and graphic processing.

[0003] Taking an inertial sensor as an example, the sensor includes a device sheet (Device) and a cap sheet (Cap) bonded together. The device sheet includes, from bottom to top, a first substrate, a first dielectric layer, a first conductive layer, a second dielectric layer, a second conductive layer, and a bonding structure. The first conductive layer and the second conductive layer are patterned conductive layers. The patterned first conductive layer serves as the wiring and capacitor plates for detecting capacitance; the patterned second conductive layer forms a mass block. The second dielectric layer below the mass block is removed to form a cavity, and the mass block is released to allow it to move.

[0004] The second dielectric layer is generally removed using vapor-phase hydrofluoric acid (HF). Hydrofluoric acid selectively etches the second dielectric layer (silicon dioxide) in an isotropic manner. Since the first conductor layer is a patterned conductive layer, part of the first dielectric layer below the first conductor layer will be exposed. During the fumigation process, hydrofluoric acid will pass through the gaps in the patterned first conductive layer and remove part of the first dielectric layer below the first conductive layer, reducing device reliability.

[0005] Usually, the fumigation rate and fumigation time are controlled to ensure that the mass block is movable and to minimize the fumigation amount of the first dielectric layer. However, this will still cause damage to the first dielectric layer. Summary of the Invention

[0006] In view of the above problems, the present invention aims to provide an inertial sensor and a method for manufacturing the same, wherein a protective layer is introduced on the first conductive layer to protect the first dielectric layer, thereby ensuring the reliability of the inertial sensor.

[0007] A first aspect of the present invention provides a method for preparing an inertial sensor, the method comprising:

[0008] forming a first dielectric layer and a first conductive layer on a first substrate;

[0009] forming a first opening in the first conductive layer to expose a portion of the surface of the first dielectric layer;

[0010] forming a protective layer on the first conductive layer, wherein the protective layer covers a portion of the first conductive layer, a sidewall of the first opening, and a surface of the first dielectric layer exposed by the first opening;

[0011] forming a second dielectric layer having a second opening on a portion of the first conductive layer and a portion of the protective layer;

[0012] forming a second conductive layer on the second dielectric layer, wherein the second conductive layer fills the second opening;

[0013] forming a first bonding structure on the second conductive layer;

[0014] patterning the second conductive layer to form a third opening;

[0015] removing a portion of the second dielectric layer through the third opening to form a cavity and a movable mass block;

[0016] The first conductive layer in the cavity and the protective layer exposed on the surface of the first dielectric layer are removed.

[0017] Preferably, before removing the protective layer exposed on the surface of the first conductive layer and the first dielectric layer in the cavity, there is no protective layer outside the area enclosed by the cavity.

[0018] Preferably, before removing the protective layer exposed on the surface of the first conductive layer and the first dielectric layer in the cavity, the wiring and pressure point areas of the first conductive layer outside the area enclosed by the cavity are free of the protective layer.

[0019] Preferably, before removing the protective layer exposed on the surface of the first conductive layer and the first dielectric layer in the cavity, there is no protective layer between the contact surface of the second conductive layer and the first conductive layer within the area enclosed by the cavity.

[0020] Preferably, the protective layer, the first conductive layer and the second conductive layer are made of the same material.

[0021] Preferably, the protective layer, the first conductive layer and the second conductive layer are made of polysilicon.

[0022] Preferably, the thickness ratio of the first conductive layer to the protective layer is 10:1 to 50:1.

[0023] Preferably, the thickness ratio of the second conductive layer to the protective layer is 200:1 to 1000:1.

[0024] Preferably, the thickness of the protective layer is 0.02 to 0.06 microns.

[0025] Preferably, the thickness of the first conductive layer is 0.4-1.2 microns.

[0026] Preferably, the thickness of the second conductive layer is 15 to 30 microns.

[0027] Preferably, the deposition temperature of the first conductive layer and the protective layer is 520-620 degrees Celsius.

[0028] Preferably, dry etching is used to remove the first conductive layer in the cavity and the protective layer exposed on the surface of the first dielectric layer.

[0029] Preferably, CF4 and O2 are used to dry-etch the protective layer.

[0030] Preferably, a portion of the second dielectric layer is removed through the third opening by a hydrofluoric acid vapor fumigation process to form the cavity and the movable mass block.

[0031] Preferably, it also includes:

[0032] forming a second bonding structure on the first surface of the second substrate;

[0033] forming a groove on the first surface of the second substrate;

[0034] The first bonding structure of the first substrate and the second bonding structure of the second substrate are bonded at high temperature to form a sealed cavity.

[0035] A second aspect of the present invention provides an inertial sensor, comprising:

[0036] a first substrate;

[0037] a first dielectric layer located on the first substrate;

[0038] a first conductive layer located on the first dielectric layer, wherein the first conductive layer has a first opening, and the first opening exposes a portion of the surface of the first dielectric layer;

[0039] a protective layer located on a portion of the first conductive layer;

[0040] a second dielectric layer located on the first conductive layer, wherein the second dielectric layer has a cavity;

[0041] a patterned second conductive layer located on the second dielectric layer, wherein the second conductive layer in the cavity serves as a movable mass block;

[0042] a first bonding structure located on the second conductive layer;

[0043] The protective layer within the area enclosed by the cavity is only located between the contact surfaces of the first conductive layer and the second conductive layer.

[0044] Preferably, there is no protective layer outside the area enclosed by the cavity.

[0045] Preferably, the protective layer is provided outside the area enclosed by the cavity, and the protective layer does not cover the wiring and pressure point areas of the first conductive layer.

[0046] Preferably, the protective layer, the first conductive layer and the second conductive layer are made of the same material.

[0047] Preferably, the protective layer, the first conductive layer and the second conductive layer are made of polysilicon.

[0048] Preferably, the thickness ratio of the first conductive layer to the protective layer is 10:1 to 50:1.

[0049] Preferably, the thickness ratio of the second conductive layer to the protective layer is 200:1 to 1000:1.

[0050] Preferably, the thickness of the protective layer is 0.02 to 0.06 microns.

[0051] Preferably, the thickness of the first conductive layer is 0.4-1.2 microns.

[0052] Preferably, the thickness of the second conductive layer is 15 to 30 microns.

[0053] Preferably, it also includes:

[0054] a second substrate;

[0055] a second bonding structure located on the first surface of the second substrate;

[0056] a groove located on the first surface of the second substrate;

[0057] The first surface of the second substrate is arranged opposite to the second conductive layer. The second bonding structure is located on the first bonding structure and encloses the first substrate and the second substrate to form a sealed cavity.

[0058] In an inertial sensor and method for manufacturing the same according to embodiments of the present invention, a protective layer is introduced on the first conductive layer. Due to the protection provided by the protective layer, the first dielectric layer located below the first conductive layer is protected from corrosion by hydrofluoric acid (HF), thereby ensuring the integrity of the first dielectric layer. Compared to the prior art, this eliminates the need to increase the line width of the first conductive layer, thereby preventing additional increase in parasitic capacitance between the wiring portion of the first conductive layer and the substrate. This reduces parasitic capacitance while ensuring device reliability.

[0059] Furthermore, in the embodiment of the present invention, the protective layer on the first conductive layer opposite to the movable mass block (ie, the protective layer on the surface of the first conductive layer and the first dielectric layer exposed in the cavity) is removed without affecting the line width of the effective electrode plate of the first conductive layer.

[0060] Furthermore, during the formation of the protective layer, the protective layer covers part of the surface of the first conductive layer, the side wall of the first opening, and the surface of the first dielectric layer exposed through the first opening, and only retains the protective layer within the area enclosed by the subsequent cavity to prevent the first conductive layer (wiring and pressure point area) outside the area enclosed by the cavity from short circuiting. The requirements for photolithography accuracy are low and the method is simple.

[0061] Furthermore, after the hydrofluoric acid (HF) fumigation is completed, the protective layer on the surface of the first conductive layer and the first dielectric layer in the cavity is removed, which will not increase the corresponding stress and will not cause the tube core to deform in subsequent processing steps (such as annealing), thereby causing test errors.

[0062] In a preferred embodiment, the protective layer is made of the same material as the first and second conductive layers. Because of this, hydrofluoric acid (HF) corrodes the second dielectric layer without corroding the protective layer, thereby protecting the first dielectric layer. Furthermore, the second conductive layer, which is in contact with the protective layer, is electrically connected to the first conductive layer via the protective layer, without affecting the normal operation of the inertial sensor.

[0063] In a preferred embodiment, the thickness of the protective layer is much smaller than that of the second protective layer, and the time required to etch the protective layer is very short, thereby ensuring that the etching thickness of the second conductive layer will not affect the second conductive layer. BRIEF DESCRIPTION OF THE DRAWINGS

[0064] The above and other objects, features and advantages of the present invention will become more apparent through the following description of the embodiments of the present invention with reference to the accompanying drawings, in which:

[0065] Figure 1 A schematic structural diagram of an inertial sensor in the prior art is shown;

[0066] Figure 2a to Figure 2b shows a cross-sectional view of some stages in the process of preparing an inertial sensor in the prior art;

[0067] Figure 3 A schematic structural diagram of an inertial sensor according to an embodiment of the present invention is shown;

[0068] Figures 4a to 4mThe figures show cross-sectional views at various stages in the manufacturing process of the inertial sensor according to the embodiment of the present invention. DETAILED DESCRIPTION

[0069] The present invention will be described in more detail below with reference to the accompanying drawings. In each of the accompanying drawings, identical elements are represented by similar reference numerals. For the sake of clarity, the various parts in the accompanying drawings are not drawn to scale. In addition, some well-known parts may not be shown.

[0070] The present invention may be embodied in various forms, some examples of which are described below.

[0071] Figure 1 FIG. 1 shows a schematic diagram of the structure of an inertial sensor in the prior art; FIG. Figure 1 As shown, the inertial sensor 100 includes a device wafer (Device) 110 and a cap wafer (Cap) 120 bonded together. The device wafer 110 includes, from bottom to top, a first substrate 111, a first dielectric layer 112, a first conductive layer 113, a second dielectric layer 114, a second conductive layer 115, and a bonding structure 116. The cap wafer 120 is bonded to the device wafer 110 via the bonding structure 116.

[0072] The first dielectric layer 112 and the second dielectric layer 114 are insulating layers. The first dielectric layer 112 is located between the first substrate 111 and the first conductive layer 113, and is used to support the first conductive layer 113 and electrically isolate the first conductive layer 113 from the first substrate 111. The second dielectric layer 114 is located between the first conductive layer 113 and the second conductive layer 115, and is used to support the second conductive layer 115 and electrically isolate the first conductive layer 113 from the second conductive layer 115.

[0073] The first conductive layer 113 and the second conductive layer 115 are patterned conductive layers. The patterned first conductive layer 113 includes capacitor plates for detecting capacitance, as well as wiring and pressure point areas. The patterned second conductive layer 115 forms a mass block 115a. A portion of the second dielectric layer 114 below the mass block 115a is removed to form a cavity 1141. Simultaneously, the mass block 115a is released, allowing it to move. When the mass block 115a is displaced, the spacing between it and the first conductive layer 113 changes, thereby detecting capacitance signals in the Z-axis direction. The spacing between it and the sidewall electrodes changes, thereby detecting capacitance signals in the X / Y-axis directions. This allows for inertia detection.

[0074] The first dielectric layer 112 has an opening 1121, which is formed simultaneously with the formation of the cavity 1141. The presence of the opening 1121 will reduce the reliability of the inertial sensor 100. Figure 2a and Figure 2b The formation of the opening 1121 is described in detail.

[0075] Figure 2a to Figure 2b The figure shows a cross-sectional view of some stages in the process of manufacturing an inertial sensor in the prior art.

[0076] like Figure 2a As shown, a first dielectric layer 112, a patterned first conductive layer 113, a patterned second dielectric layer 114, a second conductive layer 115 and a patterned bonding structure 116 are sequentially formed on a first substrate 111, and the second conductive layer 115 is etched to form a patterned second conductive layer 115.

[0077] The patterned first conductive layer 113 includes a capacitor plate of a detection capacitor and a wiring and pressure point area; the patterned second conductive layer 115 forms a mass block 115 a.

[0078] like Figure 2b As shown, through the patterned second conductive layer 115, a hydrofluoric acid (HF) fumigation process is used to remove part of the second dielectric layer 114 between the first conductive layer 113 and the second conductive layer 115 to form the cavity 1141, thereby forming the movable mass block 115a.

[0079] During the process of removing the second dielectric layer 114 , hydrofluoric acid (HF) will simultaneously etch the exposed first dielectric layer 112 through the gaps in the patterned first conductive layer 113 to form an opening 1121 .

[0080] Although the fumigation amount of the first dielectric layer 112 can be minimized by controlling the fumigation rate and fumigation time, it will still damage the first dielectric layer 112. Therefore, the line width of the first conductive layer 113 needs to be widened, but this increases parasitic capacitance and reduces device reliability.

[0081] Figure 3 FIG. 1 shows a schematic structural diagram of an inertial sensor according to an embodiment of the present invention. Figure 3 As shown, the inertial sensor 200 includes a device chip (Device) 210 and a cap chip (Cap) 220 bonded together. The device chip 210 includes, from bottom to top, a first substrate 211, a first dielectric layer 212, a first conductive layer 213, a protective layer S, a second dielectric layer 214, a second conductive layer 215, and a first bonding structure 216.

[0082] The first dielectric layer 212 and the second dielectric layer 214 are insulating layers. The first dielectric layer 212 is located between the first substrate 211 and the first conductive layer 213, and is used to support the first conductive layer 213 and electrically isolate the first conductive layer 213 from the first substrate 211. The second dielectric layer 214 is located between the first conductive layer 213 and the second conductive layer 215, and is used to support the second conductive layer 215 and electrically isolate the first conductive layer 213 from the second conductive layer 215.

[0083] In a specific embodiment, the first substrate 211 is, for example, a silicon substrate; the first dielectric layer 212 and the second dielectric layer 214 are, for example, silicon dioxide (SiO 2 ).

[0084] The first conductive layer 213 and the second conductive layer 215 are patterned conductive layers, wherein the first conductive layer 213 has a first opening A. The patterned first conductive layer 113 includes a capacitor plate for detecting capacitance, as well as wiring and pressure point areas. The first opening A penetrates the first conductive layer 213 and exposes a portion of the upper surface of the first dielectric layer 212. The second conductive layer 215 has a third opening C, and the patterned second conductive layer 215 forms a mass block. A portion of the second dielectric layer 214 below the mass block is removed to form a cavity 2141. At the same time, the mass block is released, allowing the mass block to move to form a movable mass block 215a. When the movable mass block 215a is displaced, the spacing between it and the first conductive layer 213 changes, thereby detecting a capacitance signal in the Z-axis direction. The spacing between it and the sidewall electrode changes, thereby detecting a capacitance signal in the X / Y-axis direction, thereby realizing inertia detection.

[0085] In a specific embodiment, the first conductive layer 213 and the second conductive layer 215 are, for example, polysilicon.

[0086] When a portion of the second dielectric layer 214 is removed to form the cavity 2141, the protective layer S covers the first conductive layer 213 in the cavity 2141 and the sidewalls and bottom wall of the first opening A in the first conductive layer 213, protecting the first dielectric layer 212 exposed through the first opening A. This prevents hydrofluoric acid from corroding the first dielectric layer 212, thereby ensuring the integrity of the first dielectric layer 212 and improving the reliability of the inertial sensor. After the cavity 2141 is formed, the portion of the protective layer S exposed on the surface of the first conductive layer 213 and the first dielectric layer 212 in the cavity 2141 is removed, leaving only the portion of the region enclosed by the cavity 2141 between the contact surface of the second conductive layer 215 and the first conductive layer 213.

[0087] Due to the protection of the protective layer S, the first dielectric layer 212 is not affected by hydrofluoric acid (HF), thereby ensuring the integrity of the first dielectric layer 212. Compared with the prior art, there is no need to increase the line width of the first conductive layer 213, thereby not increasing the parasitic capacitance. While ensuring the reliability of the device, the parasitic capacitance is reduced.

[0088] In one specific embodiment, the protective layer S is made of the same material as the first conductive layer 213, such as polycrystalline silicon. Because it is made of the same material as the first conductive layer 213, hydrofluoric acid (HF) does not corrode the protective layer S, thereby protecting the first dielectric layer 212. Furthermore, the second conductive layer 215, which is in contact with the protective layer S, is electrically connected to the first conductive layer 213 via the protective layer S, without affecting the normal operation of the inertial sensor.

[0089] The first bonding structure 216a is a patterned conductive layer, and the first bonding structure 216a is used to bond to the cap sheet 220. The second conductive layer 215 also includes a first pressure point 215b separated from the movable mass 215a. The inertial sensor 200 also includes a second pressure point 216b, which is electrically connected to the first conductive layer 213 via the first pressure point 215b. The second pressure point 216b is used for subsequent packaging and wire bonding. The first bonding structure 216a and the second pressure point 216b are formed in the same step. The first bonding structure 216a is selected from any one of silicon, glass, metal, and alloy, such as aluminum. The cap sheet 220 includes a second substrate 221 and a second bonding structure 222. The second substrate 221 has a groove 2211. The cap sheet 220 and the sensor chip 210 are bonded to each other via the first bonding structure 216a and the second bonding structure 222.

[0090] The first bonding structure 216a of the device sheet 210 and the second bonding structure 222 of the cap sheet 220 are both annular structures. The first bonding structure 216a and the second bonding structure 222 are in contact with each other. The groove 2211 is opposite to the movable mass block 215a of the second conductive layer 215, forming a sealed cavity, which is convenient for controlling the air pressure in the cavity and preventing the internal structure of the inertial sensor from being affected by the external environment, resulting in poor working stability.

[0091] The second substrate 221 is a semiconductor substrate, such as a silicon substrate; the second bonding structure 222 is selected from any one of silicon, glass, metal, and alloy, so as to realize any one of silicon-glass electrostatic bonding, silicon-silicon direct bonding, metal hot pressing bonding, or metal solder bonding with the first bonding structure 216a. In this embodiment, the second bonding structure 222 is, for example, germanium.

[0092] Figures 4a to 4g The cross-sectional views of various stages in the preparation process of the inertial sensor according to the embodiment of the present invention are shown below. Figures 4a to 4g A method for manufacturing an inertial sensor according to an embodiment of the present invention is described in detail.

[0093] like Figure 4a As shown, the method starts with a first substrate 211 , and a first dielectric layer 212 is formed on the first substrate 211 .

[0094] In this step, the first dielectric layer 212 is formed, for example, by deposition, on the surface of the first substrate 211. In a specific embodiment, the first substrate 211 is, for example, a silicon substrate, the first dielectric layer 212 is, for example, silicon dioxide (SiO2), and the thickness of the first dielectric layer 212 is, for example, 2.5 microns.

[0095] like Figure 4b As shown, a first conductive layer 213 having a first opening A is formed on the first dielectric layer 212 .

[0096] In this step, a first conductive layer 213 is formed on the first dielectric layer 212, for example, by deposition. A resist layer is formed on the surface of the first conductive layer 213, and the resist layer is patterned using a photolithography process to form a resist mask. The first conductive layer 213 is then etched through the resist mask to form a first opening A penetrating the first conductive layer 213. After forming the first opening A in the first conductive layer 213, the resist mask is removed by solvent dissolution or ashing.

[0097] The patterned first conductive layer 213 includes a fixed electrode of the detection capacitor and a wiring and pressure point area. The first opening A exposes a portion of the surface of the first dielectric layer 212 .

[0098] In a specific embodiment, the first conductive layer 213 is formed by deposition at a temperature of 520-620 degrees Celsius, and the thickness of the first conductive layer 213 is 0.4-1.2 micrometers, for example, 0.8 micrometers.

[0099] like Figure 4c-1 As shown, a protection layer S is formed on the first conductive layer 213 .

[0100] In this step, a protective layer S is formed on the first conductive layer 213, for example, by deposition. The protective layer S covers a portion of the surface of the first conductive layer 213, the sidewalls of the first opening A, and the surface of the first dielectric layer 212 exposed through the first opening A, so as to protect the surface of the first dielectric layer 212 exposed through the first opening A during the subsequent process of removing at least a portion of the second dielectric layer 214 to form the cavity 2141.

[0101] The protective layer S is made of the same material and prepared under the same conditions as the first conductive layer 213. However, the thickness of the protective layer S is much smaller than that of the first conductive layer 213. The ratio of the thickness of the protective layer S to the thickness of the first conductive layer 213 is 1:10 to 1:50, for example, 1:20.

[0102] In a specific embodiment, the protective layer S is made of the same polysilicon as the first conductive layer 213 and is also deposited at 520-620 degrees Celsius to form the protective layer S. The thickness of the protective layer S is 0.02-0.06 microns, for example, 0.04 microns.

[0103] Furthermore, for example, photolithography and etching processes are used to remove the protective layer S in the pressure point and wiring areas of the first conductive layer 213, leaving only the protective layer S within the area enclosed by the subsequent cavity. That is, the protective layer S is absent outside the area enclosed by the subsequent cavity 2141, to prevent short circuits in the wiring and pressure point areas. It will be understood that after the cavity 2141 is subsequently formed, the protective layer S exposed in the cavity 2141 will be removed. Therefore, as long as the protective layer S does not cover the pressure point and wiring areas of the first conductive layer 213 outside the area enclosed by the cavity 2141, the protective layer S in other areas can be retained. That is, at least the protective layer S in the pressure point and wiring areas of the first conductive layer 213 is removed.

[0104] In other embodiments, a fourth opening S-1 may be formed in the protective layer S within the area enclosed by the subsequent cavity. In the process of subsequently forming the second conductive layer 215, a portion of the second conductive layer 215 can form direct contact with the first conductive layer 213 via the fourth opening S-1, that is, there is no protective layer S between the contact surfaces of the second conductive layer 215 and the first conductive layer 213 within the area enclosed by the subsequent cavity 2141. Figure 4c-2 shown.

[0105] like Figure 4d As shown, a second dielectric layer 214 having a second opening B is formed on the first conductive layer 213 and the protective layer S.

[0106] In this step, a second dielectric layer 214 is formed on the surfaces of the first conductive layer 213 and the protective layer S, for example, by deposition. A resist layer is formed on the surface of the second dielectric layer 214, and the resist layer is patterned using a photolithography process to form a resist mask. The second dielectric layer 214 is then etched through the resist mask to form a second opening B penetrating the second dielectric layer 214. The second opening B exposes portions of the surface of the protective layer S and the first conductive layer 213. After forming the second opening B in the second dielectric layer 214, the resist mask is removed using a solvent dissolution or ashing method.

[0107] In a specific embodiment, the second dielectric layer 214 is an insulating layer, such as silicon dioxide (SiO 2 ). The thickness of the second dielectric layer 214 is, for example, 1.6 microns.

[0108] like Figure 4e As shown, a second conductive layer 215 is formed on the second dielectric layer 214 .

[0109] In this step, a second conductive layer 215 is formed on the surface of the second dielectric layer 214, for example, by epitaxial growth. Epitaxial growth can be normal pressure or low pressure epitaxial growth. The second conductive layer 215 covers the surface of the second dielectric layer 214 and fills the second opening B. It contacts the exposed surface of the protective layer S and the first conductive layer 213 through the second opening B. The material of the protective layer S is also the same as that of the second conductive layer 215. Because the protective layer S is made of the same material as the first conductive layer 213 and the second conductive layer 215, the second conductive layer 215 is electrically connected to the first conductive layer 213 through the protective layer S, and anchor support is also achieved.

[0110] The second conductive layer 215 is, for example, polysilicon. The thickness of the second conductive layer 215 is much greater than that of the protective layer S. In a specific embodiment, the thickness of the second conductive layer 215 is 15 to 30 microns, for example, 20 microns. The ratio of the thickness of the second conductive layer 215 to the thickness of the protective layer S is 200:1 to 1000:1, for example, 500:1.

[0111] like Figure 4f As shown, a patterned first bonding structure 216 a and a second pressure point 216 b are formed on the second conductive layer 215 .

[0112] In this step, a first bonding structure 216 a and a second pressure point 216 b separated from each other are formed on the surface of the second conductive layer 215 by, for example, deposition and etching. The first bonding structure 216 a is a ring structure.

[0113] The first bonding structure 216a is selected from any one of silicon, glass, metal, and alloy, thereby realizing any one of silicon-glass electrostatic bonding, silicon-silicon direct bonding, metal thermal compression bonding, or metal solder bonding.

[0114] In a specific embodiment, the first bonding structure 216a is, for example, a single layer composed of aluminum, or a stacked layer composed of aluminum and germanium. The thickness of the first bonding structure 216a is, for example, 1.5 microns.

[0115] like Figure 4g As shown, the second conductive layer 215 is etched to form a third opening C penetrating the second conductive layer 215 , so as to form the required movable mass 215 a.

[0116] In this step, a resist layer is formed on the surface of the second conductive layer 215 , the resist layer is patterned using a photolithography process to form a resist mask, and the second conductive layer 215 is etched through the resist mask to form a third opening C, thereby forming a movable mass block 215 a.

[0117] like Figure 4h As shown, a portion of the second dielectric layer 214 is removed through the third opening C to form a cavity 2141 .

[0118] In this step, the second dielectric layer 214 is fumigated with vapor-phase hydrofluoric acid (HF). The hydrofluoric acid selectively etches the second dielectric layer 214 in an isotropic manner. The protective layer S and the second conductive layer 215 are not corroded by the hydrofluoric acid and serve as an etch barrier. The area within the dashed box in FIG4h represents the area enclosed by the cavity 2141.

[0119] In this embodiment, because the protective layer S is made of the same material (polysilicon) as the first conductive layer 213 and the second conductive layer 215, it is not corroded by hydrofluoric acid (HF) in this step, thereby protecting the first dielectric layer 212 below the protective layer S. Due to the protection of the protective layer S, the first dielectric layer 212 is not affected by hydrofluoric acid (HF), ensuring the integrity of the first dielectric layer 212. Compared to the prior art, there is no need to increase the line width of the first conductive layer 213, thereby not increasing the parasitic capacitance. Therefore, the parasitic capacitance is reduced while ensuring device reliability.

[0120] like Figure 4i As shown, the portion of the protective layer S exposed on the inner surface of the cavity 2141 is removed.

[0121] In this step, dry etching is used, for example, to remove the protective layer S. Etching gases, for example, are CF 4 and O 2 . Dry etching does not etch the first dielectric layer 212 .

[0122] In this embodiment, the second conductive layer 215 is made of the same material as the protective layer S. When etching the protective layer S, the second conductive layer 215 is also etched. However, since the protective layer S is very thin (e.g., 0.04 microns), etching the protective layer S takes a very short time (e.g., 30 seconds). Furthermore, the thickness of the second conductive layer 215 is much greater than that of the protective layer S. Therefore, the etched thickness has a negligible effect on the second conductive layer 215. Furthermore, the effect on the sidewalls of the third opening C in the second conductive layer 215 can be compensated by increasing the line width.

[0123] After etching, only the portion of the protective layer S within the area enclosed by the cavity 2141 remains, which is located between the contact surfaces of the second conductive layer 215 and the first conductive layer 213. Since the protective layer S is made of the same material as the first conductive layer 213 and the second conductive layer 215, the second conductive layer 215 is electrically connected to the first conductive layer 213 via the protective layer S.

[0124] In an embodiment of the present invention, the portion of the first conductive layer 213 opposite to the movable mass block 215a is an effective electrode plate for detecting capacitance. In an embodiment of the present invention, the protective layer S on the first conductive layer 213 opposite to the movable mass block 215a is removed without affecting the line width of the effective electrode plate of the first conductive layer 213.

[0125] After the above steps, the device wafer 210 is prepared. The following is a process for preparing the cap wafer 220 . The preparation of the cap wafer 220 begins with the second substrate 221 .

[0126] like Figure 4j As shown, a patterned second bonding structure 222 is formed on the first surface of the second substrate 221 .

[0127] In this step, the second bonding structure 222 is formed on the first surface of the second substrate 221 by, for example, deposition and etching. The second bonding structure 222 is a ring structure.

[0128] The second bonding structure 222 is selected from any one of silicon, glass, metal, and alloy, thereby realizing any one of silicon-glass electrostatic bonding, silicon-silicon direct bonding, metal thermal compression bonding, or metal solder bonding.

[0129] In a specific embodiment, the second bonding structure 222 is, for example, a single layer composed of germanium, or a stacked layer composed of aluminum and germanium. The thickness of the second bonding structure 222 is, for example, 1 micron.

[0130] like Figure 4k As shown, a groove 2211 is formed on the first surface of the second substrate 221 .

[0131] In this step, a resist layer is formed on the first surface of the second substrate 221 , the resist layer is patterned using a photolithography process to form a resist mask, and the second substrate 221 is etched through the resist mask to form a groove 2211 .

[0132] like Figure 4l As shown, the device wafer 210 and the cap wafer 220 are bonded together.

[0133] In this step, the first surface of the second substrate 221 is positioned opposite to the second conductive layer 215, and the device wafer 210 and the cap wafer 220 are bonded at high temperature via the first bonding structure 216a and the second bonding structure 222. At high temperature, the first bonding structure 216a (aluminum) and the second bonding structure 222 (germanium) melt into each other, thereby bonding the device wafer 210 and the cap wafer 210 to each other to form a sealed cavity, which facilitates control of the air pressure within the cavity and prevents the internal structure of the inertial sensor from being affected by the external environment, resulting in poor working stability.

[0134] like Figure 4m As shown, at least a portion of the second substrate 221 is removed to expose the second pressure point 216b; and at least a portion of the second conductive layer 215 is removed to form a separated first pressure point 215b.

[0135] In this step, the second pressing point 216b (aluminum layer) is used as a hard mask to form the first pressing point 215b by etching.

[0136] The second pressure point 216 b is electrically connected to the first conductive layer 213 via the first pressure point 215 b , and the second pressure point 216 b is used for subsequent packaging and wire bonding.

[0137] While embodiments of the present invention have been described above, these embodiments do not exhaustively describe all details and do not limit the invention to the specific embodiments described. Obviously, many modifications and variations are possible based on the above description. These embodiments are selected and described in detail in this specification to better explain the principles and practical applications of the present invention, thereby enabling those skilled in the art to better utilize the present invention and its modifications and uses. The present invention is limited only by the claims and their full scope and equivalents.

Claims

1. A method for preparing an inertial sensor, characterized in that: The method comprises: forming a first dielectric layer and a first conductive layer on a first substrate; forming a first opening in the first conductive layer to expose a portion of the surface of the first dielectric layer; forming a protective layer on the first conductive layer, wherein the protective layer covers a portion of the first conductive layer, a sidewall of the first opening, and a surface of the first dielectric layer exposed by the first opening; forming a second dielectric layer having a second opening on a portion of the first conductive layer and a portion of the protective layer; forming a second conductive layer on the second dielectric layer, wherein the second conductive layer fills the second opening; forming a first bonding structure on the second conductive layer; patterning the second conductive layer to form a third opening; removing a portion of the second dielectric layer through the third opening to form a cavity and a movable mass block; The first conductive layer in the cavity and the protective layer exposed on the surface of the first dielectric layer are removed.

2. The method for preparing an inertial sensor according to claim 1, wherein: Before removing the first conductive layer in the cavity and the protective layer exposed on the surface of the first dielectric layer, there is no protective layer outside the area surrounded by the cavity.

3. The method for preparing an inertial sensor according to claim 1, wherein: Before removing the protective layer exposed on the surface of the first conductive layer and the first dielectric layer in the cavity, the wiring and pressure point areas of the first conductive layer outside the area surrounded by the cavity are free of the protective layer.

4. The method for preparing an inertial sensor according to claim 2 or 3, wherein: Before removing the protective layer exposed on the surfaces of the first conductive layer and the first dielectric layer in the cavity, there is no protective layer between the contact surfaces of the second conductive layer and the first conductive layer within the area enclosed by the cavity.

5. The method for preparing an inertial sensor according to claim 1, wherein: The protective layer, the first conductive layer, and the second conductive layer are made of the same material.

6. The method for preparing an inertial sensor according to claim 1, wherein: The protective layer, the first conductive layer and the second conductive layer are made of polysilicon.

7. The method for preparing an inertial sensor according to claim 1, wherein: The thickness ratio of the first conductive layer to the protective layer is 10:1 to 50:

1.

8. The method for preparing an inertial sensor according to claim 1, wherein: The thickness ratio of the second conductive layer to the protective layer is 200:1 to 1000:

1.

9. The method for preparing an inertial sensor according to claim 1, wherein: The thickness of the protective layer is 0.02-0.06 microns.

10. The method for preparing an inertial sensor according to claim 1, wherein: The thickness of the first conductive layer is 0.4-1.2 microns.

11. The method for preparing an inertial sensor according to claim 1, wherein: The thickness of the second conductive layer is 15-30 microns.

12. The method for preparing an inertial sensor according to claim 1, wherein: The deposition temperature of the first conductive layer and the protective layer is 520-620 degrees Celsius.

13. The method for preparing an inertial sensor according to claim 1, wherein: The first conductive layer in the cavity and the protective layer exposed on the surface of the first dielectric layer are removed by dry etching.

14. The method for preparing an inertial sensor according to claim 13, wherein: The protective layer is dry-etched using CF4 and O2.

15. The method for preparing an inertial sensor according to claim 1, wherein: A portion of the second dielectric layer is removed through the third opening by a hydrofluoric acid vapor fumigation process to form a cavity and a movable mass block.

16. The method for preparing an inertial sensor according to claim 1, wherein: Also includes: forming a second bonding structure on the first surface of the second substrate; forming a groove on the first surface of the second substrate; The first bonding structure of the first substrate and the second bonding structure of the second substrate are bonded at high temperature to form a sealed cavity.

17. An inertial sensor, characterized in that: The inertial sensor comprises: a first substrate; a first dielectric layer located on the first substrate; a first conductive layer located on the first dielectric layer, wherein the first conductive layer has a first opening, and the first opening exposes a portion of the surface of the first dielectric layer; a protective layer located on a portion of the first conductive layer; a second dielectric layer located on the first conductive layer, wherein the second dielectric layer has a cavity; a patterned second conductive layer located on the second dielectric layer, wherein the second conductive layer in the cavity serves as a movable mass block; a first bonding structure located on the second conductive layer; The protective layer within the area enclosed by the cavity is only located between the contact surfaces of the first conductive layer and the second conductive layer, and the protective layer, the first conductive layer and the second conductive layer are made of the same material.

18. The inertial sensor according to claim 17, wherein: There is no protective layer outside the area surrounded by the cavity.

19. The inertial sensor according to claim 17, wherein: The protective layer is located outside the area surrounded by the cavity, and the protective layer does not cover the wiring and pressure point areas of the first conductive layer.

20. The inertial sensor according to claim 17, wherein The protective layer, the first conductive layer and the second conductive layer are made of polysilicon.

21. The inertial sensor according to claim 17, wherein The thickness ratio of the first conductive layer to the protective layer is 10:1 to 50:

1.

22. The inertial sensor according to claim 17, wherein: The thickness ratio of the second conductive layer to the protective layer is 200:1 to 1000:

1.

23. The inertial sensor according to claim 17, wherein: The thickness of the protective layer is 0.02-0.06 microns.

24. The inertial sensor according to claim 17, wherein The thickness of the first conductive layer is 0.4-1.2 microns.

25. The inertial sensor according to claim 17, wherein The thickness of the second conductive layer is 15-30 microns.

26. The inertial sensor according to claim 17, wherein Also includes: a second substrate; a second bonding structure located on the first surface of the second substrate; a groove located on the first surface of the second substrate; The first surface of the second substrate is arranged opposite to the second conductive layer. The second bonding structure is located on the first bonding structure and encloses the first substrate and the second substrate to form a sealed cavity.

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