Chip components and electronic devices

Abstract

The present application discloses a chip assembly and an electronic device, wherein the chip assembly comprises a stacked packaged chip and a circuit board, wherein the packaged chip comprises a package body, a first solder pad group for transmitting a first electrical signal arranged on the package body, and a first solder ball group arranged for the first solder pad group, and the first solder pad group is electrically connected to the circuit board through the first solder ball group, the solder pads in the first solder pad group correspond one-to-one to the solder balls in the first solder ball group, and the number of solder pads in the first solder pad group is at least two; wherein any two adjacent solder balls in the first solder ball group are electrically connected through a first conductive member.

Description

Technical Field

[0001] The present application belongs to the field of chip technology, and specifically relates to a chip component and an electronic device. Background Art

[0002] In the related art, the ball grid array (BGA) packaged chip relies on solder balls to transfer signals and heat. However, when transmitting high current signals, the limited number of solder balls and the contact impedance of the solder balls will affect the thermal conduction efficiency of the entire packaged chip, thereby affecting the power consumption of the packaged chip.

[0003] It can be seen that the existing packaged chips have the problem of poor heat transfer effect. Summary of the invention

[0004] The present application aims to provide a chip assembly and electronic equipment, which can solve the problem of poor heat transfer effect in existing packaged chips.

[0005] In order to solve the above technical problems, this application is implemented as follows:

[0006] In a first aspect, an embodiment of the present application provides a chip assembly, comprising a stacked packaged chip and a circuit board, wherein the packaged chip comprises a package body, a first pad group for transmitting a first electrical signal disposed on the package body, and a first solder ball group disposed for the first pad group, and the first pad group is electrically connected to the circuit board through the first solder ball group, the pads in the first pad group correspond one-to-one to the solder balls in the first solder ball group, and the number of pads in the first pad group is at least two;

[0007] Any two adjacent solder balls in the first solder ball group are electrically connected via a first conductive member.

[0008] In a second aspect, an embodiment of the present application provides an electronic device, comprising the chip assembly described in the first aspect.

[0009] In an embodiment of the present application, by providing a first conductive member, the contact impedance between the first solder ball group and the first solder pad group can be reduced, that is, the thermal resistance of the first solder ball group can be reduced, so that when the first electrical signal passes through the first solder pad group and the first solder ball group, the heat generated by the first solder ball group can be reduced, thereby reducing the heat generated by the packaged chip when transmitting the electrical signal, and achieving the purpose of improving the heat transfer effect of the packaged chip.

[0010] Moreover, by providing the first conductive member, the connection support between the first pad group and the first solder ball group can be increased, thereby improving the support of the circuit board for the packaged chip, reducing the failure risk of the packaged chip, and improving the reliability of the packaged chip.

[0011] Furthermore, due to the reduction in contact impedance between the first solder ball group and the first solder pad group, power supply noise can be reduced and the electrical performance of the chip component can be improved.

[0012] Additional aspects and advantages of the present application will be given in part in the description below, and in part will become apparent from the description below, or will be learned through the practice of the present application. BRIEF DESCRIPTION OF THE DRAWINGS

[0013] The above and / or additional aspects and advantages of the present application will become apparent and easily understood from the description of the embodiments in conjunction with the following drawings, in which:

[0014] Figure 1 It is one of the structural schematic diagrams of the chip assembly provided in the embodiment of the present application;

[0015] Figure 2 This is the second structural schematic diagram of the chip assembly provided in the embodiment of the present application;

[0016] Figure 3 It is one of the style diagrams of the first solder ball group provided in the embodiment of the present application;

[0017] Figure 4 This is the second style diagram of the first solder ball group provided in the embodiment of the present application;

[0018] Figure 5 This is the third structural schematic diagram of the chip assembly provided in the embodiment of the present application;

[0019] Figure 6 This is the fourth structural diagram of the chip assembly provided in the embodiment of the present application;

[0020] Figure 7 This is the fifth structural diagram of the chip component provided in the embodiment of the present application. DETAILED DESCRIPTION

[0021] The embodiments of the present application will be described in detail below, and examples of the embodiments are shown in the accompanying drawings, wherein the same or similar reference numerals throughout represent the same or similar elements or elements having the same or similar functions. The embodiments described below with reference to the accompanying drawings are exemplary and are only used to explain the present application, and should not be construed as limitations on the present application. Based on the embodiments in the present application, all other embodiments obtained by ordinary technicians in the field without making creative work are within the scope of protection of the present application.

[0022] The term "first" or "second" in the specification and claims of this application may include one or more of the features explicitly or implicitly. In the description of this application, unless otherwise specified, "plurality" means two or more. In addition, "and / or" in the specification and claims means at least one of the connected objects, and the character " / " generally means that the objects connected before and after are in an "or" relationship.

[0023] In the description of this application, it should be noted that, unless otherwise clearly specified and limited, the terms "installed", "connected", and "connected" should be understood in a broad sense, for example, it can be a fixed connection, a detachable connection, or an integral connection; it can be a mechanical connection or an electrical connection; it can be a direct connection, or it can be indirectly connected through an intermediate medium, or it can be the internal communication of two components. For ordinary technicians in this field, the specific meanings of the above terms in this application can be understood according to specific circumstances.

[0024] like Figures 1 to 7 As shown, the embodiment of the present application provides a chip assembly, including a stacked packaged chip 10 and a circuit board 20, the packaged chip 10 includes a package body 11, a first solder pad group 12 for transmitting a first electrical signal disposed on the package body 11, and a first solder ball group 13 disposed for the first solder pad group 12, and the first solder pad group 12 is electrically connected to the circuit board 20 through the first solder ball group 13, the solder pads in the first solder pad group 12 correspond to the solder balls in the first solder ball group 13 one by one, and the number of solder pads in the first solder pad group 12 is at least two;

[0025] Any two adjacent solder balls in the first solder ball group 13 are electrically connected via the first conductive member 14 .

[0026] In this embodiment, the first pad group 12 for transmitting the first electrical signal can be understood as a first pad group 12 consisting of at least two pads that needs to work together when transmitting the first electrical signal between the packaged chip 10 and the circuit board 20, that is, the pads in the first pad group 12 are pads of the same network, that is, the pads in the first pad group 12 can be connected together through the electrical network structure on the package body 11.

[0027] Among them, any two adjacent solder balls in the first solder ball group 13 are electrically connected through the first conductive member 14, which can be understood as a first conductive member 14 is provided between any two adjacent solder balls in the first solder ball group 13, and the electrical connection of the two solder balls is achieved through the first conductive member 14. For example, solder or solder paste can be provided between any two adjacent solder balls in the first solder ball group 13, and a solder conductive member or a solder paste conductive member can be formed to achieve the electrical connection of any two solder balls in the first solder ball group 13.

[0028] In this embodiment, the first conductive member 14 can be provided to make the solder balls in the first solder ball group 13 form the same electrical conduction network, that is, the solder balls in the first solder ball group 13 form a large solder ball, which is equivalent to reducing the contact impedance of the first solder ball group 13 .

[0029] In this way, by setting the first conductive member 14, the contact impedance between the first solder ball group 13 and the first solder pad group 12 can be reduced, that is, the thermal resistance of the first solder ball group 13 can be reduced, so that when the first electrical signal passes through the first solder pad group 12 and the first solder ball group 13, the heat generated by the first solder ball group 13 can be reduced, thereby reducing the heat generated by the packaged chip 10 when transmitting the electrical signal, and achieving the purpose of improving the heat transfer effect of the packaged chip.

[0030] Moreover, by providing the first conductive member 14, the connection support between the first pad group 12 and the first solder ball group 13 can be increased, thereby improving the support of the circuit board for the packaged chip, reducing the failure risk of the packaged chip, and improving the reliability of the packaged chip.

[0031] In some embodiments, any two adjacent solder balls in the first solder ball group 13 can be understood as two solder balls without any other solder balls or structures blocking them, such as Figure 3 Adjacent solder balls in the horizontal direction, adjacent solder balls in the oblique direction, or adjacent solder balls in the vertical direction, etc.

[0032] Furthermore, due to the reduction in contact impedance between the first solder ball group 13 and the first solder pad group 12 , power supply noise can be reduced and the electrical performance of the chip component can be improved.

[0033] It can be understood that in some embodiments of the present application, the packaging body 11 can be understood as a supporting structure in the packaged chip other than electrical structures such as pads, traces, solder balls, etc., including a substrate for installing and laying out electrical structures such as pads, traces, solder balls, a sealing layer for sealing the electrical structure, and the like.

[0034] Among them, the one-to-one correspondence between the solder pads in the first solder pad group 12 and the solder balls in the first solder ball group 13 can be understood as each solder pad in the first solder pad group 12 is correspondingly provided with a solder ball, and all the solder balls corresponding to the solder pads in the first solder pad group 12 constitute the first solder ball group 13.

[0035] Furthermore, a second conductive member may be provided between any two pads of the first pad group 12 so that the pads in the first pad group 12 form a through network of pads.

[0036] In some embodiments, the second conductive member can be exposed on the end surface of the package body 11 facing the circuit board 20, and the second conductive member is in contact and connected with the first conductive member 14, which can further reduce the contact impedance of the first solder pad group 12 and the first solder ball group 13, thereby reducing the heat generated by the packaged chip 10 when transmitting electrical signals.

[0037] The second conductive member may be a copper foil layer exposed on the end surface of the package body 11 facing the circuit board 20 , and the first conductive member 14 is in contact with and connected to the copper foil layer.

[0038] For example, solder or solder paste may be filled on the copper foil layer exposed in the area corresponding to the first solder pad group 12, and a first conductive member 14 electrically connecting two adjacent solder balls in the first solder ball group 13 may be formed.

[0039] In actual operation, especially during the welding process of the packaged chip 10 and the circuit board 20 , the steel mesh can be partially enlarged to increase the amount of solder so that more solder is connected to the solder balls in the first solder ball group 13 to achieve good contact between the packaged chip 10 and the circuit board 20 .

[0040] Alternatively, if Figure 2 As shown, the distance between any two adjacent pads in the first pad group 12 is smaller than the target distance, which is the distance between any pad in the first pad group 12 and other pads on the package body 11 except the first pad group 12 .

[0041] In this embodiment, by setting the spacing between any two adjacent pads in the first pad group 12 to be smaller than the target spacing, that is, by shortening the spacing between the solder balls in the first pad group 12, the number of solder balls in the same area can be increased, and the purpose of further enhancing the electrical connection performance of the packaged chip 10 and the circuit board 20 can be achieved.

[0042] It can be understood that after the spacing between the pads in the first pad group 12 is shortened, the spacing between the solder balls in the first solder ball group 13 corresponding to the first pad group 12 also becomes smaller, so that the packaged chip 10 and the circuit board 20 can form a strong connection in the area corresponding to the first pad group 12, and the stability of the connection between the packaged chip 10 and the circuit board 20 is improved.

[0043] Alternatively, if Figures 5 to 7 As shown, the package body 11 includes a first area 111 and a second area 112 located outside the first area 111, and the first pad group 12 is disposed in the first area 111;

[0044] The packaged chip 10 further includes a second pad group disposed in the second region 112 and a second solder ball group 15 disposed for the second pad group. The second region 112 of the package body 11 is electrically connected to the circuit board 20 via the second pad group and the second solder ball group 15. The pads in the second pad group correspond to the solder balls in the second solder ball group 15 one-to-one, and the number of pads in the second pad group is at least two.

[0045] Any two adjacent solder balls in the second solder ball group 15 are electrically connected via the third conductive member.

[0046] In this embodiment, by setting a second solder pad group and a second solder ball group 15 in the second area 112, and realizing electrical connection between the second area 112 of the package body 11 and the circuit board 20 through the second solder pad group and the second solder ball group 15, the connection strength between the peripheral area (i.e., the second area 112) of the package body 11 and the circuit board 20 can be improved, and the damage of stress to the packaged chip 10 can be alleviated.

[0047] In some embodiments, the packaged chip 10 includes a plurality of second solder pad groups, which are distributed around the first region 111, so that the entire circumferential edge region (i.e., the second region 112) of the package body 11 and the circuit board 20 have good connection strength, further improving the stability of the connection between the packaged chip 10 and the circuit board 20.

[0048] like Figure 3 As shown, when the number of solder balls in the first solder ball group 13 is 3, the 3 solder balls in the first solder ball group 13 can be distributed in a straight line, in an L shape, in a triangle shape, etc.

[0049] like Figure 4 As shown, when the number of solder balls in the first solder ball group 13 is 4, the 4 solder balls in the first solder ball group 13 can be distributed in a straight line, in an L shape, in a square shape, etc.

[0050] The number of solder balls in the second solder ball group may also be 3 or 4, etc., and the distribution pattern of the solder balls in the second solder ball group may also be a linear distribution, an L-shaped distribution, etc.

[0051] An embodiment of the present application also provides an electronic device, comprising the above-mentioned chip assembly.

[0052] It should be noted that the implementation method of the above chip component embodiment is also applicable to the embodiment of the electronic device and can achieve the same technical effect, which will not be repeated here.

[0053] The electronic device may be a mobile phone, a tablet computer, a laptop computer, a PDA, a vehicle-mounted electronic device, a wearable device, an ultra-mobile personal computer (UMPC), a netbook, or a personal digital assistant (PDA).

[0054] In the description of this specification, the description with reference to the terms "one embodiment", "some embodiments", "illustrative embodiments", "examples", "specific examples", or "some examples" means that the specific features, structures, materials, or characteristics described in conjunction with the embodiment or example are included in at least one embodiment or example of the present application. In this specification, the schematic representation of the above terms does not necessarily refer to the same embodiment or example. Moreover, the specific features, structures, materials, or characteristics described may be combined in any one or more embodiments or examples in a suitable manner.

[0055] Although the embodiments of the present application have been shown and described, those skilled in the art will appreciate that various changes, modifications, substitutions and variations may be made to the embodiments without departing from the principles and spirit of the present application, and that the scope of the present application is defined by the claims and their equivalents.

Claims

1. A chip assembly, characterized in that: A packaged chip and a circuit board are stacked, wherein the packaged chip comprises a package body, a first pad group for transmitting a first electrical signal and provided on the package body, and a first solder ball group provided for the first pad group, wherein the first pad group is electrically connected to the circuit board through the first solder ball group, the pads in the first pad group correspond to the solder balls in the first solder ball group one by one, and the number of pads in the first pad group is at least two; Wherein, any two adjacent solder balls in the first solder ball group are electrically connected via a first conductive member; A second conductive member is disposed between any two pads in the first pad group. The second conductive member is exposed on the end surface of the package body facing the circuit board, and the second conductive member is in contact with and connected to the first conductive member.

2. The chip assembly according to claim 1, characterized in that: The distance between any two adjacent pads in the first pad group is smaller than a target distance, and the target distance is the distance between any pad in the first pad group and other pads on the package body except the first pad group.

3. The chip assembly according to claim 1 or 2, characterized in that: The package body comprises a first area and a second area located outside the first area, and the first pad group is arranged in the first area; The packaged chip further includes a second solder pad group disposed in the second region and a second solder ball group disposed corresponding to the second solder pad group, the second region of the package body is electrically connected to the circuit board via the second solder pad group and the second solder ball group, the solder pads in the second solder pad group correspond one-to-one to the solder balls in the second solder ball group, and the number of solder pads in the second solder pad group is at least two; Any two adjacent solder balls in the second solder ball group are electrically connected via a third conductive member.

4. The chip assembly according to claim 3, characterized in that: The packaged chip includes a plurality of the second pad groups, and the plurality of the second pad groups are distributed around the first area.

5. The chip assembly according to claim 1, characterized in that: The second conductive component is a copper foil layer arranged on the packaging body.

6. The chip assembly according to claim 1 or 2, characterized in that: The first conductive member is a solder conductive member.

7. The chip assembly according to claim 1 or 2, characterized in that: When the number of solder balls in the first solder ball group is 3, the 3 solder balls in the first solder ball group are distributed in a straight line or in an L shape.

8. The chip assembly according to claim 1 or 2, characterized in that: When the number of solder balls in the first solder ball group is 4, the 4 solder balls in the first solder ball group are distributed in a straight line, in an L shape, or in a square shape.

9. An electronic device, characterized in that: The invention comprises a chip assembly as claimed in any one of claims 1 to 8.

Images