A circuit schematic layout and routing method based on iterative tabu search algorithm

Through the iterative taboo search algorithm to optimize circuit layout and wiring, the problem of high complexity of circuit layout and wiring in the existing technology is solved, and fast and efficient layout planning and area reduction are achieved, which significantly shortens the calculation time.

CN114564905BActive Publication Date: 2024-12-10SOUTHEAST UNIV
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Patent Information

Application Number
CN202210181588.X
Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
Filing Date
2022-02-25
Publication Date
2024-12-10
Estimated Expiration
2042-02-25

AI Technical Summary

Technical Problem

The existing circuit layout and wiring methods have problems such as high computational complexity, slow solution speed and poor results, and cannot meet the needs of fast and efficient planning of large-scale electronic circuits, especially in reducing layout area and node conflict calculations.

Method used

The circuit diagram layout and routing method based on the iterative taboo search algorithm is adopted. By initializing the row and column layout of each instance, the row sequence is optimized, the position coordinates and port coordinates are determined, and the routing is performed based on the sorting information, using the depth-first traversal and merge sorting algorithm. Reduce the number of wiring intersections.

Benefits of technology

The calculation complexity and layout area are significantly reduced, and the approximate optimal layout scheme is quickly obtained, the calculation time is shortened, and the number of wiring intersection points and connection length are optimized.

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Abstract

The present invention provides a circuit schematic layout and wiring method based on an iterative taboo search algorithm, including: initializing the layout of rows and columns of each instance; optimizing the row order of each instance using a taboo search algorithm; determining the location coordinates of the instance and its port coordinates; and wiring based on the known instance layout. The present invention can reduce the calculation of the objective function and reduce the area of ​​the layout of the components, and quickly obtain a reasonable approximate optimal layout and wiring scheme. Compared with the traditional method of comparing the number of intersections of two line segments, the present invention optimizes the objective function, reduces the number of intersections and the length of the connection, and uses a merge sort method to calculate the reverse order pair to quickly solve the approximate number of intersections (the time complexity is O(m logm)), which significantly shortens the calculation time while ensuring a certain degree of correctness.
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Description

Technical Field

[0001] The invention belongs to the technical field of programmable logic array electronic circuits, and relates to circuit layout and wiring technology, and in particular to a circuit schematic layout and wiring method based on an iterative taboo search algorithm. Background Art

[0002] Field Programmable Gate Array (FPGA) is an important branch of programmable logic array. The core part of FPGA design is the layout and wiring of electronic circuits. If the layout and wiring area of ​​electronic circuits is too large, the chip area will be too large, the cost will increase, and the performance will decrease. Therefore, its planning technology has gradually become a research hotspot.

[0003] Most circuit layout and routing methods use electronic design automation software to complete the design, but the algorithms embedded in the software have problems such as high time complexity in calculating the number of connection intersections, slow speed in solving large-scale circuits, and poor solution results. They cannot meet the future requirements for fast, efficient, and low area occupancy for large-scale electronic circuit planning and layout. Compared with electronic design automation software, taboo search algorithm technology can provide a planning solution with relatively excellent performance within a specified time. It has great advantages in reducing complexity, improving calculation efficiency, and solving large-scale electronic circuit layout and routing. Therefore, it is very suitable for solving circuit layout and routing planning problems.

[0004] In the future, electronic circuit systems will be able to provide services for a large number of electronic circuit design needs, and will be able to quickly and accurately arrange the positions of components and plan the connections between components, reducing the chip area occupied by electronic circuits. However, it is precisely this high-efficiency and high-performance arrangement planning requirement that has brought great challenges to the layout and routing process of electronic components, especially for efficient node conflicts, occupied area and other fast calculation methods during the layout and routing process. However, existing technologies cannot meet the needs.

[0005] In addition, in order to achieve the above requirement of reducing the complexity of layout and routing operations, it is impossible and unnecessary to consider the layout of all or a large range of electronic components that are not yet fully understood. Therefore, when performing electronic circuit component layout and routing, it is very important to determine which electronic components need to be planned and when to plan. Therefore, it is necessary to provide a fast and reasonable control method for planning. Summary of the invention

[0006] To solve the above problems, the present invention provides a circuit schematic layout and routing method based on an iterative taboo search algorithm.

[0007] In order to achieve the above object, the present invention provides the following technical solutions:

[0008] A circuit schematic layout and routing method based on an iterative taboo search algorithm comprises the following steps:

[0009] Step 1: Initialize the row and column layout of each instance

[0010] Initialize the row and column order of each programmable logic element model instance, and generate the initial order of each instance row and column according to the connection relationship between instances and instance labels;

[0011] Step 2: Use the taboo search algorithm to optimize the row order of each instance

[0012] The row order of instances is adjusted only in two adjacent columns, and the process is iterated backwards until all instances have a better row order. The process includes the following specific steps:

[0013] (1) Initialize important parameters; when the source column i and the drain column j differ by more than one column, create a virtual instance and assign it to the column after the source column, then determine whether the newly created virtual instance and the drain column are adjacent, if so, stop creating the virtual instance, otherwise repeat the steps of creating the virtual instance, and the column numbers of the created virtual instances are increased sequentially; when the source column i is greater than or equal to the drain column j, create a virtual instance and assign it to the drain column, then determine whether the virtual instance and the source column are the same, if so, stop creating the virtual instance, otherwise repeat the steps of creating the virtual instance;

[0014] (2) Use taboo search to optimize the row order of instances, and optimize the row order of instances in the i+1th column in turn until all columns are traversed;

[0015] Step 3: Determine the location coordinates of the instance and its port coordinates

[0016] Calculate the instance position coordinates; calculate the spacing between adjacent columns and the spacing between upper and lower adjacent instances. The distance between instances in adjacent columns is the sum of the number of output lines in column i and the number of reverse lines in column i+1. The spacing between upper and lower adjacent instances is the maximum value of the number of virtual instances between the two and the minimum limit distance e. The horizontal coordinate of the first column is a set fixed value, and each subsequent column is accumulated according to the horizontal coordinate of the adjacent previous column, the physical width w of the instance, the spacing between adjacent columns, and the pin length p. The horizontal coordinate and physical width of instances in the same column are the same. The vertical coordinate of the first row is a set fixed value, and each subsequent row is accumulated according to the physical length of the instance in the adjacent previous row and the upper and lower spacing of the instance. The port coordinates of each instance change in sequence according to the original numbering order, pin length, and port width d parameters based on the upper left corner position coordinates of the instance.

[0017] Step 4: Routing based on known instance layout

[0018] According to the row and column order of the given instance, the coordinates of the port and the instance connection information in the net network, the wiring is performed with a line width of 1 unit length; the wiring considers two adjacent columns each time, and then iterates to complete the wiring of all columns in sequence; when wiring two adjacent columns, the connection is determined according to the coordinates of the output port of the i-th column and the input port of the i+1-th column.

[0019] Further, the step 1 includes the following specific steps:

[0020] (1) First determine the column number of the instance that has no input connection and the output port connected to the input port;

[0021] (2) Use depth-first traversal to assign column numbers to the remaining instances;

[0022] (3) Update the column number of the instance without output connection;

[0023] (4) Determine the initial row number of all instances.

[0024] Furthermore, in the step (1), the column number of the instance without input connection and the output port connected to the input port is assigned to the first column; in the step (3), the column number of the instance without output connection is updated to the last column.

[0025] Furthermore, the step (2) includes the following sub-steps:

[0026] 1) If the successor instance has not been assigned a column number, assign it a column number of i+k;

[0027] 2) If the successor instance has been assigned column number m, and it is impossible to return to itself from the instance, then compare the instance's column number i+k with the already assigned column number m, and select max{i+k, m} as the new column number;

[0028] 3) If the successor instance has been assigned column number m, and it is possible to return to itself from the instance, and the subsequent instance is in the same column as the current instance, then the successor instance is assigned column number i+k;

[0029] 4) Otherwise, the subsequent instance will not be processed;

[0030] Repeat the above process until all instances are assigned column numbers.

[0031] Furthermore, in step (4), the row numbers of the instances contained in each column are arranged from small to large according to the instance numbers.

[0032] Furthermore, step (2) in the step 2 includes the following sub-steps:

[0033] 1) Design the port virtual numbering rules for the i-th and i+1-th columns, and calculate the number of reverse pairs; first, number the input and output ports of the instance in the i-th column from top to bottom, and then pass the numbers to the corresponding input and output ports in the i+1 column. If the input / output port in the i+1-th column is connected to multiple output / input ports in the i-th column, take the average of the port virtual numbers; then use the merge sort algorithm to calculate the number of reverse pairs;

[0034] 2) The optimization objective function is the number of reverse pairs of the numbering sequence on the i+1 input side;

[0035] 3) Perform an insert neighborhood move operation on the instance in the i+1th column, inserting one instance onto another instance in the same column; each time all instances in the i+1th column are moved and restored in sequence, and the non-taboo move with the smallest inverse pair difference is selected according to the difference of the inverse pairs generated during the move and the taboo list. Select the best neighborhood move, that is, the move with the largest neighborhood increment that is not prohibited, or the solution layout solution with the smallest number of inverse pairs found so far.

[0036] Furthermore, in step 3), when there are multiple moving modes with the same moving gain, one moving mode is randomly selected.

[0037] Furthermore, in step three, the port horizontal coordinate of each instance is the left / right end of the instance to which it belongs minus or plus the pin length, and the port vertical coordinate is the top vertical coordinate of the instance to which it belongs accumulated according to the port width.

[0038] Furthermore, in step 4, wiring two adjacent columns specifically includes the following steps:

[0039] 1) If the vertical coordinates of the input and output ports are the same, connect them directly with a straight line;

[0040] 2) If they are inconsistent, find the middle turning point to connect the lines. The turning point calculation of the wiring only needs to determine the horizontal coordinate of the turning point.

[0041] Furthermore, in the step 2), the calculation of the turning point of the wiring only needs to determine the horizontal coordinate of the turning point: first, the wiring order of the connection is sorted according to the positive or negative difference between the vertical coordinates of the source end and the drain end, and then sorted according to the size of the source end virtual number; secondly, according to the sorting order of the wiring, the horizontal coordinate of the turning point of each connection is determined in turn, where the horizontal coordinate of the turning point of the first connection is the horizontal coordinate of the output port plus 1, and the horizontal coordinates of the turning points of subsequent connections increase by 1 in turn.

[0042] Compared with the prior art, the present invention has the following advantages and beneficial effects:

[0043] The present invention can reduce the calculation of the objective function and the area of ​​the component layout, and quickly obtain a reasonable and approximate optimal layout and wiring solution. Compared with the traditional method of comparing two line segments to calculate the number of intersection points (the time complexity of the traditional method is O(m 2 ), where m is the number of ports in the i+1th column), the present invention optimizes the objective function, reduces the number of line intersections and the line length, and uses a merge sort method to calculate inverse pairs to quickly solve the approximate number of intersections (the time complexity is O(mlogm)), which significantly shortens the calculation time while ensuring a certain degree of correctness. BRIEF DESCRIPTION OF THE DRAWINGS

[0044] Figure 1 It is a flow chart of a circuit schematic layout and routing method based on an iterative taboo search algorithm provided by the present invention.

[0045] Figure 2 This is a schematic diagram of depth-first traversal column number allocation provided by the present invention.

[0046] Figure 3 This is a schematic diagram of generating a virtual instance provided by the present invention.

[0047] Figure 4This is a schematic diagram of inserting neighborhood movement provided by the present invention.

[0048] Figure 5 It is a schematic diagram of the instance and its physical port location coordinates provided by the present invention.

[0049] Figure 6 It is a schematic diagram of instance wiring between adjacent columns provided by the present invention. DETAILED DESCRIPTION

[0050] The technical solution provided by the present invention will be described in detail below in conjunction with specific embodiments. It should be understood that the following specific implementation methods are only used to illustrate the present invention and are not used to limit the scope of the present invention.

[0051] The circuit schematic layout and routing method based on iterative taboo search algorithm proposed in the present invention is an algorithm that can be embedded in EDA design software and is used to realize the circuit schematic automatic layout and routing function of EDA design software. The specific process is as follows: Figure 1 As shown, the following steps are included:

[0052] (a) Initialize the row and column layout of each instance.

[0053] Initialize the row and column order of each instance (programmable logic element model, the model describes the unique label of the element, i.e., physical number, number of physical input ports, number of physical output ports, number of physical bidirectional ports (can be used as both input ports and output ports), physical length / width, the physical length is proportional to the maximum number of ports, and the physical width is fixed.) Generate the initial order of rows and columns of each instance based on the connection relationship between instances and the physical number label of the instance. The specific steps are as follows:

[0054] (1) First, determine the column numbers of instances that have no input connections and whose output ports are connected to input ports. To minimize the number of columns, assign such instances to the first column.

[0055] (2) Use depth-first traversal to assign column numbers to the remaining instances. According to the column number i of the instance that has been assigned, assign the column number of the successor instance (if the signal output by the source instance is the input signal of the drain instance, then this drain is the successor instance of the source, the source refers to the instance of the output signal in the circuit connection relationship, and the drain refers to the instance of the input signal in the circuit connection relationship). The specific method is as follows:

[0056] 1) If the successor instance has not been assigned a column number, its column number is assigned as i+k, (k is the column number interval between the two instances, and its value range can be an integer in [1,20]);

[0057] 2) If the successor instance has been assigned column number m, and it is impossible to return to itself from the instance, then compare the instance's column number i+k with the already assigned column number m, and select max{i+k, m} as the new column number;

[0058] 3) If the successor instance has been assigned column number m, and it is possible to return to itself from the instance, and the subsequent instance is in the same column as the current instance, in order to reduce the circuit complexity, the successor instance is assigned column number i+k;

[0059] 4) Otherwise, the subsequent instance is not processed.

[0060] Repeat the above process until all instances are assigned column numbers.

[0061] Figure 2 (a)-(c) show the corresponding three situations mentioned above. Figure 2 (a) represents the first case, the instance 1 that has been assigned is in the i-th column (i=1), and its successor instance 5 has not yet been assigned a column number, so it is assigned to the i+k-th column (i=1, k is assumed to be 1); Figure 2 (b) represents the second case. Instance 5 is already assigned in the i-th column (i=2). Its successor instance is instance 6, but instance 6 has been assigned in the m-th column (m=2). It is impossible to go back to instance 6 from instance 6. Then max{i+k, m}=3 is selected as the column number of instance 6. Figure 2 (c) represents the third case. Instance 6 is already assigned in the third column. Its successor instance is instance 7, which has also been assigned to the third column. At this time, starting from instance 7, we can return to instance 7 itself. In order to reduce the complexity of the circuit, instance 7 is moved to the column after instance 6, that is, the fourth column.

[0062] (3) Update the column number of instances without output connections. In order to ensure the regularity of the layout, all instances without output ports should be assigned to the last column. Therefore, the present invention updates the column of such instances to the last column.

[0063] (4) Determine the initial row numbers of all instances. The present invention arranges the row numbers of the instances contained in each column from small to large according to the physical labels of the instances.

[0064] Finding the input and output instances requires traversing the instance once, with a time complexity of O(n) and a space complexity of O(n). Depth-first traversal uses a recursive function, with a time complexity of O(n). 2 ), the space complexity is O(n), where n is the number of instances.

[0065] At this point, the initial layout is completed. In order to further optimize the initial layout, the present invention will use taboo search to optimize the layout scheme, reduce the number of wiring intersections, and improve the quality of subsequent layout and routing. During the initialization process, improving the quality of the initial elite solution plays a vital role in the multi-level condensation process based on the elite solution.

[0066] (ii) The taboo search algorithm optimizes the row order of each instance.

[0067] In order to reduce time and space consumption, this design only adjusts the row order of instances in two adjacent columns, and iterates backwards until all instances have a better row order. This step specifically includes the following sub-steps:

[0068] (1) Initialize important parameters. When the source column i and the drain column j differ by more than 1 column (ji>1), and the source column i is greater than or equal to the drain column j (i≥j), in order to facilitate the calculation of the number of reverse pairs of instance wiring between two adjacent columns, the present invention introduces a "virtual instance" (an additional instance established in the present invention, which does not actually exist) to assist in the calculation. When the source column and the drain column differ by more than 1 column, it is necessary to establish a virtual instance and assign it to the column after the source column (i.e., the i+1th column), and then determine whether the newly established virtual instance and the drain column are adjacent. If so, stop establishing the virtual instance. Otherwise, repeat the steps of establishing the virtual instance, and the column numbers of the established virtual instances are increased sequentially. Figure 3As shown, the source terminal 3 is in the first column, the drain terminal 8 is in the fourth column, and the column numbers differ by more than 1. The present invention first establishes a virtual instance 13 in the second column, and then establishes a virtual instance 23 in the third column to connect 3 and 8. When the source terminal is in a column greater than or equal to the drain terminal (i≥j), a virtual instance is established and assigned to the drain terminal column (i.e., the jth column), and then it is determined whether the virtual instance and the source terminal are in the same column. If they are the same, the virtual instance is stopped from being established, otherwise the steps of establishing the virtual instance are repeated. Figure 3 As shown, the source terminal 6 is in the third column, and the drain terminal 4 is in the second column. The present invention first establishes a virtual instance 14 in the second column, and then establishes a virtual instance 24 in the third column to connect 4 and 6. Because the wiring direction has no effect on the final result, in order to reduce the complexity of the algorithm, the present invention adopts the direction from the drain terminal to the source terminal to establish the virtual instance in this case, ensuring that the column numbers of the established virtual instances are also increased in sequence.

[0069] (2) Taboo search optimizes the row order of instances. Optimize the row order of instances in the i+1th column in turn until all columns are traversed. The steps for adjusting the row order within the instance in the i+1th column are as follows:

[0070] 1) Design the virtual numbering rules for the ports in the i-th and i+1 columns (when calculating the objective function, in order to speed up the calculation, each physical output port of each instance in the i-th column and each port of each virtual instance on the same side as the physical output port are mapped to a virtual number, virtual number pi: {1,2,..n}→{1,2,..n}) and calculate the number of reverse pairs (in a permutation, if the front and back positions of a pair of numbers are opposite to the order of size, that is, the front number is greater than the back number, then they are called a reverse order, and the pair of numbers is called a reverse pair.) First, number the input and output ports of the instance in the i-th column from top to bottom, and then pass the numbers to the corresponding input and output ports in the i+1 column. If the input (output) port in the i+1 column is connected to multiple output (input) ports in the i-th column, take the average of the virtual numbers of the ports. Then use the merge sort algorithm to calculate the number of reverse pairs. Figure 4The establishment of virtual instances and the calculation process of the target reverse pairs between columns 2 and 3 are shown in Figure 2. The virtual numbering of the output ports of instances 5, 4, 12, 13 and the input port of instance 14 in column 2 is assumed to be <5,1><14,2><4,3><12,4><13,5>; the virtual numbering of the input ports of instances 15, 6, 23, 7 and the output port of instance 24 in column 3 is <15,1><24,2><6,3><6,4><23,5><7,3>; the number of virtual reverse pairs in column 3 calculated by the merge sort method is 2.

[0071] 2) Optimize the objective function (the objective function is a mathematical expression of the goal pursued by using design variables. The goal of the present invention is to obtain a layout and routing scheme with fewer wiring intersections and shorter connection lengths. The objective function is the number of wiring intersections and the connection length.) In other existing layout and routing methods, the objective function is generally the number of intersections between the i and i+1 columns, and this objective function is positively correlated with the number of reverse pairs of the numbering sequence on the i+1 input side. In order to reduce the computational complexity, the present invention optimizes the objective function to be the number of reverse pairs of the numbering sequence on the i+1 input side.

[0072] 3) Perform an insert neighborhood move operation on the instance in the i+1th column. The insert neighborhood operation refers to inserting one instance into another instance in the same column. Each time, all instances in the i+1th column are moved and restored in sequence. According to the difference of the reverse pairs generated during the move and the taboo list, the non-taboo move with the smallest reverse pair difference is selected. The best neighborhood move is selected, that is, the move with the largest neighborhood increment that is not prohibited, or the solution layout solution with the smallest number of reverse pairs found so far. If there are multiple moving methods with the same move gain, a random move is selected.

[0073] The present invention defines the gain of movement as the increment of the number of reverse pairs after the reverse pairs are moved, and the taboo list refers to each instance that cannot be moved in the next tt operations after being moved, where tt represents the taboo length. This step is repeated until the neighborhood gain is 0. Figure 4 The number of reverse pairs in column 3 shown in (a) is 2. After optimization (moving instance 7 above 6), Figure 4 As shown in (b), the number of virtual number reverse pairs in column 3 is 0.

[0074] (III) Determine the location coordinates of the instance and its port coordinates

[0075] After the row order of each instance is determined, the present invention calculates the instance position coordinates. The focus of the instance position coordinate calculation is to calculate the spacing between adjacent columns and the spacing between upper and lower adjacent instances. In the present invention, the distance between instances in adjacent columns is the sum of the number of output lines in column i and the number of reverse lines in column i+1 (after determining the column number, if the column number i of the instance that sends the signal is greater than or equal to the column number j of the instance that receives the signal, the line that transmits the signal is called a reverse line.), and the spacing between upper and lower adjacent instances is the maximum value of the number of virtual instances between the two and the minimum limit distance e (the value range of e can be [1,10]). The horizontal coordinate of the first column is a fixed value, and each subsequent column is accumulated according to the horizontal coordinate of the adjacent previous column, the physical width w of the instance (the value range of w can be [1,20]), the spacing between adjacent columns, and the pin length p (the value range of p can be [1,10]). The horizontal coordinate and physical width of the instance in the same column are the same; the vertical coordinate of the first row is a fixed value, and each subsequent row is accumulated according to the physical length of the instance in the adjacent previous row and the upper and lower spacing of the instance. Figure 5 As shown in (a), the distance between the adjacent columns of the 1st and 2nd columns is the number of lines output by the 1st column (4) plus the number of reverse lines input by the 2nd column (1), which is 5 units in length; the distance between the upper and lower adjacent instances 5 and 4 should be the maximum value between the number of virtual instances between the two (1) and the minimum limit distance (assuming it is 4), which is 4 units in length. The port coordinates of each instance change in sequence according to the coordinates of the upper left corner position of the instance, the original numbering order, the pin length, the port width d (the actual width of the physical port of the instance, the value range of d can be [1,10]) and other parameters. The horizontal coordinate of the port is the left (right) end of the instance to which it belongs minus (plus) the pin length, and the vertical coordinate of the port is the vertical coordinate of the top of the instance to which it belongs added according to the port width. As shown Figure 5As shown in (b), assuming that the horizontal coordinate of the left end of instance 1 is 2, the physical width is 8, the pin length is 2, and the distance between adjacent columns is 5, then its right end horizontal coordinate is 10, the right port horizontal coordinate is 12, and the horizontal coordinates of instance5 and instance4 are 2+8+2+5+2=19; assuming that the top vertical coordinate of instance5 is 0, the physical length is 6, and the distance between the upper and lower instances is 4, then the top vertical coordinate of instance 4 is 0+6+4=10; assuming that the port width is 2, the horizontal coordinates of the input ports of instance 4 are all 19-2=17, the vertical coordinate of the first input port is 10+2=12, and the vertical coordinate of the second input port is 12+2=14.

[0076] (IV) Routing based on known instance layout

[0077] According to the row and column order of the given instance, the coordinates of the port, and the instance connection information in the input net network (the wiring network model of the programmable logic element, the model describes the circuit connection relationship between the physical ports of the instance, and the connection relationship indicates the port and direction of the signal transmission between the instances.), the wiring is performed with a line width of 1 unit length. The wiring considers two adjacent columns each time, and then iterates to complete the strategy of wiring all columns in sequence. When wiring two adjacent columns, the connection is determined according to the coordinates of the output port of the i-th column and the input port of the i+1-th column, which specifically includes the following steps:

[0078] 1) If the vertical coordinates of the input and output ports are the same, connect them directly with a straight line;

[0079] 2) If they are inconsistent, find the middle turning point to connect the wires. The calculation of the turning point of the wiring in this problem only needs to determine the horizontal coordinate of the turning point. First, sort the wiring order according to the positive or negative difference between the vertical coordinates of the source and drain ends, and then sort according to the size of the source virtual number. Secondly, according to the sorting order of the wiring, determine the horizontal coordinate of the turning point of each wire in turn. The horizontal coordinate of the turning point of the first wire is the horizontal coordinate of the output port plus 1, and the horizontal coordinates of the turning points of the subsequent wires increase by 1. Figure 6 As shown, output port 1 of instance 33 (assuming the coordinates are (3, 10)) can be directly connected to port 1 of instance 43 (assuming the coordinates are (6, 10)), but it is necessary to pass through the turning point to connect port 1 (assuming the coordinates are (6, 18)) and port 2 (assuming the coordinates are (6, 20)) of instance 36. The horizontal coordinates of the turning points are staggered, 4 and 5 respectively.

[0080] The technical means disclosed in the scheme of the present invention are not limited to the technical means disclosed in the above-mentioned implementation mode, but also include technical schemes composed of any combination of the above-mentioned technical features. It should be pointed out that for ordinary technicians in this technical field, several improvements and modifications can be made without departing from the principle of the present invention, and these improvements and modifications are also regarded as the protection scope of the present invention.

Claims

1. A circuit schematic layout and routing method based on iterative tabu search algorithm, It is characterized in that The steps include: Step 1: Initialize the row and column layout of each instance Initialize the row and column order of each programmable logic element model instance, and generate the initial order of each instance row and column according to the connection relationship between instances and instance labels; Step 2: Use the taboo search algorithm to optimize the row order of each instance The row order of instances is adjusted only in two adjacent columns, and the process is iterated backwards until all instances have a better row order. The process includes the following specific steps: Step 2.1, initializing important parameters; when the source column i and the drain column j differ by more than 1 column, create a virtual instance and assign it to the column after the source column, then determine whether the newly created virtual instance and the drain column are adjacent, if so, stop creating the virtual instance, otherwise repeat the steps of creating the virtual instance, and the column numbers of the created virtual instances are increased sequentially; when the source column i is greater than or equal to the drain column j, create a virtual instance and assign it to the drain column, then determine whether the virtual instance and the source column are the same, if so, stop creating the virtual instance, otherwise repeat the steps of creating the virtual instance; Step 2.2, using taboo search to optimize the row order of instance, optimize the row order of instance in the i+1th column in turn until all columns are traversed, specifically including the following sub-steps: Step 2.2.1 Design the port virtual numbering rules for the i-th and i+1-th columns, and calculate the number of reverse pairs; first, number the input and output ports of the instance in the i-th column from top to bottom, and then pass the numbers to the corresponding input and output ports in the i+1 column. If the input / output port in the i+1-th column is connected to multiple output / input ports in the i-th column, take the average value of the port virtual numbers; Then use the merge sort algorithm to calculate the number of reverse pairs; Step 2.2.2 The optimization objective function is the number of reverse pairs of the numbering sequence of the i+1 input port; Step 2.2.3 performs an insert neighborhood move operation on the instance in the i+1th column, inserting one instance onto another instance in the same column; each time all instances in the i+1th column are moved and restored in sequence, and the non-taboo move with the smallest inverse pair difference is selected according to the difference of the inverse pairs generated during the move process and the taboo list. The best neighborhood move is selected, that is, the move with the largest neighborhood increment that is not prohibited, or the solution layout solution with the smallest number of inverse pairs found so far is selected; Step 3: Determine the location coordinates of the instance and its port coordinates Calculate the instance position coordinates; calculate the spacing between adjacent columns and the spacing between upper and lower adjacent instances. The distance between instances in adjacent columns is the sum of the number of output lines in column i and the number of reverse lines in column i+1. The spacing between upper and lower adjacent instances is the maximum value of the number of virtual instances between the two and the minimum limit distance e. The horizontal coordinate of the first column is a set fixed value, and each subsequent column is accumulated according to the horizontal coordinate of the adjacent previous column, the physical width w of the instance, the spacing between adjacent columns, and the pin length p. The horizontal coordinate and physical width of instances in the same column are the same. The vertical coordinate of the first row is a set fixed value, and each subsequent row is accumulated according to the physical length of the instance in the adjacent previous row and the upper and lower spacing of the instance. The port coordinates of each instance change in sequence according to the original numbering order, pin length, and port width d parameters based on the upper left corner position coordinates of the instance. Step 4: Routing based on known instance layout Routing is performed according to the row and column order of the given instance, the coordinates of the port, and the instance connection information in the net network, with a line width of 1 unit length; The wiring considers two adjacent columns each time, and then iterates to complete the wiring of all columns in sequence; when wiring two adjacent columns, the connection is determined according to the coordinates of the output port of the i-th column and the input port of the i+1-th column.

2. The circuit schematic layout and routing method based on iterative taboo search algorithm according to claim 1, It is characterized in that The step 1 comprises the following specific steps: Step 1.1, first determine the column number of the instance that has no input connection and the output port connected to the input port; Step 1.2, use depth-first traversal to assign column numbers to the remaining instances; Step 1.3, update the column number of the instance without output connection; Step 1.4, determine the initial row number of all instances.

3. The circuit schematic layout and routing method based on iterative taboo search algorithm according to claim 2, It is characterized in that In the step 1.1, the column number of the instance without input connection and the output port connected to the input port is assigned to the first column; in the step 1.3, the column number of the instance without output connection is updated to the last column.

4. The circuit schematic layout and routing method based on iterative taboo search algorithm according to claim 2, It is characterized in that The step 1.2 includes the following sub-steps: Step 1.2.1, if the successor instance has not been assigned a column number, assign it a column number i+k; Step 1.2.2, if the successor instance has been assigned column number m, and it is impossible to return to itself from the instance, then compare the instance's column number i+k with the already assigned column number m, and select max{i+k, m} as the new column number; Step 1.2.3, if the successor instance has been assigned column number m, and it is possible to return to itself from the instance, and the subsequent instance is in the same column as the current instance, then assign the successor instance column number i+k; Step 1.2.4, otherwise, no subsequent instances will be processed; Repeat the above process until all instances are assigned column numbers.

5. The circuit schematic layout and routing method based on iterative tabu search algorithm according to claim 2, It is characterized in that In the step 1.4, the row numbers of the instances contained in each column are arranged from small to large according to the instance numbers.

6. The circuit schematic layout and routing method based on iterative tabu search algorithm according to claim 1, It is characterized in that In step 2.2.3, when there are multiple moving methods with the same moving gain, one moving method is randomly selected.

7. The circuit schematic layout and routing method based on iterative tabu search algorithm according to claim 1, It is characterized in that In step 3, the port horizontal coordinate of each instance is the left / right end of the instance to which it belongs minus or plus the pin length, and the port vertical coordinate is the top vertical coordinate of the instance to which it belongs accumulated according to the port width.

8. The circuit schematic layout and routing method based on iterative tabu search algorithm according to claim 1, It is characterized in that In step 4, wiring two adjacent columns specifically includes the following steps: Step 4.1, if the vertical coordinates of the input and output ports are the same, connect them directly with a straight line; Step 4.2, if they are inconsistent, find the middle turning point to connect the lines. The turning point calculation of the wiring only needs to determine the horizontal coordinate of the turning point.

9. The circuit schematic layout and routing method based on iterative tabu search algorithm according to claim 8, It is characterized in that In the step 2), the calculation of the turning point of the wiring only needs to determine the horizontal coordinate of the turning point: first, the wiring order of the connection is sorted according to the positive or negative difference between the vertical coordinates of the source end and the drain end, and then sorted according to the size of the source end virtual number; secondly, according to the sorting order of the connection wiring, the horizontal coordinate of the turning point of each connection is determined in turn, where the horizontal coordinate of the turning point of the first connection is the horizontal coordinate of the output port plus 1, and the horizontal coordinates of the turning points of subsequent connections increase by 1 in turn.