Method and system for realizing capacitor voltage balance of four-level energy storage converter under low modulation ratio condition

Abstract

The invention discloses a method for realizing capacitor voltage balance of a four-level energy storage converter under a low modulation ratio condition, and the method comprises the steps: converting a space vector diagram of the four-level energy storage converter under an alpha-beta coordinate system into a g-h coordinate system at a low modulation ratio, and obtaining three nearest vectors for synthesizing a reference voltage vector Vref and duty ratios of the three nearest vectors; therefore, the sector judgment process is simplified, and the calculation process of the duty ratio acted by the basic voltage vector is reduced. Then, according to the small triangle where the reference voltage vector Vref is located and the duty ratio of the action of the three vectors for synthesizing the reference voltage vector Vref, a five-segment type modulation synthesis mode and a seven-segment type modulation synthesis mode are adopted, and a switch sequence corresponding to each small sector is obtained; and finally, the switching sequence corresponding to the small sector is evaluated through the target function, and the switching sequence when the target function is the minimum value is selected as the optimal switching sequence by using comparison operation. And capacitor voltage balance of the four-level energy storage converter is realized. The technical problem that an existing additional auxiliary circuit balancing method is poor in practicability can be solved.

Description

Technical Field

[0001] The present invention belongs to the field of power electronics technology, and more specifically, relates to a method and system for achieving capacitor voltage balance of a four-level energy storage converter under low modulation ratio conditions. Background Art

[0002] Among the currently used multi-level topologies, the three-level NPC energy storage converter is the most widely used in motor drive, new energy high-voltage energy storage, wind power generation and other fields due to its advantages such as simple structure and few devices. Limited by the withstand voltage level of power electronic devices and the topological structure of energy storage converter, its application in medium-high voltage and high-power applications above 3.3kV is restricted. In order to improve the output voltage level, a higher number of levels must be used. However, with the increase in the number of levels, the complexity of the structure and system control of the energy storage converter is increasing exponentially. Therefore, the four-level diode-clamped converter (4L-DCC) is a highly competitive topological structure with broad application prospects. In the relevant research on multi-level energy storage converters, the DC bus capacitor voltage balance is a necessary condition for the stable operation of the entire energy storage converter system. Unlike the three-level NPC energy storage converter, which only needs to control the voltage balance of one capacitor when the DC bus voltage is stable, the three bus capacitor voltages of the four-level energy storage converter are strongly coupled, which increases the difficulty of control.

[0003] The current methods for achieving capacitor voltage balance on the DC side of a four-level diode-clamped energy storage converter can be divided into the following categories:

[0004] (1) External auxiliary circuit balancing method: This method adds hardware circuits and mainly includes auxiliary circuit balancing method and independent power supply balancing method. The auxiliary circuit balancing method is to add active or passive circuits, and the independent DC source balancing method is to connect a DC voltage source in parallel to each voltage-dividing capacitor on the DC side to achieve the balance of the DC side capacitor voltage;

[0005] (2) Carrier overlap pulse width modulation (PWM) method, which selects multiple triangular carriers with the same frequency, phase and different amplitudes, compares them with the modulation wave, and generates different PWM waveforms to control the order of switching tubes according to the comparison results. This method generally uses zero-sequence voltage injection method to change the reference voltage value in capacitor voltage balancing control, so as to minimize the midpoint voltage fluctuation;

[0006] (3) Virtual Space Vector Pulse Width Modulation (SVPWM) method. The basic idea is to keep the midpoint charge generated by each virtual vector at zero during the switching cycle, so that the midpoint potential will not shift in the steady state, thus avoiding the oscillation of the midpoint potential. The advantage of this method is that it keeps the midpoint potential stable.

[0007] (4) Specific harmonic elimination method, which constructs a nonlinear transcendental equation group, calculates the optimal solution of the equation group as the switching angle and stores it, and then obtains it through a table lookup method when needed. Compared with other PWM modulation methods, SHEPWM can achieve low switching frequency while greatly reducing the low-order harmonics of the output waveform.

[0008] However, the above methods for achieving the voltage balance of the capacitors on the DC side of the four-level diode-clamped energy storage converter all have some drawbacks that cannot be ignored:

[0009] First, the use of an external auxiliary circuit balancing method to achieve four-level capacitor voltage balancing will increase the cost and volume of the energy storage converter, resulting in poor practicality of this method;

[0010] Second, the process of solving the zero-sequence voltage by the carrier overlap PWM method requires complex mathematical operations, which is computationally intensive, and the local levels of the output line voltages cross each other, which results in this method being able to effectively balance the midpoint voltage only under a specific power factor and appropriate modulation index;

[0011] Third, in the virtual SVPWM method, the switch tube jumps multiple times in the switching cycle, causing the local levels of the output line voltage to cross each other, increasing the switching loss and the complexity of the modulation strategy;

[0012] Fourth, the calculation process of solving the switching angle by the specific harmonic elimination method is very complicated, and it is difficult to give the optimal capacitor voltage balance control effect in theory, resulting in its actual operation being not flexible enough. Summary of the invention

[0013] In view of the above defects or improvement needs of the prior art, the present invention provides a method and system for balancing the capacitor voltage of 4L-DCC at a low modulation ratio, the purpose of which is to solve the technical problem that the existing external auxiliary circuit balancing method will increase the cost and volume of the energy storage converter to achieve four-level capacitor voltage balancing, resulting in poor practicality of the method; and the existing carrier stacking PWM method has the technical problem that the process of solving the zero-sequence voltage requires complex mathematical operations, large amount of calculation, and the local levels of the output line voltage cross each other, resulting in the method can only effectively balance the midpoint voltage under a specific power factor and a suitable modulation degree; and the existing virtual SVPWM method has the technical problem that the switch tube jumps multiple times within the switching cycle, resulting in the local levels of the output line voltage crossing each other, the switching loss increases, and the complexity of the modulation strategy increases; and the existing specific harmonic elimination method has the technical problem that the calculation process of solving the switching angle is very complicated, and it is difficult to give the best capacitor voltage balance control effect in theory, resulting in its actual operation being not flexible enough.

[0014] To achieve the above object, according to one aspect of the present invention, a method for achieving capacitor voltage balance of a four-level energy storage converter under low modulation ratio conditions is provided, comprising the following steps:

[0015] (1) Obtaining the reference voltage vector V of the four-level energy storage converter ref , calculate the reference voltage vector V ref The corresponding modulation index m is determined, and it is determined whether the modulation index m is greater than a preset reference modulation ratio. If so, the process ends, otherwise it goes to step (2).

[0016] (2) The reference voltage vector V obtained in step (1) ref Processing is performed to obtain the spatial voltage vector distribution diagram of the basic voltage vector in the gh coordinate system.

[0017] (3) Sectorize the spatial voltage vector distribution diagram in the gh coordinate system obtained in step (2) to obtain a reference voltage vector V ref A small sector located in the space voltage vector diagram.

[0018] (4) The reference voltage vector V obtained according to step (3) ref The synthetic reference voltage vector V is obtained from the sector in the space voltage vector diagram in the gh coordinate system. ref The three nearest vectors.

[0019] (5) The synthetic reference voltage vector V obtained in step (4) ref The three most recent vectors are processed for volt-second balance calculation to obtain the duty ratio of the three vectors.

[0020] (6) The reference voltage vector V obtained according to step (3) ref The small sector in the space voltage vector diagram and the synthetic reference voltage vector V obtained in step (5) ref The duty cycle of the three vectors is calculated to obtain the switching sequence corresponding to each small sector.

[0021] (7) According to the duty cycle of the three vector actions obtained in step (5), obtain the first cycle average current corresponding to each large sector in the spatial voltage vector diagram and the average current of the second cycle

[0022] (8) Based on the switch sequence corresponding to each small sector obtained in step (6) and the first cycle average current i corresponding to the large sector to which the small sector belongs in the spatial voltage vector diagram obtained in step (7), N1 and the average current of the second cycle Get the average current at the midpoint of the first cycle when each switch sequence in the small sector is in effect and the average current at the midpoint of the second cycle

[0023] (9) The average current at the midpoint of the first cycle when each switch sequence in the small sector is in effect obtained according to step (8) and the average current at the midpoint of the second cycle Obtain the optimal switching sequence to achieve capacitor voltage balance in a four-level energy storage converter.

[0024] Preferably, the modulation index m corresponding to the reference voltage vector is calculated in step (1) using the following formula:

[0025]

[0026] Among them U dc is the DC bus voltage of the four-level energy storage converter.

[0027] Step (2) comprises the following steps:

[0028] (2-1) Obtain the reference voltage vector V obtained in step (1) ref The coordinates in the α-β coordinate system (V α ,V β ) and the coordinates in the gh coordinate system (V g ,V h ) between the coordinate transformation formula;

[0029] (2-2) Obtain a four-level space vector diagram of a four-level energy storage converter, according to the reference voltage vector V obtained in step (2-1) refThe corresponding coordinate transformation formula is obtained, and the basic space vector in the four-level space vector diagram is successively subjected to coordinate transformation and normalization processing to obtain the space voltage vector distribution diagram of the basic voltage vector in the gh coordinate system.

[0030] Preferably, step (2-1) adopts the following formula:

[0031]

[0032] Where V a 、V b 、V c is the reference voltage vector V ref The three-phase voltage, V α 、V β is the reference voltage vector V ref The α-axis component and the β-axis component in the α-β coordinate system, V g 、V h is the reference voltage vector V ref The g-axis component and the h-axis component in the gh coordinate system.

[0033] Step (2-2) is specifically as follows: first, a four-level space vector diagram of a four-level energy storage converter is obtained; then, coordinate transformation is performed on all basic space vectors in the four-level space vector diagram to obtain a space vector diagram in a gh coordinate system; and finally, the space vector diagram in the gh coordinate system is normalized to obtain a space voltage vector distribution diagram of the basic voltage vector in the gh coordinate system.

[0034] Preferably, step (3) comprises the following sub-steps:

[0035] (3-1) Obtaining the reference voltage vector V ref The horizontal axis V g and the vertical coordinate V h ;

[0036] (3-2) Initialize the reference voltage vector V ref The serial number of the small sector in the space voltage vector diagram is n=0;

[0037] (3-3) Determine V g +V h Is it less than 1? If so, set n=1 and the process ends. Otherwise, go to step (3-4);

[0038] (3-4) Determine V g Is it greater than 1? If so, set n=2 and the process ends. Otherwise, go to step (3-5);

[0039] (3-5) Determine V hIs it greater than 1? If so, set n=4 and the process ends; otherwise, set n=3 and go to step (3-6);

[0040] (3-6) Output reference voltage vector V ref The serial number n of the small sector in the space voltage vector diagram is used as the reference voltage vector V ref A small sector located in the space voltage vector diagram.

[0041] Among them, the four-level space vector diagram in the gh coordinate system is divided into six large sectors, each large sector is divided into four small sectors, and the second to sixth large sectors are obtained by rotating the first large sector.

[0042] Preferably, step (4) is specifically,

[0043] First, the reference voltage vector V ref The coordinates (V g ,V h ) are rounded up and rounded down respectively to obtain the distance reference voltage vector V ref The four nearest voltage vectors.

[0044] Specifically, the coordinates of the four voltage vectors are:

[0045]

[0046] The subscript U indicates that the voltage vector is rounded up, and the subscript L indicates that it is rounded down.

[0047] Then, according to the four rounded voltage vectors V UL 、V LU 、V UU 、V LL The parallelogram formed obtains the vector V on the diagonal UL and V LU ;

[0048] Finally, we further obtain a third vector based on the parallelogram, which is opposite to the vector V on the diagonal line. UL and V LU Together they form the reference voltage vector V ref The three nearest vectors.

[0049] Specifically, the third vector is selected according to the expression When the calculated value is greater than zero, V UU Used as the third vector; when the value of the calculated result is less than or equal to zero, V LL Used as the third vector;

[0050] Step (5) is specifically:

[0051] First, according to the reference voltage vector V obtained in step (4), ref The three most recent vectors obtain the duty cycle of the basic voltage vector action;

[0052] Specifically, this step uses the following formula:

[0053]

[0054] Among them, V1, V2, and V3 represent basic voltage vectors, and V1 = V UL , V2=V UL , V3=V UU / V LL , d1, d2, d3 are the duty cycles of the basic voltage vectors V1, V2, V3 respectively.

[0055] Then, according to the duty cycle of the basic voltage vectors V1, V2, and V3, the three nearest vectors V UL 、V LU 、V LL The duty cycle of the action;

[0056] Specifically, this step uses the following formula:

[0057]

[0058] where d UL d LU d LL The three nearest vectors V UL 、V LU 、V LL The duty cycle of the action, V LLg and V LLh They are the basic voltage vector V LL Projection on the g-axis and h-axis.

[0059] Then, according to the three nearest vectors V UL 、V LU 、V LL The duty cycle of the action is obtained by the three most recent vectors V UL 、V LU 、V UU The duty cycle of the action;

[0060] Specifically, this step uses the following formula:

[0061]

[0062] where d UL d LU d UUThe three nearest vectors V UL 、V LU 、V UU The duty cycle of the action, V UUg and V UUh They are the basic voltage vector V UU Projection on the g-axis and h-axis.

[0063] Preferably, step (6) is specifically,

[0064] First, the multiple basic voltage vectors corresponding to the triangle vertices of the small sector in the space voltage vector diagram obtained in step (3) are sorted in ascending order to obtain the sorted basic voltage vector corresponding to the small sector;

[0065] Then, for the sorted basic voltage vectors corresponding to the small sector, the first, second and third basic voltage vectors are taken out, and the duty ratios of the three basic voltage vectors are set to be equal to the synthetic reference voltage vector V obtained in step (5). ref Then, the second, third and fourth basic voltage vectors are taken out, and the duty ratios of the three basic voltage vectors are set to be equal to the synthetic reference voltage vector V obtained in step (5). ref The duty cycle of the three vectors, ..., and so on, until all the sorted basic voltage vectors are processed; or

[0066] For the sorted basic voltage vectors corresponding to the small sector, the first, second, third, and fourth basic voltage vectors are taken out, and the duty ratios of the first and fourth basic voltage vectors are set to be equal to the synthetic reference voltage vector V obtained in step (5). ref The duty ratios of the three vector actions are set to half of the duty ratio of the vector action at the corresponding position, and the duty ratios of the second and third basic voltage vector actions are set to be equal to the synthetic reference voltage vector V obtained in step (5) ref The duty ratios of the other two corresponding positions of the three vectors are taken out, and then the second, third, fourth, and fifth basic voltage vectors are taken out, and the above process is repeated... and so on, until all the sorted basic voltage vectors are processed;

[0067] Finally, a switch sequence table is constructed according to each basic voltage vector taken out and the duty cycle of the obtained basic voltage vector, wherein the switch sequence table includes a sequence number and a corresponding five-segment basic voltage vector synthesis sequence, wherein the sequence number refers to the sequence number i of the above-mentioned basic voltage vector taken out, and the corresponding five-segment basic voltage vector synthesis sequence includes the i-th basic voltage vector taken out for the i-th time, the i+1-th basic voltage vector, the i+2-th basic voltage vector, the i+1-th basic voltage vector, and the i-th basic voltage vector;

[0068] The switch sequence table also includes a serial number and a corresponding seven-segment basic voltage vector synthesis sequence, wherein the serial number refers to the serial number i of the basic voltage vector taken out above, and the corresponding seven-segment basic voltage vector synthesis sequence includes the i-th basic voltage vector taken out for the i-th time, the i+1-th basic voltage vector, the i+2-th basic voltage vector, the i+3-th basic voltage vector, the i+2-th basic voltage vector, the i+1-th basic voltage vector, and the i-th basic voltage vector.

[0069] Preferably, it is characterized in that the average current of the first cycle corresponding to each large sector is and the average current of the second cycle The following formula is used:

[0070]

[0071] The matrix D is established by the following steps:

[0072] (a) For the space voltage vector diagram (such as Figure 2 Each basic voltage vector in each large sector (as shown in Table 2 below) is processed by a four-level equivalent circuit to obtain a relationship table corresponding to the large sector (see Table 2 below, taking large sector I as an example), which reflects the relationship between the midpoint current corresponding to each basic voltage vector in the large sector and the output phase current, i N1 and i N2 They represent the two midpoint currents on the DC side of the four-level equivalent circuit when the basic voltage vector acts, i a 、i b , and i c They respectively represent the first, second and third output phase currents of the four-level equivalent circuit.

[0073] (b) Construct an empty 2-row 3-column matrix D for each large sector, where the elements of the 1st row, 1st column, 2nd column, and 3rd column are the i in the relationship table corresponding to the large sector obtained in step (a) N1 with i a 、i b 、i cThe elements in the 1st column, 2nd column, and 3rd column of the 2nd row are the i in the relationship table corresponding to the large sector obtained in step (a). N2 with i a 、i b 、i c relationship;

[0074] For each large sector, the corresponding matrix S is:

[0075]

[0076] The values ​​of the intermediate parameters S1, S2, S3, S4, S5, and S6 are related to the reference voltage vector V ref The reference voltage vector V ref When in large sector I, S1=1, and the others are 0; the reference voltage vector V ref When located in large sector II, S2=1, and the others are all 0; ..., and so on.

[0077] Preferably, step (8) is specifically,

[0078] First, according to all the basic voltage vectors corresponding to the first sequence number in the switch sequence corresponding to the small sector in step (6) and the duty cycle of the vector action, the matrix D is obtained;

[0079] Then, according to the reference voltage vector V ref The large sector where the matrix is ​​located is obtained;

[0080] Then, substitute the obtained matrix D and matrix S into the first cycle average current obtained in step (7) and the average current of the second cycle To obtain the average current value of the midpoint of the first cycle when the first sequence number corresponds to the switch sequence and the average current at the midpoint of the second cycle

[0081] Finally, for the remaining sequence numbers in the switch sequence corresponding to the small sector obtained in step (6), the above process is repeated until all sequence numbers are traversed, thereby obtaining the average current value at the midpoint of the first cycle when each switch sequence in the small sector is in effect. and the average current at the midpoint of the second cycle

[0082] Preferably, step (9) is specifically,

[0083] First, according to the obtained average current at the midpoint of the first cycle when each switching sequence in the small sector acts and the average current at the midpoint of the second cycle Get the P value corresponding to each switch sequence in the small sector:

[0084]

[0085] where Δv Ci is the voltage of the ith capacitor on the DC side of the four-level energy storage converter and U dc / 3, and i∈[1,2].

[0086] Finally, a minimum value is selected from the P values ​​corresponding to all the switching sequences in the small sector, and the switching sequence corresponding to the minimum value is output as the optimal switching sequence for achieving capacitor voltage balance of the four-level energy storage converter.

[0087] According to another aspect of the present invention, a method for achieving capacitor voltage balance of a four-level energy storage converter under low modulation ratio conditions is provided, comprising:

[0088] The first module is used to obtain the reference voltage vector V of the four-level energy storage converter ref , calculate the reference voltage vector V ref The corresponding modulation index m is determined, and it is determined whether the modulation index m is greater than a preset reference modulation ratio. If so, the process ends, otherwise it enters the second module.

[0089] The second module is used to obtain the reference voltage vector V ref Processing is performed to obtain the spatial voltage vector distribution diagram of the basic voltage vector in the gh coordinate system.

[0090] The third module is used to sectorize the spatial voltage vector distribution diagram in the gh coordinate system obtained in the second module to obtain a reference voltage vector V ref A small sector located in the space voltage vector diagram.

[0091] The fourth module is used to obtain the reference voltage vector V according to the third module. ref The synthetic reference voltage vector V is obtained from the sector in the space voltage vector diagram in the gh coordinate system. ref The three nearest vectors.

[0092] The fifth module is used to obtain the synthetic reference voltage vector V ref The three most recent vectors are processed for volt-second balance calculation to obtain the duty ratio of the three vectors.

[0093] The sixth module is used to obtain the reference voltage vector V according to the third module. ref The small sector in the space voltage vector diagram and the synthetic reference voltage vector V obtained by the fifth module refThe duty cycle of the three vectors is calculated to obtain the switching sequence corresponding to each small sector.

[0094] The seventh module is used to obtain the first cycle average current corresponding to each large sector in the space voltage vector diagram according to the duty cycle of the three vector actions obtained in the fifth module and the average current of the second cycle

[0095] The eighth module is used to calculate the average current of the first cycle corresponding to the large sector to which the small sector belongs in the space voltage vector diagram obtained by the seventh module according to the switch sequence corresponding to each small sector obtained by the sixth module and the average current of the second cycle Get the average current at the midpoint of the first cycle when each switch sequence in the small sector is in effect and the average current at the midpoint of the second cycle

[0096] The ninth module is used to obtain the average current of the midpoint of the first cycle when each switch sequence in the small sector is in effect according to the eighth module. and the average current at the midpoint of the second cycle Obtain the optimal switching sequence to achieve capacitor voltage balance in a four-level energy storage converter.

[0097] In general, the above technical solutions conceived by the present invention can achieve the following beneficial effects compared with the prior art:

[0098] (1) Since the present invention adopts steps (1) to (9), and adopts an SVPWM software algorithm based on an objective function, it can solve the technical problem that the balanced four-level capacitor voltage in the existing external auxiliary circuit balancing method will increase the cost and volume of the energy storage converter, resulting in poor practicality of the method;

[0099] (2) Since the present invention adopts steps (1) to (9), it transforms the space vector diagram of the four-level energy storage converter in the α-β coordinate system to the gh coordinate system at a low modulation ratio to obtain a synthetic reference voltage vector V ref The three nearest vectors and their duty cycles are obtained, thereby simplifying the sector judgment process, reducing the calculation process of the duty cycle of the basic voltage vector, establishing the objective function and optimizing the switching sequence, and selecting the optimal switching sequence to achieve midpoint voltage balance. Therefore, the existing carrier overlap PWM method can solve the technical problem that the process of solving the zero-sequence voltage requires complex mathematical operations, the amount of calculation is large, and the local levels of the output line voltage cross each other, resulting in the method being able to effectively balance the midpoint voltage only under a specific power factor and a suitable modulation index.

[0100] (3) Since the present invention adopts steps (5) to (9), it is based on the reference voltage vector V ref The small triangle and the synthetic reference voltage vector V ref The duty cycle of the three vector actions is synthesized by five-segment and seven-segment modulation to obtain the switching sequence corresponding to each small sector. Therefore, the technical problem of the existing virtual SVPWM method that the switch tube jumps multiple times in the switching cycle, resulting in the crossover of the local levels of the output line voltage, increased switching losses, and increased complexity of the modulation strategy can be solved;

[0101] (4) Since the present invention adopts steps (5) to (9), it evaluates the switching sequence in the small sector through the objective function, and uses comparison operation to select the switching sequence when the objective function is the minimum as the optimal switching sequence for output, so as to achieve the capacitor voltage balance of the four-level energy storage converter. Therefore, it can solve the technical problem that the calculation process of solving the switching angle in the existing specific harmonic elimination method is very complicated, and it is difficult to give the optimal capacitor voltage balance control effect in theory, resulting in its actual operation being not flexible enough. BRIEF DESCRIPTION OF THE DRAWINGS

[0102] Figure 1 It is a topological structure diagram of the diode clamped four-level energy storage converter of the present invention;

[0103] Figure 2 It is a space vector diagram of a diode clamped four-level energy storage converter of the present invention;

[0104] Figure 3 It is a schematic diagram of the process of the diode clamped four-level energy storage converter in the low modulation ratio capacitor voltage balancing method of the present invention;

[0105] Figure 4 It is a space vector diagram of the diode clamped four-level energy storage converter in the gh coordinate system of the present invention;

[0106] Figure 5 It is a vector diagram of triangles 1 to 4 of sector I of the diode clamped four-level energy storage converter of the present invention;

[0107] Figure 6 It is the output line voltage waveform diagram of the diode clamped four-level energy storage converter under different modulation ratios of the present invention;

[0108] Figure 7 It is a capacitor voltage waveform diagram under different modulation ratios of the diode clamped four-level energy storage converter of the present invention;

[0109] Figure 8 It is a waveform diagram of output line voltage at different fundamental frequencies of the diode clamped four-level energy storage converter of the present invention;

[0110] Fig. 9It is a capacitor voltage waveform diagram at different fundamental frequencies of the diode clamped four-level energy storage converter of the present invention;

[0111] Fig.10 It is a comparison diagram of the switching times of different methods of the diode clamped four-level energy storage converter of the present invention;

[0112] Fig.11 This is a comparison diagram of the output line voltage THD values ​​of different methods of the diode clamped four-level energy storage converter of the present invention;

[0113] Fig.12 It is a comparison diagram of capacitor voltage ripple amplitudes of different methods of the diode clamped four-level energy storage converter of the present invention. DETAILED DESCRIPTION

[0114] In order to make the purpose, technical solutions and advantages of the present invention more clearly understood, the present invention is further described in detail below in conjunction with the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are only used to explain the present invention and are not intended to limit the present invention. In addition, the technical features involved in the various embodiments of the present invention described below can be combined with each other as long as they do not conflict with each other.

[0115] The basic idea of ​​the present invention is that, first, at a low modulation ratio, the space vector diagram of the four-level energy storage converter in the α-β coordinate system is transformed into the gh coordinate system to obtain a synthetic reference voltage vector V ref The three most recent vectors and their duty cycles can be used to simplify the sector judgment process and reduce the calculation process of the duty cycle of the basic voltage vector. Then, according to the reference voltage vector V ref The small triangle and the synthetic reference voltage vector V ref The duty cycle of the three vectors is synthesized by five-segment and seven-segment modulation to obtain the switching sequence corresponding to each small sector. Finally, the switching sequence corresponding to the small sector is evaluated through the objective function, and the comparison operation is used to select the switching sequence when the objective function is minimum as the optimal switching sequence for output, so as to achieve the capacitor voltage balance of the four-level energy storage converter.

[0116] The topology of the diode clamped four-level energy storage converter is as follows: Figure 1 As shown, each phase bridge arm of this topology consists of 6 power switch tubes S x1 ~S x6 And 6 clamping diodes, among which S x1 and S x4 , S x2 and S x5 , S x3 and S x6 The driving signals are complementary, i xis the output current (x=a, b, c), the output end is a three-phase symmetrical load, n is the load midpoint, and the DC side capacitors C1, C2, and C3 convert the DC bus voltage U dc Divided into 4 levels (U dc , 2U dc / 3、U dc / 3,0).

[0117] Taking the A phase bridge arm as an example, S a1 , S a2 , S a3 When conducting, the output voltage is U dc , S a2 , S a3 , S a4 When conducting, the output voltage is 2U dc / 3,S a3 , S a4 , S a5 When conducting, the output voltage is U dc / 3,S a4 , S a5 , S a6 When the output voltage is turned on, it is 0. Each phase bridge arm will produce 4 output voltages, which are represented by 3, 2, 1, and 0. 3 = 64 space voltage vectors, the space vector distribution is as follows Figure 2 As shown, it includes 4 zero vectors, 18 small vectors, 12 short medium vectors, 12 long medium vectors and 18 large vectors.

[0118] like Figure 3 As shown, the present invention discloses a method for achieving capacitor voltage balance of a four-level energy storage converter under low modulation ratio conditions, comprising the following steps:

[0119] (1) Obtaining the reference voltage vector V of the four-level energy storage converter ref , calculate the reference voltage vector V ref The corresponding modulation index m is determined, and it is determined whether the modulation index m is greater than a preset reference modulation ratio. If so, the process ends, otherwise it goes to step (2).

[0120] Specifically, the reference modulation ratio preset in this step is between 0 and 1, preferably 0.55.

[0121] More specifically, in this step, the modulation index m corresponding to the reference voltage vector is calculated using the following formula:

[0122]

[0123] Among them U dc is the DC bus voltage of the four-level energy storage converter.

[0124] (2) The reference voltage vector V obtained in step (1) ref Processing is performed to obtain the spatial voltage vector distribution diagram of the basic voltage vector in the gh coordinate system.

[0125] Specifically, this step (2) includes the following steps:

[0126] (2-1) Obtain the reference voltage vector V obtained in step (1) ref The coordinates in the α-β coordinate system (V α ,V β ) and the coordinates in the gh coordinate system (V g ,V h ) between the coordinate transformation formula;

[0127] Specifically, this step uses the following formula:

[0128]

[0129] Where V a 、V b 、V c is the reference voltage vector V ref The three-phase voltage, V α 、V β is the reference voltage vector V ref The α-axis component and the β-axis component in the α-β coordinate system, V g 、V h is the reference voltage vector V ref The g-axis component and the h-axis component in the gh coordinate system.

[0130] (2-2) Obtain a four-level space vector diagram of a four-level energy storage converter, according to the reference voltage vector V obtained in step (2-1) ref The corresponding coordinate transformation formula is obtained, and the basic space vector in the four-level space vector diagram is successively subjected to coordinate transformation and normalization processing to obtain the space voltage vector distribution diagram of the basic voltage vector in the gh coordinate system.

[0131] Specifically, this step first obtains the four-level space vector diagram of the four-level energy storage converter (such as Figure 2 Then, all the basic space vectors in the four-level space vector diagram are transformed to obtain the space vector diagram in the gh coordinate system. Finally, the space vector diagram in the gh coordinate system is normalized to obtain the space voltage vector distribution diagram of the basic voltage vector in the gh coordinate system (as shown in FIG. Figure 4 shown).

[0132] (3) Sectorize the spatial voltage vector distribution diagram in the gh coordinate system obtained in step (2) to obtain a reference voltage vector V ref A small sector located in the space voltage vector diagram.

[0133] Step (3) includes the following sub-steps:

[0134] (3-1) Obtaining the reference voltage vector V ref The horizontal coordinate V g and the vertical coordinate V h ;

[0135] (3-2) Initialize the reference voltage vector V ref The serial number of the small sector in the space voltage vector diagram is n=0;

[0136] (3-3) Determine V g +V h Is it less than 1? If so, set n=1 and the process ends. Otherwise, go to step (3-4);

[0137] (3-4) Determine V g Is it greater than 1? If so, set n=2 and the process ends. Otherwise, go to step (3-5);

[0138] (3-5) Determine V h Is it greater than 1? If so, set n=4 and the process ends; otherwise, set n=3 and go to step (3-6);

[0139] (3-6) Output reference voltage vector V ref The serial number n of the small sector in the space voltage vector diagram is used as the reference voltage vector V ref A small sector located in the space voltage vector diagram.

[0140] Specifically, the four-level space vector diagram in the gh coordinate system is divided into six large sectors Ⅰ to VI, each of which is further divided into 1 to 4 small sectors. Large sectors Ⅱ to VI can be obtained by rotating large sector Ⅰ.

[0141] (4) The reference voltage vector V obtained according to step (3) ref The synthetic reference voltage vector V is obtained from the sector in the space voltage vector diagram in the gh coordinate system. ref The three nearest vectors.

[0142] This step specifically includes, first, obtaining the reference voltage vector V ref The coordinates (V g ,V h ) are rounded up and rounded down respectively to obtain the distance reference voltage vector V refThe four nearest voltage vectors.

[0143] Specifically, the coordinates of the four voltage vectors in this step are:

[0144]

[0145] The subscript U indicates that the voltage vector is rounded up, and the subscript L indicates that it is rounded down.

[0146] Then, according to the four rounded voltage vectors V UL 、V LU 、V UU 、V LL The parallelogram formed obtains the vector V on the diagonal UL and V LU ;

[0147] Finally, we further obtain a third vector based on the parallelogram, which is opposite to the vector V on the diagonal line. UL and V LU Together they form the reference voltage vector V ref The three nearest vectors.

[0148] Specifically, the third vector is selected according to the expression When the calculated value is greater than zero, V UU Used as the third vector; when the value of the calculated result is less than or equal to zero, V LL Used as the third vector.

[0149] (5) The synthetic reference voltage vector V obtained in step (4) ref The three most recent vectors are processed for volt-second balance calculation to obtain the duty ratio of the three vectors.

[0150] Specifically, this step includes: first, according to the reference voltage vector V obtained in step (4), ref The three most recent vectors obtain the duty cycle of the basic voltage vector action;

[0151] Specifically, this step uses the following formula:

[0152]

[0153] Among them, V1, V2, and V3 represent basic voltage vectors, and V1 = V UL , V2=V UL , V3=V UU / V LL , d1, d2, d3 are the duty cycles of the basic voltage vectors V1, V2, V3 respectively.

[0154] Then, according to the duty cycle of the basic voltage vectors V1, V2, and V3, the three nearest vectors V UL 、V LU 、V LL The duty cycle of the action;

[0155] Specifically, this step uses the following formula:

[0156]

[0157] where d UL ,d LU ,d LL The three nearest vectors V UL 、V LU 、V LL The duty cycle of the action, V LLg and V LLh They are the basic voltage vector V LL Projection on the g-axis and h-axis.

[0158] Then, according to the three nearest vectors V UL 、V LU 、V LL The duty cycle of the action is obtained by the three most recent vectors V UL 、V LU 、V UU The duty cycle of the action;

[0159] Specifically, this step uses the following formula:

[0160]

[0161] where d UL ,d LU ,d UU The three nearest vectors V UL 、V LU 、V UU The duty cycle of the action, V UUg and V UUh They are the basic voltage vector V UU Projection on the g-axis and h-axis.

[0162] The advantage of the above steps (2) to (5) is that by setting the reference voltage vector V ref From the α-β coordinate system to the gh coordinate system, after per-unit change and small sector judgment, the reference voltage vector V is determined. ref The three most recent vectors, while using the reference voltage vector V ref The decimal part of the coordinates can be used to obtain the duty cycle of the three vectors, which greatly simplifies the calculation process and speeds up the operation.

[0163] (6) The reference voltage vector V obtained according to step (3) ref The small sector in the space voltage vector diagram and the synthetic reference voltage vector V obtained in step (5) ref The duty cycle of the three vectors is calculated to obtain the switching sequence corresponding to each small sector.

[0164] Specifically, this step is to first sort the multiple basic voltage vectors corresponding to the triangle vertices of the small sector in the space voltage vector diagram obtained in step (3) in ascending order to obtain the sorted basic voltage vector corresponding to the small sector (for example, Figure 5 For small sector 1 in the example, the sorted basic voltage vector is 000-100-110-111-211-221-222-322-332-333);

[0165] Then, for the sorted basic voltage vectors corresponding to the small sector, the first, second and third basic voltage vectors are taken out, and the duty ratios of the three basic voltage vectors are set to be equal to the synthetic reference voltage vector V obtained in step (5). ref Then, the second, third and fourth basic voltage vectors are taken out, and the duty ratios of the three basic voltage vectors are set to be equal to the synthetic reference voltage vector V obtained in step (5). ref The duty cycle of the three vectors, ..., and so on, until all the sorted basic voltage vectors are processed;

[0166] As an alternative implementation, the above process may also be as follows: for the sorted basic voltage vectors corresponding to the small sector, the first, second, third, and fourth basic voltage vectors are taken out, and the duty ratios of the first and fourth basic voltage vectors are set to be equal to the synthetic reference voltage vector V obtained in step (5). ref The duty ratios of the three vector actions are set to half of the duty ratio of the vector action at the corresponding position, and the duty ratios of the second and third basic voltage vector actions are set to be equal to the synthetic reference voltage vector V obtained in step (5) ref The duty ratios of the other two corresponding positions of the three vectors are taken out, and then the second, third, fourth, and fifth basic voltage vectors are taken out, and the above process is repeated... and so on, until all the sorted basic voltage vectors are processed;

[0167] Finally, a switching sequence table is constructed according to the basic voltage vector taken out each time and the duty cycle of the basic voltage vector obtained;

[0168] Specifically, the switch sequence table (Table 1 below) includes a sequence number and a corresponding five-segment basic voltage vector synthesis sequence, wherein the sequence number refers to the sequence number i of the above-mentioned basic voltage vector taken out (for example, if the first, second, and third basic voltage vectors are taken out, the sequence number is 1, and if the second, third, and fourth basic voltage vectors are taken out, the sequence number is 2), and the corresponding five-segment basic voltage vector synthesis sequence includes the i-th basic voltage vector taken out for the i-th time, the i+1-th basic voltage vector, the i+2-th basic voltage vector, the i+1-th basic voltage vector, and the i-th basic voltage vector;

[0169] The switch sequence table (Table 1 below) also includes a sequence number and a corresponding seven-segment basic voltage vector synthesis sequence, wherein the sequence number refers to the sequence number i of the basic voltage vector taken out above (for example, if the first, second, third, and fourth basic voltage vectors are taken out, the sequence number is 1, and if the second, third, fourth, and fifth basic voltage vectors are taken out, the sequence number is 2), and the corresponding seven-segment basic voltage vector synthesis sequence includes the i-th basic voltage vector taken out for the i-th time, the i+1-th basic voltage vector, the i+2-th basic voltage vector, the i+3-th basic voltage vector, the i+2-th basic voltage vector, the i+1-th basic voltage vector, and the i-th basic voltage vector.

[0170] Similarly, the switching sequences corresponding to other small sectors 2, 3, and 4 can be derived.

[0171] Table 1

[0172]

[0173] The advantage of this step is that the switching times and the output voltage harmonic content can be reduced through a five-segment or seven-segment basic voltage vector synthesis sequence.

[0174] (7) According to the duty cycle of the three vector actions obtained in step (5), obtain the first cycle average current corresponding to each large sector in the spatial voltage vector diagram and the average current of the second cycle

[0175] Specifically, the average current of the first cycle corresponding to each large sector is and the average current of the second cycle The following formula is used:

[0176]

[0177] The matrix D is established by the following steps:

[0178] (a) For the space voltage vector diagram (such as Figure 2Each basic voltage vector in each large sector (as shown in Table 2 below) is processed by a four-level equivalent circuit to obtain a relationship table corresponding to the large sector (see Table 2 below, taking large sector I as an example), which reflects the relationship between the midpoint current corresponding to each basic voltage vector in the large sector and the output phase current, i N1 and i N2 They represent the two midpoint currents on the DC side of the four-level equivalent circuit when the basic voltage vector acts, i a 、i b , and i c They respectively represent the first, second and third output phase currents of the four-level equivalent circuit.

[0179] Table 2

[0180]

[0181] (b) Construct an empty 2-row 3-column matrix D for each large sector, where the elements of the 1st row, 1st column, 2nd column, and 3rd column are the i in the relationship table corresponding to the large sector obtained in step (a) N1 with i a 、i b 、i c The elements in the 1st column, 2nd column, and 3rd column of the 2nd row are the i in the relationship table corresponding to the large sector obtained in step (a). N2 with i a 、i b 、i c relationship;

[0182] For each large sector in the example of the present invention, the corresponding matrix D is:

[0183]

[0184] For each large sector in the example of the present invention, the corresponding matrix S is:

[0185]

[0186] The values ​​of S1, S2, S3, S4, S5, and S6 are related to the reference voltage vector V ref The reference voltage vector V ref When in large sector I, S1=1, and the others are 0; the reference voltage vector V ref When located in large sector II, S2=1, and the others are all 0; ..., and so on.

[0187] The advantage of this step is that after the large sector rotation transformation, only the relevant parameters of the first large sector need to be calculated to obtain the first cycle average current corresponding to each large sector. and the average current of the second cycle Greatly simplify the calculation steps.

[0188] (8) The switching sequence corresponding to each small sector obtained in step (6) and the first cycle average current corresponding to the large sector to which the small sector belongs in the spatial voltage vector diagram obtained in step (7) and the average current of the second cycle Get the average current at the midpoint of the first cycle when each switch sequence in the small sector is in effect and the average current at the midpoint of the second cycle

[0189] Specifically, this step is as follows: first, according to all the basic voltage vectors corresponding to the first sequence number in the switch sequence corresponding to the small sector in step (6) and the duty cycle of the vector action, a matrix D is obtained;

[0190] Then, according to the reference voltage vector V ref The large sector where the matrix is ​​located is obtained;

[0191] Then, substitute the obtained matrix D and matrix S into the first cycle average current obtained in step (7) and the average current of the second cycle In order to obtain the average current i1 of the first cycle and the average current i2 of the second cycle when the switch sequence corresponding to the first sequence number is in effect,

[0192] Finally, for the remaining serial numbers in the switch sequence corresponding to the small sector obtained in step (6), the above process is repeated until all serial numbers are traversed, thereby obtaining the first cycle midpoint current average value i1 and the second cycle midpoint current average value i2 when each switch sequence in the small sector is in effect.

[0193] (9) The average current at the midpoint of the first cycle when each switch sequence in the small sector is in effect obtained according to step (8) and the average current at the midpoint of the second cycle Obtain the optimal switching sequence to achieve capacitor voltage balance in a four-level energy storage converter.

[0194] Specifically, this step includes: first, according to the obtained average current of the midpoint of the first cycle when each switch sequence in the small sector acts and the average current at the midpoint of the second cycle Obtain the P value corresponding to each switch sequence in the small sector;

[0195] Specifically, the above process adopts the following formula:

[0196]

[0197] Where Δv Ci is the voltage of the ith capacitor on the DC side of the four-level energy storage converter and U dc / 3, and i∈[1,2].

[0198] Finally, the minimum value is selected from the P values ​​corresponding to all the switching sequences in the small sector (at this time, the capacitor voltage balancing ability of the four-level energy storage converter is the best), and the switching sequence corresponding to the minimum value is output as the optimal switching sequence to achieve capacitor voltage balance of the four-level energy storage converter.

[0199] The advantage of this step is that the objective function-based approach is simple and efficient in implementation, and the optimal switching sequence can be outputted only through comparison operations.

[0200] Simulation Results

[0201] By performing Matlab / Simulink software simulation processing on the optimal switching sequence for achieving capacitor voltage balance of the four-level energy storage converter obtained in the above step (9), the effectiveness and superiority of the method of the present invention can be verified.

[0202] Specifically, the 4L-DCC simulation parameters are shown in Table 3.

[0203] Table 3

[0204]

[0205]

[0206] first, Figure 6 and Figure 7 The simulation waveforms of the line voltage, phase current and capacitor voltage output by the energy storage converter are shown to change the modulation ratio m. When the modulation ratio m is 0.2 and 0.5 respectively, the output voltage of the energy storage converter is a standard three-level PWM waveform and a five-level PWM waveform, the output current waveform is also close to a sine wave, the capacitor voltage can be stabilized at around 1600V, and the ripple amplitude is within 40V.

[0207] Then, Figure 8 and Fig. 9 In order to change the simulation waveforms of the output line voltage, phase current and capacitor voltage of the energy storage converter when the base frequency is changed, different operating frequencies are set to f=5Hz, f=25Hz, and f=50Hz. The output voltage waveforms are all standard five-level step waves. When the operating frequency increases from 5Hz to 50Hz, the capacitor voltage can also be stabilized at around 1600V, and the ripple amplitude is within 40V, which is almost not affected by the base frequency change.

[0208] Finally, to further verify the superiority of the proposed algorithm, the proposed algorithm is compared and analyzed with carrier-overlapped PWM (COPWM) and virtual SVPWM (VSVPWM). Fig.10 When the modulation ratio m is 0.2 and 0.5 respectively, the three methods can effectively reduce the power switch S within 1s. a1 , S a2 , S a3 The number of switch transitions and the average number of transitions show that the average number of switch transitions of the proposed algorithm is much lower than that of the COPWM and VSVPWM methods. Fig.11 is the THD value of the output line voltage when the modulation ratio m gradually increases. Compared with the COPWM and VSVPWM methods, the proposed algorithm reduces THD by about 15% and has higher output line voltage waveform quality. Fig.12 The capacitor voltage ripple amplitude of the three methods is evaluated. It can be seen that the proposed algorithm can also control the capacitor voltage ripple amplitude well.

[0209] It will be easily understood by those skilled in the art that the above description is only a preferred embodiment of the present invention and is not intended to limit the present invention. Any modifications, equivalent substitutions and improvements made within the spirit and principles of the present invention should be included in the protection scope of the present invention.

Claims

1. A method for achieving capacitor voltage balance of a four-level energy storage converter under low modulation ratio conditions, characterized in that: The following steps are involved: (1) Obtaining the reference voltage vector V of the four-level energy storage converter ref , calculate the reference voltage vector V ref The corresponding modulation index m is determined, and it is determined whether the modulation index m is greater than a preset reference modulation ratio. If so, the process ends, otherwise it goes to step (2). (2) The reference voltage vector V obtained in step (1) ref Processing is performed to obtain the spatial voltage vector distribution diagram of the basic voltage vector in the gh coordinate system. (3) Sectorize the spatial voltage vector distribution diagram in the gh coordinate system obtained in step (2) to obtain a reference voltage vector V ref A small sector located in the space voltage vector diagram. (4) The reference voltage vector V obtained according to step (3) ref The synthetic reference voltage vector V is obtained from the sector in the space voltage vector diagram in the gh coordinate system. ref The three nearest vectors. (5) The synthetic reference voltage vector V obtained in step (4) ref The three most recent vectors are processed for volt-second balance calculation to obtain the duty ratio of the three vectors. (6) The reference voltage vector V obtained according to step (3) ref The small sector in the space voltage vector diagram and the synthetic reference voltage vector V obtained in step (5) ref The duty cycle of the three vectors is calculated to obtain the switching sequence corresponding to each small sector. (7) According to the duty cycle of the three vector actions obtained in step (5), obtain the first cycle average current corresponding to each large sector in the spatial voltage vector diagram and the average current of the second cycle (8) The switching sequence corresponding to each small sector obtained in step (6) and the first cycle average current corresponding to the large sector to which the small sector belongs in the spatial voltage vector diagram obtained in step (7) and the average current of the second cycle Get the average current at the midpoint of the first cycle when each switch sequence in the small sector is in effect and the average current at the midpoint of the second cycle (9) The average current at the midpoint of the first cycle when each switch sequence in the small sector is in effect obtained according to step (8) and the average current at the midpoint of the second cycle Obtain the optimal switching sequence to achieve capacitor voltage balance in a four-level energy storage converter.

2. The method for achieving capacitor voltage balance of a four-level energy storage converter under low modulation ratio conditions according to claim 1, characterized in that: The modulation index m corresponding to the reference voltage vector is calculated in step (1) using the following formula: Among them U dc is the DC bus voltage of the four-level energy storage converter. Step (2) comprises the following steps: (2-1) Obtain the reference voltage vector V obtained in step (1) ref The coordinates in the α-β coordinate system (V α ,V β ) and the coordinates in the gh coordinate system (V g ,V h ) between the coordinate transformation formula; (2-2) Obtain a four-level space vector diagram of a four-level energy storage converter, according to the reference voltage vector V obtained in step (2-1) ref The corresponding coordinate transformation formula is obtained, and the basic space vector in the four-level space vector diagram is successively subjected to coordinate transformation and normalization processing to obtain the space voltage vector distribution diagram of the basic voltage vector in the gh coordinate system.

3. The method for achieving capacitor voltage balance of a four-level energy storage converter under low modulation ratio conditions according to claim 1 or 2, characterized in that: Step (2-1) uses the following formula: Where V a 、V b 、V c is the reference voltage vector V ref The three-phase voltage, V α 、V β is the reference voltage vector V ref The α-axis component and the β-axis component in the α-β coordinate system, V g 、V h is the reference voltage vector V ref The g-axis component and the h-axis component in the gh coordinate system. Step (2-2) is specifically as follows: first, a four-level space vector diagram of a four-level energy storage converter is obtained; then, coordinate transformation is performed on all basic space vectors in the four-level space vector diagram to obtain a space vector diagram in a gh coordinate system; and finally, the space vector diagram in the gh coordinate system is normalized to obtain a space voltage vector distribution diagram of the basic voltage vector in the gh coordinate system.

4. The method for achieving capacitor voltage balance of a four-level energy storage converter under low modulation ratio conditions according to any one of claims 1 to 3, characterized in that: Step (3) includes the following sub-steps: (3-1) Obtaining the reference voltage vector V ref The horizontal axis V g and the vertical coordinate V h ; (3-2) Initialize the reference voltage vector V ref The serial number of the small sector in the space voltage vector diagram is n=0; (3-3) Determine V g +V h Is it less than 1? If so, set n=1 and the process ends. Otherwise, go to step (3-4); (3-4) Determine V g Is it greater than 1? If so, set n=2 and the process ends. Otherwise, go to step (3-5); (3-5) Determine V h Is it greater than 1? If so, set n=4 and the process ends; otherwise, set n=3 and go to step (3-6); (3-6) Output reference voltage vector V ref The serial number n of the small sector in the space voltage vector diagram is used as the reference voltage vector V ref A small sector located in the space voltage vector diagram. Among them, the four-level space vector diagram in the gh coordinate system is divided into six large sectors, each large sector is divided into four small sectors, and the second to sixth large sectors are obtained by rotating the first large sector.

5. The method for achieving capacitor voltage balance of a four-level energy storage converter under low modulation ratio conditions according to claim 4, characterized in that: Step (4) is specifically: First, the reference voltage vector V ref The coordinates (V g ,V h ) are rounded up and rounded down respectively to obtain the distance reference voltage vector V ref The four nearest voltage vectors. Specifically, the coordinates of the four voltage vectors are: The subscript U indicates that the voltage vector is rounded up, and the subscript L indicates that it is rounded down. Then, according to the four rounded voltage vectors V UL 、V LU 、V UU 、V LL The parallelogram formed obtains the vector V on the diagonal UL and V LU ; Finally, we further obtain a third vector based on the parallelogram, which is opposite to the vector V on the diagonal line. UL and V LU Together they form the reference voltage vector V ref The three nearest vectors. Specifically, the third vector is selected according to the expression When the calculated value is greater than zero, V UU Used as the third vector; when the value of the calculated result is less than or equal to zero, V LL Used as the third vector; Step (5) is specifically: First, according to the reference voltage vector V obtained in step (4), ref The three most recent vectors obtain the duty cycle of the basic voltage vector action; Specifically, this step uses the following formula: Among them, V1, V2, and V3 represent basic voltage vectors, and V1 = V UL , V2=V UL , V3=V UU / V LL , d1, d2, d3 are the duty cycles of the basic voltage vectors V1, V2, V3 respectively. Then, according to the duty cycle of the basic voltage vectors V1, V2, and V3, the three nearest vectors V UL 、V LU 、V LL The duty cycle of the action; Specifically, this step uses the following formula: where d UL ,d LU ,d LL The three nearest vectors V UL 、V LU 、V LL The duty cycle of the action, V LLg and V LLh They are the basic voltage vector V LL Projection on the g-axis and h-axis. Then, according to the three nearest vectors V UL 、V LU 、V LL The duty cycle of the action is obtained by the three most recent vectors V UL 、V LU 、V UU The duty cycle of the action; Specifically, this step uses the following formula: where d UL ,d LU ,d UU The three nearest vectors V UL 、V LU 、V UU The duty cycle of the action, V UUg and V UUh They are the basic voltage vector V UU Projection on the g-axis and h-axis.

6. The method for achieving capacitor voltage balance of a four-level energy storage converter under low modulation ratio conditions according to claim 5, characterized in that: Step (6) is specifically: First, the multiple basic voltage vectors corresponding to the triangle vertices of the small sector in the space voltage vector diagram obtained in step (3) are sorted in ascending order to obtain the sorted basic voltage vector corresponding to the small sector; Then, for the sorted basic voltage vectors corresponding to the small sector, the first, second and third basic voltage vectors are taken out, and the duty ratios of the three basic voltage vectors are set to be equal to the synthetic reference voltage vector V obtained in step (5). ref Then, the second, third and fourth basic voltage vectors are taken out, and the duty ratios of the three basic voltage vectors are set to be equal to the synthetic reference voltage vector V obtained in step (5). ref The duty cycle of the three vectors, ..., and so on, until all the sorted basic voltage vectors are processed; or For the sorted basic voltage vectors corresponding to the small sector, the first, second, third, and fourth basic voltage vectors are taken out, and the duty ratios of the first and fourth basic voltage vectors are set to be equal to the synthetic reference voltage vector V obtained in step (5). ref The duty ratios of the three vector actions are set to half of the duty ratio of the vector action at the corresponding position, and the duty ratios of the second and third basic voltage vector actions are set to be equal to the synthetic reference voltage vector V obtained in step (5) ref The duty ratios of the other two corresponding positions of the three vectors are taken out, and then the second, third, fourth, and fifth basic voltage vectors are taken out, and the above process is repeated... and so on, until all the sorted basic voltage vectors are processed; Finally, a switch sequence table is constructed according to each basic voltage vector taken out and the duty cycle of the obtained basic voltage vector, wherein the switch sequence table includes a sequence number and a corresponding five-segment basic voltage vector synthesis sequence, wherein the sequence number refers to the sequence number i of the above-mentioned basic voltage vector taken out, and the corresponding five-segment basic voltage vector synthesis sequence includes the i-th basic voltage vector taken out for the i-th time, the i+1-th basic voltage vector, the i+2-th basic voltage vector, the i+1-th basic voltage vector, and the i-th basic voltage vector; The switch sequence table also includes a serial number and a corresponding seven-segment basic voltage vector synthesis sequence, wherein the serial number refers to the serial number i of the basic voltage vector taken out above, and the corresponding seven-segment basic voltage vector synthesis sequence includes the i-th basic voltage vector taken out for the i-th time, the i+1-th basic voltage vector, the i+2-th basic voltage vector, the i+3-th basic voltage vector, the i+2-th basic voltage vector, the i+1-th basic voltage vector, and the i-th basic voltage vector.

7. The method for achieving capacitor voltage balance of a four-level energy storage converter under low modulation ratio conditions according to claim 6, characterized in that: Average current of the first cycle corresponding to each large sector and the average current of the second cycle The following formula is used: The matrix D is established by the following steps: (a) Perform four-level equivalent circuit processing on each basic voltage vector in each large sector in the spatial voltage vector diagram (as shown in FIG. 2 ) to obtain a relationship table corresponding to the large sector (see Table 2 below, taking large sector I as an example). The relationship table reflects the relationship between the midpoint current and the output phase current corresponding to each basic voltage vector in the large sector, i N1 and i N2 They represent the two midpoint currents on the DC side of the four-level equivalent circuit when the basic voltage vector acts, i a 、i b , and i c They respectively represent the first, second and third output phase currents of the four-level equivalent circuit. (b) Construct an empty 2-row 3-column matrix D for each large sector, where the elements of the 1st row, 1st column, 2nd column, and 3rd column are the i in the relationship table corresponding to the large sector obtained in step (a) N1 with i a 、i b 、i c The elements in the 1st column, 2nd column, and 3rd column of the 2nd row are the i in the relationship table corresponding to the large sector obtained in step (a). N2 with i a 、i b 、i c relationship; For each large sector, the corresponding matrix S is: The values ​​of the intermediate parameters S1, S2, S3, S4, S5, and S6 are related to the reference voltage vector V ref The reference voltage vector V ref When in large sector I, S1=1, and the others are 0; the reference voltage vector V ref When located in large sector II, S2=1, and the others are all 0; ..., and so on.

8. The method for achieving capacitor voltage balance of a four-level energy storage converter under low modulation ratio conditions according to claim 7, characterized in that: Step (8) is specifically: First, according to all the basic voltage vectors corresponding to the first sequence number in the switch sequence corresponding to the small sector in step (6) and the duty cycle of the vector action, the matrix D is obtained; Then, according to the reference voltage vector V ref The large sector where the matrix is ​​located is obtained; Then, substitute the obtained matrix D and matrix S into the first cycle average current obtained in step (7) and the average current of the second cycle To obtain the average current value of the midpoint of the first cycle when the first sequence number corresponds to the switch sequence and the average current at the midpoint of the second cycle Finally, for the remaining sequence numbers in the switch sequence corresponding to the small sector obtained in step (6), the above process is repeated until all sequence numbers are traversed, thereby obtaining the average current value at the midpoint of the first cycle when each switch sequence in the small sector is in effect. and the average current at the midpoint of the second cycle 9. The method for achieving capacitor voltage balance of a four-level energy storage converter under low modulation ratio conditions according to claim 8, characterized in that: Step (9) is specifically: First, according to the obtained average current at the midpoint of the first cycle when each switching sequence in the small sector acts and the average current at the midpoint of the second cycle Get the P value corresponding to each switch sequence in the small sector: where Δv Ci is the voltage of the ith capacitor on the DC side of the four-level energy storage converter and U dc / 3, and i∈[1,2]. Finally, a minimum value is selected from the P values ​​corresponding to all the switching sequences in the small sector, and the switching sequence corresponding to the minimum value is output as the optimal switching sequence for achieving capacitor voltage balance of the four-level energy storage converter.

10. A method for achieving capacitor voltage balance of a four-level energy storage converter under low modulation ratio conditions, characterized in that: include: The first module is used to obtain the reference voltage vector V of the four-level energy storage converter ref , calculate the reference voltage vector V ref The corresponding modulation index m is determined, and it is determined whether the modulation index m is greater than a preset reference modulation ratio. If so, the process ends, otherwise it enters the second module. The second module is used to obtain the reference voltage vector V ref Processing is performed to obtain the spatial voltage vector distribution diagram of the basic voltage vector in the gh coordinate system. The third module is used to sectorize the spatial voltage vector distribution diagram in the gh coordinate system obtained in the second module to obtain a reference voltage vector V ref A small sector located in the space voltage vector diagram. The fourth module is used to obtain the reference voltage vector V according to the third module. ref The synthetic reference voltage vector V is obtained from the sector in the space voltage vector diagram in the gh coordinate system. ref The three nearest vectors. The fifth module is used to obtain the synthetic reference voltage vector V ref The three most recent vectors are processed for volt-second balance calculation to obtain the duty ratio of the three vectors. The sixth module is used to obtain the reference voltage vector V according to the third module. ref The small sector in the space voltage vector diagram and the synthetic reference voltage vector V obtained by the fifth module ref The duty cycle of the three vectors is calculated to obtain the switching sequence corresponding to each small sector. The seventh module is used to obtain the first cycle average current corresponding to each large sector in the space voltage vector diagram according to the duty cycle of the three vector actions obtained in the fifth module and the average current of the second cycle The eighth module is used to calculate the average current of the first cycle corresponding to the large sector to which the small sector belongs in the space voltage vector diagram obtained by the seventh module according to the switch sequence corresponding to each small sector obtained by the sixth module and the average current of the second cycle Get the average current at the midpoint of the first cycle when each switch sequence in the small sector is in effect and the average current at the midpoint of the second cycle The ninth module is used to obtain the average current of the midpoint of the first cycle when each switch sequence in the small sector is in effect according to the eighth module. and the average current at the midpoint of the second cycle Obtain the optimal switching sequence to achieve capacitor voltage balance in a four-level energy storage converter.

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