Bump package structure and method for preparing bump package structure

By setting a buffer layer and a protective layer on the chip and forming step structures and grooves in the conductive openings, the problems of insufficient bonding force of the copper column bumps and poor welding stress release are solved, and higher bonding force and welding reliability are achieved.

CN114597137BActive Publication Date: 2025-05-02FOREHOPE SEMICONDUCTOR (NINGBO) CO LTD
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Patent Information

Application Number
CN202210233438.9
Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
Filing Date
2022-03-10
Publication Date
2025-05-02
Estimated Expiration
2042-03-10

AI Technical Summary

Technical Problem

In the prior art, the bottom bonding force of the copper column bump is poor, which is easy to fall off during reliability testing, and the stress release is poor during welding, which can easily lead to the weld falling off.

Method used

By providing a first buffer layer and a first protective layer on one side of the chip, and a conductive combination layer is provided in the first conductive opening, a step structure and groove connected to the pad are formed, and the bonding force between the conductive combination layer and the buffer layer is increased, and the welding stress is buffered.

Benefits of technology

It effectively improves the bonding force between the metal column and the chip, avoids the problem of conductive bumps falling, and reduces the probability of welding falling off by cushioning stress, and improves the reliability of the structure.

✦ Generated by Eureka AI based on patent content.

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Abstract

The embodiment of the present invention provides a bump package structure and a method for preparing the bump package structure, which relates to the field of semiconductor package technology. The bump package structure includes a chip, a first buffer layer, a first protective layer, a conductive combination layer and a conductive bump. The first buffer layer and the first protective layer are sequentially arranged on one side of the chip, and the conductive combination layer is arranged in the first conductive opening, and finally the conductive bump is made on the conductive combination layer. The first buffer layer is arranged on the first buffer layer, so that the conductive combination layer can be effectively buffered and the probability of welding falling off can be reduced. At the same time, by arranging the first groove, the conductive combination layer extends into the first groove, thereby greatly improving the bonding force between the conductive combination layer and the first buffer layer, and then improving the bonding force between the conductive bump and the chip, avoiding the problem of the conductive bump falling, and ensuring the reliability of the structure.
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Description

Technical Field

[0001] The present invention relates to the technical field of semiconductor packaging, and in particular to a bump packaging structure and a method for preparing the bump packaging structure. Background Art

[0002] With the rapid development of the semiconductor industry, flip-chip packaging structures are widely used in the semiconductor industry. Flip-chip packaging uses bumps to make electrical connections between chips and substrates. Bumps include copper pillars, metal layers (UBM: under bump metalization), protective layers (polyimide), and tin caps (Sn Caps). As the opening of the protective layer decreases, the opening of the metal layer UBM layer formed on the internal aluminum pad decreases, resulting in poor bonding between its side walls and the metal layer UBM. When the bumped chip undergoes reliability testing, the copper pillar bump has the problem of falling off. In other words, the metal layer on the surface of the protective layer at the bottom of the metal pillar has poor bonding, which can easily lead to performance problems such as the metal pillar falling off. In addition, during welding, the stress release problem at the bottom of the metal bump is also difficult to solve, which can easily lead to welding falling off. Summary of the invention

[0003] The purpose of the present invention includes, for example, providing a bump package structure and a method for preparing the bump package structure, which can enhance the bonding strength between the metal column and the chip, avoid problems such as the metal column falling off, and at the same time buffer the welding stress, avoid stress concentration, and reduce the probability of welding falling off.

[0004] The embodiments of the present invention can be implemented as follows:

[0005] In a first aspect, the present invention provides a bump package structure, comprising:

[0006] A chip having a pad disposed on one side;

[0007] A first buffer layer disposed on one side of the chip and at least partially covering the pad;

[0008] A first protective layer is disposed on the first buffer layer, wherein a first conductive opening corresponding to the pad is disposed on the first protective layer, and the first conductive opening penetrates the first protective layer and the first buffer layer and exposes the pad;

[0009] A conductive composite layer disposed in the first conductive opening and electrically connected to the pad;

[0010] and, a conductive bump disposed on the conductive combination layer;

[0011] The first buffer layer extends toward the first conductive opening portion and forms a first step structure in the first conductive opening that is connected to the first protective layer and the pad. A first groove is also provided on the first step structure, and the conductive combination layer extends into the first groove.

[0012] In an optional embodiment, the first groove penetrates the first buffer layer, so that the conductive combination layer contacts the pad through the first groove.

[0013] In an optional embodiment, the conductive combination layer includes a conductive adhesive layer, a conductive barrier layer and a conductive wetting layer, the conductive adhesive layer is arranged in the first conductive opening and simultaneously covers local positions of the pad, the first buffer layer and the first protective layer, and the conductive adhesive layer extends to the first groove, the conductive barrier layer is arranged on the conductive adhesive layer, the conductive wetting layer is arranged on the conductive barrier layer, and the conductive bump is arranged on the conductive wetting layer.

[0014] In an optional embodiment, the conductive combination layer includes a conductive wiring layer, a conductive adhesive layer, a conductive barrier layer and a conductive wetting layer, the conductive wiring layer is arranged in the first conductive opening and partially covers the surface of the first protective layer, and the conductive wiring layer extends to the first groove, the surface of the first protective layer is also provided with a second buffer layer that at least partially covers the conductive wiring layer, the surface of the second buffer layer is also covered with a second protective layer, a second conductive opening is provided on the second protective layer, the second conductive opening penetrates the second protective layer and the second buffer layer and exposes the conductive wiring layer, the conductive adhesive layer is arranged in the second conductive opening and simultaneously covers local positions of the conductive wiring layer, the second buffer layer and the second protective layer, the conductive barrier layer is arranged on the conductive adhesive layer, the conductive wetting layer is arranged on the conductive barrier layer, and the conductive bump is arranged on the conductive wetting layer.

[0015] In an optional embodiment, the second buffer layer extends toward the second conductive opening portion and forms a second step structure connected to the second protective layer and the pad in the second conductive opening. A second groove is also provided on the second step structure, and the conductive adhesive layer extends to the second groove.

[0016] In an optional embodiment, the conductive bump includes a conductive column, a conductive anti-expansion layer and a conductive welding cap, the conductive column is arranged on the conductive combination layer, the conductive welding cap is arranged at one end of the conductive column away from the chip, and the conductive anti-expansion layer is arranged between the conductive welding cap and the conductive column to prevent mutual diffusion between the conductive welding cap and the conductive column.

[0017] In an optional embodiment, the conductive bump further includes an anti-spreading wetting layer, and the anti-spreading wetting layer is disposed between the conductive anti-spreading layer and the conductive welding cap.

[0018] In an optional embodiment, the thermal expansion coefficient of the first buffer layer is smaller than the thermal expansion coefficient of the first protective layer.

[0019] In an optional embodiment, the first buffer layer is made of a photosensitive material, and the first protective layer is made of a photoresistive material.

[0020] In an optional embodiment, the first buffer layer is made of a conductive metal material, and the first buffer layer is electrically connected to the conductive combination layer and the pad at the same time.

[0021] In an optional embodiment, a plating opening is provided at an edge of the chip, the first buffer layer extends to the plating opening, and a sidewall of the first buffer layer is exposed to the plating opening, and the plating opening is used to form a plating lead.

[0022] In an optional embodiment, a third groove is further formed on the first buffer layer, the third groove is spaced apart from the first conductive opening, and the first protective layer extends to the third groove.

[0023] In an optional embodiment, an edge of the first buffer layer is spaced apart from an edge of the chip, and the first protective layer extends to an edge region of the chip, so that a cutting path of the chip is away from the first buffer layer.

[0024] In a second aspect, the present invention provides a method for preparing a bump package structure, which is used to prepare the bump package structure as described in any one of the aforementioned embodiments, comprising:

[0025] Providing a chip with a pad;

[0026] forming a first buffer layer at least partially covering the pad on one side of the chip;

[0027] Disposing a first protective layer on the first buffer layer;

[0028] Opening holes in the first protective layer and the first buffer layer in sequence by using an exposure and development process to form a first conductive opening, wherein the first conductive opening penetrates the first protective layer and the first buffer layer and exposes the pad;

[0029] forming a conductive composite layer in the first conductive opening;

[0030] forming a conductive bump on the conductive composite layer;

[0031] The first buffer layer extends toward the first conductive opening portion and forms a first step structure connected to the first protective layer and the pad in the first conductive opening. A first groove is also provided on the first step structure, and the conductive combination layer extends to the first groove.

[0032] In an optional embodiment, the step of opening holes in the first protective layer and the first buffer layer in sequence by using an exposure and development process includes:

[0033] Using a photomask to expose a predetermined opening position on the protective layer corresponding to the pad;

[0034] The exposed area is removed by using a developing solution to form a first transition opening with a top opening of W2, a bottom opening of W1, and a slope of S1;

[0035] Using a photomask to perform secondary exposure on a predetermined opening position on the protective layer corresponding to the pad;

[0036] The exposed area is removed by using a developing solution to form a second transition opening with a top opening of W4, a bottom opening of W3, and a slope of S2;

[0037] Using a photolithography process to make a hole at a predetermined hole position corresponding to the pad on the buffer layer;

[0038] Among them, S2>S1, and W1<W3<W2<W4.

[0039] The beneficial effects of the embodiments of the present invention include, for example:

[0040] The present invention provides a bump package structure, which is provided by sequentially providing a first buffer layer and a first protective layer on one side of a chip, and providing a conductive combination layer in a first conductive opening, and finally completing the production of a conductive bump on the conductive combination layer, wherein the first buffer layer extends toward the first conductive opening portion, and forms a first step structure in the first conductive opening that is connected to the first protective layer and the pad, and a first groove is also provided on the first step structure, and the conductive combination layer extends into the first groove. By providing the first buffer layer, the conductive combination layer can be effectively buffered, and the welding stress on the conductive bump can be released during welding, thereby avoiding stress concentration and reducing the probability of welding falling off. At the same time, by providing the first groove on the first step structure formed by the first buffer layer, the conductive combination layer extends into the first groove, thereby greatly improving the bonding force between the conductive combination layer and the first buffer layer, and then improving the bonding force between the conductive bump and the chip, avoiding the problem of the conductive bump falling off, and ensuring the reliability of the structure. BRIEF DESCRIPTION OF THE DRAWINGS

[0041] In order to more clearly illustrate the technical solutions of the embodiments of the present invention, the drawings required for use in the embodiments are briefly introduced below. It should be understood that the following drawings only show certain embodiments of the present invention and therefore should not be regarded as limiting the scope. For ordinary technicians in this field, other related drawings can be obtained based on these drawings without creative work.

[0042] Figure 1 A schematic diagram of a bump package structure provided by a first embodiment of the present invention;

[0043] Figure 2 for Figure 1 A partial enlarged schematic diagram of middle Ⅱ;

[0044] Figure 3 A schematic diagram of a bump package structure provided by a second embodiment of the present invention;

[0045] Figure 4 for Figure 3 A partial enlarged schematic diagram of middle Ⅳ;

[0046] Figure 5 for Figure 3 A partial enlarged schematic diagram of middle V;

[0047] Figure 6 A schematic diagram of a bump package structure provided by a third embodiment of the present invention;

[0048] Figure 7 A schematic diagram of a bump package structure provided by a fourth embodiment of the present invention;

[0049] Figure 8 for Figure 7 A partial enlarged schematic diagram of Figure Ⅷ;

[0050] Fig. 9 A schematic diagram of a bump package structure provided in a fifth embodiment of the present invention;

[0051] Figures 10 to 15 A process flow chart of a method for preparing a bump package structure provided in accordance with a fifth embodiment of the present invention.

[0052] Icons: 100-bump package structure; 110-chip; 111-pad; 113-electroplating opening; 120-first buffer layer; 121-first conductive opening; 123-first groove; 125-third groove; 130-first protective layer; 140-conductive combination layer; 141-conductive adhesive layer; 143-conductive barrier layer; 145-conductive wetting layer; 147-conductive wiring layer; 150-conductive bump; 151-conductive boss; 153-conductive anti-expansion layer; 155-conductive welding cap; 157-anti-expansion wetting layer; 160-second buffer layer; 161-second conductive opening; 163-second groove; 170-second protective layer. DETAILED DESCRIPTION

[0053] In order to make the purpose, technical solutions and advantages of the embodiments of the present invention clearer, the technical solutions in the embodiments of the present invention will be clearly and completely described below in conjunction with the drawings in the embodiments of the present invention. Obviously, the described embodiments are part of the embodiments of the present invention, not all of the embodiments. Generally, the components of the embodiments of the present invention described and shown in the drawings here can be arranged and designed in various different configurations.

[0054] Therefore, the following detailed description of the embodiments of the present invention provided in the accompanying drawings is not intended to limit the scope of the invention claimed for protection, but merely represents selected embodiments of the present invention. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the present invention.

[0055] It should be noted that similar reference numerals and letters denote similar items in the following drawings, and therefore, once an item is defined in one drawing, further definition and explanation thereof is not required in subsequent drawings.

[0056] In the description of the present invention, it should be noted that if the terms "upper", "lower", "inside", "outside", etc. appear to indicate an orientation or position relationship, they are based on the orientation or position relationship shown in the accompanying drawings, or are the orientation or position relationship in which the product of the invention is usually placed when used. They are only for the convenience of describing the present invention and simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, be constructed and operated in a specific orientation, and therefore cannot be understood as a limitation on the present invention.

[0057] In addition, the terms “first”, “second”, etc., if used, are merely used to distinguish between the descriptions and should not be understood as indicating or implying relative importance.

[0058] As disclosed in the background technology, the bottom bonding of the copper pillar bump in the prior art is poor and it is easy to fall off during reliability testing, affecting the welding reliability. At the same time, during welding, the stress release problem at the bottom of the copper pillar bump is difficult to solve, which easily leads to stress concentration and then causes the welding to fall off or fail.

[0059] In addition, in the prior art, after the metal layer UBM is made, the excess metal layer needs to be etched away. Since the polyimide material of the protective layer is extremely easy to absorb water, etching liquid residue is easily formed on the side wall of the UBM at the bottom of the metal column, resulting in excessive corrosion and undercut openings at the bottom of the copper column bump, which in turn causes the copper column bump to fall off during reliability testing and affects the welding quality.

[0060] Moreover, as the opening of the protective layer decreases, the opening of the metal layer formed on the aluminum pad inside it also becomes smaller, resulting in poor bonding between the metal layer and the aluminum pad, and between the metal layer and the side wall of the protective layer. In order to solve this problem, there is also a solution in the prior art to increase the roughness of the aluminum pad or the protective layer surface by plasma bombardment, however, the roughness improvement effect is poor. In particular, when the protective layer is made of materials such as silicon nitride, the bonding between the metal layer and the protective layer becomes poorer, which makes it more likely to cause performance problems such as metal pillars falling off.

[0061] In order to solve the above problems, the present invention provides a bump package structure and a method for preparing the bump package structure. It should be noted that the features in the embodiments of the present invention can be combined with each other without conflict.

[0062] First embodiment

[0063] See also Figure 1 and Figure 2 The present embodiment provides a bump package structure 100, which can enhance the bonding force between the metal pillar and the chip 110, avoid problems such as the metal pillar falling off, and at the same time buffer the welding stress, avoid stress concentration, and reduce the probability of welding falling off.

[0064] The bump package structure 100 provided in this embodiment includes a chip 110, a first buffer layer 120, a first protection layer 130, a conductive composite layer 140 and a conductive bump 150. The chip 110 is provided with a pad 111 on one side. The first buffer layer 120 is provided on one side of the chip 110 and at least partially covers the pad 111. The first protection layer 130 is provided on the first buffer layer 120, and a first conductive opening 121 corresponding to the pad 111 is provided on the first protection layer 130. The first conductive opening 121 penetrates the first protection layer 130 and the first buffer layer 120 and exposes the pad 111. The conductive composite layer 140 is provided in the first conductive opening 121 and is electrically connected to the pad 111. The conductive bump 150 is provided on the conductive composite layer 140 and is protruding from the first protection layer 130. The first buffer layer 120 partially extends toward the first conductive opening 121 and forms a first step structure connected to the first protective layer 130 and the pad 111 in the first conductive opening 121. A first groove 123 is also provided on the first step structure, and the conductive combination layer 140 extends into the first groove 123.

[0065] In this embodiment, during actual preparation, the first buffer layer 120 is first coated on the chip 110, and then coated again to form the first protective layer 130, and then grooves are made on the first protective layer 130 at positions corresponding to the pads, and the grooves are completed by a secondary exposure process, so that the roughness of the openings on the first protective layer 130 is more uniform, which is conducive to the combination with the conductive combination layer 140. Then grooves are made on the first buffer layer 120, and the opening size on the first buffer layer 120 is smaller than the opening size on the first protective layer 130, and the first conductive openings 121 are formed after being connected to each other, and a first step structure is formed at the same time. When grooving the first buffer layer 120, a first groove 123 can be formed at the same time. The first groove 123 is located on the formed first step structure. By setting the first groove 123 on the first step structure formed on the first buffer layer 120, the conductive combination layer 140 extends into the first groove 123, thereby greatly improving the bonding force between the conductive combination layer 140 and the first buffer layer 120, and further improving the bonding force between the conductive bump 150 and the chip 110, avoiding the problem of the conductive bump 150 falling off, and ensuring the reliability of the structure.

[0066] In other preferred embodiments of the present invention, a single exposure process may also be used. In this case, the materials of the first buffer layer 120 and the first protective layer 130 need to be limited. For example, the first buffer layer 120 uses a photosensitive material, and the first protective layer 130 uses a photoresist material.

[0067] It should be noted that the chip 110 in this embodiment can be a silicon wafer with completed wiring, which is provided with an aluminum pad 111 on the front, and the chip 110 is a conventional chip 110, and its specific structure is not described in detail here. Here, the thickness of the first buffer layer 120 should be greater than the thickness of the pad 111, so that when the first buffer layer 120 is coated and formed, it can cover the pad 111.

[0068] In this embodiment, the thermal expansion coefficient of the first buffer layer 120 is smaller than the thermal expansion coefficient of the first protective layer 130. Specifically, by providing the first buffer layer 120 and then laying the first protective layer 130, and the conductive combination layer 140 is in direct contact with the first buffer layer 120, during actual welding, the first buffer layer 120 can play a certain buffering role, can effectively buffer the conductive combination layer 140, and can help release the welding stress on the conductive bump 150 during welding, avoiding stress concentration and reducing the probability of welding falling off.

[0069] In this embodiment, the first groove 123 penetrates the first buffer layer 120, so that the conductive combination layer 140 contacts the pad 111 through the first groove 123. Specifically, when the first buffer layer 120 is grooved, the first conductive opening 121 and the first groove 123 can be formed at the same time, and the first conductive opening 121 and the first groove 123 both penetrate the first buffer layer 120. It should be noted that the first groove 123 can be opened at a position corresponding to the pad 111, and then it passes through to the pad 111, and the conductive combination layer 140 extends into the first groove 123 and contacts the pad 111 to improve its electrical connection characteristics.

[0070] The conductive combination layer 140 includes a conductive adhesive layer 141, a conductive barrier layer 143 and a conductive wetting layer 145. The conductive adhesive layer 141 is arranged in the first conductive opening 121 and covers the pad 111, the first buffer layer 120 and the local position of the first protective layer 130 at the same time, and the conductive adhesive layer 141 extends to the first groove 123. The conductive barrier layer 143 is arranged on the conductive adhesive layer 141, the conductive wetting layer 145 is arranged on the conductive barrier layer 143, and the conductive bump 150 is arranged on the conductive wetting layer 145. Specifically, the conductive adhesive layer 141 can be a titanium layer with a thickness of 4μm-6μm. The titanium layer has extremely high metal bonding performance and can improve the bonding force of adjacent layers, that is, improve the bonding force between the conductive barrier layer 143 and the pad 111 and the first protective layer 130. The conductive barrier layer 143 can be made of nickel, vanadium chromium and other materials with a thickness of 4μm-6μm, which can play a role of conductive barrier and prevent atomic diffusion in adjacent layers. The conductive wetting layer may be a copper layer with a thickness of 2 μm-4 μm, which can play a role in transitionally wetting the upper conductive bump 150 and improve the bonding property of the bottom of the conductive bump 150 .

[0071] It should be noted that when actually preparing the conductive combination layer 140, a layer of photoresist can be first coated on the first protective layer 130, and a groove can be opened at a preset position to expose the first conductive opening 121. The conductive adhesive layer 141, the conductive barrier layer 143 and the conductive wetting layer 145 can be formed in sequence by electroplating, and by using photoresist to cover the surrounding area, there is no need to use an etching process to etch away excess metal layers, thereby avoiding the problems of over-etching and undercutting.

[0072] In the present embodiment, the conductive bump 150 includes a conductive column 151, a conductive anti-expansion layer 153 and a conductive welding cap 155. The conductive column 151 is arranged on the conductive combination layer 140, the conductive welding cap 155 is arranged at the end of the conductive column 151 away from the chip 110, and the conductive anti-expansion layer 153 is arranged between the conductive welding cap 155 and the conductive column 151 to prevent the conductive welding cap 155 and the conductive column 151 from diffusing with each other. Specifically, the conductive column 151 is a copper column. During preparation, a copper layer can be electroplated on the conductive wetting layer 145 to form the conductive column 151, and then the conductive anti-expansion layer 153 can be electroplated to form the conductive anti-expansion layer, and finally the conductive welding cap 155 is formed by ball implantation or printing process. Among them, the conductive anti-expansion layer 153 can be an alloy of electroplated nickel and vanadium layer, which can act as a barrier layer to prevent the diffusion of atoms between the conductive welding cap 155 at the top and the conductive column 151.

[0073] In this embodiment, the conductive bump 150 further includes an anti-expansion wetting layer 157, which is disposed between the conductive anti-expansion layer 153 and the conductive welding cap 155. Specifically, by disposing the anti-expansion wetting layer 157, it is possible to enhance the bonding force between the conductive anti-expansion layer 153 and the conductive welding cap 155. The anti-expansion wetting layer 157 may also be a titanium layer, which is used to enhance the bonding force.

[0074] In summary, the present embodiment provides a bump package structure 100, which sequentially arranges a first buffer layer 120 and a first protective layer 130 on one side of a chip 110, arranges a conductive composite layer 140 in a first conductive opening 121, and finally completes the production of a conductive bump 150 on the conductive composite layer 140, wherein the first buffer layer 120 partially extends toward the first conductive opening 121, and forms a first step structure in the first conductive opening 121 that is connected to the first protective layer 130 and the pad 111, and a first groove 123 is further arranged on the first step structure, and the conductive composite layer 140 extends into the first groove 123. By arranging the first buffer layer 120, the conductive composite layer 140 can be effectively buffered, and can help release the welding stress on the conductive bump 150 during welding, thereby avoiding stress concentration and reducing the probability of welding falling off. At the same time, by setting a first groove 123 on the first step structure formed by the first buffer layer 120, the conductive combination layer 140 extends into the first groove 123, thereby greatly improving the bonding force between the conductive combination layer 140 and the first buffer layer 120, and further improving the bonding force between the conductive bump 150 and the chip 110, avoiding the problem of the conductive bump 150 falling off, and ensuring the reliability of the structure.

[0075] Second embodiment

[0076] See also Figures 3 to 5 This embodiment provides a bump package structure 100, whose basic structure, principle and technical effects are the same as those of the first embodiment. For the sake of brief description, for parts not mentioned in this embodiment, reference may be made to the corresponding contents in the first embodiment.

[0077] In this embodiment, the bump package structure 100 includes a chip 110, a first buffer layer 120, a first protective layer 130, a conductive combination layer 140, a conductive bump 150, a second buffer layer 160, and a second protective layer 170. The chip 110 is provided with a pad 111 on one side. The first buffer layer 120 is provided on one side of the chip 110 and at least partially covers the pad 111. The first protective layer 130 is provided on the first buffer layer 120, and a first conductive opening 121 corresponding to the pad 111 is provided on the first protective layer 130. The first conductive opening 121 penetrates the first protective layer 130 and the first buffer layer 120 and exposes the pad 111. The conductive combination layer 140 is provided in the first conductive opening 121 and is electrically connected to the pad 111. The conductive bump 150 is provided on the conductive combination layer 140 and is protruding from the first protective layer 130. The first buffer layer 120 partially extends toward the first conductive opening 121, and forms a first step structure in the first conductive opening 121 that is connected to the first protective layer 130 and the pad 111. The first step structure is also provided with a first groove 123, and the conductive combination layer 140 extends into the first groove 123. The second buffer layer 160 is provided on the first protective layer 130, and the second protective layer 170 covers the second buffer layer 160.

[0078] In this embodiment, the conductive combination layer 140 includes a conductive wiring layer 147, a conductive adhesive layer 141, a conductive barrier layer 143 and a conductive wetting layer 145. The conductive wiring layer 147 is arranged in the first conductive opening 121 and partially covers the surface of the first protective layer 130, and the conductive wiring layer 147 extends to the first groove 123. The surface of the first protective layer 130 is also provided with a second buffer layer 160 that at least partially covers the conductive wiring layer 147. The surface of the second buffer layer 160 is also covered with a second protective layer 170. The second protective layer 170 is provided with a conductive wiring layer 147. A second conductive opening 161 is provided on the layer 170, and the second conductive opening 161 penetrates the second protective layer 170 and the second buffer layer 160 and exposes the conductive wiring layer 147. The conductive adhesive layer 141 is provided in the second conductive opening 161 and simultaneously covers local positions of the conductive wiring layer 147, the second buffer layer 160 and the second protective layer 170. The conductive barrier layer 143 is provided on the conductive adhesive layer 141, the conductive wetting layer 145 is provided on the conductive barrier layer 143, and the conductive bump 150 is provided on the conductive wetting layer 145.

[0079] It should be noted that the double-layer buffer layer structure is used in this embodiment, which can better play a buffering effect and ensure stress balance. In addition, the conductive wiring layer 147 can realize the wiring action on the front side of the chip 110. Its specific wiring process is consistent with the conventional wiring layer, which will not be introduced in detail here.

[0080] In this embodiment, the second buffer layer 160 partially extends toward the second conductive opening 161, and forms a second step structure in the second conductive opening 161 that is connected to the second protective layer 170 and the pad 111. The second step structure is also provided with a second groove 163, and the conductive adhesive layer 141 extends to the second groove 163. Specifically, the second conductive opening 161 is staggered with the first conductive opening 121, and the formation process of the second step structure is similar to that of the first step structure, which will not be described in detail here.

[0081] The bump package structure 100 provided in this embodiment has a first groove 123 provided on the first buffer layer 120, and the conductive wiring layer 147 extends into the first groove 123. The first groove 123 can improve the bonding force between the conductive wiring layer 147 and the structure below. A second groove 163 is provided on the second buffer layer 160, and the conductive adhesive layer 141 extends into the second groove 163. The second groove 163 can improve the bonding force between the conductive adhesive layer 141 and the structure below, thereby making the entire structure more stable and stronger. And by providing two layers of buffer material, the buffer effect can be further achieved.

[0082] Third embodiment

[0083] See also Figure 6 This embodiment provides a bump package structure 100, whose basic structure, principle and technical effects are the same as those of the first embodiment. For the sake of brief description, for parts not mentioned in this embodiment, reference may be made to the corresponding contents in the first embodiment.

[0084] In the present embodiment, the bump package structure 100 includes a chip 110, a first buffer layer 120, a first protection layer 130, a conductive composite layer 140 and a conductive bump 150. The chip 110 is provided with a pad 111 on one side. The first buffer layer 120 is provided on one side of the chip 110 and at least partially covers the pad 111. The first protection layer 130 is provided on the first buffer layer 120, and a first conductive opening 121 corresponding to the pad 111 is provided on the first protection layer 130. The first conductive opening 121 penetrates the first protection layer 130 and the first buffer layer 120 and exposes the pad 111. The conductive composite layer 140 is provided in the first conductive opening 121 and is electrically connected to the pad 111. The conductive bump 150 is provided on the conductive composite layer 140 and is protruding from the first protection layer 130. The first buffer layer 120 partially extends toward the first conductive opening 121 and forms a first step structure connected to the first protective layer 130 and the pad 111 in the first conductive opening 121. A first groove 123 is also provided on the first step structure, and the conductive combination layer 140 extends into the first groove 123.

[0085] In this embodiment, the thermal expansion coefficient of the first buffer layer 120 is smaller than the thermal expansion coefficient of the first protective layer 130, the edge of the first buffer layer 120 is spaced from the edge of the chip 110, and the first protective layer 130 extends to the edge area of ​​the chip 110, so that the cutting path of the chip 110 is away from the first buffer layer 120. Specifically, the size range of the first buffer layer 120 is smaller than the size range of the front surface of the chip 110, and larger than the size range of the pad 111, so that the first buffer layer 120 is limited to the center of the chip 110 while covering the pad 111, and the first protective layer 130 completely covers the entire front surface of the chip 110. This arrangement can effectively improve the unknown structural strength of the edge of the chip 110.

[0086] It should be noted that, in this embodiment, when preparing the bump package structure 100, after the conductive welding cap 155 is made, cutting is required, and the cutting path can be located on the first protective layer 130 and spaced apart from the first buffer layer 120, so that there is no buffer material around the cutting path, which is more conducive to cutting and separating the chip 110. The first buffer layer 120 can buffer the cutting stress when cutting and separating the chip 110, and reduce the problem of broken corners at the cutting edge of the chip 110.

[0087] The bump package structure 100 provided in this embodiment limits the coverage of the first buffer layer 120 so that the structural strength of the edge of the chip 110 is ensured, and the cutting path can be kept away from the first buffer layer 120 to avoid the edge chipping problem caused by cutting.

[0088] Fourth embodiment

[0089] See also Figure 7 and Figure 8 This embodiment provides a bump package structure 100, whose basic structure, principle and technical effects are the same as those of the first embodiment or the second embodiment. For the sake of brief description, parts not mentioned in this embodiment may refer to the corresponding contents in the first embodiment or the second embodiment.

[0090] The bump package structure 100 in this embodiment includes a chip 110, a first buffer layer 120, a first protection layer 130, a conductive composite layer 140 and a conductive bump 150. The chip 110 is provided with a pad 111 on one side. The first buffer layer 120 is provided on one side of the chip 110 and at least partially covers the pad 111. The first protection layer 130 is provided on the first buffer layer 120, and a first conductive opening 121 corresponding to the pad 111 is provided on the first protection layer 130. The first conductive opening 121 penetrates the first protection layer 130 and the first buffer layer 120 and exposes the pad 111. The conductive composite layer 140 is provided in the first conductive opening 121 and is electrically connected to the pad 111. The conductive bump 150 is provided on the conductive composite layer 140 and is protruding from the first protection layer 130. The first buffer layer 120 partially extends toward the first conductive opening 121, and forms a first step structure in the first conductive opening 121 that is connected to the first protection layer 130 and the pad 111. The first step structure is also provided with a first groove 123, and the conductive combination layer 140 extends into the first groove 123. In this embodiment, the edge of the first buffer layer 120 is spaced from the edge of the chip 110, and the first protection layer 130 extends to the edge region of the chip 110, so that the cutting path of the chip 110 is away from the first buffer layer 120.

[0091] In this embodiment, a third groove 125 is further formed on the first buffer layer 120, the third groove 125 is spaced apart from the first conductive opening 121, and the first protective layer 130 extends to the third groove 125. Specifically, there are a plurality of third grooves 125, each of which penetrates the first buffer layer 120, and the first protective layer 130 covers the plurality of third grooves 125 and extends into the third grooves 125, so as to enhance the bonding force between the first protective layer 130 and the chip 110.

[0092] It should be noted that in this embodiment, the third groove 125 is located at a position offset from the conductive bump 150, for example, around the pad 111, and the first protective layer 130 can directly contact the surface of the chip 110 through the third groove 125, thereby further enhancing the bonding force between the two.

[0093] Fifth embodiment

[0094] See also Fig. 9 This embodiment provides a bump package structure 100, whose basic structure, principle and technical effects are the same as those of the first embodiment. For the sake of brief description, for parts not mentioned in this embodiment, reference may be made to the corresponding contents in the first embodiment.

[0095] In the present embodiment, the bump package structure 100 includes a chip 110, a first buffer layer 120, a first protection layer 130, a conductive composite layer 140 and a conductive bump 150. The chip 110 is provided with a pad 111 on one side. The first buffer layer 120 is provided on one side of the chip 110 and at least partially covers the pad 111. The first protection layer 130 is provided on the first buffer layer 120, and a first conductive opening 121 corresponding to the pad 111 is provided on the first protection layer 130. The first conductive opening 121 penetrates the first protection layer 130 and the first buffer layer 120 and exposes the pad 111. The conductive composite layer 140 is provided in the first conductive opening 121 and is electrically connected to the pad 111. The conductive bump 150 is provided on the conductive composite layer 140 and is protruding from the first protection layer 130. The first buffer layer 120 partially extends toward the first conductive opening 121 and forms a first step structure connected to the first protective layer 130 and the pad 111 in the first conductive opening 121. A first groove 123 is also provided on the first step structure, and the conductive combination layer 140 extends into the first groove 123.

[0096] In this embodiment, the first buffer layer 120 may be made of a conductive metal material, and the first buffer layer 120 is electrically connected to the conductive composite layer 140 and the pad 111 at the same time, and there are multiple conductive bumps 150. For example, the first buffer layer 120 may be titanium, tungsten, etc., which can improve the bonding force between the first buffer layer 120 and the pad 111 on the one hand, and can serve as an electroplating lead on the other hand.

[0097] In this embodiment, the edge of the chip 110 is provided with a plating opening 113, the first buffer layer 120 extends to the plating opening 113, and the sidewall of the first buffer layer 120 is exposed to the plating opening 113, and the plating opening 113 is used to form a plating lead. Specifically, the plating lead can be formed in the plating opening 113, which is convenient for preparing the conductive composite layer 140, and no undercut phenomenon occurs.

[0098] During actual preparation, the first buffer layer 120 can be coated on the entire surface of the chip 110, and then when the first protective layer 130 is coated, the edge area of ​​the chip 110 can be exposed, thereby not completely covering the area of ​​the first buffer layer 120. When the conductive combination layer 140 is formed after the pad opening, the first buffer layer 120 can be used as a plating lead to connect all the conductive combination layers 140, thereby achieving a more uniform electroplated metal layer.

[0099] It should be noted that after the manufacturing process is completed, the edge electroplating opening portion may be cut off by a cutting process, or the edge electroplating opening portion may not be cut off.

[0100] It should also be noted that in this embodiment, the first buffer layer 120 is made of a conductive metal material, so when a groove is formed on the first protection layer 130 , it is not necessary to form a groove on the first buffer layer 120 to expose the pad 111 .

[0101] The bump package structure 100 provided in this embodiment uses a conductive metal material for the first buffer layer 120 and is designed within the first protective layer 130, and acts as a plating lead through the electroplating opening, thereby avoiding the undercut phenomenon caused by the need to micro-etch and remove the electroplating lead after the electroplating lead is set on the protective layer in the traditional process.

[0102] Sixth embodiment

[0103] This embodiment provides a method for preparing a bump package structure 100 , which is used to prepare the bump package structure 100 provided in the first embodiment, the second embodiment, the third embodiment or the fourth embodiment.

[0104] The preparation method provided in this embodiment comprises the following steps:

[0105] S1: Provide a chip 110 with a pad 111.

[0106] Specifically, a chip 110 with a pad is provided, wherein the pad may be an aluminum pad, and the chip 110 may be prepared in advance. Furthermore, the chip 110 may also be a silicon wafer with a wiring structure completed.

[0107] S2 : forming a first buffer layer 120 at least partially covering the pad 111 on one side of the chip 110 .

[0108] Specifically, see Fig.10 The liquid buffer layer is evenly coated on the surface of the chip 110 by a coating machine in a spin coating manner, and then soft-baked on a hot plate to form a film, so as to form a first buffer layer 120 .

[0109] S3 : disposing a first protection layer 130 on the first buffer layer 120 .

[0110] Specifically, see Fig.11 After the first buffer layer 120 is formed, the liquid protective layer is evenly coated on the first buffer layer 120 by a coating machine by spin coating, and the first protective layer 130 is formed by soft baking on a hot plate.

[0111] S3 : opening holes in the first protection layer 130 and the first buffer layer 120 by sequentially using an exposure and development process to form a first conductive opening 121 .

[0112] See also Figure 12 to Figure 14Specifically, the first conductive opening 121 penetrates the first protective layer 130 and the first buffer layer 120 and exposes the pad 111. In actual preparation, a double exposure technology can be used. Specifically, a predetermined opening position corresponding to the pad 111 on the protective layer is first exposed using a mask, and then the exposed area is removed using a developer to form a first transition opening with a top opening of W2, a bottom opening of W1, and a slope of S1, as shown in FIG. Fig.11 The predetermined opening position corresponding to the pad 111 on the protective layer is exposed again using a photomask, and then the exposed area is removed using a developer to form a second transition opening with a top opening of W4, a bottom opening of W3, and a slope of S2, as shown in FIG. Fig.12 Finally, a hole is formed at a predetermined hole position corresponding to the pad 111 on the buffer layer by using a photolithography process, thereby forming a first conductive opening 121. Fig.13 . Among them, S2>S1, and W1<W3<W2<W4.

[0113] It should be noted that when the grooves are formed on the first protective layer 130, the specific process is as follows: first, an exposure machine is used, and its function is to expose the predetermined opening position of the first protective layer 130 (polyimide) by using a photomask in a proximity method, and then a developer is sprayed by a developing method to remove the exposed area to leak the first buffer layer 120 and form a slope, and then an oven is used to heat the first protective layer 130 to accelerate the curing to a fully matured stable state, and a plasma descum is used again to remove organic pollutants on the surface of the protective layer or residues in the opening, such as Fig.11. Then, the exposure machine is used again. Its function is to expose the predetermined opening position of the first protective layer 130 by using a photomask in a close-up method. Then, the developer is sprayed (Spray) to remove the exposed area and leak the first buffer layer 120 and form a slope. Then, the oven is used to heat the first protective layer 130 to accelerate the curing to a fully matured stable state. Finally, a plasma descum is used to remove organic pollutants on the surface of the first protective layer 130 or residues in the opening. The first exposure opening forms a W2 top opening and a W1 bottom opening with a slope of S1. When the second exposure opening is performed, a W4 top opening and a W3 bottom opening with a slope of S2 are formed. The second exposure will form the final opening on the first protective layer 130. It can more accurately control the size of the protective layer opening S2, the slope of the W4 top opening and the W3 bottom opening, and the roughness of the inner wall of the opening is more uniform. Compared with the opening formed by the conventional one-time exposure, the exposure light source has diffraction and scattering, resulting in poor slope roughness and sidewall roughness, and the opening size is uneven and not precise enough, resulting in poor bonding between the metal material in the opening and the sidewall of the protective material. The double exposure process adopted in this embodiment can improve the bonding strength between the various materials in the first conductive opening 121 and prevent the delamination problem.

[0114] It should be noted that the size of the second transition opening in this embodiment is slightly larger than the size of the first transition opening, that is, a smaller opening is formed during the first exposure, and a larger opening is formed during the second exposure. Through the second exposure process, the roughness inside the opening is better, which is conducive to the subsequent material bonding. At the same time, during the preparation, when the groove is made on the first protective layer 130, since the first buffer layer 120 covers the pad 111, it can protect the pad 111 and avoid over-etching of the pad 111.

[0115] In other preferred embodiments of the present invention, a more uniform roughness inside the opening can also be achieved by using materials with different characteristics. Specifically, the first buffer layer 120 and the first protective layer 130 can use materials with opposite material characteristics. For example, the first buffer layer 120 uses a photosensitive material, and the first protective layer 130 uses a photoresistive material. When the first protective layer 130 is plasma etched, the material at the position corresponding to the pad 111 on the first protective layer 130 can be directly removed, and the first buffer layer 120 can be leaked. Since materials with opposite material characteristics are used, the first buffer layer 120 will not be affected by the penetration of light after exposure and development. Then, the first buffer layer 120 can be removed by exposure and development again. Since the material characteristics are opposite, the first protective layer 130 will not be affected by the diffraction and scattering of light, thereby avoiding the problem of too large an opening. As for the specific materials of the first buffer layer 120 and the first protective layer 130, for example, the first protective layer 130 uses a material containing silicon photoresist, which is spin-coated on a thicker layer of polymer material (often referred to as Underlayer), which is insensitive to light. After exposure and development, oxygen plasma etching can be used to leak out the first buffer layer 120. At the same time, the first buffer layer 120 uses a material containing azide quinone compounds, which will undergo a photodecomposition reaction after being exposed to light, changing from oil-soluble to water-soluble, and can be made into a positive glue, which will not be blocked in places where exposure and development openings are required, but blocked in other places. Finally, a plasma descum is used again to remove excess photoresist and leak out the first buffer layer 120. This avoids the corrosion problem of the pad 111 caused by etching removal in the traditional process.

[0116] It should be noted that when the first buffer layer 120 is grooved, the size of the groove is smaller than the size of the groove on the first protective layer 130, and at the same time, a first groove 123 needs to be formed so that after molding, the first buffer layer 120 partially extends toward the first conductive opening 121, and a first step structure connected to the first protective layer 130 and the pad 111 is formed in the first conductive opening 121, and the first groove 123 is formed on the first step structure.

[0117] S4 : forming a conductive combination layer 140 in the first conductive opening 121 .

[0118] See also Fig.15Specifically, after forming the first conductive opening 121, a conductive adhesive layer 141, a conductive barrier layer 143 and a conductive wetting layer 145 can be electroplated in sequence in the first conductive opening 121, wherein the conductive adhesive layer 141 can be a titanium layer with a thickness between 4μm and 6μm. The titanium layer has extremely high metal bonding properties, which can improve the bonding force between adjacent layers, that is, improve the bonding force between the conductive barrier layer 143 and the pad 111 and the first protective layer 130. The conductive barrier layer 143 can be made of nickel, vanadium chromium or other materials with a thickness of 4μm to 6μm, which can play a role in conductive barrier and prevent atomic diffusion in adjacent layers. The conductive wetting layer can be a copper layer with a thickness of 2μm to 4μm, which can play a role in transitionally wetting the conductive bump 150 of the upper layer and improve the bonding of the bottom of the conductive bump 150.

[0119] It should be noted that when the conductive adhesive layer 141 is formed by electroplating, it extends to the first groove 123 , so as to enhance the bonding force between the conductive combination layer 140 and the first buffer layer 120 .

[0120] S5 : forming a conductive bump 150 on the conductive combination layer 140 .

[0121] Please continue to see Figure 1 Specifically, after forming the conductive combination layer 140, the copper layer can be further electroplated on the conductive wetting layer 145 to form a conductive protrusion 151, and then a conductive anti-expansion layer 153 and an anti-expansion wetting layer 157 are sequentially formed on the conductive protrusion 151, and finally a conductive welding cap 155 is formed by ball planting or welding process.

[0122] It should be noted that after forming the conductive protrusion 151, an opening can be formed by coating photoresist and grooving, and then a conductive anti-expansion layer 153 and an anti-expansion wetting layer 157 are formed in the opening in sequence. Finally, the solder is filled into the opening again by electroplating or printing process. The solder material filling is completed by controlling the electroplating parameters or the printing thickness. The plasma descum is used again to remove the excess photoresist to form a copper column with solder. After reflow again, the solder forms a conductive solder ball to complete the process.

[0123] The method for preparing the bump package structure 100 provided in this embodiment is to sequentially arrange the first buffer layer 120 and the first protection layer 130 on one side of the chip 110, arrange the conductive composite layer 140 in the first conductive opening 121, and finally complete the production of the conductive bump 150 on the conductive composite layer 140, wherein the first buffer layer 120 partially extends toward the first conductive opening 121, and forms a first step structure in the first conductive opening 121 that is connected to the first protection layer 130 and the pad 111, and a first groove 123 is also arranged on the first step structure, and the conductive composite layer 140 extends into the first groove 123. By arranging the first buffer layer 120, the conductive composite layer 140 can be effectively buffered, which can help release the welding stress on the conductive bump 150 during welding, avoid stress concentration, and reduce the probability of welding falling off. At the same time, by setting the first groove 123 on the first step structure formed by the first buffer layer 120, the conductive combination layer 140 extends into the first groove 123, thereby greatly improving the bonding force between the conductive combination layer 140 and the first buffer layer 120, and then improving the bonding force between the conductive bump 150 and the chip 110, avoiding the problem of the conductive bump 150 falling off, and ensuring the reliability of the structure. In addition, in this embodiment, an opening is formed on the first protective layer 130 by means of secondary exposure, so that the roughness in the opening is better, which is conducive to the bonding between the conductive combination layer 140 and the first protective layer 130.

[0124] The above is only a specific embodiment of the present invention, but the protection scope of the present invention is not limited thereto. Any changes or substitutions that can be easily thought of by a person skilled in the art within the technical scope disclosed by the present invention should be included in the protection scope of the present invention. Therefore, the protection scope of the present invention should be based on the protection scope of the claims.

Claims

1. A bump package structure, characterized in that: include: A chip having a pad disposed on one side; A first buffer layer disposed on one side of the chip and at least partially covering the pad; A first protective layer is disposed on the first buffer layer, wherein a first conductive opening corresponding to the pad is disposed on the first protective layer, and the first conductive opening penetrates the first protective layer and the first buffer layer and exposes the pad; A conductive composite layer disposed in the first conductive opening and electrically connected to the pad; and, a conductive bump disposed on the conductive combination layer; The first buffer layer extends toward the first conductive opening portion and forms a first step structure in the first conductive opening that is connected to the first protective layer and the pad. A first groove is also provided on the first step structure, and the conductive combination layer extends into the first groove.

2. The bump package structure according to claim 1, characterized in that: The first groove penetrates the first buffer layer, so that the conductive composite layer contacts the pad through the first groove.

3. The bump package structure according to claim 2, characterized in that: The conductive combination layer includes a conductive adhesive layer, a conductive barrier layer and a conductive wetting layer, the conductive adhesive layer is arranged in the first conductive opening, and simultaneously covers the pad, the first buffer layer and the local position of the first protective layer, and the conductive adhesive layer extends to the first groove, the conductive barrier layer is arranged on the conductive adhesive layer, the conductive wetting layer is arranged on the conductive barrier layer, and the conductive bump is arranged on the conductive wetting layer.

4. The bump package structure according to claim 2, characterized in that: The conductive combination layer includes a conductive wiring layer, a conductive adhesive layer, a conductive barrier layer and a conductive wetting layer. The conductive wiring layer is arranged in the first conductive opening and partially covers the surface of the first protective layer, and the conductive wiring layer extends to the first groove. The surface of the first protective layer is also provided with a second buffer layer that at least partially covers the conductive wiring layer. The surface of the second buffer layer is also covered with a second protective layer. A second conductive opening is provided on the second protective layer. The second conductive opening penetrates the second protective layer and the second buffer layer and exposes the conductive wiring layer. The conductive adhesive layer is arranged in the second conductive opening and simultaneously covers the local positions of the conductive wiring layer, the second buffer layer and the second protective layer. The conductive barrier layer is arranged on the conductive adhesive layer, the conductive wetting layer is arranged on the conductive barrier layer, and the conductive bump is arranged on the conductive wetting layer.

5. The bump package structure according to claim 4, characterized in that: The second buffer layer extends toward the second conductive opening portion and forms a second step structure in the second conductive opening that is connected to the second protective layer and the pad. A second groove is also provided on the second step structure, and the conductive adhesive layer extends to the second groove.

6. The bump package structure according to claim 1, characterized in that: The conductive bump includes a conductive column, a conductive anti-expansion layer and a conductive welding cap. The conductive column is arranged on the conductive combination layer, the conductive welding cap is arranged at an end of the conductive column away from the chip, and the conductive anti-expansion layer is arranged between the conductive welding cap and the conductive column to prevent mutual diffusion between the conductive welding cap and the conductive column.

7. The bump package structure according to claim 6, characterized in that: The conductive bump further includes an anti-spreading wetting layer, and the anti-spreading wetting layer is arranged between the conductive anti-spreading layer and the conductive welding cap.

8. The bump package structure according to claim 1, characterized in that: The thermal expansion coefficient of the first buffer layer is smaller than the thermal expansion coefficient of the first protection layer.

9. The bump package structure according to claim 1, characterized in that: The first buffer layer is made of photosensitive material, and the first protective layer is made of photoresistive material.

10. The bump package structure according to claim 1, characterized in that: The first buffer layer is made of a conductive metal material, and the first buffer layer is electrically connected to the conductive composite layer and the pad at the same time.

11. The bump package structure according to claim 10, characterized in that: An electroplating opening is provided at the edge of the chip, the first buffer layer extends to the electroplating opening, and a side wall of the first buffer layer is exposed to the electroplating opening, and the electroplating opening is used to form an electroplating lead.

12. The bump package structure according to any one of claims 1 to 8, characterized in that: A third groove is also formed on the first buffer layer. The third groove is spaced apart from the first conductive opening, and the first protection layer extends to the third groove.

13. The bump package structure according to any one of claims 1 to 8, characterized in that: The edge of the first buffer layer is spaced apart from the edge of the chip, and the first protection layer extends to the edge region of the chip, so that the cutting path of the chip is away from the first buffer layer.

14. A method for preparing a bump package structure, used for preparing the bump package structure according to any one of claims 1 to 13, characterized in that: include: Providing a chip with a pad; forming a first buffer layer at least partially covering the pad on one side of the chip; Disposing a first protective layer on the first buffer layer; Opening holes in the first protective layer and the first buffer layer in sequence by using an exposure and development process to form a first conductive opening, wherein the first conductive opening penetrates the first protective layer and the first buffer layer and exposes the pad; forming a conductive composite layer in the first conductive opening; forming a conductive bump on the conductive composite layer; The first buffer layer extends toward the first conductive opening portion and forms a first step structure connected to the first protective layer and the pad in the first conductive opening. A first groove is also provided on the first step structure, and the conductive combination layer extends to the first groove.

15. The method for preparing a bump package structure according to claim 14, characterized in that: The step of opening holes in the first protective layer and the first buffer layer by sequentially using an exposure and development process comprises: Using a photomask to expose a predetermined opening position on the protective layer corresponding to the pad; The exposed area is removed by using a developer to form a first transition opening with a top opening width of W2, a bottom opening width of W1, and a slope of S1; Using a photomask to perform secondary exposure on a predetermined opening position on the protective layer corresponding to the pad; The exposed area is removed by a developer to form a second transition opening with a top opening width of W4, a bottom opening width of W3, and a slope of S2; Using a photolithography process to make a hole at a predetermined hole position corresponding to the pad on the buffer layer; Among them, S2>S1, and W1<W3<W2<W4.

Citation Information

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