Load control device with overcurrent protection circuit

Abstract

The present disclosure relates to load control devices with overcurrent protection circuitry. A load control device for controlling power delivered from an alternating current power source to a power load can include a controllably conductive device, a control circuit, and an overcurrent protection circuit configured to be disabled when the controllably conductive device is non-conductive. The control circuit can be configured to control the controllably conductive device to be non-conductive at the beginning of each half cycle of the AC power source and to be conductive during each half cycle at a firing time (e.g., using forward phase control dimming techniques). The overcurrent protection circuit can be configured to render the controllably conductive device non-conductive when an overcurrent condition occurs in the controllably conductive device. The overcurrent protection circuit can be disabled when the controllably conductive device is non-conductive and enabled after the firing time at which the controllably conductive device is rendered conductive during each half cycle.

Description

[0001] This application is a divisional application of the invention patent application filed on June 8, 2018, with application number 201880047104.4 and invention title "Load Control Device with Overcurrent Protection Circuit".

[0002] Cross-references to related applications

[0003] This application claims priority to U.S. Provisional Patent Application No. 62 / 517,484, filed June 9, 2017, the entire disclosure of which is incorporated herein by reference. Background Technology

[0004] Existing load control devices (such as dimmer switches) can be connected in series between an alternating current (AC) power source and a lighting load to control the amount of power delivered from the AC power source to the lighting load. A standard dimmer switch typically includes a bidirectional semiconductor switch, such as a silicon controlled rectifier (SCR) (e.g., a bidirectional SCR) or two field-effect transistors (FETs) connected in anti-series. The bidirectional semiconductor switch can be connected in series between the AC power source and the load and is controlled to be conductive and non-conductive during a portion of half a cycle of the AC power supply, thus controlling the amount of power delivered to the electrical load. Generally, dimmer switches can use forward phase control dimming techniques or reverse phase control dimming techniques to control when the bidirectional semiconductor switch is conductive and non-conductive, thereby controlling the power delivered to the load. The dimmer switch may include a toggle actuator for turning the lighting load on and off and an intensity adjustment actuator for adjusting the intensity of the lighting load. Examples of prior art dimmer switches are described in more detail in the following cases: jointly assigned U.S. Patent No. 5,248,919, entitled “LIGHTING CONTROL DEVICE,” issued September 29, 1993; and U.S. Patent No. 6,969,959, entitled “ELECTRONIC CONTROLSYSTEMS AND METHODS,” issued November 29, 2005; the entire disclosures of the above cases are incorporated herein by reference.

[0005] To save energy, high-efficiency lighting loads (such as light-emitting diode (LED) light sources) are being used to replace or supersede conventional incandescent or halogen lamps. Compared to incandescent and halogen lamps, high-efficiency light sources typically consume less power and offer a longer operating life. For proper illumination, load regulation circuitry (e.g., electronic dimming ballasts or LED drivers) can be connected between the AC power supply and the corresponding high-efficiency light source (e.g., compact fluorescent lamps or LED light sources) to regulate the power supplied to the high-efficiency light source. Some high-efficiency lighting loads can be integrated with the load regulation circuitry into a single housing. Such a housing may have a screw-in lamp holder that allows mechanical attachment to a standard screw-in socket and provides electrical connection to both the unenergized side of the AC power supply and the energized side of the AC power supply or the dimming energized terminal of a dimmer switch (e.g., for receiving phase control voltage).

[0006] A dimmer switch for controlling a high-efficiency light source can be connected in series between an AC power supply and a load regulation circuit for the high-efficiency light source. The load regulation circuit can control the intensity of the high-efficiency light source to a desired intensity in response to the conduction time of the bidirectional semiconductor switch of the dimmer switch. The load regulation circuit for the high-efficiency light source can have a high input impedance or an input impedance whose magnitude varies within half a cycle. When a prior art positive phase control dimmer switch is connected between the AC power supply and the load regulation circuit for the high-efficiency light source, the load regulation circuit may not be able to conduct current sufficient to exceed the rated latching current and / or holding current of the thyristor. Summary of the Invention

[0007] As described herein, a load control device for controlling the delivery of power from an alternating current (AC) power source to an electrical load may include: a controllable conductive device; control circuitry; and an overcurrent protection circuit configured to be deactivated when the controllable conductive device is non-conductive. The controllable conductive device may be adapted to be connected between the AC power source and the electrical load to control the power delivered to the electrical load. For example, the controllable conductive device may include two field-effect transistors (FETs) connected in anti-series configuration. The control circuitry may be configured to control the controllable conductive device using forward phase control dimming technology. The control circuitry may control the controllable conductive device to be non-conductive at the beginning of each half-cycle of the AC power source and to be conductive at a trigger time during each half-cycle. The overcurrent protection circuitry may be connected to the controllable conductive device and may deactivate the controllable conductive device when an overcurrent condition occurs in the controllable conductive device. The overcurrent protection circuit can be deactivated when the controllable conductive device is non-conductive, and is activated during each half-cycle after the trigger time that makes the controllable conductive device conductive.

[0008] Additionally, a method for controlling the delivery of power from an alternating current (AC) power source to an electrical load is also disclosed herein. The method may include: (1) using a positive phase control technique to control a controllable conductive device to control the power delivered to the electrical load by conducting load current through the electrical load; (2) controlling the controllable conductive device to be non-conductive at the beginning of each half-cycle of the AC power source; (3) disabling an overcurrent protection circuit, connected to the controllable conductive device and responding to the magnitude of the load current, during each half-cycle when the controllable conductive device is non-conductive; (4) making the controllable conductive device conductive at a trigger time during each half-cycle; and (5) enabling the overcurrent protection circuit after the trigger time during each half-cycle when the controllable conductive device is conductive, allowing the overcurrent protection circuit to make the controllable conductive device non-conductive when an overcurrent condition occurs in the controllable conductive device. Attached Figure Description

[0009] Figure 1 This is a simplified block diagram of an exemplary load control device (e.g., a dimmer switch) for controlling the amount of power delivered to an electrical load (such as a lighting load).

[0010] Figure 2 This is a simplified schematic diagram of another exemplary load control device, which illustrates overcurrent protection circuitry and overcurrent control circuitry.

[0011] Figure 3Explanation shown Figure 2 A simplified waveform of the operation of the load control device. Detailed Implementation

[0012] Figure 1 This is a simplified block diagram of an exemplary load control device 100 (e.g., a dimmer switch) for controlling the amount of power delivered to an electrical load (such as lighting load 102). The load control device 100 may have a connection to an alternating current (AC) power supply 104 to receive the AC mains voltage V. AC The live terminal H and the dimming live terminal DH connected to the lighting load 102.

[0013] The load control device 100 may include controllable conductive devices, such as two field-effect transistors (FETs) Q110 and Q112 that can be connected in anti-series connection between the charged terminal and the dimming charged terminal DH. The junction of the FETs may be connected to a common terminal of the circuit. The load control device 100 may include controls for controlling the FETs Q110 and Q112 to cause the load current I... 负载 The control circuit 114, such as a digital control circuit, conducts through the lighting load 102. The control circuit 114 may include one or more of the following: a processor (e.g., a microprocessor), a microcontroller, a programmable logic device (PLD), a field-programmable gate array (FPGA), an application-specific integrated circuit (ASIC), or any suitable controller or processing device. The control circuit 114 may generate a first drive signal V. DR1 Second drive signal V DR2 The first driving signal and the second driving signal can be coupled to the gates of the corresponding FETs Q110 and Q112 via the first gate driving circuit 116 and the second gate driving circuit 118, respectively, to generate a gate voltage V at the gate of the FET. G1 V G2 For example, the first gate voltage V G1 Second gate voltage V G2 It can be the corresponding drive signal V DR1 V DR2 The inversion of the phase. When the controllable conductor is made conductive during the positive half-cycle of AC power supply 104, the load current I can be made... 负载 Conduction occurs through the drain-source channel of the first FET Q110 and the body diode of the second FET Q112. When the controllable conductive device is made conductive during the negative half-cycle of the AC power supply 104, the load current I can be increased. 负载 Conduction occurs through the drain-source channel of the second FET Q112 and the body diode of the first FET Q110.

[0014] Control circuit 114 can receive a zero-crossing control signal V, representing the zero-crossing point of the AC trunk voltage of AC power supply 104, from zero-crossing detection circuit 120. ZC The control circuit 114 can be configured to use phase-controlled dimming techniques (e.g., forward phase-controlled dimming and / or reverse phase-controlled dimming) to make FETs Q110 and Q112 conductive and / or non-conductive at a predetermined time (e.g., at the trigger time or trigger angle) relative to the zero-crossing point of the AC waveform to generate a phase-controlled voltage V. PC Examples of dimmers are described in more detail in the following cases: U.S. Patent No. 7,242,150, issued July 10, 2007, entitled “DIMMER HAVING APOWER SUPPLY MONITORING CIRCUIT”; U.S. Patent No. 7,546,473, issued June 9, 2009, entitled “DIMMER HAVING A MICROPROCESSOR-CONTROLLEDPOWER SUPPLY”; and U.S. Patent No. 8,664,881, issued March 4, 2014, entitled “TWO-WIREDIMMER SWITCH FOR LOW-POWER LOADS”, the entire disclosures of which are incorporated herein by reference.

[0015] The load control device 100 may include a power supply 122. The power supply 122 can generate a direct current (DC) power supply voltage V for powering the control circuit 114 and other low-voltage circuitry of the load control device 100. CC Power supply 100 can be connected in parallel with a series combination of FETs Q110 and Q112. Power supply 122 can be configured to conduct charging current through lighting load 102 to generate DC supply voltage V. CC .

[0016] The load control device 100 may further include an overcurrent protection circuit 130, which may be connected across the series combination of FETs Q110 and Q112 to receive the voltage generated across the FETs. The voltage generated across the series combination of FETs Q110 and Q112 may vary with the load current I. 负载 The magnitude and on-resistance R of the conductive FET DS-导通 And the forward voltage drop of the body diode of the non-conductive FET changes accordingly. Therefore, the voltage formed across the controllable conductive device (e.g., across a series combination of FETs Q110 and Q112) can represent the load current I. 负载 The value of the overcurrent protection circuit 130. 负载The response is to a quantity of (e.g., to a quantity of voltage formed across the terminals of a controllable conductive device, which may indicate the load current I) 负载 The overcurrent protection circuit 130 can be electrically connected to the gates of FETs Q110 and Q112 to control FETs Q110 and Q112 in the event of an overcurrent condition. For example, the overcurrent protection circuit 130 can be configured to reduce the gate voltage V by shorting the gates of the respective FETs Q110 and Q112 to the common terminal of the circuit. G1 V G2 The value is controlled to be approximately zero volts.

[0017] Control circuit 114 can be connected to overcurrent protection circuit 130 to enable and disable overcurrent protection circuit 130. For example, control circuit 114 can generate an enable control signal V for enabling and disabling overcurrent protection circuit 130. 启用 When control circuit 114 uses forward phase control dimming technology to control FETs Q110 and Q112, control circuit 114 can be configured to disable overcurrent protection circuit 130 during each half-cycle of AC power supply 104 when the controllable conductive device is non-conductive (e.g., when one of FETs Q110 and Q112 is made non-conductive to prevent the load current I from flowing). Overcurrent protection circuit 130 can be disabled during each half-cycle when the controllable conductive device is non-conductive to prevent it from tripping during each half-cycle when the controllable conductive device is conductive (e.g., at trigger time or trigger angle). After control circuit 114 controls one of FETs Q110 and Q112 to make controllable conductive device 100 conductive, the phase control voltage V... PC The value can change from approximately zero volts to approximately AC trunk voltage V during the switching period (e.g., the rise time and / or the on time). AC The magnitude of the quantity. In addition, the control circuit 114 can be configured to delay the activation of the overcurrent protection circuit 130 during a delay period after the time when one of the controllable conductive devices Q110 and Q112 is made conductive during each half-cycle, for example, to allow the FET to become fully conductive during the switching period.

[0018] Although Figure 1Two FETs, Q110 and Q112, are shown, but these two FETs can be replaced by a single FET in a full-wave rectifier bridge. In this implementation, control circuitry 114 can generate a single drive voltage to produce a single gate voltage at the gate of the FET in the bridge. Overcurrent protection circuitry 130 can be connected across the FET in the bridge and will respond to the voltage across the FET and thus to the current conducted through the FET. Overcurrent protection circuitry 130 can be configured to remove the gate voltage from the gate of the FET in the event of an overcurrent condition. Control circuitry 114 will be configured to deactivate the overcurrent protection circuitry during each half-cycle when the FET is non-conductive, in a manner similar to that described above.

[0019] Figure 2 Another exemplary load control device 200 is used to control the amount of power delivered to an electrical load (such as a lighting load (e.g., lighting load 102)). Figure 1 A simplified schematic diagram of the load control device 100 shown. Figure 3 A simplified waveform illustrating the operation of the load control device 200 is shown. The load control device 200 may include controllable conductive devices, such as two FETs Q210 and Q212 connected in anti-series connection between a charged terminal H (e.g., the charged terminal may be connected to an AC power source) and a dimming charged terminal DH (e.g., the dimming charged terminal may be connected to the lighting load). The junction of FETs Q210 and Q212 may be connected to a common terminal of the circuit. The load control device 200 may include control circuitry 214 (e.g., digital control circuitry) configured to use forward phase control dimming technology to control the FETs Q210 and Q212 to generate a phase control voltage V to be supplied to the lighting load. PC (For example, such as) Figure 3 The positive phase control voltage shown in the figure) and makes the load current I 负载 Conducted through the lighting load. Control circuitry 214 may include one or more of the following: a processor (e.g., a microprocessor), a microcontroller, a programmable logic device (PLD), a field-programmable gate array (FPGA), an application-specific integrated circuit (ASIC), or any suitable controller or processing device. Control circuitry 214 may be powered by a first supply voltage V. CC1 (For example, approximately 3.3 volts or 5 volts) power is drawn from the power supply of the load control device 200 (e.g., ...). Figure 1 The power supply 122 shown in the figure generates this.

[0020] The control circuit 214 can generate the first drive signal V DR1 Second drive signal VDR2 To be used at the beginning of each half-cycle during the non-conductive time period T NC The phase control voltage is controlled to be approximately zero volts, and at the end of each half-cycle, during the conduction time T... CON The phase control voltage is controlled to be approximately equal to the AC line voltage. Control circuit 214 can be configured to operate during the non-conducting time period T during the positive half-cycle. NC The first drive signal V will be internally controlled. DR1 Driven high (e.g., toward the first power supply voltage V) CC1 To make the first FET Q210 non-conductive, and during the negative half-cycle, during the non-conductive time period T... NC The second drive signal V will be internally controlled. DR2 Driven high (e.g., toward the first power supply voltage V) CC1 ) to make the first FETQ210 non-conductive (e.g., as Figure 3 (As shown in the diagram). First drive signal V DR1 Second drive signal V DR2 The gate voltage V can be generated by connecting the gates of the corresponding FETs Q210 and Q212 via the first gate drive circuit 216 and the second gate drive circuit 218, respectively. G1 V G2 The corresponding drive signal V is applied to the common terminal of the circuit. DR1 V DR2 When the drive is low, the first gate drive circuit 216 and the second gate drive circuit 218 can be directed toward the second power supply voltage V. CC2 (For example, approximately 12 volts) pull up the gates of the corresponding FETs Q210 and Q212 (e.g., Figure 3 (As shown in the diagram). At gate voltage V G1 V G2 When driven to a voltage higher than the FET's rated gate threshold voltage, FETs Q210 and Q212 can be made conductive.

[0021] The load control device 200 may further include an overcurrent protection circuit 230, which may be connected across the series combination of FETs Q210 and Q212 to receive the voltage formed across the FETs. The overcurrent protection circuit 230 may include two resistors R231 and R232, which may be connected across the series combination of FETs Q210 and Q212. The junction of resistors R231 and R232 may be connected to a common terminal of the circuit via a sensing resistor R234, such that the series combination of the first resistor R231 and the sensing resistor R234 may be connected in parallel with the drain-source junction of the first FET Q210, and the series combination of the second resistor R232 and the sensing resistor R234 may be connected in parallel with the drain-source junction of the second FET Q212. The sensing resistor R234 may be connected across the base-emitter junction of transistor Q236 (e.g., an NPN bipolar junction transistor (BJT)). The collector of transistor Q236 can be connected to the gate of the first FET Q210 via diode D238 and to the gate of the second FET Q212 via diode D239.

[0022] When the controllable conductive device is conducting, under overcurrent conditions (e.g., if the load current I...), 负载 If the current exceeds the overcurrent threshold, the overcurrent protection circuit 230 can make FETs Q210 and Q212 non-conductive. For example, the overcurrent protection circuit 230 can control the gate voltage V towards the common terminal of the circuit. G1 V G2 The controlled conductive device is deconductive by setting a value (e.g., a voltage controlled to be less than the rated gate threshold voltage of the FET) to make the two FETs nonconductive. The overcurrent threshold can be set such that the overcurrent protection circuit 230 does not deconduct FETs Q210 and Q212 during normal operation (e.g., even during conduction of inrush current when the lighting load is first turned on). For example, the overcurrent threshold can be set such that if the load current I... 负载 If the current exceeds approximately 70 amps, the overcurrent protection circuit 230 makes FETs Q210 and Q212 non-conductive. Additionally, the overcurrent protection circuit 230 can generate an overcurrent feedback signal, which indicates an overcurrent condition and can be received by the control circuit 214, which can be configured to control the gate voltage V in response to the overcurrent feedback signal. G1 V G2 This makes FETs Q210 and Q212 non-conductive.

[0023] When the first FET Q210 is made conductive, if the load current I flowing through the first FET Q210...负载 If the current exceeds the overcurrent threshold, the overcurrent protection circuit 230 can make FETs Q210 and Q212 non-conductive. The load current I is conducted through the drain-source channel of the first FET Q210. 负载 At that time, the voltage formed across the series combination of the first resistor R231 and the sensing resistor R234 can vary with the load current I. 负载 The magnitude and the on-resistance R of the first FET Q210 DS-导通1 And it changes. When the load current I 负载 When the value of the current increases during overcurrent conditions, the voltage across the first FET Q210 is attributed to the on-resistance R. DS-导通1 However, it may increase significantly. Because the body diode of the second FET Q212 is connected across the second resistor R232 and the sensing resistor R234, the voltage across the second FET Q212 will not significantly affect the voltage across the sensing resistor R236 during overcurrent conditions. When the load current I... 负载 When the current exceeds the overcurrent threshold, the voltage across the sensing resistor R234 may exceed the rated base-emitter voltage of transistor Q236, potentially making transistor Q236 conductive. Therefore, the gate of the first FET Q210 can be pulled down towards the common terminal of the circuit via the first diode D238 and transistor Q236, thus making the first FET Q210 non-conductive. Since the first FET Q210 is non-conductive, the voltage across FETs Q210 and Q212 can be approximately equal to the AC line voltage V. AC This allows transistor Q236 to remain conductive and first FET Q210 to remain non-conductive (e.g., until the AC mains voltage V). AC The value drops to zero volts at the next zero crossover.

[0024] The overcurrent protection circuit 230 can operate in a similar manner in response to an overcurrent condition in the second FET Q212. The load current I is conducted through the drain-source channel of the second FET Q212. 负载 At that time, the voltage formed across the series combination of the second resistor R232 and the sensing resistor R234 can vary with the load current I. 负载 The magnitude of the second FET Q212's on-resistance R DS-导通2 And it changes. When the load current I 负载 When the current exceeds the overcurrent threshold, the voltage across the second FET Q212 is attributed to the on-resistance R. DS-导通2This could significantly increase the voltage across the sensing resistor R234, potentially causing the voltage across the transistor Q236 to exceed its rated base-emitter voltage and making Q236 conductive. The gate of the second FET Q212 can be pulled down towards the common terminal of the circuit via the second diode D239 and the transistor Q236, thus making the second FET Q212 non-conductive. Since the second FET Q212 is non-conductive, the voltage across FETs Q210 and Q212 can be approximately equal to the AC line voltage V. AC This allows transistor Q236 to remain conductive and the second FET Q212 to remain non-conductive (e.g., until the AC mains voltage V). AC The value drops to zero volts at the next zero crossover.

[0025] The control circuit 214 can be connected to the overcurrent protection circuit 230 via the overcurrent control circuit 240 to enable and disable the overcurrent protection circuit 230. The overcurrent control circuit 240 can receive the first drive signal V. DR1 Second drive signal V DR2 It can also generate an enable control signal V for enabling and disabling the overcurrent protection circuit 230. 启用 The control circuit 240 may include two diodes D241 and D242, which are connected to receive a first drive signal V respectively. DR1 Second drive signal V DR2 The anode and cathode are connected together. The junction of diodes D241 and D242 can be connected to the base of transistor Q244 (e.g., an NPN bipolar junction transistor) via a resistor-capacitor (RC) circuit with resistor R246 and capacitor R248. An enable control signal V can be generated at the collector of transistor Q244. 启用 The collector can be connected to the base of transistor Q236 in the overcurrent protection circuit 230. Additionally, the control circuit 214 can generate an enable control signal V. 启用 (For example, at the output pin), making it possible that the overclocking circuit 240 is not needed.

[0026] When facing the power supply voltage V CC The first drive signal V DR1 Or the second drive signal V DR2 When the drive is high, capacitor C248 can be charged via diodes D241 and D242 and resistor R246. When the voltage across capacitor C248 exceeds the rated base-emitter voltage of transistor Q244, the transistor becomes conductive, thus enabling the control signal V towards the circuit's common terminal. 启用 Drop down. When the control signal V is enabled. 启用When the value is low, to prevent the transistor Q236 of the overcurrent protection circuit 230 from conducting, the overcurrent protection circuit is disabled. This is because the first drive signal V... DR1 Second drive signal V DR2 The FETs Q210 and Q212 are driven high, making them non-conductive. Therefore, when FETs Q210 and Q212 are non-conductive, the overcurrent protection circuit 230 is disabled.

[0027] When the first drive signal V DR1 Second drive signal V DR2 When one of the drive signals is driven low, causing the corresponding FETs Q210 and Q212 to conduct, a first delay period T can be initiated from the time the corresponding drive signal is driven low. 延迟1 Then the overcurrent protection circuit 230 is activated (e.g., as...). Figure 3 (As shown in the diagram). For example, the RC circuit of the overclocking circuit 240 can provide a first delay period T. 延迟1 (For example, the time required for capacitor C248 to discharge to a certain extent, at which point the voltage across the base-emitter junction of transistor Q244 drops below the rated base-emitter voltage). First delay period T 延迟1 This could be, for example, about 60 microseconds, which is likely longer than the switching period of FETs Q210 and Q212. Similarly, it could be from the first drive signal V... DR1 Second drive signal V DR2 The second delay period T begins when one of them is driven high, causing the corresponding FETs Q210 and Q212 to be non-conductive. 延迟2 (For example, approximately 60 microseconds) after which the overcurrent protection circuit 230 is deactivated.

[0028] If at the beginning of each half-cycle, when the controllable conductive device is non-conductive (e.g., when one or both of FETs Q210 and Q212 are non-conductive), the control circuit 214 will activate the overcurrent protection circuit 230, then the voltage across the controllable conductive device can be approximately equal to the AC mains voltage V. AC This may cause the overcurrent protection circuit 230 to reduce the gate voltage V at the gate of the corresponding FETs Q210 and Q212. G1 V G2 Pull down toward the common terminal of the circuit. Therefore, control circuit 214 will be unable to pull down the gate voltage V. G1 V G2The voltage is driven to a level higher than the rated gate threshold voltage of FETs Q210 and Q212, and therefore FETs Q210 and Q212 will not be able to conduct at the trigger time. Therefore, control circuit 214 can be configured to disable overcurrent protection circuit 230 when the controllable conducting device is non-conductive, to prevent overcurrent protection circuit 230 from controlling the gate voltage V of FETs Q210 and Q212. G1 V G2 Until the controllable conductive device is made conductive at the trigger time during each half-cycle (e.g., until the first delay period T). 延迟1 after).

Claims

1. A dimmer switch for controlling power delivered from an AC power source to a lighting load, the dimmer switch comprising: A controllable conductive device, the controllable conductive device being adapted to be connected between the AC power supply and the lighting load to conduct load current through the power load to control the amount of power delivered to the lighting load and the intensity of the lighting load; A control circuit configured to use positive phase control dimming technology to control the controllable conductive device to adjust the intensity of the lighting load, the control circuit being configured to control the controllable conductive device to be non-conductive at the beginning of each half-cycle of the AC power supply and to make the controllable conductive device conductive at a trigger time during each half-cycle. as well as An overcurrent protection circuit is connected to the controllable conductive device and configured to make the controllable conductive device non-conductive when an overcurrent condition occurs in the controllable conductive device; The overcurrent protection circuit is configured to receive an enable control signal to disable the overcurrent protection circuit when the controllable conductive device is non-conductive and to enable the overcurrent protection circuit during each half-cycle after the trigger time that makes the controllable conductive device conductive.

2. The dimmer switch of claim 1, wherein the controllable conductive device comprises a first field-effect transistor FET and a second field-effect transistor FET connected in anti-series connection.

3. The dimmer switch as described in claim 2, further comprising: A first gate drive circuit is connected to receive a first drive signal from the control circuit and generate a first gate voltage at the gate of the first FET. as well as A second gate drive circuit is connected to receive a second drive signal from the control circuit and generate a second gate voltage at the gate of the second FET.

4. The dimmer switch as described in claim 3, further comprising: An overcurrent control circuit is configured to generate the enable control signal, which is received by the overcurrent protection circuit for enabling and disabling the overcurrent protection circuit.

5. The dimmer switch of claim 4, wherein the overcurrent protection circuit is configured to receive the drive signal from the control circuit and to disable the overcurrent protection circuit when at least one of the FETs is controlled to be non-conductive to make the controllable conductive device non-conductive.

6. The dimmer switch of claim 5, wherein the overcurrent protection circuit is configured to enable the overcurrent protection circuit during each half-cycle after a first delay period following the trigger time from which at least one of the FETs is controlled to conduct to make the controllable conductive device conduct.

7. The dimmer switch of claim 6, wherein the overcurrent protection circuit is configured to deactivate the overcurrent protection circuit during each half-cycle after a second delay period following the time from which at least one of the FETs is controlled to be non-conductive to make the controllable conductive device non-conductive.

8. The dimmer switch of claim 3, wherein the overcurrent protection circuit is coupled to the gates of the first FET and the second FET to make the FET non-conductive in the event of the overcurrent condition.

9. The dimmer switch of claim 2, wherein the overcurrent protection circuit is connected across the series assembly of the FETs and configured to detect the overcurrent condition in response to a voltage generated across the series assembly of the FETs.

10. The dimmer switch of claim 9, wherein the magnitude of the voltage generated across the FET represents the magnitude of the load current.

11. The dimmer switch of claim 9, wherein the magnitude of the voltage generated across the series combination of the FETs depends on the respective on-resistance of each of the FETs.

12. The dimmer switch as claimed in claim 1, further comprising: An overcurrent control circuit is configured to generate the enable control signal, which is received by the overcurrent protection circuit for enabling and disabling the overcurrent protection circuit.

13. The dimmer switch of claim 12, wherein the overcurrent protection circuit is configured to enable the overcurrent protection circuit during each half-cycle after a first delay period starting from the trigger time that makes the controllable conductive device conductive.

14. The dimmer switch of claim 13, wherein the overcurrent protection circuit is configured to deactivate the overcurrent protection circuit after a second delay period following the time at which the controllable conductive device becomes non-conductive during each half-cycle.

15. The dimmer switch of claim 1, wherein the controllable conductive device comprises a field-effect transistor (FET) in a full-wave rectifier bridge.

16. The dimmer switch of claim 15, wherein the overcurrent protection circuit is connected across the FET and configured to detect the overcurrent condition in response to a voltage generated across the FET.

17. The dimmer switch of claim 1, wherein the overcurrent protection circuit is configured to make the controllable conductive device non-conductive if the magnitude of the load current exceeds an overcurrent threshold.

18. The dimmer switch of claim 1, wherein the control circuit is configured to generate the enable control signal, the enable control signal being received by the overcurrent protection circuit for enabling and disabling the overcurrent protection circuit.

19. The dimmer switch as claimed in claim 1, further comprising: A zero-crossing detection circuit, configured to generate a zero-crossing control signal representing the zero-crossing point of the AC line voltage generated by the AC power supply; The control circuit is configured to receive the zero-crossing control signal and make the controllable conductive device conductive at the trigger time of each half-cycle relative to the zero-crossing point of the AC line voltage determined from the zero-crossing signal.

20. The dimmer switch as claimed in claim 1, further comprising: A power source, configured to generate a power supply voltage for powering the control circuitry, is connected in parallel with the controllable conductive device and configured to conduct charging current through the lighting load to generate the power supply voltage.

21. A load control device, the load control device comprising: Controllable conductive device; An overcurrent protection circuit is provided for detecting overcurrent conditions across the controllable conductive device. as well as A control circuit, operably connected to the controllable conductive device and the overcurrent protection circuit, is used for: The controllable conductive device transitions between a conductive state and a non-conductive state to provide a phase-controlled AC output, such that each AC half-cycle is divided into a conductive portion and a non-conductive portion. and The overcurrent protection circuit is enabled during the conductive portion of each AC half-cycle and disabled during the non-conductive portion of each AC half-cycle.

22. The load control device of claim 21, wherein the control circuit further comprises: During the conductive portion of each AC half-cycle, the activation of the overcurrent protection circuit is delayed for a first delay period after the controllable conductive device is switched to a conductive state.

23. The load control device of claim 22, wherein the control circuit further comprises: During the non-conductive portion of each AC half-cycle, the deactivation of the overcurrent protection circuit is delayed by a second delay period after the controllable conductive device is switched to a non-conductive state.

24. The load control device of claim 21, wherein, in order to switch the controllable conductive device between a conductive state and a non-conductive state, the control circuit further: To operatively connect a first gate drive circuit to a first field-effect transistor (FET) included in the controllable conductive device, so as to switch the first FET between a conductive state and a non-conductive state; and The second gate drive circuit is operatively connected to the second FET included in the controllable conductive device, wherein the first FET and the second FET are connected in an anti-series connection.

25. The load control device of claim 24, wherein the control circuitry further responds to receiving from the overcurrent protection circuit a signal including data indicating an overcurrent condition across the controllable conductive device: The first gate drive voltage is set to a level that puts the first FET into a non-conductive state; and The second gate drive voltage is set to a level that puts the second FET into a non-conductive state.

26. A load control method, the load control method comprising: A controllable conductive device operatively connected to the control circuitry, which switches between conductive and non-conductive states, provides a phase-controlled AC output such that each AC half-cycle is divided into conductive and non-conductive portions. and The overcurrent protection circuit is activated during the conductive portion of each AC half-cycle and deactivated during the non-conductive portion of each AC half-cycle via a control circuit, the overcurrent protection circuit being operatively connected to the control circuit and the controllable conductive device.

27. The load control method as described in claim 26, further comprising: Through the control circuit, during the conductive portion of each AC half-cycle, the activation of the overcurrent protection circuit is delayed for a first delay period after the controllable conductive device is switched to a conductive state.

28. The load control method of claim 27, further comprising: Through the control circuit, during the non-conductive portion of each AC half-cycle, the deactivation of the overcurrent protection circuit is delayed by a second delay period after the controllable conductive device is switched to a non-conductive state.

29. The load control method of claim 26, wherein the controllable conductive device for switching between a conductive state and a non-conductive state further comprises: The control circuit enables the first gate drive circuit to be operatively connected to the first field-effect transistor (FET) included in the controllable conductive device, so as to switch the first FET between a conductive state and a non-conductive state. as well as The control circuit enables the second gate drive circuit to be operatively connected to the second FET included in the controllable conductive device, wherein the first FET and the second FET are connected in an anti-series connection.

30. The load control method as described in claim 29, further comprising: In response to the control circuit receiving a signal from the overcurrent protection circuit including data indicating overcurrent conditions across the controllable conductive device: The control circuit sets the first gate drive voltage to a level that puts the first FET in a non-conductive state. and The control circuit sets the second gate drive voltage to a level that puts the second FET in a non-conductive state.

31. A load control device for controlling the delivery of power from an AC power source to an electrical load, the load control device comprising: A controllable conductive device, the controllable conductive device being adapted to be connected between the AC power source and the electrical load to conduct load current through the electrical load in order to control the power delivered to the electrical load; A control circuit configured to control the controllable conductive device to be non-conductive at the beginning of each half-cycle of the AC power supply and to make the controllable conductive device conductive at a trigger time during each half-cycle. as well as An overcurrent protection circuit is connected to the controllable conductive device and configured to make the controllable conductive device non-conductive when an overcurrent condition occurs in the controllable conductive device; The control circuit is configured to generate an enable control signal to disable the overcurrent protection circuit when the controllable conductive device is non-conductive and to enable the overcurrent protection circuit during each half-cycle after the trigger time that makes the controllable conductive device conductive.

32. The load control device of claim 31, wherein the controllable conductive device comprises a first field-effect transistor FET and a second field-effect transistor FET connected in an anti-series connection.

33. The load control device of claim 32, wherein the control circuit is configured to control the FET using a forward phase control dimming technique.

34. The load control device of claim 33, wherein the control circuit is configured to disable the overcurrent protection circuit when at least one of the FETs is controlled to be non-conductive, thereby deactivating the controllable conductive device.

35. The load control device of claim 34, wherein the control circuitry is configured to enable the overcurrent protection circuitry during each half-cycle after a first delay period following the start of the trigger time from which at least one of the FETs is controlled to conduct, thereby enabling the controllable conductive device to conduct.

36. The load control device of claim 35, wherein the control circuitry is configured to deactivate the overcurrent protection circuitry during each half-cycle after a second delay period following the time from which at least one of the FETs is controlled to be non-conductive to make the controllable conductive device non-conductive.

37. The load control device of claim 32, wherein the control circuit is configured to generate a first drive signal and a second drive signal for controlling the first FET and the second FET, respectively.

38. The load control device as claimed in claim 37, further comprising: A first gate drive circuit is connected to receive a first drive signal from the control circuit and generate a first gate voltage at the gate of the first FET. as well as A second gate drive circuit is connected to receive a second drive signal from the control circuit and generate a second gate voltage at the gate of the second FET.

39. The load control device of claim 38, wherein the overcurrent protection circuit is coupled to the gates of the first FET and the second FET to make the FET non-conductive in the event of the overcurrent condition.

40. The load control device of claim 32, wherein the overcurrent protection circuit is connected across the controllable conductive device and configured to detect the overcurrent condition in response to the respective on-resistance of each of the FETs.

41. The load control device of claim 40, wherein the magnitude of the voltage generated across the FET represents the magnitude of the load current.

42. The load control device of claim 40, wherein the magnitude of the voltage generated across the series combination of the FETs depends on the respective on-resistance of each of the FETs.

43. The load control device of claim 31, wherein the controllable conductive device comprises a field-effect transistor (FET) in a full-wave rectifier bridge.

44. The load control device of claim 43, wherein the control circuit is configured to control the FET using a forward phase control dimming technique.

45. The load control device of claim 44, wherein the control circuit is configured to disable the overcurrent protection circuit when the FET is controlled to be non-conductive.

46. ​​The load control device as claimed in claim 43, wherein, The control circuit is configured to generate a single drive signal to produce a single gate voltage at the gate of the FET in the bridge, so as to make the FET conductive.

47. The load control device of claim 46, wherein the overcurrent protection circuit is coupled to the gate of the FET to make the FET non-conductive in the event of the overcurrent condition.

48. The load control device of claim 43, wherein the overcurrent protection circuit is connected across the FET and configured to detect the overcurrent condition in response to a voltage generated across the FET.

49. The load control device of claim 48, wherein the magnitude of the voltage generated across the FET represents the magnitude of the load current.

50. The load control device of claim 31, wherein the overcurrent protection circuit is configured to make the controllable conductive device non-conductive if the magnitude of the load current exceeds an overcurrent threshold.

Images