Chip and Its Preparation Method
By cutting the silicon carbide rod into multiple thin substrate sheets and setting an auxiliary layer on each substrate sheet to prevent breakage and finally remove the auxiliary layer, the problem of high cost of SiC sheet is solved, and the effect of reducing chip manufacturing costs is achieved.
Patent Information
- Application Number
- CN202011450019.8
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Filing Date
- 2020-12-09
- Publication Date
- 2025-07-18
- Estimated Expiration
- 2040-12-09
AI Technical Summary
The cost of SiC sheets accounts for a large part of the manufacturing cost, mainly because the SiC ingots grow slowly and the thickness of cutting each sheet is thick, resulting in high chip costs.
The silicon carbide rod is cut into a plurality of thin substrate sheets, and an auxiliary layer is provided on each thin substrate sheet to form a composite sheet to prevent the thin substrate sheet from being broken during processing, and finally the auxiliary layer is removed to obtain a chip with a thin thickness.
By increasing the number of silicon carbide substrate sheets and reducing the thickness of the chip, the manufacturing cost of the chip is effectively reduced.
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Figure CN114613663B_ABST
Abstract
Description
Technical Field
[0001] The embodiments of the present invention relate to the technical field of chip manufacturing, and in particular, to a method for preparing a chip and a chip prepared by using the preparation method. Background Art
[0002] SiC (silicon carbide) is a suitable substrate material for industrial production of power semiconductor devices. After the process problems are solved, the price has become an important factor affecting the popularization of SiC devices. Among them, the cost of SiC wafers accounts for a large part of the manufacturing cost.
[0003] The main reason is that the growth rate of SiC ingots is very slow, about 5 cm per week. Therefore, the thickness of each cut SiC directly affects the cost of SiC chips. As Figure 1 shown, on the premise of meeting the chip manufacturing process, the thickness of the SiC wafers 2 that can be cut from the existing SiC ingot 1 is relatively thick, increasing the manufacturing cost of the chips. Summary of the Invention
[0004] The embodiments of the present invention provide a method for preparing a chip, which can effectively reduce the manufacturing cost of the chip.
[0005] In order to solve the above technical problems, the present invention is implemented as follows:
[0006] In a first aspect, the embodiments of the present invention provide a method for preparing a chip, including the following steps:
[0007] S1. Cut a silicon carbide rod into a plurality of silicon carbide substrate wafers, and the thickness of each silicon carbide substrate wafer is less than a first set value;
[0008] S2. Set an auxiliary layer on at least one side of the silicon carbide substrate wafer to obtain a composite wafer, and the total thickness of the composite wafer is greater than a second set value, and the second set value is greater than the first set value;
[0009] S3. Process the composite wafer to obtain a chip;
[0010] S4. Remove the auxiliary layer on the chip.
[0011] Further, the first set value is less than 200 μm.
[0012] Further, the second set value is 200 μm - 350 μm.
[0013] Further, step S2 includes:
[0014] S21. Bond the auxiliary layer on one side of the silicon carbide substrate wafer to obtain the composite wafer;
[0015] S22. Grind the composite sheet to adjust its thickness, flatness and roughness.
[0016] Further, the auxiliary layer is a polycrystalline silicon carbide layer or an alumina layer.
[0017] Further, step S2 includes:
[0018] S21'. After mixing the auxiliary materials, perform tape casting on the carbon surface of the silicon carbide substrate wafer;
[0019] S22'. Sinter the silicon carbide substrate wafer to form the auxiliary layer on the carbon surface of the silicon carbide substrate wafer, obtaining the composite sheet;
[0020] S23'. Grind the composite sheet to adjust its thickness, flatness and roughness.
[0021] Further, the auxiliary materials are: a mixture obtained by mixing silicon carbide powder or alumina powder as the aggregate, adding clay and polyvinyl alcohol.
[0022] Further, step S2 includes:
[0023] S21". Set an adhesive on the carbon surface of the silicon carbide substrate wafer;
[0024] S22". Bond the auxiliary layer to the carbon surface of the silicon carbide substrate wafer;
[0025] S23". Sinter the silicon carbide substrate wafer to obtain the composite sheet;
[0026] S24". Grind the composite sheet to adjust its thickness, flatness and roughness.
[0027] Further, the adhesive is: a mixture obtained by mixing silicon carbide powder or alumina powder as the aggregate, adding clay and polyvinyl alcohol, and the auxiliary layer is a polycrystalline silicon carbide layer or an alumina layer.
[0028] In a second aspect, an embodiment of the present invention provides a chip, which is prepared by the preparation method described in the above embodiment.
[0029] In the embodiment of the present invention, by cutting a silicon carbide ingot into a plurality of thin substrate wafers, and setting an auxiliary layer on each thin substrate wafer to obtain a composite sheet, preventing the thin substrate wafers from being broken during the processing, and finally processing the composite sheet to obtain a silicon carbide chip and then removing the auxiliary layer to obtain a silicon carbide chip with a relatively thin thickness, effectively reducing the cost of chip manufacturing. Description of the Drawings
[0030] By reading the following detailed description of the preferred embodiments, various other advantages and benefits will become apparent to those of ordinary skill in the art. The drawings are only for the purpose of illustrating the preferred embodiments and are not to be considered as limiting the present invention. Also, throughout the drawings, the same reference numerals are used to denote the same components. In the drawings:
[0031] Figure 1 It is a schematic diagram of cutting a silicon carbide rod in the method for preparing a chip of the prior art;
[0032] Figure 2 It is a process flow chart of the method for preparing a chip according to an embodiment of the present invention;
[0033] Figure 3 It is a flow block diagram of the method for preparing a chip according to an embodiment of the present invention.
[0034] Reference numerals:
[0035] Silicon carbide rod 10;
[0036] Silicon carbide substrate wafer 20;
[0037] Auxiliary layer 30;
[0038] Chip 40. Specific embodiments
[0039] Next, the technical solutions in the embodiments of the present invention will be clearly and completely described in conjunction with the drawings in the embodiments of the present invention. Obviously, the described embodiments are part of the embodiments of the present invention, rather than all of the embodiments. All other embodiments obtained by those of ordinary skill in the art based on the embodiments of the present invention without making creative efforts belong to the scope of protection of the present invention.
[0040] Next, the method for preparing a chip according to an embodiment of the present invention will be described according to the drawings and in conjunction with specific embodiments.
[0041] The method for preparing a chip according to an embodiment of the present invention includes the following steps:
[0042] S1. Cut the silicon carbide rod into a plurality of silicon carbide substrate wafers, and the thickness of each silicon carbide substrate wafer is less than a first set value;
[0043] S2. Set an auxiliary layer on at least one side of the silicon carbide substrate wafer to obtain a composite wafer, and the total thickness of the composite wafer is greater than a second set value, and the second set value is greater than the first set value;
[0044] S3. Process the composite wafer to obtain a chip;
[0045] S4. Remove the auxiliary layer on the chip.
[0046] Specifically, refer toFigure 2 and Figure 3 In the method for preparing a chip according to an embodiment of the present invention, first, a silicon carbide rod 10 can be cut into a plurality of silicon carbide substrate wafers 20. The silicon carbide rod 10 is a silicon carbide (SiC) ingot, and the silicon carbide ingot is a single-crystal silicon carbide. The thickness of each silicon carbide substrate wafer 20 can be less than a first set value, so that as many and as thin substrate wafers as possible can be cut from the same silicon carbide rod 10. Since the growth rate of the SiC ingot is very slow, about 5 cm per week, the thinner the thickness of each cut piece, the lower the cost of the prepared SiC chip 40.
[0047] Then, an auxiliary layer 30 is disposed on at least one side of the silicon carbide substrate wafer 20. One side of the silicon carbide substrate wafer 20 can be used as an epitaxial wafer (EPI). The auxiliary layer 30 and the thin silicon carbide substrate wafer 20 can be combined to obtain a composite wafer. The total thickness of the composite wafer is greater than a second set value, and the second set value is greater than the first set value. That is, the thickness of the silicon carbide substrate wafer 20 after combination is increased, which can effectively prevent the thin silicon carbide substrate wafer 20 from being directly processed after cutting and being broken during the processing.
[0048] Next, the composite wafer can be processed by MOSFET (MOSFET: Metal - Oxide - Semiconductor Field - Effect Transistor) technology to obtain the chip 40. Finally, the auxiliary layer 30 on the chip 40 can be removed. The obtained chip 40 is thin and has a complete overall structure without breakage. By using the preparation method of the present invention, more and thinner silicon carbide substrate wafers 20 can be cut from the same silicon carbide rod 10, so as to prepare more and thinner chips 40, effectively reducing the preparation cost of the chips 40.
[0049] It should be noted that in the present application, the silicon carbide rod 10 can be a rod - shaped structure or other silicon carbide ingots that can be cut into silicon carbide substrate wafers 20. The structure and working principle of cutting the silicon carbide rod 10 into the silicon carbide substrate wafers 20, as well as the control method for the cutting thickness of the silicon carbide substrate wafers 20, are understandable and easy to implement for those skilled in the art, so they will not be described in detail herein.
[0050] Accordingly, in the embodiments of the present invention, by cutting the silicon carbide rod 10 into a plurality of thin silicon carbide substrate wafers 20, more and thinner silicon carbide substrate wafers 20 can be cut from the same silicon carbide rod 10. Then, an auxiliary layer 30 is provided on each thin silicon carbide substrate wafer 20 to obtain a composite wafer, increasing the thickness of the silicon carbide substrate wafer 20 and preventing the thin silicon carbide substrate wafer 20 from breaking during the processing. Finally, after processing the composite wafer to obtain the silicon carbide chip 40, the auxiliary layer 30 is removed to obtain a silicon carbide chip 40 with a relatively thin thickness. This method is simple and feasible, and can effectively reduce the manufacturing cost of the chip 40.
[0051] According to an embodiment of the present invention, the first set value is less than 200 μm. The second set value is 200 μm - 350 μm.
[0052] That is to say, as Figure 2 shown, the thickness of the silicon carbide substrate wafer 20 cut from the single-crystal silicon carbide rod 10 can be less than 200 μm. Preferably, the thickness of the silicon carbide substrate wafer 20 is 100 μm or thinner, ensuring that as many silicon carbide substrate wafers 20 as possible can be cut from the silicon carbide rod 10, so that more chips 40 can be fabricated from the same silicon carbide rod 10, reducing the manufacturing cost of the chip 40. The cut silicon carbide substrate wafer 20 can be compounded with an auxiliary layer 30, and the total thickness of the silicon carbide substrate wafer 20 and the auxiliary layer 30 can be 200 μm - 350 μm.
[0053] It should be noted that for the existing silicon carbide substrate wafer 20, under the premise that the flatness TTV (total thickness variation), roughness and other values can meet the manufacturing requirements of the chip 40, the standard thickness of the silicon carbide substrate wafer 20 after standard grinding is 350 μm. If the thickness of the silicon carbide substrate is less than 350 μm, it is easy to cause the silicon carbide substrate to break during the subsequent process manufacturing.
[0054] In this application, by thickening the cut thinner silicon carbide substrate, it is ensured that the total thickness of the silicon carbide substrate wafer 20 and the auxiliary layer 30 can meet the requirements of the subsequent chip 40 manufacturing process. Finally, the auxiliary layer 30 is removed from the fabricated chip 40 by etching or other methods, making the fabricated chip 40 thinner, ensuring that more chips 40 can be fabricated from a single silicon carbide ingot, thereby effectively reducing the manufacturing cost of the chip 40.
[0055] Next, the method of setting the auxiliary layer 30 on the silicon carbide substrate wafer 20 will be described in detail.
[0056] In some specific embodiments of the present invention, step S2 includes:
[0057] S21. Bond the auxiliary layer 30 on one side of the silicon carbide substrate wafer 20 to obtain a composite wafer;
[0058] S22. Grind the composite wafer to adjust its thickness, flatness, and roughness.
[0059] That is to say, in the method for manufacturing the chip of the present invention, the auxiliary layer 30 can be bonded to the silicon carbide substrate wafer 20 to obtain a composite wafer, and then the composite wafer is ground to adjust its thickness, flatness, and roughness to ensure that the total thickness of the composite wafer (the silicon carbide substrate wafer 20 and the auxiliary layer 30) is 350 μm.
[0060] Optionally, in the present application, the auxiliary layer 30 can be a polycrystalline silicon carbide layer or an alumina layer. Single-crystal SiC increases the number of silicon carbide substrate wafers 20 cut from the silicon carbide rod 10 by means of Bonding. By using the standard Bonding method, a high-temperature resistant material is Bonded on the single-crystal SiC, and then standard grinding is performed to adjust the thickness (350 um, the current standard thickness of the SiC substrate wafer), flatness TTV (total thickness variation), roughness, etc. of the composite wafer so as to meet the manufacturing requirements of the chip 40 and prevent the silicon carbide substrate wafer 20 from being damaged during the manufacturing process.
[0061] At the same time, the auxiliary layer 30 Bonded on the silicon carbide substrate wafer 20 can be made of the same or different materials, such as polycrystalline silicon carbide, alumina and other high-temperature resistant materials, to ensure that the synthetic material (composite wafer) can withstand semiconductor processes with temperatures higher than 1800 °C. By adopting the manufacturing method of the present application, more and thinner silicon carbide substrate wafers 20 can be cut from the same silicon carbide rod 10, so as to manufacture more and thinner chips 40, effectively reducing the manufacturing cost of the chips 40. Of course, for those skilled in the art, the Bonding process is understandable and achievable, and will not be elaborated in detail in the present application.
[0062] In some other specific embodiments of the present invention, step S2 includes:
[0063] S21'. After mixing the auxiliary materials, tape casting is performed on the carbon surface of the silicon carbide substrate wafer 20;
[0064] S22'. Sinter the silicon carbide substrate wafer 20 to form an auxiliary layer 30 on the carbon surface of the silicon carbide substrate wafer 20 to obtain a composite wafer;
[0065] S23'. Grind the composite wafer to adjust its thickness, flatness, and roughness.
[0066] That is to say, in the method for preparing the chip of the present invention, a suitable high-temperature resistant material can also be used to thicken the silicon carbide substrate wafer 20 by means of tape casting or multiple CVD. The high-temperature resistant material can be an auxiliary material obtained by mixing silicon carbide powder or alumina powder as the aggregate with clay and polyvinyl alcohol. After mixing the auxiliary material, tape casting is performed on the carbon surface of the silicon carbide substrate wafer 20. Then, by performing high-temperature sintering on the silicon carbide substrate wafer 20, an auxiliary layer 30 is formed on the carbon surface of the silicon carbide substrate wafer 20 to obtain a composite wafer. Finally, the composite wafer is ground to adjust the thickness, flatness, and roughness of the composite wafer to obtain a 350-μm composite wafer.
[0067] Specifically, in the standard process of tape casting, silicon carbide powder or alumina powder can be used as the aggregate, and clay and polyvinyl alcohol (PVA) with a mass fraction of 3%-8% are added for mixing. Tape casting is performed on the carbon surface of the silicon carbide substrate to form an auxiliary layer 30 with a thickness of approximately 200-600 μm. Then, high-temperature sintering is performed at a temperature of 800°C-1400°C. After sintering is completed, a 350-μm composite wafer can be obtained through standard grinding. In the subsequent manufacturing process of the chip 40, after removing the auxiliary layer 30 on the composite wafer by means of etching, etc., a chip 40 with a thickness within 100 μm can be obtained.
[0068] By adopting the preparation method of the present application, more and thinner silicon carbide substrate wafers 20 can be cut from the same silicon carbide rod 10, so as to prepare more and thinner chips 40, effectively reducing the preparation cost of the chips 40. Of course, the process principle of tape casting is understandable and achievable by those skilled in the art, and will not be elaborated in detail in the present application.
[0069] In some specific embodiments of the present invention, step S2 includes:
[0070] S21”: Set an adhesive on the carbon surface of the silicon carbide substrate wafer 20;
[0071] S22”: Bond the auxiliary layer 30 to the carbon surface of the silicon carbide substrate wafer 20;
[0072] S23”: Sinter the silicon carbide substrate wafer 20 to obtain a composite wafer;
[0073] S24”: Grind the composite wafer to adjust its thickness, flatness, and roughness.
[0074] In other words, in the method for preparing the chip of the present invention, the auxiliary layer 30 can also be compounded on the silicon carbide substrate through an adhesive.
[0075] Specifically, first, an adhesive can be coated on the carbon surface of the silicon carbide substrate wafer 20, and then the auxiliary layer 30 is bonded to the carbon surface of the silicon carbide substrate wafer 20, and the silicon carbide substrate wafer 20 is sintered to obtain a composite wafer. Finally, the composite wafer is ground to adjust its thickness, flatness and roughness to ensure that a 350-μm composite wafer can be obtained.
[0076] The adhesive can be a mixture obtained by mixing silicon carbide powder or alumina powder as the aggregate, clay and polyvinyl alcohol. The auxiliary layer 30 can be prepared from materials such as a polycrystalline silicon carbide layer or an alumina layer that can withstand temperatures higher than 2000 °C. By using silicon carbide powder or alumina powder as the aggregate, adding clay and 3%-8% by mass of polyvinyl alcohol (PVA) and mixing them as the adhesive, materials such as polycrystalline silicon carbide and alumina are bonded to the carbon surface of the silicon carbide substrate wafer 20 and subjected to high-temperature sintering. The temperature of the high-temperature sintering can reach above 1700 °C. After sintering is completed, standard grinding is carried out to adjust the thickness, flatness and roughness of the composite wafer to obtain a 350-μm composite wafer.
[0077] In the subsequent manufacturing process of the chip 40, after the auxiliary layer 30 on the composite wafer is removed by means such as etching, a chip 40 with a thickness within 100 μm can be obtained. By adopting the preparation method of the present application, more and thinner silicon carbide substrate wafers 20 can be cut from the same silicon carbide rod 10, thereby preparing more and thinner chips 40, effectively reducing the preparation cost of the chips 40.
[0078] In summary, in the embodiment of the present invention, by cutting the silicon carbide ingot into multiple thin substrate wafers, and setting an auxiliary layer 30 on each thin substrate wafer to obtain a composite wafer, preventing the thin substrate wafers from being broken during the processing, and finally processing the composite wafer to obtain the silicon carbide chip 40 and then removing the auxiliary layer 30 to obtain a thinner silicon carbide chip 40, effectively reducing the manufacturing cost of the chip 40.
[0079] The present invention also provides a chip 40, which is prepared by the preparation method in the above embodiment (see Figure 2 and Figure 3 ). Since the preparation method of the chip according to the embodiment of the present invention has the above technical effects, therefore, the chip 40 prepared by the preparation method of the present invention has a thinner thickness and a lower cost.
[0080] Of course, the specific preparation process of the chip 40 is understandable and achievable by those skilled in the art, and will not be elaborated in detail in the present application.
[0081] The embodiments of the present invention have been described above in conjunction with the accompanying drawings. However, the present invention is not limited to the above specific embodiments. The above specific embodiments are merely illustrative rather than restrictive. Under the inspiration of the present invention, those of ordinary skill in the art can also make many forms without departing from the spirit of the present invention and the scope protected by the claims, and all of them fall within the protection scope of the present invention.
Claims
1. A method for preparing a chip, characterized in that, It includes the following steps: S1. Cut the silicon carbide rod into a plurality of silicon carbide substrate wafers, and the thickness of each silicon carbide substrate wafer is less than a first set value; S2. Set an auxiliary layer on at least one side of the silicon carbide substrate wafer to obtain a composite wafer, and the total thickness of the composite wafer is greater than a second set value, and the second set value is greater than the first set value; S3. Process the composite wafer to obtain a chip; S4. Remove the auxiliary layer on the chip; Step S2 includes: S21'. After mixing the auxiliary materials, perform tape casting on the carbon surface of the silicon carbide substrate wafer; S22'. Sinter the silicon carbide substrate wafer to form the auxiliary layer on the carbon surface of the silicon carbide substrate wafer to obtain the composite wafer; S23'. Grind the composite wafer to adjust its thickness, flatness and roughness; Mixing the auxiliary materials includes: using silicon carbide powder or alumina powder as the aggregate, adding clay and polyvinyl alcohol with a mass fraction of 3%-8% for mixing.
2. The method for preparing a chip according to claim 1, wherein The first set value is less than 200μm.
3. The method for preparing a chip according to claim 1, characterized in that, The second set value is 200μm - 350μm.
4. The method for preparing a chip according to claim 1, wherein Step S2 includes: S21. Bond the auxiliary layer on one side of the silicon carbide substrate wafer to obtain the composite wafer; S22. Grind the composite wafer to adjust its thickness, flatness and roughness.
5. The manufacturing method of the chip according to claim 4, characterized in that, The auxiliary layer is a polycrystalline silicon carbide layer or an alumina layer, and the temperature resistance of the auxiliary layer is greater than 2000°C.
6. The method for preparing a chip according to claim 1, wherein The auxiliary materials are: a mixture obtained by using silicon carbide powder or alumina powder as the aggregate, adding clay and polyvinyl alcohol for mixing.
7. The method for preparing a chip according to claim 1, wherein Step S2 includes: S21". Set an adhesive on the carbon surface of the silicon carbide substrate wafer; S22". Bond the auxiliary layer to the carbon surface of the silicon carbide substrate wafer; S23". Sinter the silicon carbide substrate wafer to obtain the composite wafer; S24". Grind the composite wafer to adjust its thickness, flatness and roughness.
8. The method for preparing a chip according to claim 7, wherein, The adhesive is: a mixture obtained by using silicon carbide powder or alumina powder as the aggregate, adding clay and polyvinyl alcohol for mixing, and the auxiliary layer is a polycrystalline silicon carbide layer or an alumina layer.
9. A chip, characterized in that, The chip is prepared by the preparation method according to any one of claims 1-8.
Citation Information
Patent Citations
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