Silicon carbide power device with anode metal covering junction surface etch termination
By designing an etching terminal for silicon carbide power devices with an anode metal-covered junction surface, the problem of electric field concentration on the surface of silicon carbide power devices was solved, improving the breakdown voltage and breakdown efficiency, and enhancing the stability and avalanche turn-on speed of the devices.
Patent Information
- Application Number
- CN202210109325.8
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Filing Date
- 2022-01-28
- Publication Date
- 2025-11-04
- Estimated Expiration
- 2042-01-28
AI Technical Summary
Existing silicon carbide power devices suffer from surface electric field concentration and stability degradation, especially at negative angles where the electric field is greater than the bulk electric field, and the doping concentration gradient and etching angle have a significant impact.
Design an etching terminal for silicon carbide power devices with an anode metal-covered junction surface, including a p+ epitaxial layer, a base region, an N+ substrate, a SiO2 passivation layer, a back electrode, and a front electrode. By using a trapezoidal step structure and the negative corner of the anode metal coverage, the potential of the electric field concentration point is changed, thereby reducing the surface electric field.
It improves the breakdown voltage and breakdown efficiency of the device, enhances the device's operational reliability and avalanche on-start speed, reduces the concentration gradient at negative angles, and improves the longitudinal uniformity of the electric field.
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Figure CN114613862B_ABST
Abstract
Description
TECHNICAL FIELD
[0001] The present application belongs to the technical field of semiconductor, and particularly relates to a kind of anode metal covering junction surface silicon carbide power device etching terminal. BACKGROUND
[0002] DAS (Diode Avalanche Shaper) is a kind of semiconductor short-circuit switch diode, which has high efficiency, high reliability, long continuous working time and small volume, and is usually used as a key device in UWB (Ultra Wide Band) pulse signal source.
[0003] Due to the theoretical limit of silicon material, silicon-based DAS cannot meet the requirements of most several kilovolts or even several tens of kilovolts pulse systems. Silicon carbide material has higher band gap, saturation drift velocity, thermal conductivity, critical breakdown field and radiation resistance than silicon material, so that the performance of silicon carbide-based DAS device is better than that of silicon-based DAS.
[0004] The prior art expands the space charge region by adding various surface terminals outside the device cell to improve the breakdown efficiency of the silicon carbide power device. For example, the commonly used plane terminal represented by JTE and FLR. Although these surface terminals improve the device, there is still a problem of surface electric field concentration. Therefore, the technical personnel need to continuously adjust the terminal to design to improve the breakdown efficiency, and ion implantation is needed. These processes will introduce additional defects and are greatly affected by interface charge.
[0005] The prior art proposes a kind of inclined surface etching terminal. This etching terminal does not need ion implantation, but a "positive angle" and a "negative angle" are formed on the surface of the silicon carbide power device at the same time. The surface electric field at the negative angle is greater than the bulk electric field, and the device is greatly affected by the doping concentration gradient and etching angle at this place, and the stability performance decreases. SUMMARY
[0006] In order to solve the above problems existing in the prior art, the present application provides a kind of anode metal covering junction surface silicon carbide power device etching terminal. The technical problem to be solved by the present application is solved by the following technical scheme:
[0007] In the first aspect, the present application provides a kind of anode metal covering junction surface silicon carbide power device etching terminal, which comprises:
[0008] p+ epitaxial layer 1, base region 2, N+ substrate 3, SiO2 passivation layer 4, back electrode 5 and front electrode 6;
[0009] The base region 2 is located on the N+ substrate 3, and the P+ epitaxial layer 1 is located on the base region 2. The P+ epitaxial layer 1, the base region 2 and the N+ substrate 3 form a trapezoidal step structure from bottom to top. The front electrode 6 covers the inner part of the upper surface of the P+ epitaxial layer 1 and the base region 2. The N+ substrate 3 is provided with a step surface, which makes the upper part of the N+ substrate 3 form a trapezoidal structure and the lower part form a rectangular structure. The SiO2 passivation layer 4 wraps the outer part of the base region 2 and the trapezoidal step surface of the N+ substrate 3 from the outer part of the base region 2 which is not covered by the front electrode 6 and from top to bottom. The back electrode 5 is located on the lower surface of the lower part of the rectangular structure of the N+ substrate 3.
[0010] The base region 2 comprises a P- base region and an N- base region. The metal for depositing the back electrode 5 and the front electrode 6 comprises Ti and Ni.
[0011] Optionally, the N+ substrate 3 comprises a first step surface and a second step surface. The first step surface is in contact with the lower surface of the base region 2. The second step surface is located on the two sides of the trapezoidal structure and the rectangular structure. The SiO2 passivation layer 4 wraps the N+ substrate 3 from top to bottom until it completely wraps the second step surface, exposing the part below the second step surface of the N+ substrate 3.
[0012] In the second aspect, the application provides a preparation method of an etching terminal of a silicon carbide power device with an anode metal covering the junction surface, which comprises the following steps:
[0013] Step 1: obtaining an N+ substrate 3;
[0014] Step 2: growing a base region 2 on the surface of the N+ substrate 3 by a CVD method;
[0015] Step 3: growing a P+ epitaxial layer 1 on the surface of the base region 2 by a CVD method;
[0016] Step 4: etching the outer peripheral edge of the base region 2 and part of the N+ substrate 3, so that the base region 2 and the N+ substrate 3 form a trapezoidal step structure, and etching the step surface of the N+ substrate 3, so that the upper part of the N+ substrate 3 forms a trapezoidal structure and the lower part forms a rectangular structure;
[0017] Step 5: etching the outer edge of the epitaxial layer 1 and part of the base region 2, so as to form a step on the upper surface of the base region 2;
[0018] Step 6: growing a SiO2 passivation layer 4 on the step surface of the N+ substrate 3 from bottom to top, until the SiO2 passivation layer 4 wraps the etched outer part of the base region 2 and the step surface of the N+ substrate 3;
[0019] Step 7: depositing metal on the lower surface of the lower part of the rectangular structure of the N+ substrate 3 to form a back electrode 5, and depositing metal on the upper surface of the P+ epitaxial layer 1 to cover the upper surface of the P+ epitaxial layer 1 and the etched inner part of the base region 2, thereby forming a front electrode 6.
[0020] The growth temperature of the base region 2 is 1600-1900 DEG C, the growth temperature of the P+ epitaxial layer 1 is 1600-1900 DEG C, and the metal deposited in step 7 includes Ti and Ni.
[0021] Optionally, the preparation method further comprises: annealing the back electrode 5 and the front electrode 6; the annealing temperature is 400-1000 DEG C; and the base region 2 comprises a P-base region and an N-base region.
[0022] The present application has the following beneficial effects:
[0023] The present application provides a kind of anode metal covering junction surface's silicon carbide power device etching terminal, the anode metal covering junction surface's silicon carbide power device etching terminal prepared includes p+ epitaxial layer 1, base region 2, N+ substrate 3, SiO2 passivation layer 4, back electrode 5 and front electrode 6;The base region 2 of the present application uses longitudinal variable-doped base region, can improve the doping concentration of base region at P+ / P- junction, reduce the concentration gradient at the negative angle of device, inhibit surface electric field, improve the working reliability of device;While reducing the doping concentration of base region at P- / N+ junction, improve the longitudinal uniformity of base region electric field, improve the avalanche opening speed of device.
[0024] The present application will be further described in detail below with reference to the drawings and embodiments. BRIEF DESCRIPTION OF DRAWINGS
[0025] Figure 1 It is a kind of anode metal covering junction surface's silicon carbide power device etching terminal provided by the embodiment of the present application schematic diagram;
[0026] Figure 2 It is the preparation flow chart of a kind of anode metal covering junction surface's silicon carbide power device etching terminal provided by the embodiment of the present application. DETAILED DESCRIPTION
[0027] The present application will be further described in detail below with reference to the drawings and embodiments.
[0028] As Figure 1 The present application provides a kind of anode metal covering junction surface's silicon carbide power device etching terminal, which includes:
[0029] p+ epitaxial layer 1, base region 2, N+ substrate 3, SiO2 passivation layer 4, back electrode 5 and front electrode 6;
[0030] The base region 2 is located on the N+ substrate 3, the p+ epitaxial layer 1 is located on the base region 2, and the p+ epitaxial layer 1, the base region 2 and the N+ substrate 3 form a trapezoidal step structure from bottom to top; the front electrode 6 covers the inner part of the upper surface of the p+ epitaxial layer 1 and the base region 2; the N+ substrate 3 is provided with a step surface, the step surface makes the upper part of the N+ substrate 3 form a trapezoidal structure, and the lower part form a rectangular structure; the SiO2 passivation layer 4 wraps the outer part of the base region 2 and the trapezoidal step surface of the N+ substrate 3 from top to bottom starting from the outer part of the base region 2 which is not covered by the front electrode 6, and the back electrode 5 is located on the rectangular lower surface of the N+ substrate 3.
[0031] The base region 2 comprises a P- base region and an N- base region. The metal for depositing the back electrode 5 and the front electrode 6 comprises Ti and Ni.
[0032] Reference Figure 1 The N+ substrate 3 comprises a first step surface and a second step surface, the first step surface is in contact with the lower surface of the base region 2, and the second step surface is located on the two sides of the contact between the trapezoidal structure and the rectangular structure; the SiO2 passivation layer 4 wraps the N+ substrate 3 from top to bottom until the second step surface is completely wrapped, and the part below the second step surface of the N+ substrate 3 is exposed.
[0033] The present application provides a kind of silicon carbide power device etching terminal of anode metal covering junction surface, including p+ epitaxial layer 1, base region 2, N+ substrate 3, SiO2 passivation layer 4, back electrode 5 and front electrode 6;The present application uses the etching terminal of anode metal covering junction surface at negative angle, changes the potential at electric field concentration point, so the present application can reduce the surface electric field of device, improves the breakdown voltage and breakdown efficiency of device.
[0034] As Figure 2 shown, the preparation method of the present application provides a kind of silicon carbide power device etching terminal of anode metal covering junction surface, including:
[0035] Step 1: obtain N+ substrate 3;
[0036] Step 2: grow base region 2 on the surface of N+ substrate region 3 by CVD method;
[0037] The base region 2 comprises a P- base region and an N- base region.
[0038] Step 3: grow P+ epitaxial layer 1 on the surface of base region 2 by CVD method;
[0039] Step 4: etch the outer peripheral edge of base region 2 and part of N+ substrate region 3, so that P+ epitaxial layer 1, base region 2 and N+ substrate 3 form a trapezoidal step structure, and etch the step surface of N+ substrate 3, so that the upper part of N+ substrate 3 forms a trapezoidal structure, and the lower part forms a rectangular structure;
[0040] Step 5: etching away the outer edges of the epitaxial layer 1 and part of the base region 2 to form a step on the upper surface of the base region 2;
[0041] Step 6: growing a SiO2 passivation layer 4 from bottom to top on the step surface of the N+ substrate 3 until the SiO2 passivation layer 4 wraps the etched outer part of the base region 2 and the step surface of the N+ substrate 3;
[0042] Step 7: depositing metal on the lower surface of the lower part of the rectangular structure of the N+ substrate 3 to form a back electrode 5, and depositing metal on the upper surface of the P+ epitaxial layer 1 to cover the upper surface of the P+ epitaxial layer 1 and the etched inner part of the base region 2 to form a front electrode 6.
[0043] In the step, the growth temperature for growing the base region 2 is 1600-1900℃, the growth temperature for growing the P+ epitaxial layer 1 is 1600-1900℃, and the metal deposited in step 7 includes Ti and Ni.
[0044] After the deposition of the metal to form the back electrode 5 and the front electrode 6, the preparation method provided by the application further comprises: annealing the back electrode 5 and the front electrode 6, and the annealing temperature is 400-1000℃.
[0045] The preparation method for the anode metal covering junction surface silicon carbide power device etching terminal provided by the application, the prepared anode metal covering junction surface silicon carbide power device etching terminal comprises a P+ epitaxial layer 1, a base region 2, an N+ substrate 3, a SiO2 passivation layer 4, a back electrode 5 and a front electrode 6; the anode metal covers the PN junction side and the upper surface of the base region 2 after the secondary etching, and compared with the prior art, the anode metal covering negative angle junction surface design method can change the potential at the electric field concentration point, so that the surface electric field of the device can be reduced, and the breakdown voltage and the breakdown efficiency of the device can be improved.
[0046] The above is the further detailed description of the application in combination with the specific preferred embodiments, and the specific implementation of the application cannot be limited to these descriptions. For those skilled in the art to which the application belongs, some simple deductions or replacements can be made without departing from the concept of the application, and all of them shall be regarded as falling within the protection scope of the application.
Claims
1. An etch termination for a silicon carbide power device having an anode metal covered junction surface, comprising: Comprise: p+ epitaxial layer (1), base region (2), N+ substrate (3), SiO2 passivation layer (4), back electrode (5) and front electrode (6); The base region (2) is located on the N+ substrate (3), the p+ epitaxial layer (1) is located on the base region (2), the p+ epitaxial layer (1), base region (2) and N+ substrate (3) are trapezoidal step structure from bottom to top; The front electrode (6) covers the p+ epitaxial layer (1) and the inner part of the upper surface of the base region (2); The N+ substrate (3) is provided with a step surface on the outer side, the step surface makes the upper part of the N+ substrate (3) trapezoidal and the lower part rectangular; The SiO2 passivation layer (4) is wrapped from the outer side of the base region (2) which is not covered by the front electrode (6) upward, and the outer side of the base region (2) and the trapezoidal step surface of the N+ substrate (3) are wrapped; The back electrode (5) is located on the rectangular lower surface of the N+ substrate (3).
2. The etch termination of a silicon carbide power device with an anode metal covered junction surface of claim 1, wherein, The base region (2) comprises P-base region and N-base region.
3. The etch termination of a silicon carbide power device with an anode metal covered junction surface of claim 1, wherein, The metal deposited to form the back electrode (5) and the front electrode (6) comprises Ti and Ni.
4. The etch termination of a silicon carbide power device with an anode metal covered junction surface of claim 1, wherein, The N+ substrate (3) comprises a first step surface and a second step surface, the first step surface is in contact with the lower surface of the base region (2), and the second step surface is located on both sides of the trapezoidal and matrix contact; The SiO2 passivation layer (4) wraps the N+ substrate (3) from top to bottom until it completely wraps the second step surface, exposing the part below the second step surface of the N+ substrate (3).
5. A method for fabricating an etch termination for a silicon carbide power device with an anode metal covering the junction surface, characterized by, The preparation method comprises: Step 1: obtaining N+ substrate (3); Step 2: growing base region (2) on the surface of N+ substrate region (3) by CVD method; Step 3: growing P+ epitaxial layer (1) on the surface of the base region (2) by CVD method; Step 4: etching the outer peripheral edge of the base region (2) and part of the N+ substrate region (3) to make the base region (2) and the N+ substrate (3) trapezoidal step structure, and etching the step surface of the N+ substrate (3) to make the upper part of the N+ substrate (3) trapezoidal structure and the lower part rectangular structure; Step 5: etching the outer edge of the epitaxial layer (1) and part of the base region (2) to form a step on the upper surface of the base region (2); Step 6: growing SiO2 passivation layer (4) on the step surface of the N+ substrate (3) from bottom to top until the SiO2 passivation layer (4) wraps the etched outer side of the base region (2) and the step surface of the N+ substrate (3); Step 7: depositing metal on the lower part of the rectangular structure of the lower surface of the N+ substrate (3) to form the back electrode (5), and depositing metal on the upper surface of the P+ epitaxial layer (1) to cover the upper surface of the P+ epitaxial layer (1) and the etched inner side of the base region (2) to form the front electrode (6).
6. The method of claim 5, wherein the method further comprises: The growth temperature of the base region (2) is 1600-1900℃.
7. The method of claim 5, wherein the method further comprises: forming a passivation layer on the surface of the silicon carbide wafer. The growth temperature of the P+ epitaxial layer (1) is 1600-1900℃.
8. The method of claim 5, wherein the method further comprises: The metal deposited in step 7 comprises Ti and Ni.
9. The method of claim 5, wherein the method further comprises: forming a passivation layer on the surface of the silicon carbide wafer. The preparation method further comprises: The back electrode (5) and the front electrode (6) are annealed. The annealing temperature is 400-1000°C.
10. The method of claim 5, wherein the method further comprises: The base region (2) comprises a P-base region and an N-base region.
Citation Information
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