A design method for an asymmetric stacked PCB board and a PCB board

By adjusting the proportion of the semi-cured sheet and controlling the stress during the pressing process, the problem of abnormal warpage of asymmetric stacked PCB boards is solved, and the warpage control and welding quality are improved.

CN114615834BActive Publication Date: 2024-12-20DELTON TECH (GUANGZHOU) INC
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Patent Information

Application Number
CN202210375200.X
Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
Filing Date
2022-04-11
Publication Date
2024-12-20
Estimated Expiration
2042-04-11

AI Technical Summary

Technical Problem

Asymmetric stacked PCB boards are prone to abnormal warping after pressing, resulting in dummy welding problems.

Method used

By adjusting the proportion of the semi-cured sheet, ensure that the total shrinkage of the upper and lower laminated structures is equal. The combination of hot pressing and cold pressing is used to control the warpage within the preset value, and the drilling and baking are carried out and electroplating is performed. Control stress during solder mask baking, etc. to reduce warping problems.

Benefits of technology

It effectively reduces the warping problem of asymmetric stacked PCB boards, improves the quality of PCB boards, ensures the satisfaction of welding requirements, and reduces the difficulty of processing.

✦ Generated by Eureka AI based on patent content.

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Abstract

The present invention discloses a design method of an asymmetric stacked PCB board and a PCB board, wherein the design method of the asymmetric stacked PCB board comprises the following steps: step S100, providing a copper clad plate, a prepreg and a copper foil, and superimposing the copper clad plate, the prepreg and the copper foil to form an asymmetric laminated structure; step S200, laminating the asymmetric laminated structure; step S300, after laminating, measuring the warpage of the asymmetric laminated structure; step S400, if the warpage exceeds a preset warpage, repeating steps S100 to S300, and in step S100, adjusting the proportion of the prepreg in the asymmetric laminated structure until the warpage is less than or equal to the preset warpage. The present invention designs the asymmetric laminated structure, measures the warpage of the asymmetric laminated structure after lamination, and if the warpage exceeds the preset warpage, controls the proportion of the prepreg to adjust the asymmetric laminated structure, and controls the warpage within the preset warpage, thereby avoiding the problem of warping of the PCB board.
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Description

Technical Field

[0001] The present invention relates to the field of PCB manufacturing, and in particular to a design method for an asymmetric stacked PCB board and a PCB board. Background Art

[0002] Printed Circuit Board (PCB) is abbreviated as PCB, which is the support of electronic components and the carrier of electrical connection. PCB includes copper clad laminate, copper foil and prepreg. Copper clad laminate includes core board and copper foil arranged on both sides of core board. Core board is used as dielectric layer and copper foil is used as circuit layer, that is, each copper clad laminate has two circuit layers. The laminated structure of multi-layer PCB can be divided into upper laminated structure and lower laminated structure according to the number of circuit layers, that is, the number of circuit layers of upper laminated structure and lower laminated structure is the same. When the copper foil thickness, core board thickness and copper foil type of upper laminated structure and lower laminated structure are symmetrically arranged in vertical direction, and the type, number and glue content of prepreg are also symmetrically arranged in vertical direction, the PCB is called symmetrical laminated PCB. When at least one copper clad laminate, prepreg or copper foil in upper laminated structure and lower laminated structure is asymmetrically arranged, the PCB is called asymmetric laminated PCB.

[0003] In order to reduce the cost of PCB boards, the stacked structure of PCB boards usually adopts mixed pressing. When the PCB board is an asymmetric stacked PCB board, and the asymmetric stacking design of the PCB board is defective, after pressing, the asymmetric stacked PCB board is prone to abnormal warping, resulting in problems such as cold solder joints after the PCB board is mounted and soldered. Summary of the invention

[0004] An object of the present invention is to provide a design method for an asymmetric stacked PCB board, which is simple to operate and can effectively solve the problem of warping of the asymmetric stacked PCB board after pressing.

[0005] Another object of the present invention is to provide a PCB board with a simple structure that can effectively solve the problem of cold solder joints caused by abnormal warpage.

[0006] To achieve the above object, the present invention adopts the following technical solutions:

[0007] In a first aspect, a design method for an asymmetric stacked PCB board is provided, comprising the following steps:

[0008] Step S100, providing a copper clad laminate, a prepreg and a copper foil, and stacking the copper clad laminate, the prepreg and the copper foil to form an asymmetric laminate structure;

[0009] Step S200, laminating the asymmetric laminated structure;

[0010] Step S300, after lamination, measuring the warpage of the asymmetric laminated structure;

[0011] Step S400: If the warpage exceeds a preset warpage, repeating steps S100 to S300, and in step S100, adjusting the proportion of the prepregs in the asymmetric laminate structure until the warpage is less than or equal to a preset warpage.

[0012] As a preferred solution of the design method of the asymmetric stacked PCB board, the copper clad laminate is made of resin, glass cloth and copper foil; the prepreg is made of the resin and the glass cloth.

[0013] As a preferred solution of the design method of an asymmetric stacked PCB board, step S100 includes:

[0014] Step S101, providing different types of the resin, different types of the glass cloth and different types of the copper foil, and performing shrinkage tests on all the resins, the glass cloth and the copper foil respectively, and establishing a database;

[0015] Step S102, establishing a design model of the asymmetric stacked structure according to the database, wherein the design model includes an upper stacked structure and a lower stacked structure arranged in a vertical direction, the upper stacked structure and the lower stacked structure have the same number of circuit layers, and the total shrinkage of the upper stacked structure is equal to the total shrinkage of the lower stacked structure;

[0016] Step S103: stacking the copper clad laminate, the prepreg and the copper foil according to the design model to form the asymmetric laminate structure.

[0017] As a preferred solution of the design method of the asymmetric stacked PCB board, the difference percentage between the total shrinkage amount of the upper stacked structure and the total shrinkage amount of the lower stacked structure of the asymmetric stacked structure is controlled within a preset value.

[0018] As a preferred solution of the design method of an asymmetric stacked PCB board, in step S200, the stacked structure is first hot pressed and then cold pressed.

[0019] As a preferred solution for the design method of the asymmetric laminated PCB board, when cold pressing is performed, the cold pressing time is extended by 0.5 hours to eliminate the stress of the asymmetric laminated structure.

[0020] As a preferred solution for the design method of an asymmetric stacked PCB board, before hot pressing by a hot press, kraft paper or a buffer block is arranged between the asymmetric stacked structure and the hot pressing plate of the hot press.

[0021] As a preferred solution of the design method of the asymmetric stacked PCB board, after lamination, the stacked structure is subjected to drilling baking, electroplating, solder mask baking and text baking in sequence to obtain the PCB board.

[0022] As a preferred solution of the design method of an asymmetric stacked PCB board, the stress during the drilling baking, the electroplating, the solder mask baking and the text baking processes is controlled.

[0023] In a second aspect, a PCB board is provided, which is manufactured using the above-mentioned design method of an asymmetric stacked PCB board.

[0024] The beneficial effects of the present invention are as follows: in the process of designing the asymmetric laminated structure of the PCB board, the asymmetric laminated structure is firstly trial-produced, and when the warpage of the asymmetric laminated structure after lamination exceeds the preset warpage, the total shrinkage of the upper laminated structure and the total shrinkage of the lower laminated structure are kept equal by adjusting the proportion of the prepreg in the upper laminated structure or the lower laminated structure, so that the warpage of the asymmetric laminated structure after lamination can be controlled within the preset warpage, thereby reducing the warpage problem of the asymmetric laminated PCB board after manufacture and improving the quality of the manufactured PCB board. BRIEF DESCRIPTION OF THE DRAWINGS

[0025] The present invention is further described in detail below based on the accompanying drawings and embodiments.

[0026] Figure 1 The figure is a flow chart of a method for designing an asymmetric stacked PCB board according to an embodiment of the present invention.

[0027] Figure 2 It is a schematic structural diagram of the asymmetric stacked structure described in an embodiment of the present invention.

[0028] In the figure:

[0029] 1. Signal layer; 2. Ground layer; 3. Power layer; 4. Dielectric layer; 5. Prepreg. DETAILED DESCRIPTION

[0030] In order to make the technical problems solved by the present invention, the technical solutions adopted and the technical effects achieved clearer, the technical solutions of the embodiments of the present invention will be further described in detail below in conjunction with the accompanying drawings. Obviously, the described embodiments are only part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative work are within the scope of protection of the present invention.

[0031] In the description of the present invention, unless otherwise clearly specified and limited, the terms "connected", "connected", and "fixed" should be understood in a broad sense, for example, it can be a fixed connection, a detachable connection, or an integral connection; it can be a mechanical connection or an electrical connection; it can be a direct connection or an indirect connection through an intermediate medium, it can be the internal connection of two elements or the interaction relationship between two elements. For ordinary technicians in this field, the specific meanings of the above terms in the present invention can be understood according to specific circumstances.

[0032] Reference Figure 1 and Figure 2 The present invention provides a method for designing an asymmetric stacked PCB board, comprising the following steps:

[0033] Step S100, providing a copper clad laminate, a prepreg 5 and a copper foil, and sequentially stacking the copper foil, a plurality of copper clad laminates and the copper foil, and providing a prepreg 5 between the copper foil and the copper clad laminate, and between the copper clad laminates, to form an asymmetric laminate structure;

[0034] Step S200, laminating the asymmetric laminated structure;

[0035] Step S300, after lamination, measuring the warpage of the asymmetric laminated structure;

[0036] Step S400, if the warpage exceeds the preset warpage, repeating steps S100 to S300, and in step S100, adjusting the proportion of the prepreg sheets 5 of the asymmetric laminated structure until the warpage of the asymmetric laminated structure is less than or equal to the preset warpage;

[0037] Among them, refer to Figure 2 As shown, this embodiment takes a 16-layer PCB board as an example, and the asymmetric laminated structure of the 16-layer PCB board includes seven copper-clad laminates, eight prepregs 5 and two copper foils, that is, seven dielectric layers 4 and sixteen circuit layers. The asymmetric laminated structure includes an upper laminated structure and a lower laminated structure, and the upper laminated structure and the lower laminated structure are bounded by the middle dielectric layer 4. The upper laminated structure and the lower laminated structure both include eight circuit layers, and the asymmetric laminated structure is signal layer 1, ground layer 2, signal layer 1, ground layer 2, signal layer 1, ground layer 2, power layer 3, power layer 3, ground layer 2, signal layer 1, ground layer 2, signal layer 1, ground layer 2, signal layer 1, ground layer 2, signal layer 1, ground layer 2, signal layer 1, ground layer 2, signal layer 1, ground layer 2, signal layer 1, ground layer 2, signal layer 1, ground layer 2, signal layer 1, wherein the 7th and 8th layers are power layers 3, and the power layers 3 are all located in the upper laminated structure, and the copper foil thickness of the power layer 3 is greater than the copper foil thickness of other routing layers, resulting in asymmetric copper foil thickness of the upper laminated structure and the lower laminated structure, forming an asymmetric laminated structure;

[0038] In step S400, the warping of the asymmetric stacking structure is controlled within a preset warping by reducing the thickness of the semi-cured sheet 5 in the upper stacking structure; and / or increasing the thickness of the semi-cured sheet 5 in the lower stacking structure to adjust the difference between the total shrinkage of the upper stacking structure and the total shrinkage of the lower stacking structure.

[0039] Since the copper clad laminate, the prepreg 5 and the copper foil will shrink to different degrees after the asymmetric laminate structure is pressed, the warping degree of the asymmetric laminate structure after pressing is large. The total shrinkage of the three dielectric layers 4 and the four prepregs 5 in the upper laminate structure is equal to the total shrinkage of the three dielectric layers 4 and the four prepregs 5 in the lower laminate structure. After pressing, the warping degree of the asymmetric laminate structure is relatively small, which can meet the welding requirements of the PCB board.

[0040] In the design process of the asymmetric laminated structure, it is necessary to first conduct trial production of the asymmetric laminated structure. When the warpage of the asymmetric laminated structure after lamination exceeds the preset warpage, the total shrinkage of the upper laminated structure and the total shrinkage of the lower laminated structure are kept equal by adjusting the proportion of the semi-cured sheet 5 in the upper laminated structure or the lower laminated structure. The warpage of the asymmetric laminated structure after lamination can be controlled within the preset warpage, thereby reducing the warpage problem of the asymmetric laminated PCB board after manufacture and improving the quality of the manufactured PCB board.

[0041] In this embodiment, the preset warping degree is 0.02%.

[0042] Further, in step S100, the percentage difference between the total shrinkage of the upper stacking structure and the total shrinkage of the lower stacking structure is controlled within a preset value. In the actual manufacturing process, there are inevitable errors in the stacking to form an asymmetric stacking structure, and it is difficult to keep the total shrinkage of the upper stacking structure equal to the total shrinkage of the lower stacking structure. When the difference between the total shrinkage of the upper stacking structure and the total shrinkage of the lower stacking structure is within the preset value, the warpage of the asymmetric stacked PCB board after lamination is relatively small, which can avoid the problem of abnormal warping of the asymmetric stacked PCB board after lamination, so as to meet the welding requirements of the asymmetric stacked PCB board and reduce the processing difficulty of the asymmetric stacked PCB board.

[0043] In this embodiment, the preset value is 0.05%.

[0044] Specifically, step S100 includes:

[0045] Step S101, providing a plurality of different types of copper clad laminates, a plurality of different types of prepregs 5 and a plurality of different types of copper foils, and testing the shrinkage of all copper clad laminates, prepregs 5 and copper foils after lamination, and establishing a database on a computer based on the test data. By establishing the shrinkage of different types of copper clad laminates, prepregs 5 and copper foils after lamination, a data basis can be provided for establishing a design model of an asymmetric laminate structure, which facilitates accurate and rapid establishment of a design model.

[0046] Step S102: The computer performs stacking matching according to the database to establish a design model of an asymmetric stacking structure, wherein the total shrinkage of the upper stacking structure and the total shrinkage of the lower stacking structure of the design model of the asymmetric stacking structure are equal.

[0047] Step S103 , according to the design model of the asymmetric laminated structure, the copper clad laminate, the prepreg 5 and the copper foil are stacked to form an asymmetric laminated structure.

[0048] By collecting the shrinkage of various types of copper clad laminates, prepregs 5 and copper foils and establishing a database, a design model of an asymmetric laminate structure can be quickly generated, and the asymmetric laminate structure can be quickly superimposed according to the design model, and the difference percentage between the total shrinkage of the upper laminate structure and the total shrinkage of the lower laminate structure is close to the preset value, and in step S300, by fine-tuning the ratio of the prepreg 5 to the upper laminate structure and / or the lower laminate structure, the difference percentage between the total shrinkage of the upper laminate structure and the total shrinkage of the lower laminate structure can be quickly controlled within the preset value, and the trial and error time of the asymmetric laminate structure can be reduced during the design process of the asymmetric laminate structure, which is beneficial to improving the design efficiency of the PCB board, and the design model of the asymmetric laminate structure that meets the production requirements can be stored in the computer for the manufacture of the PCB board.

[0049] Furthermore, the copper clad laminate includes a core plate and copper foils arranged on both sides of the core plate, the core plate serves as a dielectric layer 4, the copper foil serves as a circuit layer, the dielectric layer 4 is mainly composed of glass cloth and resin, and the prepreg 5 is composed of glass cloth and resin. Among them, different types of glass cloth, different types of resins and different types of copper foils have different shrinkage amounts, that is, the prepreg 5 and the dielectric layer 4 are the main factors that lead to different shrinkage amounts of the copper clad laminate, the prepreg 5 and the copper foil.

[0050] Specifically, the resin includes epoxy resin, modified epoxy resin, and materials of different resin systems such as polyphenylene ether and bismaleimide; the copper foil includes HTE copper foil, RTF copper foil, HVLP copper foil, etc.; the glass cloth includes electronic grade glass cloth and low loss glass cloth, etc.

[0051] Preferably, in step S101, shrinkage tests are performed on different types of glass cloth, different types of resins and different types of copper foils, so that the shrinkage of different types of copper clad laminates, different types of prepregs 5 and different types of copper foils can be obtained. This method can improve the efficiency of shrinkage testing and facilitate the establishment of a database and the application of measurement data.

[0052] For example, in step S200, the asymmetric laminated structure is first hot pressed and then cold pressed. The asymmetric laminated structure is first hot pressed to cure the resin of the prepreg 5 by heat, and then the stress inside the asymmetric laminated structure is eliminated by cold pressing. During the hot pressing process, the resin and glass cloth of the copper clad laminate will shrink slightly, and the resin and glass cloth of the prepreg 5 will shrink significantly. Therefore, in step S400, the total shrinkage of the upper laminated structure and the lower laminated structure is controlled by adjusting the proportion of the prepreg 5, thereby reducing the warping problem of the manufactured PCB.

[0053] Furthermore, in step S400, after adjusting the ratio of the prepreg 5 to the asymmetric laminated structure, the hot press sets kraft paper or a buffer pad between the asymmetric laminated structure and the hot pressing plate of the hot press before hot pressing the asymmetric laminated structure, that is, kraft paper or a buffer pad is set at the top and bottom of the asymmetric laminated structure. The kraft paper or the buffer pad can be used as an interlayer to protect the laminated structure during the pressing process, and play a role in heat transfer buffering. Before each pressing, new kraft paper or a buffer pad needs to be used to improve the heat buffering effect, reduce the stress generated by the asymmetric laminated structure during the pressing process, and further ensure that the asymmetric laminated structure will not be deformed due to stress after pressing, and the problem of abnormal warping will not occur.

[0054] Furthermore, when the asymmetric laminated structure is cold pressed by a cold press, the cold press time of the asymmetric laminated structure is controlled by the cold press to release the stress of the asymmetric laminated structure.

[0055] Preferably, the conventional cold pressing time is extended by 0.5 h. Compared with cold pressing under conventional cold pressing time, extending the cold pressing time is beneficial to completely eliminating the stress of the asymmetric laminated structure, thereby reducing the warpage of the asymmetric laminated structure.

[0056] Preferably, after the asymmetric laminated structure is pressed together, the asymmetric laminated PCB board is manufactured through processes such as drilling baking, electroplating, solder mask baking, and text baking, wherein after the solder mask baking, a solder mask structure is formed on the top and bottom of the asymmetric laminated structure.

[0057] Specifically, the drilling baking, electroplating, solder mask baking and text baking processes are all processed and manufactured in a stress-free manner, further ensuring that the manufactured PCB board will not be deformed due to stress and have abnormal warping problems.

[0058] The present invention also provides a PCB board, which is manufactured by applying the above-mentioned design method of the asymmetric stacked PCB board. During the manufacturing process of the asymmetric stacked PCB board of the present invention, the warping degree of the PCB board can be controlled within 0.02% by selecting the PCB board material and modeling the stacked structure, and controlling the stress of the PCB board, which can effectively solve the warping problem of the PCB board, thereby avoiding the problem of cold solder joints after soldering of the PCB board.

[0059] In the description herein, it should be understood that the terms "upper", "lower", "left", "right", etc., and the like, are based on the directions or positions shown in the drawings, and are only for the convenience of description and simplified operation, and do not indicate or imply that the device or element referred to must have a specific direction, be constructed and operated in a specific direction, and therefore cannot be understood as a limitation of the present invention. In addition, the terms "first" and "second" are only used to distinguish in the description and have no special meaning.

[0060] In the description of this specification, the description with reference to the terms "an embodiment", "example", etc. means that the specific features, structures, materials or characteristics described in conjunction with the embodiment or example are included in at least one embodiment or example of the present invention. In this specification, the schematic representation of the above terms does not necessarily refer to the same embodiment or example.

[0061] In addition, it should be understood that although this specification is described according to implementation methods, not every implementation method contains only one independent technical solution. This narrative method of the specification is only for the sake of clarity. Those skilled in the art should regard the specification as a whole. The technical solutions in each embodiment may also be appropriately combined to form other implementation methods that can be understood by those skilled in the art.

[0062] The technical principle of the present invention is described above in conjunction with specific embodiments. These descriptions are only for explaining the principle of the present invention and cannot be interpreted as limiting the scope of protection of the present invention in any way. Based on the explanations herein, those skilled in the art can associate other specific implementations of the present invention without paying creative labor, and these methods will fall within the scope of protection of the present invention.

Claims

1. A design method for an asymmetric stacked PCB board, characterized in that: The following steps are involved: Step S100, providing a copper clad laminate, a prepreg and a copper foil, and stacking the copper clad laminate, the prepreg and the copper foil to form an asymmetric laminate structure, wherein the asymmetric laminate structure includes an upper laminate structure and a lower laminate structure; Step S200, laminating the asymmetric laminated structure; Step S300: After lamination, measuring the warpage of the asymmetric laminated structure; Step S400: if the warpage exceeds a preset warpage, repeating steps S100 to S300, and in step S100, adjusting the proportion of the prepregs in the asymmetric laminate structure until the warpage is less than or equal to a preset warpage; By adjusting the proportion of the prepreg in the upper stacking structure or the lower stacking structure, the total shrinkage of the upper stacking structure and the total shrinkage of the lower stacking structure are kept equal, and the warping of the asymmetric stacking structure after lamination can be controlled within a preset warping.

2. The design method of an asymmetric stacked PCB board according to claim 1, characterized in that: The copper-clad laminate is made of resin, glass cloth and copper foil; the prepreg is made of the resin and the glass cloth.

3. The design method of an asymmetric stacked PCB board according to claim 2, characterized in that: The step S100 includes: Step S101, providing different types of the resin, different types of the glass cloth and different types of the copper foil, and performing shrinkage tests on all the resins, the glass cloth and the copper foil respectively, and establishing a database; Step S102, establishing a design model of the asymmetric stacked structure according to the database, wherein the design model includes an upper stacked structure and a lower stacked structure arranged in a vertical direction, the upper stacked structure and the lower stacked structure have the same number of circuit layers, and the total shrinkage of the upper stacked structure is equal to the total shrinkage of the lower stacked structure; Step S103: stacking the copper clad laminate, the prepreg and the copper foil according to the design model to form the asymmetric laminate structure.

4. The design method of an asymmetric stacked PCB board according to claim 3, characterized in that: The difference percentage between the total shrinkage amount of the upper stacking structure and the total shrinkage amount of the lower stacking structure of the asymmetric stacking structure is controlled within a preset value.

5. The design method of an asymmetric stacked PCB board according to claim 1, characterized in that: In the step S200, the asymmetric laminated structure is first hot pressed and then cold pressed.

6. The design method of an asymmetric stacked PCB board according to claim 5, characterized in that: When cold pressing is performed, the cold pressing time is extended by 0.5 h to eliminate the stress of the asymmetric laminated structure.

7. The design method of an asymmetric stacked PCB board according to claim 5, characterized in that: Before hot pressing, kraft paper or a buffer pad is arranged between the asymmetric laminated structure and the hot pressing plate of the hot press.

8. The design method of an asymmetric stacked PCB board according to claim 1, characterized in that: After lamination, the asymmetric laminated structure is subjected to drilling baking, electroplating, solder resist baking and text baking in sequence to obtain the PCB board.

9. The design method of an asymmetric stacked PCB board according to claim 8, characterized in that: Stress is controlled during the drill bake, the electroplating, the solder mask bake, and the text bake.

10. A PCB board, characterized in that: The asymmetric stacked PCB board is manufactured using the design method of any one of claims 1 to 9.