Constant current control device and related constant current control method

Abstract

The present invention discloses a constant current control device and a related constant current control method, which are used for a power supply, wherein the power supply includes a primary side switch component and a secondary side winding, and the constant current control device includes a voltage waveform detector, which is used to generate a discharge period signal about the discharge period length of the secondary side winding according to a first feedback voltage and a control voltage; and a constant current controller, an integrator of the constant current controller generates an integration result voltage according to the discharge period signal and a current detection voltage, and connects one of a first current source and a second current source, wherein the current detection voltage is related to the secondary side winding current value flowing through the secondary side winding, and the secondary side winding current value is positively correlated with the secondary side output current value of the power supply.

Description

Technical Field

[0001] The present invention relates to a constant current control device and a related constant current control method, and in particular to a constant current control device for a power supply and a related constant current control method. Background Art

[0002] Current supplies are essential components for existing electronic products, converting power from batteries or mains electricity into the power they need. Most existing power supplies utilize switching power supplies, which employ two control schemes: primary-side control (PSC) and secondary-side control (SSC). Primary-side-controlled switching power supplies detect a reflected voltage on an auxiliary winding, indirectly detecting the voltage output by the secondary winding and an output voltage at one of the power supply's output terminals.

[0003] Therefore, existing primary-side controlled switching power supplies can implement overcurrent protection measures by dynamically adjusting the output voltage of the power supply through the internal integrated circuit (IC). Alternatively, existing primary-side controlled switching power supplies can adjust the protection current output by the IC according to the input voltage. However, these methods generally lack hardware adjustment flexibility and are still limited by the inductance tolerance of the power supply transformer.

[0004] Alternatively, existing primary-side controlled switching power supplies adjust the output current by adjusting the peak value of the current sensing voltage at the current sensing terminal of the auxiliary winding. However, this method requires detecting the discharge time of the switching power supply's secondary side and suffers from high circuit complexity. Therefore, improvements are needed in this existing technology. Summary of the Invention

[0005] Therefore, the present invention provides a constant current control device and a related constant current control method, which performs constant current control in a two-stage manner before the power supply performs the overcurrent protection process.

[0006] An embodiment of the present invention discloses a constant current control device for a power supply, wherein the power supply includes a primary-side switch component and a secondary-side winding. The primary-side switch component receives a control voltage and selectively turns on or off. The constant current control device includes a voltage waveform detector for generating a discharge period signal related to the discharge period length of the secondary-side winding based on a first feedback voltage and the control voltage; and a constant current controller coupled to the voltage waveform detector. The constant current controller includes an integrator, a first current source, and a second current source. The integrator switches on one of the first current source and the second current source based on the discharge period signal and a current detection voltage. , generating an integration result voltage, the current detection voltage is related to the secondary winding current value flowing through the secondary winding, and the secondary winding current value is positively correlated with the secondary side output current value of the power supply; wherein, when the integrator is connected to the first current source, and the integration result voltage change trend is opposite to the integration trend of the first current source, and the integration result voltage change reaches a second boundary voltage value, the integrator is changed to connect the second current source; wherein, when the integrator is connected to the second current source, and the integration result voltage change trend is the same as the integration trend of the second current source, and the integration result voltage change reaches a first boundary voltage value, the integrator is changed to connect the first current source.

[0007] Another embodiment of the present invention discloses a constant current control method for a power supply, wherein the power supply includes a voltage waveform detector, a constant current controller, a primary-side switch component, and a secondary-side winding. The primary-side switch component receives a control voltage to selectively turn on or off. The constant current control device includes the voltage waveform detector generating a discharge period signal related to the length of the discharge period of the secondary-side winding based on a first feedback voltage and the control voltage; and an integrator of the constant current controller connecting one of a first current source and a second current source based on the discharge period signal and a current detection voltage to generate an integration result voltage. The current detection voltage is related to the secondary winding current value flowing through the secondary winding, and the secondary winding current value is positively correlated with the secondary output current value of the power supply; wherein, when the integrator is connected to the first current source, and the integral result voltage change trend is opposite to the integral trend of the first current source, and the integral result voltage change reaches a second boundary voltage value, the integrator changes to connect the second current source; wherein, when the integrator is connected to the second current source, and the integral result voltage change trend is the same as the integral trend of the second current source, and the integral result voltage change reaches a first boundary voltage value, the integrator changes to connect the first current source. BRIEF DESCRIPTION OF THE DRAWINGS

[0008] Figure 1FIG. 1 is a schematic diagram of a power supply according to an embodiment of the present invention.

[0009] Figure 2 FIG. 4 is a schematic diagram of a constant current control device according to an embodiment of the present invention.

[0010] Figure 3A FIG. 1 is a schematic diagram showing the relationship between an integration result voltage and a secondary-side output current value according to an embodiment of the present invention.

[0011] Figure 3B FIG. 1 is a schematic diagram showing the relationship between the secondary-side output current value and time according to an embodiment of the present invention.

[0012] Figure 3C FIG. 4 is a schematic diagram illustrating the relationship between an integration result voltage, a detection voltage peak waveform, and an over-power risk pulse according to an embodiment of the present invention.

[0013] Figure 3D Schematic diagram of the relationship between the secondary side output current value and time according to an embodiment of the present invention.

[0014] Figure 3E Schematic diagram of the relationship between the absolute values ​​of the slopes of the integrated result voltage when the voltage is limited to two boundary voltage value intervals and undergoes multiple rise and fall changes at different secondary-side output current value ratios according to an embodiment of the present invention.

[0015] Figure 3F FIG. 4 is a schematic diagram showing the relationship between the integration result voltage, the detection voltage peak waveform, and an over-power risk pulse according to an embodiment of the present invention.

[0016] Figure 4 Schematic diagram of the relationship between the integration result voltage, the secondary side output current value and time according to an embodiment of the present invention.

[0017] Figure 5 Schematic diagram of waveforms of a control voltage, a current detection voltage, an integration result voltage, a first feedback voltage, and a secondary winding current value of a constant current control device according to an embodiment of the present invention.

[0018] Figure 6 FIG. 4 is a schematic diagram of a constant current control process according to an embodiment of the present invention.

[0019] Description of Reference Numerals

[0020] 10: Power supply

[0021] 102: Bridge circuit

[0022] 103: Pulse Width Modulation Controller

[0023] 104: Constant current control device

[0024] 1042: Voltage waveform detector

[0025] 1042_2: Low-pass filter

[0026] 1042_4: Comparator

[0027] 1042_6: Logic Circuit

[0028] 1042_C: Capacitor

[0029] 1042_R: Resistor

[0030] 1044: Constant current controller

[0031] 1044_2: Integrator

[0032] 1044_4: Comparator

[0033] 1044_C: capacitor

[0034] 106: Optocoupler feedback circuit

[0035] 60: Constant current control process

[0036] 602, 604, 606, 608: Steps

[0037] A, B: Time point

[0038] AE: Stage

[0039] Cload: output capacitance

[0040] CS: Current detection terminal

[0041] cycle_1,cycle_2,cycle_3: cycle

[0042] DRV: control voltage

[0043] HV: voltage

[0044] I: Pull-up current source

[0045] Idn: Pull-down current source

[0046] IDN: Pull-down current

[0047] Iin: current

[0048] Iout: secondary side output current value

[0049] Isec: Secondary winding current

[0050] Isec_m: Middle value of secondary winding current

[0051] IUP_1: first current source

[0052] IUP_2: Second current source

[0053] LPF: Low-pass filter

[0054] NA: Auxiliary winding

[0055] NP: Primary winding

[0056] np: Number of primary winding coils

[0057] NS: Secondary winding

[0058] ns: Number of secondary winding coils

[0059] ORP: Overpower Risk Pulse

[0060] P_1, P_2: Comparator

[0061] PC_1: First protection mechanism comparison circuit

[0062] PC_2: Second protection mechanism comparison circuit

[0063] Phase_0-Phase_8: interval

[0064] Qnp: Primary side switching components

[0065] R1, R2: resistors

[0066] Rcs: Current detection resistor

[0067] Rdn,Rup: equivalent resistance

[0068] Sdet: detection result signal

[0069] T: Cycle

[0070] T_1: first critical value

[0071] T_2: Second critical value

[0072] Tdis: discharge period signal

[0073] TF: Transformer

[0074] TH_1: First protection mechanism voltage threshold

[0075] TH_2: Second protection mechanism voltage threshold

[0076] Timer_1, Timer_2: Timer

[0077] Vaux: cross pressure

[0078] Vcco: integration result voltage

[0079] Vcomp: Second feedback signal

[0080] Vcompr: second boundary voltage value

[0081] Vcompr+: first boundary voltage value

[0082] Vcs: Current detection voltage

[0083] Vcs_m: detection voltage middle value

[0084] Vcs_peak: detection voltage peak

[0085] Vdly: delayed signal

[0086] VDD: operating power supply

[0087] Vfb: first feedback voltage

[0088] Vin: DC power supply

[0089] V_initial: initial voltage

[0090] Vout: output power

[0091] Vset: equivalent voltage

[0092] ΔV: voltage difference DETAILED DESCRIPTION

[0093] Figure 1This is a schematic diagram of a power supply 10 according to an embodiment of the present invention. The power supply 10 includes a bridge circuit 102, a transformer TF, and a pulse width modulation (PWM) controller 103. The PWM controller 103 includes a constant current control device 104. The bridge circuit 102 is used to convert AC power from the mains into a DC power source Vin. The transformer TF includes a primary winding NP, a secondary winding NS, and an auxiliary winding NA. The PWM controller 103 can be powered by either the voltage HV from the bridge circuit 102 or the voltage VDD from the auxiliary winding NA. The pulse width modulation controller 103 is used to control the primary-side switch element Qnp via a control voltage DRV to turn the power supply 10 on or off. When the primary-side switch element Qnp is on, the primary-side winding NP of the transformer TF stores electrical energy in the inductor of the transformer TF. When the primary-side switch element Qnp is off, the inductor of the transformer TF releases electrical energy to the secondary-side output capacitor Cload via the secondary-side winding current Isec, thereby establishing an output power supply Vout having a secondary-side output current value Iout. The secondary-side winding current value Isec is positively correlated with the secondary-side output current value Iout of the power supply. That is, when the secondary-side winding current value Isec increases, the secondary-side output current value Iout also increases.

[0094] The power supply 10 also includes resistors R1 and R2 for detecting a voltage Vaux across an auxiliary voltage NA to provide a first feedback voltage Vfb to the pulse-width modulation controller 103. When the primary-side switch Qnp is off, the voltage Vaux is a reflection of the voltage across the secondary winding NS. Furthermore, the power supply 10 may include an optically coupled feedback circuit 106, enabling the pulse-width modulation controller 103 to receive a second feedback signal Vcomp representing the magnitude of the output voltage Vout while maintaining electrical signal isolation between the primary and secondary circuits. Furthermore, the power supply 10 can detect a current sense voltage Vcs across a current sense resistor Rcs via a current sense terminal CS to reflect a current Iin flowing through the primary-side switch Qnp.

[0095] Please also refer to Figure 2 , Figure 2 FIG4 is a schematic diagram of a constant current control device 104 within a pulse width modulation controller 103 according to an embodiment of the present invention. The constant current control device 104 includes a voltage waveform detector 1042 and a constant current controller 1044. The voltage waveform detector 1042 is configured to generate a discharge duration signal Tdis corresponding to a discharge duration of the secondary winding NS based on the first feedback voltage Vfb and the control voltage DRV.

[0096] Specifically, the voltage waveform detector 1042 includes a low-pass filter 1042_2, a comparator 1042_4, and a logic circuit 1042_6. The low-pass filter 1042_2, which includes a resistor 1042_R and a capacitor 1042_C, performs low-pass filtering on the first feedback voltage Vfb to generate a delay signal Vdly. Specifically, the low-pass filter 1042_2 delays the first feedback voltage Vfb by a fixed time equal to the resistor and capacitor. The comparator 1042_4 compares the first feedback voltage Vfb with the delay signal Vdly. When the first feedback voltage Vfb falls below the delay signal Vdly by more than a predetermined level, the comparator 1042_4 provides a detection result signal Sdet to the logic circuit 1042_6. Once the secondary winding NS of the power supply 10 is discharged, the logic circuit 1042_6 generates a discharge duration signal Tdis based on the control voltage DRV and the detection result signal Sdet. The technical details of the operation of the voltage waveform detector can be found in the detailed description of the voltage waveform detector 60 in the relevant embodiment of TW201404010A1, and will not be repeated in this patent.

[0097] The constant current controller 1044 includes an integrator 1044_2, a comparator 1044_4, a low-pass filter LPF and an intermediate value detector 1044_6. The integrator 1044_2 includes a pull-down current source Idn, a capacitor 1044_C, a first current source IUP_1 and a second current source IUP_2. The pull-down current source Idn can generate a pull-down current IDN according to the sampled value of the current detection voltage Vcs. For example, the size of the pull-down current IDN can be determined according to an intermediate value of the detection voltage Vcs_m. The capacitor 1044_C is used to store an integrated result voltage Vcco of the pull-down current IDN within the length of the discharge period. The first current source IUP_1 and the second current source IUP_2 can be selectively connected in parallel or separately as a pull-up current source I to provide current to the integrator 1044_2; for example Figure 2 In the illustrated embodiment, the first current source IUP_1 can be used alone, or it can be combined in parallel with the second current source IUP_2. In other words, integrator 1044_2 generates an integrated voltage Vcco based on the discharge period signal Tdis, the current sense voltage Vcs, the pull-down current IDN, and the pull-up current source I. Furthermore, intermediate value detector 1044_6 is used to read the current sense voltage Vcs at the middle point of the primary-side switch Qnp's on-time period to obtain an intermediate sense voltage value Vcs_m.

[0098] The comparator 1044_4 includes a first input terminal and a second input terminal. The first input terminal receives the integrated voltage Vcco, and the second input terminal selectively receives one of the upper limit voltage value Vcompr+ or the lower limit voltage value Vcompr of the constant current controller 1044. In one embodiment, for example, the lower limit voltage value Vcompr can be designed to be 1 / 4 of the second feedback signal Vcomp, and the upper limit voltage value Vcompr+ can be designed to be the lower limit voltage value Vcompr plus a fixed voltage difference ΔV, for example, 0.2V. Figure 3A As shown, when the secondary side output current value Iout representing the output power of the power supply 10 exceeds 240% of the over-power protection setting value, the second feedback signal Vcomp will increase, thereby increasing the first boundary voltage value Vcompr+ and the second boundary voltage value Vcompr.

[0099] Please continue to refer to Figure 3A and Figure 3B , Figure 3A Schematic diagram of the relationship between the integration result voltage Vcco and the secondary side output current value Iout according to an embodiment of the present invention, Figure 3B FIG. 1 is a schematic diagram showing the relationship between the secondary-side output current value Iout and time according to an embodiment of the present invention, which simulates the secondary-side output current value Iout linearly increasing with time. Figure 3A The figure shows that a constant current protection measure is implemented in a two-stage manner when the integrated result voltage Vcco corresponds to different secondary side output current values ​​Iout. Figure 3A In the embodiment, the integration result voltage Vcco has an initial voltage V_initial, and has a first threshold value T_1 and a second threshold value T_2 of the constant current control device 104, and the second threshold value T_2 is greater than the first threshold value T_1; wherein the first threshold value T_1 is related to an overcurrent state of the power supply 10, that is, when the secondary side output current value Iout is greater than the first threshold value T_1, it represents that the power supply 10 has an overcurrent state; the second threshold value T_2 is related to an overpower state of the power supply 10, that is, when the secondary side output current value Iout is greater than the second threshold value T_2, it represents that the power supply 10 has an overpower state.

[0100] In one embodiment, the overcurrent state and overpower state of the power supply 10 may correspond to an overcurrent protection setting value of 120% and an overpower protection setting value of 240% of the secondary-side output current value Iout, respectively. For example, assuming that the secondary-side output current value Iout of the constant current control device 104 has a factory-specified rated current of 3 amperes, the 120% overcurrent protection setting value and the 240% overpower protection setting value are 3.6 amperes and 7.2 amperes, respectively.

[0101] In an embodiment of the present invention, when the second current source IUP_2 is not turned on, the first current source IUP_1 alone provides a boost current to charge the capacitor 1044_C; and when the second current source IUP_2 is turned on, the first current source IUP_1 and the second current source IUP_2 are connected in parallel to provide a boost current to charge the capacitor 1044_C.

[0102] In order to clearly describe the relationship between the integration result voltage Vcco and the secondary side output current value Iout, Figure 3A Different intervals are also marked in the figure.

[0103] like Figure 3A The interval Phase_0 shown in FIG corresponds to the interval in which the integrator 1044_2 turns on the first current source (the single first current source IUP_1) to serve as the pull-up current source I, and the overcurrent condition has not yet occurred (the secondary-side output current value Iout is less than the first threshold value T_1). In this interval, the detection voltage intermediate value Vcs_m is relatively small, and the corresponding pull-down current IDN is relatively small. In this interval, when the secondary-side output current value Iout is as Figure 3B As shown, when gradually increasing with time, the integration result voltage Vcco is maintained at the initial voltage V_initial.

[0104] More specifically, when the first current source (the first independent current source IUP_1) functions as the pull-up current source I, the integral of the boost current provided by the first current source tends to increase the integrated voltage Vcco. Conversely, the integral of the pull-down current IDN provided by the pull-down current source Idn in the integrator 1044_2 tends to decrease the integrated voltage Vcco, and this pull-down current IDN is positively correlated with the output power of the power supply 10. In the Phase_0 interval, when the output power of the power supply 10 has not reached 120% of the overcurrent setting, the boost current provided by the first current source is sufficient to prevent the integrated voltage Vcco from decreasing. The boundary between the Phase_0 and Phase_1 intervals can be defined as the point where the first current source functions as the pull-up current source I in the integrator 1044_2 and the integrated voltage Vcco begins to decrease, indicating that the output power of the power supply 10 has reached 120% of the overcurrent setting.

[0105] like Figure 3A The waveform diagrams for intervals Phase_1-7 shown in FIG. correspond to the bistable phase, where an overcurrent condition has occurred but an overpower condition has not yet occurred (secondary-side output current value Iout is greater than the first threshold value T_1 and less than the second threshold value T_2). During the odd intervals Phase_1, Phase_3, Phase_5, Phase_7, etc., integrator 1044_2 connects the first current source (the first current source IUP_1 alone) to serve as the pull-up current source I. During the even intervals Phase_2, Phase_4, Phase_6, etc., integrator 1044_2 connects the second current source (the first current source IUP_1 and the second current source IUP_2 in parallel) to serve as the pull-up current source I. The waveforms shown in the bistable phase interval Phase_1-7 are primarily intended to illustrate how the integration result voltage Vcco is constrained to multiple rise and fall cycles within the range of two boundary voltages, Vcompr+ and Vcompr, in response to changes in the pull-up current source. This does not imply that the integration result voltage Vcco in the bistable phase interval Phase_1-7 has a one-to-one correspondence with the secondary-side output current value Iout, similar to a transfer curve, or that the bistable phase has exactly seven intervals.

[0106] For the convenience of explanation, Figure 3D As shown, assuming that the secondary side output current value Iout increases gradually in stages AE, for example, stages AE correspond to 100%, 130%, 180%, 230% and 245% of the rated current value of the power supply 10 when it leaves the factory. After the secondary side output current value Iout maintains a stable output for a period of time in each stage, the secondary side output current value Iout increases and enters the next stage. Then, the corresponding integral result voltage Vcco waveform presents three states: (1) In stage A, corresponding to the stage of 100% of the rated current value of the factory specification, as shown Figure 3A As shown in Phase_0, the integral result voltage Vcco is kept stable at a constant value V_initial; (2) In Phase E, corresponding to the stage of 245% of the factory specification rated current value, as shown Figure 3A As shown in Phase_8, the integral result voltage Vcco cannot maintain a constant value and gradually decreases; (3) corresponds to the factory specification rated current value 130%, 180%, 230% stage, as shown Figure 3EThe integrated voltage Vcco is a rising-falling triangular waveform with three different slopes. Assuming that the secondary-side output current Iout is 130%, 180%, and 230% of the rated current of the power supply 10, the corresponding pull-down currents IDN are a first pull-down current, a second pull-down current, and a third pull-down current. Because the relationship between the three is: first pull-down current < second pull-down current < third pull-down current; therefore, Figure 3E As shown in the figure, corresponding to different secondary-side output current value ratios, the resulting voltage Vcco is limited to the two boundary voltage values ​​Vcompr+ and Vcompr, and the absolute value of the slope of the rising and falling waveforms changes. As the secondary-side output current value Iout increases, the pull-down current increases accordingly, the rising rate of the integrated result voltage Vcco decreases, and the absolute value of the slope of the rising waveform decreases (the rising waveform is closer to horizontal); but the falling rate increases, and the absolute value of the slope of the falling waveform increases (the falling waveform is closer to vertical).

[0107] The following is for convenience Figure 3A Please also refer to Phase_1-7 in Figure 3B .like Figure 3B As shown, assuming that the secondary side output current value Iout increases linearly with time, for example, it increases linearly from 100% to 245% of the rated current value corresponding to the factory specification of the power supply 10, then Figure 3A The same waveform shown, the horizontal axis can be converted into a time axis to obtain Figure 3C .

[0108] During the interval Phase_1, the integrator 1044_2 connects the first current source to the pull-up current source I, and an overcurrent condition has occurred (the secondary-side output current value Iout is greater than the first threshold value T_1). During this interval, the change trend of the integrated voltage Vcco (i.e., gradually decreasing over time) is opposite to the integration trend of the first current source (i.e., increasing integrated voltage Vcco), thus triggering an overcurrent protection circuit of the power supply 10 to start operating. Figure 2 In the illustrated embodiment of the constant current control device 104, the constant current control device 104 may include a first protection mechanism comparison circuit PC_1. The first protection mechanism comparison circuit PC_1 includes a comparator P_1 for comparing the integration result voltage Vcco with a first protection mechanism voltage threshold TH_1. When the integration result voltage Vcco changes below the first protection mechanism voltage threshold TH_1, a timer Timer_1 is triggered. When the timer exceeds a first predetermined period, the power supply 10 stops providing an output current.

[0109] The intersection boundary between intervals Phase_1 and Phase_2 can be: when the integration result voltage Vcco changes (i.e., decreases) to reach the second boundary voltage value Vcompr, that is, when the integration result voltage Vcco drops to the lower limit voltage value of the interval, the comparator 1044_4 is triggered to change its output, causing the second current source IUP_2 in the integrator 1044_2 to be conductive and connected in parallel with the first current source IUP_1. The first current source IUP_1 and the second current source IUP_2 jointly charge the capacitor 1044_C, and the second input terminal of the comparator 1044_4 is switched to receive the first boundary voltage value Vcompr+ (i.e., the upper limit voltage value of the interval).

[0110] like Figure 3C In the interval marked Phase_2, the pull-up current source I connected to integrator 1044_2 is the second current source, and an over-power condition has not yet occurred (the secondary-side output current value Iout is less than the second threshold value T_2). During Phase_2, the second current source acts as a second pull-up current source in integrator 1044_2. The integration trend of the second current source is to increase the integrated voltage Vcco. When the output power of the power supply 10 does not reach the 240% over-power protection setting value, the boost current provided by the second current source is sufficient to prevent the integrated voltage Vcco from decreasing. Therefore, when the pull-up current source I connected to integrator 1044_2 is the second current source, the change trend of the integrated voltage Vcco (i.e., gradually increasing over time) is the same as the integration trend of the second current source (i.e., increasing).

[0111] The boundary between the intervals Phase_2 and Phase_3 can be as follows: when the pull-up current source I connected to the integrator 1044_2 is the second current source, and the integrated voltage Vcco changes (i.e., rises) to reach the first boundary voltage value Vcomp+, that is, when the integrated voltage Vcco rises to the upper limit voltage value of the interval, the comparator 1044_4 is triggered to change its output, thereby cutting off the second current source IUP_2, so that the second current source no longer charges the capacitor 1044_C, and the second input terminal is switched to receive the second boundary voltage value Vcompr (i.e., the lower limit voltage value of the interval), thus entering the interval Phase_3.

[0112] During Phase_3, the pull-up current source I connected to integrator 1044_2 is changed to the first current source (i.e., capacitor 1044_C is charged independently by the first current source IUP_1). At this point, the second input terminal of comparator 1044_4 is switched to receive the second boundary voltage value Vcompr (i.e., the lower limit voltage value of the interval). During Phase_3, when the pull-up current source I connected to integrator 1044_2 is the first current source, the change trend of the integrated voltage Vcco (i.e., a gradual decrease over time) is opposite to the integration trend of the first current source (i.e., an increase in the integrated voltage Vcco).

[0113] The intersection boundary between interval Phase_3 and interval Phase_4 may be: when the pull-up current source I connected to integrator 1044_2 is the first current source, and when the integration result voltage Vcco drops to the second threshold voltage value Vcompr, comparator 1044_4 is triggered to change its output, performing an action similar to that at the intersection boundary between interval Phase_1 and interval Phase_2, and entering interval Phase_4.

[0114] During Phase_4, the pull-up current source I connected to integrator 1044_2 is replaced by the second current source (i.e., the first current source IUP_1 and the second current source IUP_2 jointly charge capacitor 1044_C). At this point, the second input terminal of comparator 1044_4 is switched to receive the first boundary voltage value Vcompr+ (i.e., the upper limit voltage value of the interval). During Phase_4, when the pull-up current source I connected to integrator 1044_2 is the second current source, the trend of change in the integrated voltage Vcco (i.e., a gradual increase over time) is the same as the trend of integration of the second current source (i.e., an increase). The remaining operations during Phase_4 and Phase_6 are similar to those during Phase_2, while the operations during Phase_7 are similar to those during Phase_3 and Phase_5. Therefore, their description is omitted.

[0115] According to an embodiment of the present invention: (a) as Figure 3CAs shown in the intervals Phase_3, Phase_5, and Phase_7, when the secondary-side output current value Iout is greater than the first critical value T_1, if the pull-up current source I connected to the integrator 1044_2 is the first current source, the change trend of the integrated result voltage Vcco (i.e., gradually decreasing over time) will be opposite to the integration trend of the first current source (i.e., increasing), and will show a gradually decreasing trend. (b) As shown in the intervals Phase_2, Phase_4, and Phase_6, when the secondary-side output current value Iout is less than the first critical value T_2, if the pull-up current source I connected to the integrator 1044_2 is the second current source, the change trend of the integrated result voltage Vcco (i.e., gradually increasing over time) will be the same as the integration trend of the second current source (i.e., increasing), and will show a gradually increasing trend. (c) As shown in the intervals Phase_3, Phase_5, and Phase_7, when the secondary-side output current value Iout is less than the first critical value T_2, if the pull-up current source I connected to the integrator 1044_2 is the second current source, the change trend of the integrated result voltage Vcco (i.e., gradually increasing over time) will be the same as the integration trend of the second current source (i.e., increasing), and will show a gradually increasing trend. Figure 3C During the intervals Phase_2 to Phase_7, when the integrated voltage Vcco drops to the second threshold voltage Vcompr or rises to the first threshold voltage Vcompr+, comparator 1044_4 is triggered to change its output, thereby changing whether the secondary current source IUP_2 functions as a pull-up current source. Through the mechanisms (a)-(c) above, when the secondary-side output current Iout is greater than the first threshold T_1 and less than the second threshold T_2, the integrated voltage Vcco is maintained between the first threshold voltage Vcompr+ and the second threshold voltage Vcompr. This maintains the integrated voltage Vcco within a voltage range significantly below the initial voltage V_initial, facilitating prompt and early shutdown of the power supply 10 when the output power of the power supply 10 reaches 240% of the over-power protection setting.

[0116] exist Figure 3CIn the interval Phase_8, when the pull-up current source I connected to the integrator 1044_2 is changed to the second current source (i.e., the first current source IUP_1 and the second current source IUP_2 jointly charge the capacitor 1044_C), when the pull-up current source I connected to the integrator 1044_2 is the second current source, and the change trend of the integration result voltage Vcco (i.e., gradually decreasing over time) is opposite to the integration trend of the second current source (i.e., increasing), it means that the output power of the power supply 10 has exceeded 240% of the over-power protection setting value, and the constant current controller 1044 needs to trigger an over-power overload protection circuit of the power supply 10 to start operation. With this design, when the secondary-side output current value Iout is greater than the second critical value T_2, even if the pull-up current source I connected to the integrator 1044_2 has been increased to the second current source (the first current source IUP_1 and the second current source IUP_2 are supplied in parallel), the change trend of the integration result voltage Vcco (i.e., gradually decreasing over time) will still be opposite to the integration trend of the second current source (i.e., increasing), and will show a gradually decreasing trend.

[0117] like Figure 2 In the embodiment of the constant current control device 104 shown, in order to implement the over-power protection measure of the power supply 10, the constant current control device 104 may include a second protection mechanism comparison circuit PC_2. The second protection mechanism comparison circuit PC_2 includes a comparator P_2 for comparing the second boundary voltage value Vcompr with a second protection mechanism voltage threshold TH_2 to generate a voltage when the second boundary voltage value Vcompr is greater than the second protection mechanism voltage threshold TH_2 (e.g., Figure 3C The time point A indicated in the figure corresponds to the intersection of the second boundary voltage value Vcompr and the second protection mechanism voltage threshold TH_2, triggering the timer Timer_2 to start timing, and when the timing exceeds a second preset period, the power supply 10 stops providing the output current.

[0118] like Figure 3F The waveforms of the integrated voltage Vcco and the detection voltage peak value Vcs_peak shown in FIG. 1 can be compared with the detection voltage peak value Vcs_peak corresponding to the primary side switch component Qnp being turned on in each cycle according to a third protection mechanism comparison circuit embodiment (circuit not shown). When the integrated voltage Vcco drops to the voltage value of the detection voltage peak value Vcs_peak (e.g., Figure 3FThe time point A indicated in the figure is the intersection point of the integrated result voltage Vcco and the detection voltage peak value Vcs_peak. A comparator (circuit not shown) repeatedly outputs an over-power risk pulse ORP in each cycle. The constant current control device 104 can also trigger the timer Timer_2 to start timing based on the occurrence of the over-power risk pulse ORP. When the timing exceeds the second preset period, the power supply 10 stops providing the output current.

[0119] Since the first protection circuit PC_1 is used to determine whether the power supply 10 exceeds the 120% overcurrent protection setting, and the second protection circuit PC_2 is used to determine whether the power supply 10 exceeds the 240% overpower protection setting, when timer Timer_2 of the second protection circuit PC_2 is triggered, it indicates that the power supply 10 has exceeded the 240% overpower protection setting. Therefore, the second preset time is shorter than the first preset time period to prevent overload damage to the power supply 10. For example, the first preset time period can be 100 milliseconds, and the second preset time period can be 30 milliseconds. That is, when the first protection circuit PC_1 determines that the power supply 10 exceeds the 120% overcurrent protection setting for more than 100 milliseconds, the power supply 10 is shut down; when the second protection circuit PC_2 determines that the power supply 10 exceeds the 240% overpower protection setting for more than 30 milliseconds, the power supply 10 is shut down. It is worth noting that the lengths of the first and second preset time periods are not limited to the above examples.

[0120] Figure 4 Schematic diagram of the relationship between the integrated result voltage Vcco, the secondary side output current value Iout and a time according to an embodiment of the present invention. Figure 3C The difference is that, Figure 4The secondary-side output current value Iout in the figure is assumed to increase linearly starting at time 0 and reaching a maximum value at time Tc. At time 0, the secondary-side output current value Iout is at its lowest, and the integrated voltage Vcco is at the initial voltage V_initial. At time Ta, the first current source (the first current source IUP_1 alone) functions as a pull-up current source, and the integrated voltage Vcco decreases, indicating an overcurrent condition. At time Tb, the second current source (the first current source IUP_1 and the second current source IUP_2 in parallel) functions as a pull-up current source, and the integrated voltage Vcco decreases, indicating an overpower condition. At time Tc, the integrated voltage Vcco decreases to the detection voltage peak Vcs_peak (or the second boundary voltage Vcompr rises above the second protection mechanism voltage threshold TH_2), triggering the second protection mechanism comparison circuit PC_2 to trigger timer Timer_2. At this point, the secondary-side output current value Iout reaches its maximum value and then begins to reverse and gradually decrease. At a time point Td, which is less than 30 milliseconds from the time point Tc, the secondary-side output current value Iout continues to decrease, eliminating the over-power condition. Therefore, the over-power protection setting mechanism does not shut down the power supply 10 when the over-power condition exceeds 240%. At a time point Te, the secondary-side output current value Iout continues to decrease, eliminating the over-current condition, and the integrated voltage Vcco returns to the initial voltage V_initial.

[0121] Figure 5 Schematic diagram of the waveforms of the control voltage DRV, the current detection voltage Vcs, the integration result voltage Vcco, the first feedback voltage Vfb and the secondary winding current value Isec of the secondary winding NS of the constant current control device 104 according to an embodiment of the present invention. Figure 5 As can be seen from the embodiment of the present invention, the integration result voltage Vcco changes with the current detection voltage Vcs, and the secondary side output current value Iout is determined by the following parameters of formula (1):

[0122]

[0123] Wherein, T is the period of each control voltage DRV, Isec_m is the middle value of the secondary winding current Isec in each period, np is the number of primary winding coils, and ns is the number of secondary winding coils.

[0124] In addition, if Figure 5 As shown, since the pull-down current source Idn of the integrator 1044_2 of the embodiment of the present invention is preferably generated according to the detection voltage middle value Vcs_m, and a switch in the pull-down current source Idn is turned on corresponding to the discharge period signal Tdis, equations (2)-(4) are obtained:

[0125]

[0126]

[0127]

[0128] Wherein, Vset is an equivalent voltage of the pull-up current source I, Rup is an equivalent resistance of the pull-up current source I, and Rdn is an equivalent resistance of the pull-down current source Idn.

[0129] Therefore, the secondary side output current value Iout of the constant current control device 10 of the embodiment of the present invention can be obtained by substituting equation (4) into equation (1) to obtain equation (5):

[0130]

[0131] Furthermore, the operation of the constant current control device 10 can be summarized as a constant current control process 60, such as Figure 6 The steps of the constant current control process 60 include:

[0132] Step 602: Start.

[0133] Step 604 : Generate a discharge period signal Tdis corresponding to the discharge period length of the secondary winding NS according to the first feedback voltage Vfb and the control voltage DRV by the voltage waveform detector 1042 .

[0134] Step 606: The integrator 1044_2 of the constant current controller 1044 adjusts a first integral trend current source according to the discharge period signal Tdis and the current detection voltage Vcs, and connects one of the first current source and the second current source as a second integral trend current source, wherein the first integral trend current source and the second integral trend current source are opposite to each other and work together to generate the integral result voltage Vcco.

[0135] Step 608: End.

[0136] For step 606, Figure 2 The illustrated embodiment illustrates that: (1) the discharge period signal Tdis and the current detection voltage Vcs respectively adjust the current magnitude and conduction period length of the pull-down current source Idn, thereby lowering the integration result voltage Vcco; and (2) selectively connecting one of the first current source and the second current source to serve as a pull-up current source, thereby raising the integration result voltage Vcco. However, the present invention is not limited to this. For example, the discharge period signal Tdis and the current detection voltage Vcs may jointly adjust a pull-up current source, while selectively connecting one of the first current source and the second current source to serve as the pull-down current source Idn. Such circuit designs with opposite integration trends also fall within the scope of the present invention.

[0137] Furthermore, the current sense voltage Vcs is related to the secondary winding current value Isec flowing through the secondary winding NS, which in turn is related to the secondary output current value Iout. The pull-down current source Idn is preferably generated based on the intermediate sense voltage value Vcs_m. This allows the integrator 1044_2 to accurately calculate the secondary output current value Iout without having to detect the duration of the discharge period signal Tdis.

[0138] For other operation procedures of the constant current control process 60 , reference may be made to the embodiment of the constant current control device 10 , which will not be described in detail here.

[0139] In summary, an embodiment of the present invention provides a constant current control device and a related constant current control method, which execute two different stages of overcurrent protection mechanism and overpower protection mechanism before the power supply executes the overcurrent protection process.

[0140] The above description is only a preferred embodiment of the present invention. All equivalent changes and modifications made according to the scope of the patent application of the present invention should fall within the scope of the present invention.

Claims

1. A constant current control device for a power supply, wherein the power supply comprises a primary side switch component and a secondary side winding, wherein the primary side switch component receives a control voltage and selectively turns on or off, characterized in that: The constant current control device comprises: a voltage waveform detector for generating a discharge period signal related to the discharge period length of the secondary winding according to a first feedback voltage and the control voltage; and a constant current controller coupled to the voltage waveform detector, the constant current controller comprising an integrator, a first current source and a second current source, the integrator turning on one of the first current source and the second current source according to the discharge period signal and a current detection voltage to generate an integration result voltage, the current detection voltage is related to the secondary winding current value flowing through the secondary winding, and the secondary winding current value is positively correlated with the secondary output current value of the power supply; When the integrator is connected to the first current source, and the voltage change trend of the integration result is opposite to the integration trend of the first current source, and the voltage change of the integration result reaches a second boundary voltage value, the integrator is changed to connect the second current source; When the integrator turns on the second current source, and the voltage change trend of the integration result is the same as the integration trend of the second current source, and the voltage change of the integration result reaches a first boundary voltage value, the integrator changes to turn on the first current source.

2. The constant current control device according to claim 1, characterized in that: The first current source selectively serves as a first pull-up current source in the integrator, and the integration trend of the first current source is to increase the integration result voltage; wherein the integrator includes a pull-down current source for generating a pull-down current according to the current detection voltage and the discharge period signal, and the integration trend of the pull-down current source is to decrease the integration result voltage; wherein when the integrator is connected to the first current source, and the integration result voltage change trend is opposite to the integration trend of the first current source, and the integration result voltage change reaches the second boundary voltage value, the integration result voltage decreases to a lower limit voltage value of an interval.

3. The constant current control device according to claim 1, characterized in that: The second current source selectively serves as a second pull-up current source in the integrator, and the integration trend of the second current source is to increase the integration result voltage; wherein the integrator includes a pull-down current source for generating a pull-down current according to the current detection voltage and the discharge period signal, and the integration trend of the pull-down current source is to decrease the integration result voltage; wherein when the integrator is connected to the second current source, and the integration result voltage change trend is the same as the integration trend of the second current source, and the integration result voltage change reaches the first boundary voltage value, the integration result voltage rises to an upper limit voltage value of an interval.

4. The constant current control device according to claim 1, characterized in that: When the integrator is connected to the first current source, and the integration result voltage is opposite to the integration trend of the first current source, the corresponding secondary side output current value is greater than a first critical value; when the integrator is connected to the second current source, and the integration result voltage is opposite to the integration trend of the second current source, the corresponding secondary side output current value is greater than a second critical value; wherein the value of the first current source is smaller than the value of the second current source, and the first critical value is smaller than the second critical value; when the secondary side output current value is greater than the first critical value, and the secondary side output current value is smaller than the second critical value, the integration result voltage will be maintained between the first boundary voltage value and the second boundary voltage value.

5. The constant current control device according to claim 1, characterized in that: The integrator comprises: A pull-down current source, used for generating a pull-down current according to the current detection voltage and the discharge period signal; a capacitor for storing the integrated voltage of the pull-down current in the discharge period signal; and a first current source and a second current source; The first current source is formed by the first current source, and the first current source and the second current source are connected in parallel to form the second current source.

6. The constant current control device according to claim 5, characterized in that: The integrator further comprises: A comparator, comprising a first input terminal and a second input terminal, wherein the first input terminal receives the integration result voltage, and the second input terminal selectively receives one of an interval upper limit voltage value and an interval lower limit voltage value; When the voltage of the integration result drops to the lower limit voltage value of the interval, the first current source and the second current source are connected in parallel, so that the first current source and the second current source charge the capacitor together, and the second input terminal is switched to receive the upper limit voltage value of the interval; When the integration result voltage rises to reach the upper limit voltage value of the interval, the comparator cuts off the second current source so that the second current source no longer charges the capacitor, and switches the second input terminal to receive the lower limit voltage value of the interval.

7. The constant current control device according to claim 1, characterized in that: The constant current controller also includes: A first protection mechanism comparison circuit is used to compare the integration result voltage with a first protection mechanism voltage threshold. When the integration result voltage is lower than the first protection mechanism voltage threshold, the timing is triggered to start. When the timing exceeds a first preset time period, the power supply stops providing an output current.

8. The constant current control device according to claim 7, characterized in that: The current detection voltage corresponds to a detection voltage peak value of the secondary winding current value, wherein the constant current controller further comprises: A second protection mechanism comparison circuit reduces the energy transmitted by the primary-side switch component when it is turned on according to the integration result voltage to reduce the detection voltage peak value. When the integration result voltage drops, it triggers the second protection mechanism comparison circuit to start reducing the detection voltage peak value, thereby triggering the start of timing. When the timing exceeds a second preset time period, the power supply stops providing the output current.

9. The constant current control device according to claim 8, characterized in that: The second protection mechanism comparison circuit has a second protection mechanism comparator for comparing the integration result voltage with the detection voltage peak value. When the integration result voltage drops to the detection voltage peak value, the second protection mechanism comparison circuit is triggered to start timing.

10. The constant current control device according to claim 5, characterized in that: The current detection voltage has a detection voltage intermediate value corresponding to the secondary winding current value, wherein the pull-down current source generates the pull-down current according to the detection voltage intermediate value.

11. A constant current control method, characterized in that: For a power supply, wherein the power supply comprises a voltage waveform detector, a constant current controller, a primary side switch component and a secondary side winding, the primary side switch component receives a control voltage and selectively turns on or off, and the constant current control method comprises: The voltage waveform detector generates a discharge period signal related to the discharge period length of the secondary winding according to a first feedback voltage and the control voltage; and An integrator of the constant current controller generates an integration result voltage according to the discharge period signal and a current detection voltage, and connects one of a first current source and a second current source, wherein the current detection voltage is related to a secondary winding current value flowing through the secondary winding, and the secondary winding current value is positively correlated with a secondary output current value of the power supply; When the integrator is connected to the first current source, and the voltage change trend of the integration result is opposite to the integration trend of the first current source, and the voltage change of the integration result reaches a second boundary voltage value, the integrator is changed to connect the second current source; When the integrator turns on the second current source, and the voltage change trend of the integration result is the same as the integration trend of the second current source, and the voltage change of the integration result reaches a first boundary voltage value, the integrator changes to turn on the first current source.

12. The constant current control method according to claim 11, characterized in that: Also includes: The first current source is selectively used as a first pull-up current source in the integrator, and the integration trend of the first current source is to increase the voltage of the integration result; Wherein, the integrator includes a pull-down current source for generating a pull-down current according to the current detection voltage and the discharge period signal, and the integration trend of the pull-down current source is to make the voltage of the integration result decrease; When the integrator turns on the first current source, and the integration result voltage change trend is opposite to the integration trend of the first current source, and the integration result voltage change reaches the second boundary voltage value, the integration result voltage drops to a lower limit voltage value of an interval.

13. The constant current control method according to claim 11, characterized in that: Also includes: The second current source is selectively used as a second pull-up current source in the integrator, and the integration trend of the second current source is to increase the voltage of the integration result; Wherein, the integrator includes a pull-down current source for generating a pull-down current according to the current detection voltage and the discharge period signal, and the integration trend of the pull-down current source is to make the voltage of the integration result decrease; When the integrator turns on the second current source, and the integration result voltage change trend is the same as the second current source integration trend, and the integration result voltage change reaches the first boundary voltage value, the integration result voltage rises to an interval upper limit voltage value.

14. The constant current control method according to claim 11, characterized in that: When the integrator is connected to the first current source, and the integration result voltage is opposite to the integration trend of the first current source, the corresponding secondary side output current value is greater than a first critical value; when the integrator is connected to the second current source, and the integration result voltage is opposite to the integration trend of the second current source, the corresponding secondary side output current value is greater than a second critical value; wherein the value of the first current source is smaller than the value of the second current source, and the first critical value is smaller than the second critical value; when the secondary side output current value is greater than the first critical value, and the secondary side output current value is smaller than the second critical value, the integration result voltage will be maintained between the first boundary voltage value and the second boundary voltage value.

15. The constant current control method according to claim 11, characterized in that: Also includes: A pull-down current source of the integrator generates a pull-down current according to the current detection voltage and the discharge period signal; A capacitor of the integrator stores the integrated voltage of the pull-down current in the discharge period signal; and A first current source of the integrator constitutes the first current source, and the first current source and a second current source are connected in parallel to constitute the second current source.

16. The constant current control method according to claim 15, characterized in that: Also includes: A first input terminal of a comparator of the integrator receives the integration result voltage, and a second input terminal of the comparator selectively receives one of an interval upper limit voltage value and an interval lower limit voltage value; When the voltage of the integration result drops to the lower limit voltage value of the interval, the first current source and the second current source are connected in parallel, so that the first current source and the second current source charge the capacitor together, and the second input terminal is switched to receive the upper limit voltage value of the interval; When the integration result voltage rises to reach the upper limit voltage value of the interval, the comparator cuts off the second current source so that the second current source no longer charges the capacitor, and switches the second input terminal to receive the lower limit voltage value of the interval.

17. The constant current control method according to claim 11, characterized in that: Also includes: A first protection mechanism comparison circuit of the constant current controller compares the integration result voltage and a first protection mechanism voltage threshold. When the integration result voltage is lower than the first protection mechanism voltage threshold, the timing is triggered to start. When the timing exceeds a first preset time period, the power supply stops providing an output current.

18. The constant current control method according to claim 17, characterized in that: Also includes: A second protection mechanism comparison circuit of the constant current controller reduces the energy transmitted by the primary side switch component when it is turned on according to the integration result voltage to reduce a detection voltage peak. When the integration result voltage drops, it triggers the second protection mechanism comparison circuit to start reducing the detection voltage peak, thereby triggering the start of timing. When the timing exceeds a second preset time period, the power supply stops providing the output current.

19. The constant current control method according to claim 18, characterized in that: The second protection mechanism comparison circuit has a second protection mechanism comparator for comparing the integration result voltage with the detection voltage peak value. When the integration result voltage drops to the detection voltage peak value, the second protection mechanism comparison circuit is triggered to start timing.

20. The constant current control method according to claim 15, characterized in that: The current detection voltage has a detection voltage intermediate value corresponding to the secondary winding current value, wherein the pull-down current source generates the pull-down current according to the detection voltage intermediate value.

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