A multi-level single-phase interphase hybrid topology converter and control method

Abstract

The present invention discloses a multi-level single-phase interphase hybrid topology converter and control method, the converter includes: A-phase bridge arm, which is a bridge arm of a five-level active midpoint clamped converter; B-phase bridge arm, which is a three-level T-type bridge arm; the control method includes: dividing sectors according to the number of output levels; solving the predicted current value and the given current value at time k+1; determining the candidate vectors of each sector based on the influence of each vector on the capacitor voltage to balance the midpoint voltage; establishing a value function without weight factors, calculating the duty cycle of the candidate vectors in each sector through the calculation result of the value function, forming a dual-vector three-stage sequence, combining with the corresponding switch state sequence, forming a PWM signal to drive the multi-level single-phase interphase hybrid topology converter to work normally. The 53L-IPHC converter of the present invention saves 4 power devices, reduces one suspended capacitor, and reduces the difficulty of regulation while maintaining the number of levels.

Description

Technical Field

[0001] The present invention relates to the technical field of novel single-phase multi-level inverter topology, and in particular to a multi-level single-phase inter-phase hybrid topology converter and a control method thereof. Background Art

[0002] The statements in this section merely provide background information related to the present invention and do not necessarily constitute prior art.

[0003] Compared with two-level converters, multi-level converters have significant advantages such as high output current quality, low voltage stress of power devices, high system efficiency, and low electromagnetic interference. In recent years, single-phase multi-level converters have been widely used in photovoltaic integration, active filters, electric vehicle charging stations, rail traction systems, and other fields, and have received widespread attention.

[0004] In recent years, the emergence of single-phase neutral point clamped (NPC) converters has been widely used in AC traction power supply systems. Among the different single-phase multi-level topologies, the five-level active neutral point clamped (5L-ANPC) converter combines the advantages of the traditional NPC converter and the converter containing floating capacitors, and is a very promising topology.

[0005] However, compared with the single-phase three-level converter, although the single-phase 5L-ANPC converter can provide nine output levels of line voltage and greatly reduce harmonics, the two bridge arms have a total of 16 power devices, which is 8 more power devices than the single-phase three-level converter such as the T-type single-phase three-level converter, which is equivalent to twice the number, which greatly increases the cost.

[0006] In addition, compared with the traditional single-phase three-level converter, the single-phase 5L-ANPC converter not only needs to control the balance of the midpoint voltage, but also needs to additionally control the balance of the two floating capacitor voltages, and the difficulty of the control technology will also increase accordingly. Summary of the invention

[0007] In order to solve the above problems, the present invention proposes a multi-level single-phase interphase hybrid topology converter and a control method, which can reduce the number of power devices in the single-phase multi-level converter and reduce the cost while obtaining high-quality output current and voltage.

[0008] In some embodiments, the following technical solutions are adopted:

[0009] A multi-level single-phase interphase hybrid topology converter, comprising:

[0010] The A-phase bridge arm is a bridge arm of a five-level active neutral-point clamped converter;

[0011] The B-phase bridge arm is a three-level T-type bridge arm;

[0012] The A-phase bridge arm and the B-phase bridge arm share a DC source.

[0013] In other embodiments, the following technical solutions are adopted:

[0014] A control method for a multi-level single-phase interphase hybrid topology converter, comprising:

[0015] Divide the sectors according to the number of output levels; establish a mathematical model of the system and discretize it to solve the predicted current value and the given current value at time k+1;

[0016] A discrete mathematical model of the suspended capacitor voltage and the midpoint voltage is established, and based on the influence of each vector on the capacitor voltage, a candidate vector for each sector is determined to balance the midpoint voltage;

[0017] A value function without weight factors is established, and the duty cycle of the candidate vector in each sector is calculated based on the calculation result of the value function to form a dual-vector three-segment sequence. Combined with the corresponding switch state sequence, a PWM signal is formed to drive the multi-level single-phase interphase hybrid topology converter to work normally.

[0018] In other embodiments, the following technical solutions are adopted:

[0019] A control system for a multi-level single-phase interphase hybrid topology converter, comprising:

[0020] The output current solution module is used to divide the sectors according to the number of output levels; establish a system mathematical model and discretize it to solve the predicted current value and the given current value at time k+1;

[0021] The candidate vector selection module is used to establish a discrete mathematical model of the suspended capacitor voltage and the midpoint voltage, and determine the candidate vector of each sector based on the influence of each vector on the capacitor voltage to balance the midpoint voltage;

[0022] The PWM signal driving module is used to establish a value function without weight factors, and calculate the duty cycle of the candidate vector in each sector through the calculation result of the value function to form a dual-vector three-segment sequence. Combined with the corresponding switch state sequence, a PWM signal is formed to drive the multi-level single-phase interphase hybrid topology converter to work normally.

[0023] In other embodiments, the following technical solutions are adopted:

[0024] A terminal device comprises a processor and a memory, wherein the processor is used to implement various instructions; and the memory is used to store a plurality of instructions, wherein the instructions are suitable for being loaded by the processor and executing the control method of the multi-level single-phase inter-phase hybrid topology converter.

[0025] In other embodiments, the following technical solutions are adopted:

[0026] A computer-readable storage medium stores a plurality of instructions, wherein the instructions are suitable for being loaded and executed by a processor of a terminal device for the control method of the multi-level single-phase inter-phase hybrid topology converter.

[0027] Compared with the prior art, the present invention has the following beneficial effects:

[0028] (1) Compared with the single-phase 5L-ANPC converter, the multi-level single-phase interphase hybrid topology (53L-IPHC) converter of the present invention saves four power devices and reduces the cost, and the output voltage of the 53L-IPHC has the same number of levels as the 5L-ANPC; the 53L-IPHC converter reduces a floating capacitor, which not only reduces a certain cost, but also reduces the difficulty of regulation.

[0029] (2) Compared with the single-phase T-type three-level converter, the multi-level single-phase interphase hybrid topology (53L-IPHC) converter of the present invention increases the number of output voltage levels by 4, from five levels to nine levels, greatly improving the output current and voltage quality and reducing harmonics.

[0030] (3) Compared with the traditional dual closed-loop control, the converter control method of the present invention eliminates the PI controller, which can reduce the complex work of setting PI parameters and also improve the response speed; no weight factor is introduced in the value function, which eliminates the complex work of debugging the weight factor and greatly reduces the amount of calculation.

[0031] (4) The converter control method of the present invention proposes a segmented control for the floating capacitor voltage and the midpoint voltage of the five-level bridge arm, that is, the floating capacitor voltage is controlled first and controlled by the five-level bridge arm. After the floating capacitor voltage is balanced, the midpoint voltage is jointly controlled by the two bridge arms.

[0032] Other features and advantages of additional aspects of the present invention will be given in part in the following description, and in part will become obvious from the following description, or will be learned through the practice of the present invention. BRIEF DESCRIPTION OF THE DRAWINGS

[0033] Figure 1 is a topological diagram of a 53L-IPHC converter in an embodiment of the present invention;

[0034] Figure 2 A vector diagram of a 53L-IPHC converter in an embodiment of the present invention;

[0035] Figure 3 is a control block diagram of the floating capacitor and the midpoint voltage in an embodiment of the present invention;

[0036] FIG4( a ) is a simulation diagram of the output current of the 53L-IPHC converter in an embodiment of the present invention;

[0037] FIG4( b ) is a simulation diagram of the output voltage of the 53L-IPHC converter in an embodiment of the present invention;

[0038] FIG4( c ) is an output current FFT simulation diagram of the 53L-IPHC converter in an embodiment of the present invention;

[0039] FIG4( d ) is a simulation diagram of the A-phase output voltage of the 53L-IPHC converter in an embodiment of the present invention;

[0040] FIG4( e ) is a simulation diagram of the B-phase output voltage of the 53L-IPHC converter in an embodiment of the present invention;

[0041] FIG4( f ) is a simulation diagram of the A-phase floating capacitor voltage of the 53L-IPHC converter in an embodiment of the present invention;

[0042] FIG4( g) is a simulation diagram of the midpoint voltage of the 53L-IPHC converter in an embodiment of the present invention;

[0043] FIG4(h) is a simulation diagram of sector division of a 53L-IPHC converter in an embodiment of the present invention;

[0044] Figure 5 4 is a flow chart of a control method in an embodiment of the present invention. DETAILED DESCRIPTION

[0045] It should be noted that the following detailed descriptions are illustrative and are intended to provide further explanation of the present application. Unless otherwise specified, all technical and scientific terms used in the present invention have the same meanings as those commonly understood by those skilled in the art to which the present application belongs.

[0046] It should be noted that the terms used herein are only for describing specific embodiments and are not intended to limit the exemplary embodiments according to the present application. As used herein, unless the context clearly indicates otherwise, the singular form is also intended to include the plural form. In addition, it should be understood that when the terms "comprise" and / or "include" are used in this specification, it indicates the presence of features, steps, operations, devices, components and / or combinations thereof.

[0047] Embodiment 1

[0048] In one or more embodiments, a multi-level single-phase interphase hybrid topology converter is disclosed, referring to Figure 1 , including:

[0049] The A-phase bridge arm is a bridge arm of a five-level active neutral-point clamped converter;

[0050] The B-phase bridge arm is a three-level T-type bridge arm;

[0051] The A-phase bridge arm and the B-phase bridge arm share a DC source. The current directions in the figures are all positive directions specified in the topology of the present invention.

[0052] In this embodiment, the first bridge arm uses the bridge arm of the 5L-ANPC converter, and the second bridge arm uses the bridge arm of the T-type three-level converter. The hybrid topology can be abbreviated as 53L-IPHC (5-3Level Inter-phase Hybrid Converter). The number of power devices in this topology is 12, which is 4 less than that of the single-phase 5L-ANPC converter, which can greatly save costs. Although it has 4 more than the single-phase T-type three-level converter, the 53L-IPHC can output the nine-level voltage of the single-phase 5L-ANPC converter, thereby improving the output current and voltage quality.

[0053] In addition, 53L-IPHC has another significant advantage. Compared with the single-phase 5L-ANPC, the number of its floating capacitors is reduced by one, so the control technology is also simpler.

[0054] Embodiment 2

[0055] Based on the multi-level single-phase interphase hybrid topology converter disclosed in Example 1, this embodiment discloses a control method for a single-phase interphase hybrid topology converter, which can achieve a balance between the suspended capacitor voltage and the midpoint voltage of the 53L-IPHC converter, and can output high-quality output current and voltage.

[0056] Specifically, combined Figure 5 , a control method of a multi-level single-phase inter-phase hybrid topology converter of this embodiment specifically includes the following steps:

[0057] S1: According to the characteristics of the 53L-IPHC topology, all the vectors of 53L-IPHC are analyzed, and 8 sectors are divided according to the number of output levels;

[0058] S1-1:

[0059] exist Figure 1 In the topology shown, phase A is a five-level circuit, and the output voltage of phase A can be expressed as:

[0060]

[0061] Among them, V dc is the DC voltage, V aois the phase voltage of phase A of the 53L-IPHC converter, S a This is the switching state defined by phase A.

[0062] Phase B is three-level. Similarly, the output voltage of phase B can be expressed as:

[0063]

[0064] V bo is the phase voltage of phase B of 53L-IPHC converter, S b This is the switch state defined by phase B. Then [S a S b ] is the vector of 53L-IPHC converter. So the total number of 53L-IPHC vectors is 15 (5*3).

[0065] S1-2:

[0066] 53L-IPHC converter output voltage V ab Defined as:

[0067] V ab =V ao -V bo (3)

[0068] Substituting (1) and (2) into the above formula, we can see that V ab It has nine levels of output voltage, namely V dc , 3 / 4V dc , 1 / 2V dc , 1 / 4V dc ,0,-1 / 4V dc , -1 / 2V dc , -3 / 4V dc , -V dc The nine output voltages can be divided into eight sectors, and the sectors and corresponding vectors are as follows: Figure 2 shown.

[0069] S2: Establish a mathematical model of the system and discretize it. By sampling the current value and the given current value at time k, the predicted current value and the given current value at time k+1 can be solved;

[0070] S2-1:

[0071] according to Figure 1 , taking phase A as an example, we can get:

[0072]

[0073] Among them, i a is the output current of phase A of the 53L-IPHC converter, L aand L b They are the output filter inductors of phase A and phase B, R L is the load, V ab It is the voltage between the output points of phase A and phase B.

[0074] Discretizing (4) and shifting the terms yields:

[0075]

[0076] Among them, T s is the sampling time, i a (k) is the output current of phase A at time k, i a (k+1) is the predicted value of the output current of phase A at time k+1, V ab (k) is the voltage between the output points of phase A and phase B at time k.

[0077] S2-2:

[0078] According to the Lagrange back-calculation method, the given current of phase A output current at time k+1 can be calculated by the following formula:

[0079] i * a (k+1)=3i * a (k)-3i * a (k-1)+i * a (k-2) (6)

[0080] Among them, i a * (k+1) is the given value of the output current of phase A at time k+1, i a * (k) is the given value of the output current of phase A at time k, i a * (k-1) is the given value of the output current of phase A at time k-1, i a * (k-2) is the given value of the output current of phase A at time k-2.

[0081] For a single-phase inverter, the current of phase B is opposite to the current of phase A, that is, the phase difference is 180 degrees, so no additional calculation is required. In addition, the current of phase A is formed by the voltage between phases AB, so the analysis of phase A current can achieve simultaneous analysis of phases AB.

[0082] S3: A discrete mathematical model of the suspended capacitor voltage and midpoint voltage is established, and the influence of all vectors in S1 on the capacitor voltage is analyzed. And according to the sector division of S1, a suitable candidate vector is selected for each sector;

[0083] S3-1:

[0084] The eight switching states of phase A of the 53L-IPHC converter are summarized in the following table:

[0085] Table 1 53L-IPHC converter A phase eight switching sequence

[0086]

[0087] The eight switching states of the B phase of the 53L-IPHC converter are summarized in the following table:

[0088] Table 2 Three switching sequences of phase B of 53L-IPHC converter

[0089]

[0090] In the 53L-IPHC converter, the midpoint voltage is controlled by the two phases AB. Combining Table 1 and Table 2, the midpoint current can be expressed in the discrete domain as:

[0091] i o (k)=|S a2 (k)-S a3 (k)|i a (k)+[S b2 (k)-S b1 (k)]i b (k) (7)

[0092] The A-phase floating capacitor in the 53L-IPHC converter is controlled by the A-phase alone. Combined with Table 1, the floating capacitor current can be expressed in the discrete domain as:

[0093] i af (k)=[S a3 (k)-S a4 (k)]i a (k) (8)

[0094] Combining the switching sequences in Table 1 and Table 2 and substituting them into (7) and (8), the 15 vectors in S1 can be summarized into the following table according to their influence on the suspension capacitor current and the midpoint current:

[0095] Table 3 Classification of all vectors of 53L-IPHC converter

[0096]

[0097] Depend on Figure 2 It can be found that the vector V 2 and V 3 With V 11 and V 121 / 2V respectively dc and -1 / 2V dc A pair of redundant vectors. 2 and V 3 As an example, substituting the corresponding switching sequences in Table 2 and Table 3 into formula (7), we can find that the vector V 2 The corresponding midpoint current is i a , vector V 3 The corresponding midpoint current is i b , while in single-phase topology, i a =-i b Therefore, this pair of redundant vectors can realize the current inflow and outflow of the midpoint. Based on the fluctuation of the midpoint voltage, the appropriate redundant vector is selected to balance the midpoint voltage.

[0098] S3-2:

[0099] In step S1, the sector has been divided into 8 sectors. To achieve normal operation of 53L-IPHC, it is necessary to control the voltage of the floating capacitor and the midpoint in each sector.

[0100] It can be found from Table 3 that all vectors that can control the voltage of the floating capacitor can also control the midpoint voltage balance. Figure 2 It can be found that the vectors that can control the voltage of the floating capacitor are interspersed between different sectors. dc and -1 / 2V dc There are redundant vectors that can balance the midpoint voltage. Therefore, through the above analysis, it can be known that the balanced control of the suspended capacitor voltage and the midpoint voltage can be achieved in each sector. The vectors of each sector are summarized in the following table:

[0101] Table 4 Sectors and their candidate vectors

[0102]

[0103] S4: In order to balance the capacitor voltage and determine the priority of the suspension capacitor voltage and midpoint voltage balance, the control constant is set to limit the range of suspension capacitor fluctuation. Two sets of balance formulas for midpoint balance and suspension capacitor balance are established to select the appropriate switch state;

[0104] It can be found from Table 3 that all vectors that can control the suspension capacitor voltage can also control the midpoint voltage balance. Therefore, the vector that controls the suspension capacitor voltage must be controlled in sections, that is, a suitable critical value is selected to determine whether the vector controls the suspension capacitor voltage or the midpoint voltage.

[0105] From formulas (7) and (8), it can be found that the suspension capacitor voltage of phase A can only be controlled by phase A, while the midpoint voltage can be controlled by phases AB. Therefore, the suspension capacitor voltage should have a higher priority. That is, the vector controlling the suspension capacitor voltage should balance the suspension capacitor voltage of phase A before participating in the control of the midpoint voltage.

[0106] Establish the margin of the A-phase floating capacitor voltage:

[0107] |V af (k)-V dc (k) / 4|≥K (9)

[0108] Parameter K (K ≥ 0) is the control range of the suspension capacitor voltage determined by demand. That is, the suspension capacitor voltage is controlled within V dc / 4±K, the above vector participates in controlling the midpoint voltage balance, otherwise it participates in controlling the suspension capacitor voltage.

[0109] The suspended capacitor balance control equation is defined as:

[0110] Fc(k)=[V af (k)-V dc (k) / 4]i a (k) (10)

[0111] The midpoint voltage balance control equation is defined as:

[0112] Dc(k)=[V P (k)-V N (k)]V ao (k)i a (k) (11)

[0113] Its control block diagram is as follows Figure 3 As shown. Combined with Table 1, the current flowing through the suspension capacitor in switch sequences A2 and A6 is opposite to the output current, while the direction of switch sequences A3 and A7 is consistent with the output current. Therefore, when the suspension capacitor voltage is greater than the required value, switch sequences A2 and A6 can be used to reduce the suspension capacitor voltage; on the contrary, when the suspension capacitor voltage is less than the required value, switch sequences A3 and A7 can be used to increase the suspension capacitor voltage. Therefore, the above four switch sequences can achieve a balance of the suspension capacitor voltage.

[0114] In addition, these four switching sequences can also control the midpoint voltage balance. Combined with Table 1, the switching sequence A2 does not affect the midpoint voltage balance, and the midpoint current of its other redundant switching sequence A3 is consistent with the output current, that is, A3 can realize the charging and discharging of the midpoint voltage. Switching sequences A6 and A7 also conform to the above rules. Therefore, the midpoint voltage balance can also be controlled by using these four switching sequences.

[0115] S5: establishing a value function without weight factors, and calculating the duty cycle according to the calculation result of the value function;

[0116] Specifically, the value function g(k) is defined as:

[0117] g(k)=|i * a (k+1)-i a (k+1)| (12)

[0118] Among them, i a * (k+1) and i a (k+1) can be obtained from formulas (6) and (5) respectively.

[0119] Defined in Figure 2 In each sector, the duty cycle of the vector with large line voltage is d 1 , small d 2 As in sector I, vector V 0 The corresponding line voltage is V dc , vector V 1 The corresponding line voltage is 3 / 4V dc So the vector V 0 The corresponding duty cycle is d 1 , vector V 1 The corresponding duty cycle is d 2 The value function calculation results corresponding to these two vectors are also defined according to the magnitude of the line voltage as g 1 (k) and g 2 (k).

[0120] The value function calculation result of formula (12) represents the distance between the predicted current and the given current at time k+1. The larger the value function calculation result, the smaller the duty cycle of the corresponding vector at this moment. That is, the duty cycle d is inversely proportional to the value function calculation result g(k):

[0121]

[0122] Among them, the duty cycle satisfies the mathematical formula

[0123] d 1 +d 2 =1 (14)

[0124] Substituting (14) into (13), the duty cycle of the two vectors can be solved as:

[0125]

[0126] S6: The candidate vector in S3 and the duty cycle in S5 can form a dual-vector three-segment sequence, and then the candidate vector is matched with the switch state in S4, and finally a suitable PWM signal can be formed to drive the 53L-IPHC to work normally.

[0127] The following is further explained in conjunction with the actual simulation diagram. In the simulation, the DC side voltage is 100V, the given current amplitude is 6A, the load resistance is 16Ω, and the filter inductance is 3mL. As shown in Figure 4(a), the current of phase A is sinusoidal and has no distortion. The output line voltage is nine levels as shown in Figure 4(b). In the FFT, as shown in Figure 4(c), the THD of the current is xx, indicating that the output current has a very high quality. The phase voltage of phase A is five levels, and the phase voltage of phase B is three levels, as shown in Figures 4(d) and (e) respectively, proving that the proposed topology is a phase-to-phase hybrid topology. The suspended capacitor voltage of phase A is controlled at 25V, and the midpoint voltage is controlled at 50V, as shown in Figures 4(f) and (g) respectively, proving that the proposed capacitor balancing method for this topology is effective. The sector presents 8 step waves as shown in Figure 4(h), which is consistent with Figure 2 Correspondingly, it shows that the sector division strategy is effective.

[0128] In this embodiment, in order to further reduce the current ripple, the two vectors selected in S3 are arranged in a certain order to form a three-segment sequence. Taking sector I as an example, according to Table 4, the candidate vectors in sector I are V 0 With V 1 The three-stage sequence formed is V 0 -V 1 -V 0 The duty cycle of its action can be obtained from S5, which is d 1 -d 2 -d 1 The obtained vector is then selected according to the switching sequence in step S4, and finally a suitable PWM signal can be formed to drive the 53L-IPHC to work normally.

[0129] Different from the traditional double closed-loop control, the control method of this embodiment does not require a PI controller, thereby saving the time of selecting PI parameters and improving the response speed of the system. In addition, the method of this embodiment does not contain a weight factor, which greatly reduces the amount of calculation and saves the working time of selecting appropriate weight parameters. For the control of capacitor voltage, the influence of all vectors on capacitor current is analyzed, and a segmented control function is designed to effectively control the midpoint and suspended capacitor voltages. Two vectors and a three-stage sequence are used to further reduce current ripple.

[0130] Embodiment 2

[0131] In one or more embodiments, a control system of a multi-level single-phase inter-phase hybrid topology converter is disclosed, comprising:

[0132] The output current solution module is used to divide the sectors according to the number of output levels; establish a system mathematical model and discretize it to solve the predicted current value and the given current value at time k+1;

[0133] The candidate vector selection module is used to establish a discrete mathematical model of the suspended capacitor voltage and the midpoint voltage, and determine the candidate vector of each sector based on the influence of each vector on the capacitor voltage to balance the midpoint voltage;

[0134] The PWM signal driving module is used to establish a value function without weight factors, and calculate the duty cycle of the candidate vector in each sector through the calculation result of the value function to form a dual-vector three-segment sequence. Combined with the corresponding switch state sequence, a PWM signal is formed to drive the multi-level single-phase interphase hybrid topology converter to work normally.

[0135] It should be noted that the specific implementation methods of the above modules have been described in Example 1 and will not be described in detail here.

[0136] Embodiment 3

[0137] In one or more embodiments, a terminal device is disclosed, including a server, the server including a memory, a processor, and a computer program stored in the memory and executable on the processor, and the processor implements the control method of the multi-level single-phase interphase hybrid topology converter in Embodiment 1 when executing the program. For the sake of brevity, it will not be described in detail here.

[0138] It should be understood that in this embodiment, the processor may be a central processing unit CPU, and the processor may also be other general-purpose processors, digital signal processors DSP, application-specific integrated circuits ASIC, off-the-shelf programmable gate arrays FPGA or other programmable logic devices, discrete gate or transistor logic devices, discrete hardware components, etc. The general-purpose processor may be a microprocessor or the processor may also be any conventional processor, etc.

[0139] The memory may include a read-only memory and a random access memory, and provide instructions and data to the processor. A portion of the memory may also include a non-volatile random access memory. For example, the memory may also store information about the device type.

[0140] In the implementation process, each step of the above method can be completed by an integrated logic circuit of hardware in a processor or an instruction in the form of software.

[0141] Embodiment 4

[0142] In one or more embodiments, a computer-readable storage medium is disclosed, in which a plurality of instructions are stored, wherein the instructions are suitable for being loaded by a processor of a terminal device and executing the control method of the multi-level single-phase inter-phase hybrid topology converter described in the first embodiment.

[0143] Although the above describes the specific implementation mode of the present invention in conjunction with the accompanying drawings, it is not intended to limit the scope of protection of the present invention. Those skilled in the art should understand that various modifications or variations that can be made by those skilled in the art on the basis of the technical solution of the present invention without creative work are still within the scope of protection of the present invention.

Claims

1. A multi-level single-phase interphase hybrid topology converter, characterized in that: include: The A-phase bridge arm is a bridge arm of a five-level active neutral-point clamped converter; The B-phase bridge arm is a three-level T-type bridge arm; The A-phase bridge arm and the B-phase bridge arm share a DC source; Specifically, phase A is five-level, and the output voltage of phase A is expressed as: Among them, V dc is the DC voltage, V ao is the phase voltage of phase A of 53L-IPHC converter, S a It is the switch state defined by phase A; Phase B is three-level, so the output voltage of phase B is expressed as: V bo is the phase voltage of phase B of 53L-IPHC converter, S b It is the switch state defined by phase B; 53L-IPHC converter output voltage V ab Defined as: V ab =V ao -V bo (3) Substituting (1) and (2) into (3), we get V ab It has nine levels of output voltage, namely V dc , 3 / 4V dc , 1 / 2V dc , 1 / 4V dc ,0,-1 / 4V dc , -1 / 2V dc , -3 / 4V dc , -V dc ; Switch S in the bridge arm of phase A a1 The collector of the switch S in the B phase bridge arm b1 The collector of the A-phase bridge arm is connected to the positive electrode of the DC side. The emitter of the switch in the B phase bridge arm The emitter of the switch is connected to the negative pole of the DC side. The emitter and switch S a2 The collectors of the switch S are the midpoints of the A-phase bridge arm and the B-phase bridge arm. b2 The collector is the midpoint of the B-phase bridge arm, the midpoints of the A-phase and B-phase are connected, and are commonly connected to the midpoint O of the DC side capacitor.

2. A control method for a multi-level single-phase interphase hybrid topology converter as claimed in claim 1, characterized in that: include: Divide sectors according to the number of output levels; Establish a mathematical model of the system and discretize it to solve the predicted current value and given current value at time k+1; A discrete mathematical model of the suspended capacitor voltage and the midpoint voltage is established, and based on the influence of each vector on the capacitor voltage, a candidate vector for each sector is determined to balance the midpoint voltage; Establish a value function without weight factors, calculate the duty cycle of the candidate vector in each sector through the calculation result of the value function, form a dual-vector three-stage sequence, and combine it with the corresponding switch state sequence to form a PWM signal to drive the multi-level single-phase interphase hybrid topology converter to work normally; The specific steps are: S1: According to the characteristics of the 53L-IPHC topology, all the vectors of the 53L-IPHC are analyzed, and divided into 8 sectors according to the number of output levels; S2: Establish a mathematical model of the system and discretize it. By sampling the current value and the given current value at time k, solve the predicted current value and the given current value at time k+1; Specifically, the mathematical model of the phase A system is established: Among them, i a is the output current of phase A of the 53L-IPHC converter, L a and L b They are the output filter inductors of phase A and phase B, R L is the load, V ab is the voltage between the output points of phase A and phase B; By discretizing (4) and shifting the terms, we can obtain the predicted current value of phase A at time k+1: Among them, T s is the sampling time, i a (k) is the output current of phase A at time k, i a (k+1) is the predicted value of the output current of phase A at time k+1, V ab (k) is the voltage between the output points of phase A and phase B at time k; According to the Lagrange back-calculation method, the given current of phase A output current at time k+1 is calculated: i * a (k+1)=3i * a (k)-3i * a (k-1)+i * a (k-2) (6) Among them, i a * (k+1) is the given value of the output current of phase A at time k+1, i a * (k) is the given value of the output current of phase A at time k, i a * (k-1) is the given value of the output current of phase A at time k-1, i a * (k-2) is the given value of the output current of phase A at time k-2; S3: Establish a discrete mathematical model of the suspended capacitor voltage and midpoint voltage, analyze the influence of all vectors in S1 on the capacitor voltage; select appropriate candidate vectors for each sector according to the sector division of S1; Among them, in the 53L-IPHC converter, the midpoint voltage is controlled by the AB two-phase, and the midpoint current is expressed in the discrete domain as: i o (k)=|S a2 (k)-S a3 (k)|i a (k)+[S b2 (k)-S b1 (k)]i b (k) (7) Where S a2 (k) is the switch S of phase A at time k a2 The switching state, S a3 (k) is the switch S of phase A at time k a3 The switching state, S b2 (k) is the switch S of phase B at time k b2 The switching state, S b1 (k) is the switch S of phase B at time k b1 The switch status; The A-phase floating capacitor in the 53L-IPHC converter is controlled by the A-phase alone, and the floating capacitor current is expressed in the discrete domain as: i af (k)=[S a3 (k)-S a4 (k)]i a (k)(8) In the formula, S a4 (k) is the switch S of phase A at time k a4 The switch status; Combined with the switching sequence, substitute it into (7) and (8) to analyze the influence of the 15 vectors in S1 on the suspension capacitor current and the midpoint current; S4: To balance the capacitor voltage and determine the priority of the suspension capacitor voltage and the midpoint voltage balance, set the control constant to limit the range of the suspension capacitor fluctuation; establish two sets of balance formulas for the midpoint balance and the suspension capacitor balance, and select the appropriate switch state; Establish the margin of the A phase floating capacitor voltage: |V af (k)-V dc (k) / 4|≥K (9) Parameter K (K ≥ 0) is the control range of the suspension capacitor voltage determined by demand; that is, the suspension capacitor voltage is controlled within V dc / 4±K, the above vector participates in controlling the midpoint voltage balance, otherwise it participates in controlling the suspension capacitor voltage; The suspended capacitor balance control equation is defined as: Fc(k)=[V af (k)-V dc (k) / 4]i a (k)(10) The midpoint voltage balance control equation is defined as: Dc(k)=[V P (k)-V N (k)]V ao (k)i a (k)(11) S5: establishing a value function without weight factors, and calculating the duty cycle according to the calculation result of the value function; The cost function g(k) is determined based on the predicted current value and the given current value at time k+1: g(k)=|i * a (k+1)-i a (k+1)|(12) The duty cycle is inversely proportional to the value function calculation result g(k); S6: The candidate vector in S3 and the duty cycle in S5 form a dual-vector three-segment sequence, and then the candidate vector is matched with the switch state in S4, and finally a suitable PWM signal is formed to drive the 53L-IPHC to work normally.

3. A control method for a multi-level single-phase interphase hybrid topology converter as claimed in claim 2, characterized in that: The sectors are divided according to the number of output levels, specifically: Based on the A-phase voltage and the B-phase voltage of the multi-level single-phase interphase hybrid topology converter, the output voltage of the converter is calculated; Sectors are divided based on the output voltage, and a vector corresponding to each sector is determined.

4. A control system for a multi-level single-phase inter-phase hybrid topology converter, using the multi-level single-phase inter-phase hybrid topology converter as claimed in claim 1, characterized in that: include: Output current solving module, used to divide sectors according to the number of output levels; Establish a mathematical model of the system and discretize it to solve the predicted current value and given current value at time k+1; The candidate vector selection module is used to establish a discrete mathematical model of the suspended capacitor voltage and the midpoint voltage, and determine the candidate vector of each sector based on the influence of each vector on the capacitor voltage to balance the midpoint voltage; The PWM signal driving module is used to establish a value function without weight factors, calculate the duty cycle of the candidate vector in each sector through the calculation result of the value function, form a dual-vector three-stage sequence, and combine it with the corresponding switch state sequence to form a PWM signal to drive the multi-level single-phase interphase hybrid topology converter to work normally; The specific steps are: S1: According to the characteristics of the 53L-IPHC topology, all the vectors of the 53L-IPHC are analyzed, and divided into 8 sectors according to the number of output levels; S2: Establish a mathematical model of the system and discretize it. By sampling the current value and the given current value at time k, solve the predicted current value and the given current value at time k+1; Specifically, the mathematical model of the phase A system is established: Among them, i a is the output current of phase A of the 53L-IPHC converter, L a and L b They are the output filter inductors of phase A and phase B, R L is the load, V ab is the voltage between the output points of phase A and phase B; By discretizing (4) and shifting the terms, we can obtain the predicted current value of phase A at time k+1: Among them, T s is the sampling time, i a (k) is the output current of phase A at time k, i a (k+1) is the predicted value of the output current of phase A at time k+1, V ab (k) is the voltage between the output points of phase A and phase B at time k; According to the Lagrange back-calculation method, the given current of phase A output current at time k+1 is calculated: i * a (k+1)=3i * a (k)-3i * a (k-1)+i * a (k-2) (6) Among them, i a * (k+1) is the given value of the output current of phase A at time k+1, i a * (k) is the given value of the output current of phase A at time k, i a * (k-1) is the given value of the output current of phase A at time k-1, i a * (k-2) is the given value of the output current of phase A at time k-2; S3: Establish a discrete mathematical model of the suspended capacitor voltage and midpoint voltage, analyze the influence of all vectors in S1 on the capacitor voltage; select appropriate candidate vectors for each sector according to the sector division of S1; Among them, in the 53L-IPHC converter, the midpoint voltage is controlled by the AB two-phase, and the midpoint current is expressed in the discrete domain as: i o (k)=|S a2 (k)-S a3 (k)|i a (k)+[S b2 (k)-S b1 (k)]i b (k) (7) Where S a2 (k) is the switch S of phase A at time k a2 The switching state, S a3 (k) is the switch S of phase A at time k a3 The switching state, S b2 (k) is the switch S of phase B at time k b2 The switching state, S b1 (k) is the switch S of phase B at time k b1 The switch status; The A-phase floating capacitor in the 53L-IPHC converter is controlled by the A-phase alone, and the floating capacitor current is expressed in the discrete domain as: i af (k)=[S a3 (k)-S a4 (k)]i a (k)(8) In the formula, S a4 (k) is the switch S of phase A at time k a4 The switch status; Combined with the switching sequence, substitute it into (7) and (8) to analyze the influence of the 15 vectors in S1 on the suspension capacitor current and the midpoint current; S4: To balance the capacitor voltage and determine the priority of the suspension capacitor voltage and the midpoint voltage balance, set the control constant to limit the range of the suspension capacitor fluctuation; establish two sets of balance formulas for the midpoint balance and the suspension capacitor balance, and select the appropriate switch state; Establish the margin of the A phase floating capacitor voltage: |V af (k)-V dc (k) / 4|≥K (9) Parameter K (K ≥ 0) is the control range of the suspension capacitor voltage determined by demand; that is, the suspension capacitor voltage is controlled within V dc / 4±K, the above vector participates in controlling the midpoint voltage balance, otherwise it participates in controlling the suspension capacitor voltage; The suspended capacitor balance control equation is defined as: Fc(k)=[V af (k)-V dc (k) / 4]i a (k)(10) The midpoint voltage balance control equation is defined as: Dc(k)=[V P (k)-V N (k)]V ao (k)i a (k)(11) S5: establishing a value function without weight factors, and calculating the duty cycle according to the calculation result of the value function; The cost function g(k) is determined based on the predicted current value and the given current value at time k+1: g(k)=|i * a (k+1)-i a (k+1)|(12) The duty cycle is inversely proportional to the value function calculation result g(k); S6: The candidate vector in S3 and the duty cycle in S5 form a dual-vector three-segment sequence, and then the candidate vector is matched with the switch state in S4, and finally a suitable PWM signal is formed to drive the 53L-IPHC to work normally.

5. A terminal device, comprising a processor and a memory, wherein the processor is used to implement each instruction; and the memory is used to store multiple instructions, characterized in that: The instructions are suitable for being loaded by a processor and executing the control method of the multi-level single-phase inter-phase hybrid topology converter according to any one of claims 1 to 3.

6. A computer-readable storage medium storing a plurality of instructions, characterized in that: The instructions are suitable for being loaded by a processor of a terminal device and executing the control method of a multi-level single-phase inter-phase hybrid topology converter according to any one of claims 1 to 3.

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