Infrared image sensor

Abstract

An infrared image sensor includes: a plurality of reference circuits configured to respectively provide a plurality of reference analog values to a plurality of bolometer units; an analog front-end circuit configured to collect a plurality of output analog values based on the plurality of reference analog values; and a noise suppression circuit configured to switch a correspondence between the plurality of bolometer units and the plurality of reference analog values at unit time intervals.

Description

[0001] Cross - reference to related applications

[0002] This application claims the benefit of priority to Korean Patent Application No. 10 - 2020 - 0183637, filed with the Korean Intellectual Property Office on December 24, 2020, the entire disclosure of which is incorporated herein by reference for all purposes. Technical field

[0003] The following description relates to an infrared image sensor. Background art

[0004] Existing infrared image sensors that use infrared light radiated by an object and are used to observe an object even in a dark environment have been widely used for military, medical, and industrial purposes. Existing infrared imaging systems have been mainly developed for the security and defense industries. However, in recent years, the market for infrared imaging systems has rapidly expanded to civilian industrial fields, such as vehicle vision assistance devices and security cameras. Recently, research has been conducted on using infrared imaging systems for mobile devices or wearable devices. Therefore, the demand for infrared cameras including infrared image sensors is increasing day by day. Summary of the invention

[0005] The purpose of providing this summary section is to introduce, in a brief form, the selection of inventive concepts, which will be further described in the detailed description section below. This summary section is not intended to identify the key features or essential features of the claimed subject matter, nor is it intended to assist in determining the scope of the claimed subject matter.

[0006] In one general aspect, an infrared image sensor includes: a plurality of reference circuits configured to respectively provide a plurality of reference analog values to a plurality of bolometer units; an analog front - end circuit configured to collect a plurality of output analog values based on the plurality of reference analog values; and a noise suppression circuit configured to switch the correspondence between the plurality of bolometer units and the plurality of reference analog values at unit time intervals.

[0007] The noise suppression circuit may also be configured to perform the switching so as to repeat the correspondence between the plurality of bolometer units and the plurality of reference analog values at an image time interval longer than the unit time interval.

[0008] The plurality of reference circuits may include a first reference circuit to an m - th reference circuit. The noise suppression circuit is also configured to perform the switching such that, during the image time interval, the first reference circuit to the m - th reference circuit respectively correspond to the first bolometer unit to the m - th bolometer unit at least once.

[0009] The analog front-end circuit can also be configured to output multiple infrared image values, and the multiple output analog values before switching the correspondence between the multiple bolometer units and the multiple reference analog values and the multiple output analog values after switching are applied together to the multiple infrared image values.

[0010] The infrared image sensor may further include a multiplexer configured to receive multiple infrared image values through multiple input paths and provide the multiple infrared image values to an AD converter through an output path, where the number of output paths is less than the number of multiple input paths.

[0011] The analog front-end circuit may include multiple integrators. Each of the multiple integrators can be configured to integrate the multiple output analog values sequentially before and after switching the correspondence between the multiple bolometer units and the multiple reference analog values.

[0012] The multiple bolometer units can be configured into multiple unit groups, each unit group including two or more bolometer units. The analog front-end circuit may include multiple integrators, which are in one-to-one correspondence with the multiple unit groups and configured to integrate at least two corresponding output analog values among the multiple output analog values together.

[0013] The analog front-end circuit may further include multiple branch nodes located between the multiple unit groups and the multiple integrators, and each branch node electrically connects the transmission paths of at least two corresponding output analog values to each other.

[0014] Each of the multiple bolometer units may include multiple bolometer pixels.

[0015] In another general aspect, an infrared image sensor includes: multiple reference circuits configured to respectively provide multiple reference analog values to multiple bolometer units, each of the multiple bolometer units including multiple bolometer pixels; and an analog front-end circuit configured to collect multiple output analog values according to the multiple reference analog values. The multiple bolometer units are configured into multiple unit groups, each unit group including two or more bolometer units. The analog front-end circuit includes multiple integrators, which are in one-to-one correspondence with the multiple unit groups and configured to integrate at least two corresponding output analog values among the multiple output analog values together.

[0016] The analog front-end circuit may further include multiple first amplifiers, which are respectively located between the multiple unit groups and the multiple integrators and electrically connected to the transmission paths of the multiple output analog values.

[0017] The analog front-end circuit may further include a plurality of third amplifiers disposed on a plurality of feedback paths from the output to the input of respective ones of the plurality of integrators. Each of the plurality of integrators may include a second amplifier and a capacitor electrically connected in parallel with the second amplifier.

[0018] The plurality of first amplifiers, the second amplifiers, and the plurality of third amplifiers may each be configured as a buffer circuit having an input impedance greater than an output impedance.

[0019] The analog front-end circuit may further include a plurality of chopper circuits respectively connected between the plurality of cell groups and the plurality of integrators and electrically connected to transmission paths of the plurality of output analog values respectively.

[0020] The analog front-end circuit may further include a plurality of branch nodes located between the plurality of cell groups and the plurality of integrators, and each branch node electrically connects transmission paths of at least two of the plurality of output analog values to each other.

[0021] The analog front-end circuit may further include a plurality of chopper circuits electrically connected between the plurality of branch nodes and the plurality of integrators.

[0022] The analog front-end circuit may further include a plurality of chopper circuits disposed on a plurality of feedback paths from the output to the input of respective ones of the plurality of integrators.

[0023] The analog front-end circuit may further include a plurality of first amplifiers disposed on a plurality of feedback paths from the output to the input of respective ones of the plurality of integrators. Each of the plurality of integrators may include a second amplifier and a capacitor electrically connected in parallel with the second amplifier.

[0024] Other features and aspects will become apparent from the following detailed description, the drawings, and the appended claims. BRIEF DESCRIPTION OF THE DRAWINGS

[0025] Figure 1 is a diagram showing an infrared image sensor according to an embodiment.

[0026] Figure 2 is a diagram showing Figure 1 the noise suppression circuit of the infrared image sensor shown according to an embodiment.

[0027] Figure 3 is a diagram showing the switching signals of a plurality of switches input to Figure 2 the noise suppression circuit shown according to an embodiment.

[0028] Figure 4A and Figure 4B are diagrams respectively showing Figure 1 the analog front-end circuit of the infrared image sensor shown according to an embodiment.

[0029] Figure 5A and Figure 5B are diagrams respectively showing multiple unit groups of an infrared image sensor according to an embodiment.

[0030] Figure 6A and Figure 6B is a diagram showing according to an embodiment Figure 5A and Figure 5B the analog front-end circuit of the infrared image sensor shown in

[0031] Figure 7 is a diagram showing the package structure of an infrared image sensor according to an embodiment.

[0032] In all the figures and the detailed description, the same reference numerals refer to the same elements. For clarity, illustration, and convenience, the figures may not be drawn to scale, and the relative sizes, proportions, and depictions of elements in the figures may be exaggerated. Detailed Description

[0033] The following detailed description is provided to assist the reader in obtaining a comprehensive understanding of the methods, devices, and / or systems described herein. However, various changes, modifications, and equivalents of the methods, devices, and / or systems described herein will be apparent after understanding this disclosure. For example, except for operations that must occur in a specific order, the order of the operations described herein is merely exemplary and is not limited to the order set forth herein, but rather changes that will be apparent after understanding this disclosure may be made. Additionally, descriptions of features known in the art may be omitted for greater clarity and conciseness.

[0034] The features described herein may be implemented in different forms and should not be construed as limited to the examples described herein. On the contrary, the examples described herein are only used to illustrate some of the many possible ways of implementing the methods, devices, and / or systems described herein that will be apparent after understanding this disclosure. In the following, although embodiments of the present disclosure will be described in detail with reference to the figures, it should be noted that the examples are not limited thereto.

[0035] Throughout the specification, when an element such as a layer, region, or substrate is described as being "on," "connected to," or "coupled to" another element, the element can be directly "on," directly "connected to," or directly "coupled to" the other element, or one or more other elements can be present between the element and the other element. Conversely, when an element is described as being "directly on," "directly connected to," or "directly coupled to" another element, there are no other elements between the element and the other element. As used herein, a "portion" of an element can include the entire element or less than the entire element.

[0036] As used herein, the phrase "and / or" includes any one of the associated listed items and any combination of any two or more of them. Similarly, "at least one of..." includes any one of the associated listed items and any combination of any two or more of them.

[0037] Although terms such as "first," "second," and "third" may be used herein to describe various components, assemblies, regions, layers, or portions, these components, assemblies, regions, layers, or portions are not limited by these terms. Rather, these terms are only used to distinguish one component, assembly, region, layer, or portion from another. Thus, a first component, first assembly, first region, first layer, or first portion referred to in an example can also be referred to as a second component, second assembly, second region, second layer, or second portion without departing from the teachings of the example.

[0038] Spatial relative terms such as "above," "upper," "below," and "lower" may be used herein for convenience in description to describe the relationship of one element to another as shown in the figures. In addition to covering the orientations depicted in the figures, these spatial relative terms are intended to also cover different orientations of the device in use or operation. For example, if the device in the figures is flipped, an element described as being "above" or "upper" relative to another element will be "below" or "lower" relative to that other element. Thus, depending on the spatial orientation of the device, the term "above" covers both the "above" and "below" orientations. The device can also be oriented in other ways (e.g., rotated 90 degrees or in other orientations), and the spatial relative terms used herein should be interpreted accordingly.

[0039] The terms used herein are for describing various examples only and are not intended to limit the disclosure. Unless the context clearly indicates otherwise, the articles "a," "an," and "the" are intended to include the plural forms as well. The phrases "including," "comprising," and "having" specify the presence of the stated features, numbers, operations, components, elements, and / or combinations thereof, but do not preclude the presence or addition of one or more other features, numbers, operations, components, elements, and / or combinations thereof.

[0040] Due to manufacturing techniques and / or tolerances, the shapes shown in the drawings may vary. Accordingly, the examples described herein are not limited to the specific shapes shown in the drawings but include shape variations that occur during manufacturing.

[0041] The features of the examples described herein can be combined in various ways, which will be apparent after understanding the disclosure. Additionally, although the examples described herein have various configurations, it will be apparent after understanding the disclosure that other configurations are possible.

[0042] In this document, it should be noted that the use of the phrase "may" with respect to an example (e.g., with respect to what an example may include or implement) means that there is at least one example in which such a feature is included or implemented, and not all examples are limited thereto.

[0043] Figure 1 is a diagram showing an infrared image sensor 100a according to an embodiment.

[0044] Reference Figure 1 , the infrared image sensor 100a may include, for example, a noise suppression circuit 110a, additional reference circuits such as reference circuits 115-1, 115-2, up to the mth reference circuit 115-m (where m is an integer greater than or equal to 3), and an analog front-end circuit 120a. The infrared image sensor 100a can acquire an infrared image through a bolometer 10.

[0045] Although the infrared image sensor 100a may include any number of reference circuits up to the mth reference circuit 115-m, for the sake of brevity, the following description will refer to reference circuits 115-1, 115-2, and 115-m and the corresponding components, signals, and parameters. It should be understood that similar components, signals, and parameters will apply to any additional reference circuits included in the infrared image sensor 100a.

[0046] The bolometer 10 may have a structure in which a plurality of bolometer pixels 11 are two-dimensionally arranged, and each of the bolometer pixels 11 may have a resistance value based on the energy of the incident infrared light. For example, the bolometer pixel 11 may contain vanadium oxide (VO x) and / or amorphous silicon, and can be implemented by a silicon wafer process.

[0047] When a reference voltage is provided to each of the bolometer pixels 11, the output currents Iout1, Iout2, and Ioutm of the corresponding bolometer pixels 11 can be determined respectively based on the resistance values and the reference voltage of the bolometer pixels 11. When a reference current is provided to each of the bolometer pixels 11, the output voltages Vout1, Vout2, and Voutm of the corresponding bolometer pixels 11 can be determined respectively based on the resistance values and the reference current of the bolometer pixels 11. The infrared image sensor 100a can identify the magnitude of the infrared energy at the corresponding positions of the bolometer pixels 11 based on the output currents Iout1, Iout2, and Ioutm or the output voltages Vout1, Vout2, and Voutm.

[0048] For example, the bolometer 10 may include row control switches 12 respectively electrically connected between the bolometer pixels 11 and the infrared image sensor 100a.

[0049] The row decoder 160 that may be included in the infrared image sensor 100a can connect or disconnect the electrical connections throughout each of the row control switches 12. For example, the row decoder 160 can connect the electrical connections of each of the row control switches in the first row throughout the row control switches 12, and disconnect the electrical connections of each of the row control switches in the remaining rows throughout the row control switches 12. Thereafter, the row decoder 160 can disconnect the electrical connections of each of the row control switches in the first row throughout the row control switches 12, and connect the electrical connections of each of the row control switches in the second row throughout the row control switches 12. The above process can be sequentially executed until the row control switches of the last row of the row control switches 12, and the on / off pattern of the row control switches from the first row to the last row can be repeated.

[0050] The infrared image sensor 100a can sequentially collect the output currents Iout1, Iout2, and Ioutm or the output voltages Vout1, Vout2, and Voutm based on the resistance values and the reference voltage of the bolometer pixels adjacent to the row control switches in the on state among the multiple row control switches 12 in the bolometer pixels 11.

[0051] The infrared image sensor 100a can identify the correspondence between the time points of collecting the output currents Iout1, Iout2, and Ioutm or the output voltages Vout1, Vout2, and Voutm and the row numbers of the collection targets through the row decoder 160. Therefore, the same reference voltage / current can be used for the bolometer pixels with the same row numbers among the multiple bolometer pixels 11, and the same output current / voltage path can be used.

[0052] Therefore, according to the column number (or row number) of the bolometer pixel 11, the bolometer 10 may include bolometer units cell1, cell2, and cellm (i.e., the first bolometer unit cell1 to the m-th bolometer unit cellm).

[0053] The analog front-end circuit 120a may collect output analog values according to the reference analog values provided to the bolometer units cell1, cell2, and cellm of the bolometer 10. The output analog values may be output currents Iout1, Iout2, and Ioutm or output voltages Vout1, Vout2, and Voutm.

[0054] The reference circuits 115-1, 115-2, and 115-m may respectively provide reference analog values (e.g., reference voltages or reference currents) to the bolometer units cell1, cell2, and cellm of the bolometer 10. For example, the reference circuits 115-1, 115-2, and 115-m may each include a circuit that generates a reference voltage or reference current without being affected by the external environment or processing errors, such as a bandgap reference circuit.

[0055] The reference circuits 115-1, 115-2, and 115-m will hereinafter be referred to as the first reference circuit 115-1, the second reference circuit 115-2, and the m-th reference circuit 115-m. The number of the reference circuits 115-1 to 115-m may be the same as the number of the multiple bolometer units cell1 to cellm of the bolometer 10.

[0056] The first reference circuit 115-1, the second reference circuit 115-2, and the m-th reference circuit 115-m may be affected by process errors in the bolometer manufacturing process (e.g., the silicon wafer process), and due to the influence of the process errors, at least one of thermal noise or flicker noise may be introduced into the output currents Iout1, Iout2, and Ioutm or the output voltages Vout1, Vout2, and Voutm.

[0057] The noise suppression circuit 110a may switch the correspondence between the bolometer units cell1, cell2, and cellm of the bolometer 10 and the reference analog values of the reference circuits 115-1, 115-2, and 115-m at unit time intervals. For example, the noise suppression circuit 110a may receive or generate a switching signal Fns and perform a switching operation based on the switching signal Fns.

[0058] Therefore, the noise introduced into the output currents Iout1, Iout2, and Ioutm or the output voltages Vout1, Vout2, and Voutm can be divided or averaged, so that the total magnitude of the noise of the output currents Iout1, Iout2, and Ioutm or the output voltages Vout1, Vout2, and Voutm can be reduced. Therefore, the infrared image sensor 100a can reduce the noise of the acquired infrared image.

[0059] The analog front-end circuit 120a can output a plurality of infrared image values, and the plurality of infrared image values are applied together with a plurality of output analog values before the correspondence switching between the bolometer cells cell1, cell2, and cellm of the bolometer 10 and the reference analog values of the reference circuits 115-1, 115-2, and 115-m and the output analog values after the switching. Therefore, the infrared image values can correspond to the output currents Iout1, Iout2, and Ioutm or the output voltages Vout1, Vout2, and Voutm, and the noise of the output currents Iout1, Iout2, and Ioutm or the output voltages Vout1, Vout2, and Voutm is divided or averaged.

[0060] The multiplexer 130 that can be included in the infrared image sensor 100a can receive infrared image values from the analog front-end circuit 120a through a plurality of input paths, and can provide the infrared image values to the AD converter 140 through an output path, and the number of output paths is less than the number of input paths.

[0061] The AD converter 140 can convert the infrared image values into digital values. The digital values can be converted into a final infrared image through image processing performed by an image signal processor (ISP).

[0062] The offset eliminator 170 that can be included in the infrared image sensor 100a can perform processing in an analog manner (for example, applying an offset elimination voltage or an offset elimination current to the bolometer cells of a specific column) to eliminate the imbalance between the reference analog values of the reference circuits 115-1, 115-2, and 115-m. The fine noise that may be generated due to the operation of the offset eliminator 170 can be moved to an unused frequency range through the switching operation of the noise suppression circuit 110a, or can be divided or averaged.

[0063] Figure 2 FIG. is a diagram showing a noise suppression circuit 110b that can be included in the infrared image sensor 100a according to an embodiment. Figure 3 FIG. is a diagram showing switching signals of a plurality of switches input to the noise suppression circuit 110b.

[0064] Reference Figure 2, the noise suppression circuit 110b may include a plurality of switches 111-11, 111-12, 111-13, 111-1m, 111-n1, 111-n2, 111-n3, and 111-nm electrically connected between the reference circuits 115-1, 115-2, 115-3, and 115-m and the bolometers.

[0065] The noise suppression circuit 110b may perform switching so as to repeat the correspondence between the plurality of output analog values (e.g., Vout1, Vout2, Vout3, and Voutm) of the plurality of bolometer units and the plurality of reference analog values of the reference circuits 115-1, 115-2, 115-3, and 115-m at an image time interval longer than a unit time interval.

[0066] The noise suppression circuit 110b may perform switching such that during the image time interval, the first reference circuit 115-1 to the mth reference circuit 115-m respectively correspond to the output analog values (e.g., Vout1, Vout2, Vout3, and Voutm) of the first bolometer unit to the mth bolometer unit at least once.

[0067] The unit time interval may be at least one of a first unit time interval from time point t0 to time point t1, a second unit time interval from time point t1 to time point t2, a third unit time interval from time point t2 to time point t3, a fourth unit time interval from time point t3 to time point t4, a fifth unit time interval from time point t4 to time point t5, a sixth unit time interval from time point t5 to time point t6, a seventh unit time interval from time point t6 to time point t7, and an eighth unit time interval from time point t7 to time point t8. The image time interval may be one of a first image time interval from time point t0 to time point t4 and a second image time interval from time point t4 to time point t8.

[0068] For example, refer to Figure 2 and Figure 3, the on / off switching of the eleventh switch 111-11 can be determined based on the eleventh switching signal Fns11, the on / off switching of the twelfth switch 111-12 can be determined based on the twelfth switching signal Fns12, the on / off switching of the thirteenth switch 111-13 can be determined based on the thirteenth switching signal Fns13, the on / off switching of the fourteenth switch 111-14 can be determined based on the fourteenth switching signal Fns14, the on / off switching of the n1-th switch 111-n1 can be determined based on the twenty-first switching signal Fns21, the on / off switching of the n2-th switch 111-n2 can be determined based on the twenty-second switching signal Fns22, the on / off switching of the n3-th switch 111-n3 can be determined based on the twenty-third switching signal Fns23, and the on / off switching of the n4-th switch 111-n4 can be determined based on the twenty-fourth switching signal Fns24.

[0069] The eleventh switch 111-11 and the n4-th switch 111-n4 can be in the on state during the first unit time interval (t0 to t1) or the fifth unit time interval (t4 to t5). The first reference circuit 115-1 can correspond to the first output analog value (e.g., Vout1), and the m-th reference circuit 115-m can correspond to the m-th output analog value (e.g., Voutm).

[0070] The twelfth switch 111-12 and the n1-th switch 111-n1 can be in the on state during the second unit time interval (t1 to t2) or the sixth unit time interval (t5 to t6). The first reference circuit 115-1 can correspond to the second output analog value (e.g., Vout2), and the m-th reference circuit 115-m can correspond to the first output analog value (e.g., Vout1).

[0071] The thirteenth switch 111-13 and the n2-th switch 111-n2 can be in the on state during the third unit time interval (t2 to t3) or the seventh unit time interval (t6 to t7). The first reference circuit 115-1 can correspond to the third output analog value (e.g., Vout3), and the m-th reference circuit 115-m can correspond to the second output analog value (e.g., Vout2).

[0072] The fourteenth switch 111-14 and the n3-th switch 111-n3 can be in the on state during the fourth unit time interval (t3 to t4) or the eighth unit time interval (t7 to t8). The first reference circuit 115-1 can correspond to the fourth output analog value (e.g., Vout4), and the m-th reference circuit 115-m can correspond to the third output analog value (e.g., Vout3).

[0073] According to the design, the noise suppression circuit 110b may further include a clock generator 112 and a switching signal divider 113. The switching signal divider 113 may divide the switching signal Fns into a plurality of switching signals, and the clock generator 112 may convert the plurality of switching signals into clocks and synchronize the plurality of switching signals.

[0074] Figure 4A and Figure 4B are diagrams respectively showing the analog front-end circuits 120b and 120c that may be respectively included in the infrared image sensor 100a according to an embodiment.

[0075] Reference Figure 4A and Figure 4B , each of the analog front-end circuits 120b and 120c may include a plurality of integrators Itg respectively corresponding to a plurality of bolometer units of the bolometer, and each of the integrators Itg may include a second amplifier 126 and a capacitor C.

[0076] Before and after changing the correspondence between the switched output analog values (e.g., Voutn and Ioutn) and the reference analog value, each of the integrators Itg may sequentially integrate the output analog values (e.g., Voutn and Ioutn).

[0077] For example, the analog front-end circuits 120b and 120c may include a branch node 125 located between the plurality of bolometer units and the integrators Itg and electrically connecting the transmission paths of the output analog values (e.g., Voutn and Ioutn).

[0078] For example, the analog front-end circuit 120b may include a first amplifier 124a located between the plurality of bolometer units and the plurality of integrators Itg and electrically connected to the transmission path of the output analog value (e.g., Voutn).

[0079] For example, the analog front-end circuits 120b and 120c may include a first chopper circuit 123 located between the plurality of bolometer units and the integrators Itg and electrically connected to the transmission paths of the output analog values (e.g., Voutn and Ioutn). The first chopper circuit 123 may modulate the output analog values (e.g., Voutn and Ioutn).

[0080] For example, the analog front-end circuits 120b and 120c may include a second chopper circuit 128 electrically connected between the branch node 125 and the integrators Itg. The second chopper circuit 128 may modulate the value modulated by the first chopper circuit 123.

[0081] The branch node 125 and / or the first amplifier 124a are electrically connected between the first chopper circuit 123 and the second chopper circuit 128.

[0082] For example, the analog front-end circuits 120b and 120c may each include a third chopper circuit 129 provided on a feedback path from the output to the input of the integrator Itg.

[0083] For example, the analog front-end circuits 120b and 120c may each include a third amplifier 127 provided on a feedback path from the output to the input of the integrator Itg.

[0084] According to the design, the gains GM of the first amplifier 124a, the second amplifier 126, and the third amplifier 127 may be 1, and the first amplifier 124a, the second amplifier 126, and the third amplifier 127 may operate as a buffer circuit with an input impedance greater than the output impedance.

[0085] Figure 5A and Figure 5B are diagrams respectively showing multiple unit groups 10a and 10b of the infrared image sensors 100b and 100c according to embodiments.

[0086] Reference Figure 5A and Figure 5B Referring to FIGS. 15 and 16, the bolometer 10 may include multiple unit groups 10a and 10b. Each of the unit groups 10a and 10b may include two or more bolometer units cell1a, cell2a, and cellma and cell1b, cell2b, and cellmb. Each of the two or more bolometer units cell1a, cell2a, and cellma and cell1b, cell2b, and cellmb may include multiple bolometer pixels 11a and 11b, and the electrical connection between the bolometer pixels 11a and 11b and the infrared image sensor 100b or 100c may be controlled by multiple row control switches 12a and 12b.

[0087] A first group of reference circuits (115a-1, 115a-2, and 115a-m) may be electrically connected to one of the unit groups 10a and 10b, and a second group of reference circuits (115b-1, 115b-2, and 115b-m) may be electrically connected to the other of the unit groups 10a and 10b. The one of the unit groups 10a and 10b and the first group of reference circuits (115a-1, 115a-2, and 115a-m) may be defined as a first group Uca, and the other of the multiple unit groups 10a and 10b and the second group of reference circuits (115b-1, 115b-2, and 115b-m) may be defined as a second group Ucb.

[0088] The first group Uca can transfer the first set of output currents (Iout1a, Iout2a, and Ioutma) or the first set of output voltages (Vout1a, Vout2a, and Voutma) to the analog front-end circuit 120a, and the second group Ucb can transfer the second set of output currents (Iout1b, Iout2b, and Ioutmb) or the second set of output voltages (Vout1b, Vout2b, and Voutmb) to the analog front-end circuit 120a.

[0089] Figure 6A and Figure 6B are diagrams respectively showing analog front-end circuits 120d and 120e that may be respectively included in Figure 5A and Figure 5B the infrared image sensors 100b and 100c shown.

[0090] Refer to Figure 6A and Figure 6B , the analog front-end circuits 120d and 120e may respectively include a plurality of analog processing circuits 121a, 121b, and 121n and 122a, 122b, and 122n. The plurality of analog processing circuits 121a, 121b, and 121n and 122a, 122b, and 122n correspond one-to-one with Figure 5A and Figure 5B the plurality of unit groups 10a and 10b shown and integrate at least two corresponding output analog values together. The plurality of analog processing circuits 121a, 121b, and 121n and 122a, 122b, and 122n may respectively include a plurality of integrators Itga, Itgb, and Itgn. In the integrators Itga, Itgb, and Itgn, a plurality of second amplifiers 126a, 126b, and 126n and a plurality of capacitors Ca, Cb, and Cn are combined.

[0091] For example, the first analog processing circuits 121a and 122a may be electrically connected to one of the unit groups 10a and 10b and may integrate the first set of output analog values (Vout1a, Vout2a, Voutna, Iout1a, Iout2a, and Ioutna). For example, the second analog processing circuits 121b and 122b may be electrically connected to the other of the unit groups 10a and 10b and may integrate the second set of output analog values (Vout1b, Vout2b, Voutnb, Iout1b, Iout2b, and Ioutnb).

[0092] Therefore, the noise introduced into the first set of output analog values (Vout1a, Vout2a, Voutna, Iout1a, Iout2a, and Ioutna) can be divided or averaged, so that the total magnitude of the noise of the first set of output analog values (Vout1a, Vout2a, Voutna, Iout1a, Iout2a, and Ioutna) can be reduced. In addition, the noise introduced into the second set of output analog values (Vout1b, Vout2b, Voutnb, Iout1b, Iout2b, and Ioutnb) can be divided or averaged, and thus, the total magnitude of the noise of the second set of output analog values (Vout1b, Vout2b, Voutnb, Iout1b, Iout2b, and Ioutnb) can be reduced. Therefore, the infrared image sensor 100b or 100c can reduce the noise of the acquired infrared image.

[0093] For example, the analog front-end circuits 120d and 120e may include a plurality of branch nodes 125a, 125b, and 125n located between the plurality of cell groups 10a and 10b and the plurality of integrators Itga, Itgb, and Itgn, and each branch node electrically connects the transmission paths of at least two output analog values (e.g., Vout1a, Vout2a, Voutna, Iout1a, Iout2a, and Ioutna).

[0094] For example, the analog front-end circuit 120d may include a plurality of first amplifiers 124a, 124b, and 124n, and the plurality of first amplifiers 124a, 124b, and 124n are respectively located between the plurality of cell groups 10a and 10b and the plurality of integrators Itga, Itgb, and Itgn and are respectively electrically connected to the transmission paths of the plurality of output analog values (e.g., Vout1a, Vout2a, Voutna, Iout1a, Iout2a, and Ioutna).

[0095] For example, the analog front-end circuits 120d and 120e may include a plurality of first chopper circuits 123a, 123b, and 123n, and the plurality of first chopper circuits 123a, 123b, and 123n are respectively located between the plurality of cell groups 10a and 10b and the plurality of integrators Itga, Itgb, and Itgn and are respectively electrically connected to the transmission paths of the plurality of output analog values (e.g., Vout1a, Vout2a, Voutna, Iout1a, Iout2a, and Ioutna). The plurality of first chopper circuits 123a, 123b, and 123n can modulate the plurality of output analog values (e.g., Vout1a, Vout2a, Voutna, Iout1a, Iout2a, and Ioutna).

[0096] For example, analog front-end circuits 120d and 120e may include a plurality of second chopper circuits 128a, 128b, and 128n electrically connected between a plurality of branch nodes 125a, 125b, and 125n and a plurality of integrators Itga, Itgb, and Itgn. The plurality of second chopper circuits 128a, 128b, and 128n may modulate the values modulated by the plurality of first chopper circuits 123a, 123b, and 123n.

[0097] The plurality of branch nodes 125a, 125b, and 125n and / or the plurality of first amplifiers 124a, 124b, and 124n are electrically connected between the plurality of first chopper circuits 123a, 123b, and 123n and the plurality of second chopper circuits 128a, 128b, and 128n. Thus, the influence of noise and / or offset introduced into the first set (Vout1a, Vout2a, Voutna, Iout1a, Iout2a, and Ioutna) and the second set (Vout1b, Vout2b, Voutnb, Iout1b, Iout2b, and Ioutnb) of output analog values on the amplification performed by the plurality of second amplifiers 126a, 126b, and 126n and the integration performed by the plurality of integrators Itga, Itgb, and Itgn can be reduced. The noise and / or offset can be eliminated by circuit elements (such as sample-and-hold circuits, low-pass filters, multiplexers, or AD converters) electrically connected to the external terminals of the analog front-end circuits 120d or 120e.

[0098] For example, analog front-end circuits 120d and 120e may each include a plurality of third chopper circuits 129a, 129b, and 129n, and each third chopper circuit 129a, 129b, and 129n is disposed on multiple feedback paths from the output to the input of the corresponding integrator among the plurality of integrators Itga, Itgb, and Itgn.

[0099] The first chopper circuits 123a, 123b, and 123n, the second chopper circuits 128a, 128b, and 128n, and the third chopper circuits 129a, 129b, and 129n can eliminate the imbalance (such as offset) between the analog processing circuits 121a, 121b, 121n, 122a, 122b, and 122n, and can reduce the flicker noise in the analog front-end circuits 120d and 120e.

[0100] For example, analog front-end circuits 120d and 120e may each include a plurality of third amplifiers 127a, 127b, and 127n, and the third amplifiers 127a, 127b, and 127n are each disposed on multiple feedback paths from the output to the input of the corresponding integrator among the plurality of integrators Itga, Itgb, and Itgn.

[0101] According to the design, the gain GM of each of the first amplifiers 124a, 124b, and 124n, the second amplifiers 126a, 126b, and 126n, and the third amplifiers 127a, 127b, and 127n can be 1, and each of the first amplifiers 124a, 124b, and 124n, the second amplifiers 126a, 126b, and 126n, and the third amplifiers 127a, 127b, and 127n can operate as a buffer circuit with an input impedance greater than the output impedance. Each of the analog processing circuits 121a, 121b, 121n, 122a, 122b, and 122n corresponds to a plurality of bolometer units. Therefore, the average gain GM of the plurality of analog processing circuits 121a, 121b, 121n, 122a, 122b, and 122n can be reduced according to the number of bolometer units corresponding to each of the plurality of analog processing circuits 121a, 121b, 121n, 122a, 122b, and 122n.

[0102] Figure 7 FIG. is a diagram showing an infrared image sensor package structure 200 according to an embodiment.

[0103] Reference Figure 7 , the infrared image sensor package structure 200 may include an infrared image sensor 100d. The infrared image sensor 100d may be implemented by an integrated circuit (IC) and may be mounted on a board 55 such as a printed circuit board through an electrical connection structure such as solder balls 45.

[0104] The bolometer 10 may be disposed above the infrared image sensor 100d and may be disposed such that infrared light IR passing through the lens is guided to the bolometer 10.

[0105] The reflective layer 15 may be disposed between the infrared image sensor 100d and the bolometer 10 and may reflect infrared light IR. The upper surface of the infrared image sensor 100d may be used as a space in which the reflective layer 15 is disposed. The distance between the reflective layer 15 and the bolometer 10 may correspond to 1 / 4 of the wavelength of the infrared light IR.

[0106] The via 20 may form an electrical connection between the infrared image sensor 100d and the bolometer 10 and may be used as a transmission path for the output analog value of the bolometer 10.

[0107] As described above, according to the embodiments disclosed herein, the infrared image sensor may move the noise introduced during the acquisition of the infrared image to an unused frequency range, or divide or average the noise, thereby reducing the noise.

[0108] Figures 1 to 7The clock generator 112, the switching signal divider 113, the row decoder 160, and the offset eliminator 170 that perform the operations described in this application are implemented by hardware components configured to perform the operations performed by hardware components described in this application. In appropriate cases, examples of hardware components that can be used to perform the operations described in this application include controllers, sensors, generators, drivers, memories, comparators, arithmetic logic units, adders, subtractors, multipliers, dividers, integrators, and any other electronic components configured to perform the operations described in this application. In other examples, one or more hardware components that perform the operations described in this application are implemented by computing hardware, for example, by one or more processors or computers. A processor or computer can be implemented by one or more processing elements (such as logic gate arrays, controllers, and arithmetic logic units), digital signal processors, microcomputers, programmable logic controllers, field programmable gate arrays, programmable logic arrays, microprocessors, or any other device or combination of devices configured to respond and execute instructions in a defined manner to achieve a desired result. In one example, a processor or computer includes one or more memories that store instructions or software executed by the processor or computer, or is connected to one or more memories that store instructions or software executed by the processor or computer. The hardware components implemented by the processor or computer can execute instructions or software, such as an operating system (OS) and one or more software applications running on the OS, to perform the operations described in this application. The hardware components can also access, manipulate, process, create, and store data in response to executing the instructions or software. For simplicity, the singular terms "processor" or "computer" can be used to describe the examples described in this application, but in other examples, multiple processors or computers can be used, or a processor or computer can include multiple processing elements or multiple types of processing elements or both multiple processing elements and multiple types of processing elements. For example, a single hardware component or two or more hardware components can be implemented by a single processor or two or more processors or a processor and a controller. One or more hardware components can be implemented by one or more processors or a processor and a controller, and one or more other hardware components can be implemented by one or more other processors or another processor and another controller. One or more processors or a processor and a controller can implement a single hardware component or two or more hardware components. The hardware components can have any one or more different processing configurations, examples of which include a single processor, independent processors, parallel processors, single instruction single data (SISD) multiprocessing, single instruction multiple data (SIMD) multiprocessing, multiple instruction single data (MISD) multiprocessing, and multiple instruction multiple data (MIMD) multiprocessing.

[0109] Figures 1 to 7The method of performing the operations described in this application as shown is executed by computing hardware, e.g., by one or more processors or computers that implement the above-described execution of instructions or software to perform the operations performed by the method described in this application. For example, a single operation or two or more operations may be executed by a single processor or by two or more processors or a processor and a controller. One or more operations may be executed by one or more processors or a processor and a controller, and one or more other operations may be executed by one or more other processors or another processor and another controller. One or more processors or a processor and a controller may execute a single operation or two or more operations.

[0110] Instructions or software for controlling computing hardware (e.g., one or more processors or computers) to implement the hardware components and execute the method as described above may be written as a computer program, code segment, instruction, or any combination thereof, for individually or jointly instructing or configuring one or more processors or computers to act as a machine or a special-purpose computer to perform the operations performed by the hardware components and method as described above. In one example, the instructions or software include machine code directly executable by one or more processors or computers, such as machine code generated by a compiler. In another example, the instructions or software include high-level code executable by one or more processors or a computer using an interpreter. The instructions or software may be written in any programming language based on the block diagrams and flowcharts shown in the drawings and the corresponding descriptions in the specification, which disclose algorithms for performing the operations performed by the hardware components and method as described above.

[0111] Instructions or software that control computing hardware (e.g., one or more processors or computers) to implement the hardware components and perform the methods described above, as well as any associated data, data files, and data structures, may be recorded, stored, or fixed in or on one or more non-transitory computer-readable storage media. Examples of non-transitory computer-readable storage media include read-only memory (ROM), random access memory (RAM), flash memory, CD-ROM, CD-R, CD+R, CD-RW, CD+RW, DVD-ROM, DVD-R, DVD+R, DVD-RW, DVD+RW, DVD-RAM, BD-ROM, BD-R, BD-R LTH, BD-RE, magnetic tape, floppy disk, magneto-optical data storage device, optical data storage device, hard disk, solid state disk, and any other device configured to store instructions or software and any associated data, data files, and data structures in a non-transitory manner and provide the instructions or software and any associated data, data files, and data structures to one or more processors or computers such that the one or more processors or computers can execute the instructions. In one example, the instructions or software and any associated data, data files, and data structures are distributed across a network-connected computer system such that the instructions and software and any associated data, data files, and data structures are stored, accessed, and executed by one or more processors or computers in a distributed manner.

[0112] Although this disclosure includes specific examples, it will be apparent after understanding the disclosure of this application that various changes in form and detail may be made in these examples without departing from the spirit and scope of the appended claims and their equivalents. The examples described herein should be construed only in a descriptive sense and not for purposes of limitation. The description of a feature or aspect in each example should be considered applicable to similar features or aspects in other examples. Suitable results may also be obtained if the described techniques are performed in a different order and / or if the components in the described systems, architectures, devices, or circuits are combined in a different way and / or replaced or supplemented with other components or their equivalents. Accordingly, the scope of this disclosure is not limited by the specific embodiments, but is defined by the claims and their equivalents, and all variations within the scope of the claims and their equivalents should be understood to be included in this disclosure.

Claims

1. An infrared image sensor, comprising: A plurality of reference circuits configured to respectively provide a plurality of reference analog values to a plurality of bolometer units; An analog front-end circuit configured to collect a plurality of output analog values based on the plurality of reference analog values; And A noise suppression circuit configured to switch the corresponding relationship between the plurality of bolometer units and the plurality of reference analog values at unit time intervals, wherein the analog front-end circuit includes a plurality of integrators, and each of the plurality of integrators is configured to integrate the plurality of output analog values sequentially before and after switching the corresponding relationship between the plurality of bolometer units and the plurality of reference analog values.

2. The infrared image sensor according to claim 1, wherein, The noise suppression circuit is further configured to perform the switching so as to repeat the corresponding relationship between the plurality of bolometer units and the plurality of reference analog values at an image time interval longer than the unit time interval.

3. The infrared image sensor according to claim 2, wherein, The plurality of reference circuits include a first reference circuit to an m-th reference circuit, wherein the plurality of bolometer units include a first bolometer unit to an m-th bolometer unit, and wherein the noise suppression circuit is further configured to perform the switching such that during the image time interval, the first reference circuit to the m-th reference circuit respectively correspond to the first bolometer unit to the m-th bolometer unit at least once.

4. The infrared image sensor according to claim 1, wherein, The analog front-end circuit is further configured to output a plurality of infrared image values, wherein the plurality of output analog values before switching the corresponding relationship between the plurality of bolometer units and the plurality of reference analog values and the plurality of output analog values after the switching are applied to the plurality of infrared image values together.

5. The infrared image sensor according to claim 4, further comprising a multiplexer configured to receive the plurality of infrared image values through a plurality of input paths and provide the plurality of infrared image values to an AD converter through an output path, the number of the output paths being less than the number of the plurality of input paths.

6. The infrared image sensor according to claim 1, wherein, The plurality of bolometer units are configured as a plurality of unit groups, each of the unit groups including two or more bolometer units, and wherein the analog front-end circuit includes a plurality of integrators, the plurality of integrators corresponding one-to-one to the plurality of unit groups and configured to integrate at least two corresponding output analog values among the plurality of output analog values together.

7. The infrared image sensor according to claim 6, wherein, The analog front-end circuit further includes a plurality of branch nodes located between the plurality of unit groups and the plurality of integrators, and each of the branch nodes electrically connects the transmission paths of the at least two corresponding output analog values to each other.

8. The infrared image sensor according to claim 1, wherein, Each of the plurality of bolometer units includes a plurality of bolometer pixels.

9. An infrared image sensor, comprising: A plurality of reference circuits configured to respectively provide a plurality of reference analog values to a plurality of bolometer units, each of the plurality of bolometer units including a plurality of bolometer pixels; And An analog front-end circuit configured to collect a plurality of output analog values based on the plurality of reference analog values; wherein the plurality of bolometer units are configured as a plurality of unit groups, each of the unit groups including two or more bolometer units, and wherein the analog front-end circuit includes a plurality of integrators, the plurality of integrators corresponding one-to-one to the plurality of unit groups and configured to integrate at least two corresponding output analog values among the plurality of output analog values together.

10. The infrared image sensor according to claim 9, wherein, The analog front-end circuit further includes a plurality of first amplifiers, and the plurality of first amplifiers are respectively located between the plurality of cell groups and the plurality of integrators and are respectively electrically connected to the transmission paths of the plurality of output analog values.

11. The infrared image sensor according to claim 10, wherein, The analog front-end circuit further includes a plurality of third amplifiers, and the plurality of third amplifiers are arranged on a plurality of feedback paths from the output to the input of the corresponding integrator among the plurality of integrators, and wherein each of the plurality of integrators includes a second amplifier and a capacitor electrically connected in parallel with the second amplifier.

12. The infrared image sensor according to claim 11, wherein, The plurality of first amplifiers, the second amplifier, and the plurality of third amplifiers are each configured as a buffer circuit, and the input impedance of the buffer circuit is greater than the output impedance.

13. The infrared image sensor according to claim 9, wherein,The analog front-end circuit further includes a plurality of chopper circuits, and the plurality of chopper circuits are respectively connected between the plurality of cell groups and the plurality of integrators and are respectively electrically connected to the transmission paths of the plurality of output analog values.

14. The infrared image sensor according to claim 9, wherein, The analog front-end circuit further includes a plurality of branch nodes located between the plurality of cell groups and the plurality of integrators, and each of the branch nodes electrically connects the transmission paths of at least two of the plurality of output analog values to each other.

15. The infrared image sensor according to claim 14, wherein, The analog front-end circuit further includes a plurality of chopper circuits, and the plurality of chopper circuits are electrically connected between the plurality of branch nodes and the plurality of integrators.

16. The infrared image sensor according to claim 9, wherein, The analog front-end circuit further includes a plurality of chopper circuits, and the plurality of chopper circuits are arranged on a plurality of feedback paths from the output to the input of the corresponding integrator among the plurality of integrators.

17. The infrared image sensor according to claim 9, wherein, The analog front-end circuit further includes a plurality of first amplifiers, and the plurality of first amplifiers are arranged on a plurality of feedback paths from the output to the input of the corresponding integrator among the plurality of integrators, and wherein each of the plurality of integrators includes a second amplifier and a capacitor electrically connected in parallel with the second amplifier.

Images