A high voltage selection circuit and system

By combining the first and second step-down lead-out circuits with the switching transistor, the switching transistor is directly controlled to conduct based on the voltage difference, which solves the problems of large area, power consumption and delay in traditional high voltage selection circuits, and achieves efficient high voltage selection.

CN114726355BActive Publication Date: 2026-04-14SOUTHCHIP SEMICON TECH SHANGHAI CO LTD
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Patent Information

Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
Filing Date
2022-03-11
Publication Date
2026-04-14

AI Technical Summary

Technical Problem

Traditional high-voltage selection circuits require voltage sampling and logic judgment, resulting in large area and power consumption, as well as delay issues during voltage switching.

Method used

By combining the first and second step-down lead-out circuits with switching transistors M6 and M7, the conduction of the switching transistors is directly controlled by the voltage difference, achieving high voltage selection without the need for logic judgment and level shifting.

Benefits of technology

It reduces power consumption, avoids delays during voltage switching, and improves circuit efficiency and stability.

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Abstract

The application relates to a high-voltage selection circuit which comprises a first voltage reduction leading-out circuit, a second voltage reduction leading-out circuit, a switch tube M7 and a switch tube M6; the switch tube M7 is connected between a first voltage input end and a selection voltage output end; the switch tube M6 is connected between a second voltage input end and the selection voltage output end; the first voltage reduction leading-out circuit is connected with the first voltage input end; the second voltage reduction leading-out circuit is connected with the second voltage input end; a leading-out voltage output end of the first voltage reduction leading-out circuit is connected with a control end of the switch tube M6; a leading-out voltage output end of the second voltage reduction leading-out circuit is connected with a control end of the switch tube M7; the application directly realizes the selection on of a higher voltage according to the voltage difference between the voltages after the voltage reduction of the first voltage input end and the second voltage input end and the voltage of the selection voltage output end, realizes the selection of a high voltage without the need of logic judgment and level transfer, reduces power consumption and does not cause time delay.
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Description

Technical Field

[0001] This invention relates to the field of power supply circuit technology, and in particular to a high voltage selection circuit and system. Background Technology

[0002] In multi-voltage power supply systems, the power supply stage may have multiple outputs, with uncontrollable high and low voltages. To ensure the normal operation of subsequent circuits, the power supply needs to be selected. To ensure the chip can operate normally under any power supply condition, a higher voltage needs to be selected to power the subsequent circuits. Traditional voltage selection schemes include... Figure 1 As shown, the common approach is to sample each voltage and then use a comparator to determine the voltage level, using logic to select the power supply. This method has the following main drawbacks: 1. This implementation requires voltage sampling and judgment. For high-voltage power supplies, due to the voltage tolerance limitations of the devices, the logic result needs to be level-shifted to achieve voltage selection. Therefore, the area and power consumption are relatively large. It is evident that the traditional solution has significant disadvantages in terms of cost and power consumption. 2. Since the entire process of voltage sampling and judgment takes a certain amount of time, the output voltage will drop to some extent during voltage switching. This places high demands on the output capacitor value to prevent abnormal operation of subsequent circuits. Summary of the Invention

[0003] In view of this, the present invention provides a high voltage selection circuit and system that achieves high voltage selection without the need for logic judgment and level shifting, while reducing power consumption and avoiding delay.

[0004] To achieve the above objectives, the present invention provides the following solution:

[0005] A high-voltage selection circuit, the high-voltage selection circuit comprising:

[0006] The circuit consists of a first step-down circuit, a second step-down circuit, a switching transistor M7, and a switching transistor M6.

[0007] The switching transistor M7 is connected between the first voltage input terminal and the selected voltage output terminal;

[0008] The switching transistor M6 is connected between the second voltage input terminal and the selected voltage output terminal;

[0009] The first step-down output circuit is connected to the first voltage input terminal. The first step-down output circuit is used to step down the voltage input to the first voltage input terminal to obtain the first output voltage.

[0010] The second step-down output circuit is connected to the second voltage input terminal. The second step-down output circuit is used to step down the voltage input to the second voltage input terminal to obtain the second output voltage.

[0011] The output voltage terminal of the first step-down circuit is connected to the control terminal of the switching transistor M6; the switching transistor M6 turns on when the difference between the voltage at the selected voltage output terminal and the first output voltage is greater than a preset voltage.

[0012] The output voltage terminal of the second step-down circuit is connected to the control terminal of the switching transistor M7; the switching transistor M7 is turned on when the difference between the voltage at the selected voltage output terminal and the second output voltage is greater than a preset voltage.

[0013] Optionally, the first step-down output circuit includes a switching transistor M4, a switching transistor M1, and a resistor R1;

[0014] The switching transistor M4, the switching transistor M1, and the resistor R1 are connected in series between the first voltage input terminal and ground.

[0015] The control terminal of the switching transistor M4 is shorted to the output terminal; the output terminal of the switching transistor M4 serves as the output voltage of the first step-down circuit and is connected to the control terminal of the switching transistor M6.

[0016] The control terminal of the switching transistor M1 is input with a voltage of a preset amplitude.

[0017] The switching transistor M1 and the resistor R1 are used to generate a first preset bias current so that the switching transistor M4 generates a first preset voltage drop.

[0018] Optionally, the switching transistor M4 is a PMOS transistor;

[0019] The switching transistor M1 is an NMOS transistor.

[0020] Optionally, the second step-down output circuit includes switching transistor M5, switching transistor M3, and resistor R3;

[0021] The switching transistors M5 and M3 and the resistor R3 are connected in series between the second voltage input terminal and ground.

[0022] The control terminal of the switching transistor M5 is shorted to its output terminal; the output terminal of the switching transistor M5 serves as the output voltage of the second step-down circuit and is connected to the control terminal of the switching transistor M7.

[0023] The control terminal of the switching transistor M3 is input with a voltage of a preset amplitude.

[0024] The switching transistor M3 and the resistor R3 are used to generate a second preset bias current so that the switching transistor M5 generates a second preset voltage drop.

[0025] Optionally, the switching transistor M5 is a PMOS transistor;

[0026] The switching transistor M3 is an NMOS transistor.

[0027] Optionally, the high-voltage selection circuit further includes: a third step-down lead-out circuit, a switching transistor M8, a switching transistor M9, a resistor R4, and a resistor R5;

[0028] The switching transistor M8 is connected between the output voltage terminal of the first step-down circuit and the control terminal of the switching transistor M6;

[0029] The switching transistor M9 is connected between the output voltage terminal of the second step-down circuit and the control terminal of the switching transistor M7;

[0030] The third step-down output circuit is connected to the selected voltage output terminal, and the second step-down output circuit is used to step down the voltage of the selected voltage output terminal to obtain the third output voltage;

[0031] The output voltage of the second step-down circuit is connected to the control terminal of the switching transistor M9 and the control terminal of the switching transistor M8, respectively.

[0032] The resistor R4 is connected between the selected voltage output terminal and the control terminal of the switching transistor M7.

[0033] The resistor R5 is connected between the selected voltage output terminal and the control terminal of the switching transistor M6.

[0034] Optionally, the third step-down output circuit includes a series-connected switching transistor assembly, a switching transistor M2, and a resistor R2;

[0035] The series connection of the switching transistors, the switching transistor M2, and the resistor R2 are connected in series between the selected voltage output terminal and ground.

[0036] The output terminal of the series-connected switching transistor assembly serves as the output voltage terminal of the third step-down circuit, and is connected to the control terminals of switching transistors M8 and M9, respectively.

[0037] The control terminal of the switching transistor M2 is input with a voltage of preset amplitude;

[0038] The switch M2 and the resistor R2 are used to generate a third preset bias current so that the series connection of the switch transistors generates a third preset voltage drop.

[0039] Optionally, the number of switching transistors included in the series-connected switching transistor assembly is at least two.

[0040] Optionally, the series-connected switching transistor assembly includes switching transistors M10, M11, and M12 connected in series.

[0041] The control terminals and output terminals of the switching transistors M10, M11, and M12 are respectively short-circuited.

[0042] Optionally, the switching transistors M6, M7, M8, M9, M10, M11, and M12 are all PMOS transistors;

[0043] The switching transistor M2 is an NMOS transistor.

[0044] A high voltage selection system includes N high voltage selection circuits, which are cascaded together.

[0045] The cascading connection method is as follows:

[0046] The selection voltage output terminal of the high voltage selection circuit of stage n is connected to the first voltage input terminal or the second voltage input terminal of the high voltage selection circuit of stage n+1, where n = 1, 2, 3, ..., N-1.

[0047] According to specific embodiments provided by the present invention, the present invention discloses the following technical effects:

[0048] This invention discloses a high-voltage selection circuit and system. The high-voltage selection circuit includes: a first buck output circuit, a second buck output circuit, a switching transistor M7, and a switching transistor M6. Switching transistor M7 is connected between a first voltage input terminal and a selected voltage output terminal; switching transistor M6 is connected between a second voltage input terminal and a selected voltage output terminal; the first buck output circuit is connected to the first voltage input terminal; the second buck output circuit is connected to the second voltage input terminal; the output voltage of the first buck output circuit is connected to the control terminal of the switching transistor M6; the output voltage of the second buck output circuit is connected to the control terminal of the switching transistor M7. This invention directly selects and connects the higher voltage between the first and second voltage input terminals based on the difference between the voltage after bucking down from the first and second voltage input terminals and the voltage at the selected voltage output terminal. This achieves high-voltage selection without requiring logic judgment or level shifting, while reducing power consumption and eliminating delay. Attached Figure Description

[0049] To more clearly illustrate the technical solutions in the embodiments of the present invention or the prior art, the drawings used in the embodiments will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present invention. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0050] Figure 1 This is a schematic diagram of the structure of a voltage selection circuit in the prior art;

[0051] Figure 2 This is a schematic diagram of a high-voltage selection circuit provided in an embodiment of the present invention. Detailed Implementation

[0052] The technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of the present invention, and not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of the present invention.

[0053] A high-voltage selection circuit and system are disclosed, which enables high-voltage selection without the need for logic judgment and level shifting, while reducing power consumption and avoiding delay.

[0054] To make the above-mentioned objects, features and advantages of the present invention more apparent and understandable, the present invention will be further described in detail below with reference to the accompanying drawings and specific embodiments.

[0055] Example 1

[0056] like Figure 2As shown, Embodiment 1 of the present invention provides a high-voltage selection circuit, which includes: a first step-down output circuit, a second step-down output circuit, a switching transistor M7, and a switching transistor M6; the switching transistor M7 is connected between a first voltage input terminal and a selected voltage output terminal; the switching transistor M6 is connected between a second voltage input terminal and a selected voltage output terminal; the first step-down output circuit is connected to the first voltage input terminal and is used to step down the voltage input to the first voltage input terminal to obtain a first output voltage; the second step-down output circuit is connected to the first voltage input terminal. The first step-down voltage extraction circuit is connected to the control terminal of the first step-down voltage extraction circuit. The second step-down voltage extraction circuit is used to step down the voltage input at the second voltage input terminal to obtain the second output voltage. The output voltage of the first step-down voltage extraction circuit is connected to the control terminal of the switch M6. The switch M6 is turned on when the difference between the voltage at the selected voltage output terminal and the first output voltage is greater than a preset voltage. The output voltage of the second step-down voltage extraction circuit is connected to the control terminal of the switch M7. The switch M7 is turned on when the difference between the voltage at the selected voltage output terminal and the second output voltage is greater than a preset voltage.

[0057] The first buck converter circuit includes a switch M4, a switch M1, and a resistor R1. The switch M4, switch M1, and resistor R1 are connected in series between the first voltage input terminal and ground. The control terminal of switch M4 is shorted to its output terminal. The output terminal of switch M4 serves as the output voltage of the first buck converter circuit and is connected to the control terminal of switch M6. The control terminal of switch M1 receives a voltage of a preset amplitude. Switch M1 and resistor R1 are used to generate a first preset bias current, causing switch M4 to generate a first preset voltage drop. Switch M4 is a PMOS transistor, and switch M1 is an NMOS transistor.

[0058] The second buck converter circuit includes switching transistors M5 and M3, and resistor R3. Switches M5, M3, and R3 are connected in series between the second voltage input terminal and ground. The control terminal of switch M5 is short-circuited to its output terminal. The output terminal of switch M5 serves as the output voltage of the second buck converter circuit and is connected to the control terminal of switch M7. The control terminal of switch M3 receives a voltage of a preset amplitude. Switch M3 and resistor R3 generate a second preset bias current to cause switch M5 to produce a second preset voltage drop. Switch M5 is a PMOS transistor, and switch M3 is an NMOS transistor.

[0059] The first and second step-down output circuits of this invention only need to achieve voltage reduction output, and are not limited to the voltage reduction output based on the bias voltage of the switching transistor provided in the embodiments of this invention. Therefore, this invention... Figure 2 The specific circuit structures of the first and second step-down lead-out circuits shown are only one implementation method and should not be used as a limitation on the scope of protection of this invention.

[0060] An exemplary high-voltage selection circuit of the present invention further includes: a third step-down output circuit, a switching transistor M8, a switching transistor M9, a resistor R4, and a resistor R5; the switching transistor M8 is connected between the output voltage terminal of the first step-down output circuit and the control terminal of the switching transistor M6; the switching transistor M9 is connected between the output voltage terminal of the second step-down output circuit and the control terminal of the switching transistor M7; the third step-down output circuit is connected to the selection voltage output terminal, and the second step-down output circuit is used to step down the voltage of the selection voltage output terminal to obtain the third output voltage; the output voltage terminal of the second step-down output circuit is connected to the control terminals of the switching transistors M9 and M8 respectively; the resistor R4 is connected between the selection voltage output terminal and the control terminal of the switching transistor M7; and the resistor R5 is connected between the selection voltage output terminal and the control terminal of the switching transistor M6.

[0061] The third step-down output circuit includes a series-connected switching transistor assembly, a switching transistor M2, and a resistor R2. The series-connected switching transistor assembly, the switching transistor M2, and the resistor R2 are connected in series between the selected voltage output terminal and ground. The output terminal of the series-connected switching transistor assembly serves as the output voltage terminal of the third step-down output circuit and is connected to the control terminals of the switching transistors M8 and M9, respectively. The control terminal of the switching transistor M2 receives a voltage of a preset amplitude. The switching transistor M2 and the resistor R2 are used to generate a third preset bias current, so that the series-connected switching transistor assembly generates a third preset voltage drop.

[0062] The number of switching transistors in a series assembly is at least two, and can be set to 2-5.

[0063] For example, the series-connected switching transistor assembly includes switching transistors M10, M11, and M12 connected in series. The control terminals and output terminals of switching transistors M10, M11, and M12 are short-circuited. Switches M6, M7, M8, M9, M10, M11, and M12 are all PMOS transistors; switching transistor M2 is an NMOS transistor.

[0064] The third step-down circuit, switching transistors M8 and M9, resistors R4 and R5, and their specific structures provided in this embodiment of the invention are designed to further improve the stability of the circuit of the invention. Without adopting this circuit structure, the implementation of the invention and the solution of the technical problem are not affected, and therefore cannot be used as a limitation on the scope of protection of the invention.

[0065] Based on the above circuit structure, the working principle of this invention is as follows:

[0066] Let the first voltage input terminal and the second voltage input terminal be VA and VB respectively, and let the voltage at the selected voltage output terminal be VCOM, where VA and VB represent different voltages, and VCOM represents the selected result. When the circuit starts working, the currents flowing through switching transistors M1, M2, and M3, i.e., the first preset bias current, the second preset bias current, and the third preset bias current, are respectively: (5-V gs1 ) / R1,(5-V gs3 ) / R3,(5-V gs2 ) / R2. V gs1 V gs3 and V gs2 5 represents the gate-source voltages of switching transistors M1, M3, and M2, respectively. 5 is an example value for the preset amplitude voltage.

[0067] 1. When VA is much greater than VB, the first lead-out voltage VX is VX = VA - VGS4, the second lead-out voltage VY is VY = VB - VGS5, and the third lead-out voltage VC is VC = VCOM - 3 * VGS. At this time, the gate voltage of the switching transistor M9 is the third lead-out voltage VC, and the source voltage is approximately VCOM. The switching transistor M9 is turned on (the gate-source voltage difference is -3 * VGS, and the PMOS transistor is low-level and turned on). The gate voltage of the switching transistor M7 is equal to VB - VGS5, so M7 is turned on (the source voltage is VCOM, VB - VGS5 is less than VCOM, and the difference is greater than the switching transistor's turn-on threshold, so it is turned on. At this time, when the selected voltage output terminal is connected to VB, it switches to the state of being connected to VA). The VCOM voltage is determined by M7.

[0068] 2. When the voltages VA and VB are close, the voltages VX and VY are approximately equal, and the switching transistors M9 and M8 are in the on state. Then, the gate-source voltage difference between the switching transistors M7 and M8 is approximately equal to VGS (the gate is VY or VX, the source is VCOM, and VA, VB, and VCOM are approximately equal). At this time, both M6 and M7 are turned on, and VCOM is determined by both VA and VB. The voltage of VCOM is equal to the average value of VA and VB.

[0069] 3. When VB is much greater than VA, the first output voltage VX is VX = VA - VGS4, the second output voltage VY is VY = VB - VGS5, and the third output voltage VC is VC = VCOM - 3 * VGS. At this time, switch M8 is open, and the GATE voltage of M6 is equal to VB - VGS4. At this time, the gate voltage of switch M8 is the third output voltage VC, and the source voltage is approximately VCOM. Switch M8 is turned on (the gate-source voltage difference is -3 * VGS, and the PMOS transistor is low-level and turned on). The GATE voltage of switch M6 is equal to VA - VGS4, so M6 is turned on (the source voltage is VCOM, VA - VGS4 is less than VCOM, and the difference is greater than the turn-on threshold of the switch transistor, at this time, when the selected voltage output terminal is connected to VA, it switches to the state of connecting to VB). The VCOM voltage is determined by M6.

[0070] Therefore, when the voltage of VA or VB changes, the overall voltage of VCOM is determined by the higher voltage. When the two voltages are close, both switches are open.

[0071] Example 2

[0072] Embodiment 2 of the present invention provides a high voltage selection system, which includes N high voltage selection circuits as described in Embodiment 1, and the N high voltage selection circuits are cascaded together.

[0073] The cascaded connection is as follows: the selected voltage output terminal of the nth stage high-voltage selection circuit is connected to the first voltage input terminal or the second voltage input terminal of the (n+1)th stage high-voltage selection circuit, where n = 1, 2, 3, ..., N-1. The cascaded high-voltage selection system in Embodiment 2 of this invention can achieve selection among N+1 voltages.

[0074] According to specific embodiments provided by the present invention, the present invention discloses the following technical effects:

[0075] This invention utilizes individual power supplies to generate voltage minus VGS signals. Based on the voltage signals generated by themselves, the PMOS switches are cross-driven. The higher voltage generates a higher driving voltage, which turns off the other power selection switch, and the lower voltage generates a lower driving voltage, which turns on the other voltage selection switch. Therefore, there is no need to judge the voltage. When the voltage changes, the output voltage can switch seamlessly, so there is no voltage drop that will affect the subsequent circuits.

[0076] This invention directly generates the driving voltage of the other party using voltage to achieve control, without the need for separate sampling and judgment, thus avoiding the problem of switching degradation.

[0077] The various embodiments in this specification are described in a progressive manner, with each embodiment focusing on the differences from other embodiments. The same or similar parts between the various embodiments can be referred to each other.

[0078] This document uses specific examples to illustrate the principles and implementation methods of the present invention. The descriptions of the above embodiments are only for the purpose of helping to understand the method and core ideas of the present invention. Furthermore, those skilled in the art will recognize that, based on the ideas of the present invention, there will be changes in the specific implementation methods and application scope. Therefore, the content of this specification should not be construed as a limitation of the present invention.

Claims

1. A high voltage selection circuit, characterized by, The high-voltage selection circuit includes: The circuit consists of a first step-down circuit, a second step-down circuit, a switching transistor M7, and a switching transistor M6. The switching transistor M7 is connected between the first voltage input terminal and the selected voltage output terminal; The switching transistor M6 is connected between the second voltage input terminal and the selected voltage output terminal; The first step-down output circuit is connected to the first voltage input terminal. The first step-down output circuit is used to step down the voltage input to the first voltage input terminal to obtain the first output voltage. The second step-down output circuit is connected to the second voltage input terminal. The second step-down output circuit is used to step down the voltage input to the second voltage input terminal to obtain the second output voltage. The output voltage terminal of the first step-down circuit is connected to the control terminal of the switching transistor M6; the switching transistor M6 turns on when the difference between the voltage at the selected voltage output terminal and the first output voltage is greater than a preset voltage. The output voltage terminal of the second step-down circuit is connected to the control terminal of the switching transistor M7; the switching transistor M7 turns on when the difference between the voltage at the selected voltage output terminal and the second output voltage is greater than a preset voltage. The high-voltage selection circuit also includes: a third step-down lead-out circuit, a switching transistor M8, a switching transistor M9, a resistor R4, and a resistor R5; The switching transistor M8 is connected between the output voltage terminal of the first step-down circuit and the control terminal of the switching transistor M6; The switching transistor M9 is connected between the output voltage terminal of the second step-down circuit and the control terminal of the switching transistor M7; The third step-down output circuit is connected to the selected voltage output terminal, and the second step-down output circuit is used to step down the voltage of the selected voltage output terminal to obtain the third output voltage; The output voltage of the second step-down circuit is connected to the control terminal of the switching transistor M9 and the control terminal of the switching transistor M8, respectively. The resistor R4 is connected between the selected voltage output terminal and the control terminal of the switching transistor M7. The resistor R5 is connected between the selected voltage output terminal and the control terminal of the switching transistor M6. The first step-down output circuit includes a switch M4, a switch M1, and a resistor R1; The switching transistor M4, the switching transistor M1, and the resistor R1 are connected in series between the first voltage input terminal and ground. The control terminal of the switching transistor M4 is shorted to the output terminal; the output terminal of the switching transistor M4 serves as the output voltage of the first step-down circuit and is connected to the control terminal of the switching transistor M6. The control terminal of the switching transistor M1 is input with a voltage of a preset amplitude. The switching transistor M1 and the resistor R1 are used to generate a first preset bias current so that the switching transistor M4 generates a first preset voltage drop. The second step-down output circuit includes switching transistor M5, switching transistor M3, and resistor R3; The switching transistors M5 and M3 and the resistor R3 are connected in series between the second voltage input terminal and ground. The control terminal of the switching transistor M5 is shorted to its output terminal; the output terminal of the switching transistor M5 serves as the output voltage of the second step-down circuit and is connected to the control terminal of the switching transistor M7. The control terminal of the switching transistor M3 is input with a voltage of a preset amplitude. The switching transistor M3 and the resistor R3 are used to generate a second preset bias current so that the switching transistor M5 generates a second preset voltage drop. The third step-down output circuit includes a series-connected switching transistor assembly, a switching transistor M2, and a resistor R2; The series connection of the switching transistors, the switching transistor M2, and the resistor R2 are connected in series between the selected voltage output terminal and ground. The output terminal of the series-connected switching transistor assembly serves as the output voltage terminal of the third step-down circuit, and is connected to the control terminals of switching transistors M8 and M9, respectively. The control terminal of the switching transistor M2 is input with a voltage of preset amplitude; The switch M2 and the resistor R2 are used to generate a third preset bias current so that the series connection of the switch transistors generates a third preset voltage drop.

2. The high-voltage selection circuit according to claim 1, characterized in that, The switching transistor M4 is a PMOS transistor; The switching transistor M1 is an NMOS transistor.

3. The high-voltage selection circuit according to claim 1, characterized in that, The switching transistor M5 is a PMOS transistor; The switching transistor M3 is an NMOS transistor.

4. The high-voltage selection circuit according to claim 1, characterized in that, The series-connected switching transistor assembly includes switching transistors M10, M11, and M12 connected in series in sequence. The control terminals and output terminals of the switching transistors M10, M11, and M12 are respectively short-circuited.

5. The high-voltage selection circuit according to claim 4, characterized in that, The switching transistors M6, M7, M8, M9, M10, M11 and M12 are all PMOS transistors; The switching transistor M2 is an NMOS transistor.

6. A high-voltage selection system, characterized in that, The high voltage selection system includes N high voltage selection circuits as described in any one of claims 1-5, and the N high voltage selection circuits are cascaded together. The cascading connection method is as follows: The selection voltage output terminal of the high voltage selection circuit of stage n is connected to the first voltage input terminal or the second voltage input terminal of the high voltage selection circuit of stage n+1, where n=1, 2, 3, ..., N-1.

Citation Information

Patent Citations

  • High power supply selector circuit with easy integration

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