LED Chip Testing Method
By using a transparent conductive film to connect and form a combination of LED chip electrodes in LED chip tests, and using multiple sets of probes to test simultaneously, the problem of low testing efficiency and easy needle marks of microscaling LED chips is solved, and efficient and accurate photoelectric characteristic detection is achieved.
Patent Information
- Application Number
- CN202210379988.1
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Filing Date
- 2022-04-12
- Publication Date
- 2025-07-04
- Estimated Expiration
- 2042-04-12
AI Technical Summary
The test efficiency of existing LED chips is low and easy to produce needle marks during testing, making it difficult to meet the high-efficiency photoelectric characteristics testing requirements of huge microscaling LED chips.
A transparent conductive film is used to connect the LED chip electrode to form multiple sets of LED chip sets in series and/or parallel connections, and the photoelectric parameter data is tested simultaneously through multiple sets of probes to avoid the probe from directly contacting the chip electrodes, and the buffering effect of the transparent conductive film is used to reduce needle marks.
It improves testing efficiency, reduces the generation of needle marks, ensures the accuracy of the test and the appearance yield of the chip, and adapts to the large-scale production needs of miniaturized LED chips.
Smart Images

Figure CN114759134B_ABST
Abstract
Description
Technical Field
[0001] The present invention relates to the technical field of chip testing, and particularly relates to a method for testing LED chips. Background Art
[0002] Micro Light Emitting Diode (Micro-LED) chips can be used in direct view display technology to form light-emitting units, and have the advantages of high brightness, wide color gamut, high stability, long life, energy saving, transparency, etc. However, at present, there are still many technical difficulties to be resolved for mass production of micro-LED display technology, and optoelectronic characteristic testing is one of the many difficulties.
[0003] On the one hand, the repair cost of micro-LED chips used in direct view display technology is very high. Therefore, they must have a very high yield when placed on the target backplane to reduce the number of repairs. This requires full optoelectronic characteristic testing of the LED chips before massive transfer to ensure that the yield of the transferred chips is close to 100%.
[0004] On the other hand, the size of micro-LED chips is very small. The probe size used in the traditional probe-type electroluminescent light-emitting testing method for LED chips is relatively large, making it difficult to achieve effective contact between the probe and the LED chip. Moreover, when piercing the positive and negative electrodes of the LED chip, it often causes a relatively large needle mark problem. At the same time, these needle marks will damage the appearance of the LED chip, affecting subsequent packaging or appearance; in addition, when adjusting the needle before testing, due to the small electrode size and large probe size, it is easy to have an abnormal phenomenon of the needle mark deviating from the center point of the electrode and piercing off, reducing the test accuracy rate and appearance yield.
[0005] On the other hand, a set of existing probes can only test one LED chip at a time, resulting in limited test efficiency. Due to the huge demand for micro-LED chips, the traditional single-chip testing method can no longer meet the production capacity requirements. Summary of the Invention
[0006] Based on this, the purpose of the present invention is to provide a method for testing LED chips to fundamentally solve the problems of low test efficiency and easy generation of needle marks in the existing LED chip testing process.
[0007] According to an embodiment of the present invention, a method for testing LED chips includes:
[0008] According to the arrangement of each LED chip cut from the LED wafer, a transparent conductive film provided with a plurality of metal electrodes is manufactured, and each metal electrode is used to connect with the electrodes of each LED chip to form multiple groups of series-connected and / or parallel-connected LED chip groups;
[0009] Attach a transparent conductive film to the LED wafer, so that the electrodes of each LED chip are respectively in contact with the corresponding metal electrodes, thereby forming multiple groups of LED chip groups in which multiple LED chips are connected in series and / or in parallel;
[0010] Place a preset number of multiple groups of probes on the metal electrodes at both ends of each group of LED chip groups in the transparent conductive film in sequence to simultaneously test the optoelectronic parameter data of multiple groups of LED chip groups. After all the LED chip groups on the LED wafer are tested, remove the transparent conductive film.
[0011] In addition, for an LED chip testing method according to the above embodiments of the present invention, it may further have the following additional technical features:
[0012] Furthermore, the method further includes:
[0013] Expand the film to separate each LED chip in the LED wafer into an equally spaced arrangement;
[0014] Conduct AOI appearance detection on each LED chip;
[0015] Apply glue to the LED chips with poor optoelectronic parameter data and poor appearance detection;
[0016] Attach an empty blue film to the surface of each LED chip, so that the glued LED chips adhere to the empty blue film;
[0017] Cure the glue by UV irradiation or heating, and tear off the empty blue film to peel off the adhered LED chips.
[0018] Furthermore, multiple marking points for identifying the positions of each LED chip are respectively provided on the LED wafer and the transparent conductive film;
[0019] The step of manufacturing the transparent conductive film with multiple metal electrodes correspondingly provided includes:
[0020] Determine the positions of each LED chip according to the multiple marking points provided on the transparent conductive film;
[0021] Determine the arrangement positions of each metal electrode for the electrodes connecting multiple LED chips in series and / or in parallel according to the positions of each LED chip;
[0022] Set metal electrodes at each arrangement position of the transparent conductive film;
[0023] The step of attaching the transparent conductive film to the LED wafer includes:
[0024] Attach the transparent conductive film to the position corresponding to each marking point on the LED wafer according to each marking point on the transparent conductive film.
[0025] Further, the metal electrodes include connection electrodes and test electrodes;
[0026] The step of fabricating a transparent conductive film with a plurality of corresponding metal electrodes includes:
[0027] Setting connection electrodes in the position areas on the transparent conductive film for series and / or parallel connection with the electrodes of each LED chip in the LED chip group;
[0028] Setting test electrodes in the position areas on the transparent conductive film corresponding to the electrodes of the head and tail LED chips in the LED chip group, wherein the size of the test electrode is larger than that of the electrode of the LED chip, and the test electrode penetrates the transparent conductive film.
[0029] Further, the step of setting connection electrodes in the position areas on the transparent conductive film for series and / or parallel connection with the electrodes of each LED chip in the LED chip group includes:
[0030] Arraying a preset number of connection electrodes in the middle area of the transparent conductive film so that the same preset number of LED chips are connected in series and / or in parallel in each row to form multiple groups of first LED chip groups;
[0031] Setting corresponding connection electrodes in the edge area of the transparent conductive film according to the number of remaining LED chips in each row so that the remaining number of LED chips are connected in series and / or in parallel in each row to form multiple groups of second LED chip groups.
[0032] Further, the step of setting test electrodes in the position areas on the transparent conductive film corresponding to the electrodes of the head and tail LED chips in the LED chip group includes:
[0033] Setting a test electrode with a first shape in the position area on the transparent conductive film corresponding to the electrode of the head-end LED chip in the LED chip group;
[0034] Setting a test electrode with a second shape in the position area on the transparent conductive film corresponding to the electrode of the tail-end LED chip in the LED chip group.
[0035] Further, the step of applying glue to the LED chips with poor optoelectronic parameter data and poor appearance detection includes:
[0036] Marking the LED chip groups with poor optoelectronic parameter data among the tested groups of LED chip groups;
[0037] Marking the LED chips with poor appearance detection among the individual LED chips detected by AOI for appearance;
[0038] Apply glue dots on the LED chip sets with marked defective optoelectronic parameter data and the LED chips with defective appearance inspection.
[0039] Further, the step of applying glue dots on the LED chip sets with marked defective optoelectronic parameter data and the LED chips with defective appearance inspection further includes:
[0040] Place multiple groups of probes with a preset quantity on the electrodes of each LED chip in the LED chip sets with marked defective optoelectronic parameter data in sequence to simultaneously test the optoelectronic parameter data of multiple LED chips;
[0041] Mark the LED chips with defective optoelectronic parameter data in the LED chip sets with tested defective optoelectronic parameter data;
[0042] Apply glue dots on the marked LED chips with defective optoelectronic parameter data and the LED chips with defective appearance inspection.
[0043] Further, the step of placing multiple groups of probes with a preset quantity on the metal electrodes at both ends of each LED chip set in the transparent conductive film in sequence to simultaneously test the optoelectronic parameter data of multiple LED chip sets includes:
[0044] Place multiple groups of probes with a preset quantity on the metal electrodes at both ends of each LED chip set in the transparent conductive film in sequence to simultaneously test the electrical parameter data of multiple LED chip sets, where the electrical parameter data includes forward voltage VF, leakage current Ir, and electrostatic discharge resistance ESD.
[0045] Further, the method further includes:
[0046] Use a standard machine to randomly test the optoelectronic parameter data of LED chips;
[0047] Correct the optoelectronic parameter data of the LED chips measured by each group of probes according to the randomly tested optoelectronic parameter data of the LED chips.
[0048] Compared with the prior art: A transparent conductive film with multiple metal electrodes is directly fabricated according to the arrangement of each LED chip cut from an LED wafer, such that the transparent conductive film can be attached to the LED wafer to connect its metal electrodes with the electrodes of the LED chips. Therefore, the probe can be inserted into the metal electrodes of the transparent conductive film for direct testing, rather than directly acting on the electrodes of the LED chips themselves, so that no needle marks will be left on the LED chips during testing due to the intermediate buffering effect of the transparent conductive film. At the same time, since the metal electrodes are used to connect with the electrodes of each LED chip to form multiple sets of series-connected and / or parallel-connected LED chip groups, and since the method of simultaneous testing with multiple sets of probes is adopted, each set of probes can test an LED chip group formed by series connection and / or parallel connection of multiple LED chips, which can save more testing time, effectively increasing the testing efficiency and solving the problems of low testing efficiency and easy generation of needle marks during the testing process of existing LED chips. Description of the Drawings
[0049] Figure 1 It is a flowchart of the LED chip testing method in the first embodiment of the present invention;
[0050] Figure 2 It is a flowchart of the LED chip testing method in the second embodiment of the present invention;
[0051] Figure 3 It is a schematic structural diagram of an LED wafer in the first embodiment of the present invention;
[0052] Figure 4 It is a schematic structural diagram of the transparent conductive film in the first embodiment of the present invention;
[0053] Figure 5 It is a top view of the transparent conductive film attached to the LED wafer in the first embodiment of the present invention;
[0054] Figure 6 It is Figure 3 a partial schematic diagram of the circled part Ⅳ in
[0055] Figure 7 It is a schematic diagram of LED chip testing in the prior art;
[0056] Figure 8 It is a schematic diagram of LED chip testing in the first embodiment of the present invention;
[0057] Figure 9 It is a schematic structural diagram of an LED chip in the first embodiment of the present invention;
[0058] Figure 10 It is a cross-sectional view of the transparent conductive film attached to the LED wafer in the first embodiment of the present invention;
[0059] The following specific embodiments will further illustrate the present invention in conjunction with the above-mentioned drawings. Specific Embodiments
[0060] To facilitate the understanding of the present invention, the present invention will be described more comprehensively below with reference to the relevant drawings. Several embodiments of the present invention are shown in the drawings. However, the present invention can be implemented in many different forms and is not limited to the embodiments described herein. On the contrary, these embodiments are provided to make the disclosure of the present invention more thorough and comprehensive.
[0061] It should be noted that when an element is referred to as being "fixedly provided on" another element, it can be directly on the other element or there may also be an intermediate element. When an element is considered to be "connected" to another element, it can be directly connected to the other element or there may be an intermediate element at the same time. The terms "vertical", "horizontal", "left", "right" and similar expressions used herein are only for the purpose of illustration.
[0062] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as commonly understood by those skilled in the technical field to which the present invention belongs. The terms used herein in the description of the present invention are only for the purpose of describing specific embodiments and are not intended to limit the present invention. The term "and / or" used herein includes any and all combinations of one or more of the related listed items.
[0063] Embodiment 1
[0064] Please refer to Figure 1 , which shows the LED chip testing method in the first embodiment of the present invention. The method specifically includes steps S01 - S03.
[0065] Step S01: According to the arrangement of each LED chip cut from the LED wafer, a transparent conductive film provided with a plurality of metal electrodes is fabricated. Each metal electrode is used to connect with the electrodes of each LED chip to form multiple groups of series-connected and / or parallel-connected LED chip groups.
[0066] Among them, first, a dicing saw or a cutting machine is used to dice and cut the LED wafer 1 to form a plurality of independent LED chips 10. As shown in Figure 3 , it should be noted that a blue film is adhesively attached to the back of the LED wafer 1 from which a plurality of LED chips 10 are cut. At this time, each LED chip 10 is adhesively fixed through the blue film. Specifically, as shown in the partial enlarged view of circle Ⅳ in Figure 3 ( Figure 6) As shown, each LED chip 10 includes an N electrode (i.e., negative electrode) and a P electrode (i.e., positive electrode), and the two electrodes of the LED chip 10 are both located on the exposed surface, such as on the top or both sides. Specifically, the LED chip 10 can be a flip-chip or a flip-chip LED chip 10.
[0067] Therefore, in the prior art, when it is necessary to test the optoelectronic characteristics of each LED chip 10, two probes 3 in each group of probes 3 are respectively inserted into the N electrode and the P electrode of the LED chip 10, and each group of probes 3 is connected to a constant current source to turn on the power supply of the LED chip 10 to achieve lighting. It can be referred to Figure 7 As shown, each group of probes 3 can test the optoelectronic characteristics of each LED chip 10 one by one. Since the LED chips 10 are arranged closely on the LED wafer 1, it can be called a large amount. Even if the probes 3 can test the LED chips 10 one by one according to the traditional method, on the one hand, due to the large number of LED chips 10, the accuracy requirement for the movement of the probes 3 is extremely high each time, resulting in a long time-consuming for the movement and alignment of the probes 3; on the other hand, two probes 3 used to connect to the positive and negative electrodes of the LED chip 10 need to be moved each time, resulting in a large number of times of moving the probes 3 and also a long time-consuming. On the other hand, since the electrode size of the LED chip 10 is small and the size of the probe 3 is relatively large, the problem of large needle marks will occur when the probe 3 tests each LED chip 10, and even seriously damage the appearance of the LED chip 10 in severe cases.
[0068] Therefore, in an embodiment of the present invention, a transparent conductive film 2 provided with a plurality of metal electrodes 20 is directly fabricated according to the arrangement of each LED chip 10 cut from the LED wafer 1, so that the transparent conductive film 2 can be attached to the LED wafer 1 to connect its metal electrodes 20 to the electrodes of the LED chip 10. Therefore, the probe 3 can directly perform tests on the metal electrodes 20 of the transparent conductive film 2, rather than directly acting on the electrodes of the LED chip 10 itself, so that no needle marks will be left on the LED chip 10 during the test due to the intermediate buffering effect of the transparent conductive film 2.
[0069] Specifically, the transparent conductive film 2 is a soft film with excellent light transmittance, so that when testing the LED chip 10, the optical characteristic test of the LED chip 10 will not be affected by the setting of the transparent conductive film 2; and the metal electrode 20 set on the transparent conductive film 2 has excellent conductivity, so that when testing the LED chip 10, it can make good electrical contact with the electrode of the LED chip 10 without affecting the electrical characteristic test of the LED chip 10. Further, the rest of the positions on the soft film except the metal electrode 20 are insulating, so that only the metal electrode 20 can conduct electricity after contacting the electrode of the LED chip 10, and the rest of the positions are insulated, so as to avoid affecting the photoelectric characteristic test of the LED chip 10.
[0070] Furthermore, the metal electrodes 20 provided on the transparent conductive film 2 are arranged in a preset order so that each LED chip 10 can be connected in series and / or in parallel. Specifically, each metal electrode 20 is used to connect with electrodes of multiple LED chips 10 to form multiple groups of LED chips connected in series and / or in parallel. It should be noted that the LED chipset includes at least two LED chips 10 connected in series and / or in parallel. As an example of the present invention, refer to Figure 5 , Figure 8 and Figure 10 As shown, in each LED chip group, electrodes of different polarities in adjacent LED chips 10 are connected by respective metal electrodes 20. Specifically, the metal electrodes 20 are respectively connected to the N electrode of the previous LED chip 10 and the P electrode of the next LED chip 10, so that the LED chips 10 in the LED chip group are connected in series. It can be understood that in other embodiments of the present invention, the LED chip group can also be connected in parallel by connecting electrodes of the same polarity in adjacent LED chips 10 through respective metal electrodes 20; or the series-parallel connection of the LED chips 10 can be realized by connecting electrodes of the same polarity in adjacent LED chips 10 through some electrodes and connecting electrodes of different polarities in adjacent LED chips 10 through some electrodes. It is set according to actual use needs and is not specifically limited here.
[0071] At the same time, the size of the metal electrodes 20 located at the head and tail ends of each group of LED chips is larger than the size of the electrodes of the LED chip 10, so that the area of contact with the probe 3 can be increased, so that the probe 3 can be better aligned with the metal electrodes 20 at the head and tail ends of each group of LED chips, reducing the time required for alignment during probe 3 testing.
[0072] Further, see Figures 3 - 5As shown, multiple marking points 4 for identifying the positions of respective LED chips 10 are respectively provided on the LED wafer 1 and the transparent conductive film 2. Specifically, in an example of the present invention, 9 marking points 4 are provided on the LED wafer 1, such that the coordinate positions of respective LED chips 10 can be identified according to respective marking points 4. It should be noted that the number of LED chips 10 on the actually produced and manufactured LED wafer 1 does not exactly refer to Figure 3 As shown, the actual number of LED chips 10 is Figure 3 As shown, much more than the number of LED chips 10. Therefore, the number of marking points 4 on the LED wafer 1 is set according to actual usage needs and is not specifically limited herein.
[0073] Correspondingly, the above steps of manufacturing the transparent conductive film provided with multiple metal electrodes include:
[0074] Determining the positions of respective LED chips according to multiple marking points provided on the transparent conductive film;
[0075] Determining the arrangement positions of respective metal electrodes for electrodes used to serially and / or parallelly connect multiple LED chips according to the positions of respective LED chips;
[0076] Providing metal electrodes at respective arrangement positions of the transparent conductive film.
[0077] Specifically, since marking points 4 corresponding to respective marking points 4 on the LED wafer 1 are provided on the transparent conductive film 2, the coordinate positions of respective LED chips 10 on the LED wafer 1 can be correspondingly determined on the transparent conductive film 2 according to respective provided marking points 4. Correspondingly, at this time, the arrangement positions of respective metal electrodes 20 are correspondingly determined according to the manner of actually serially and / or parallelly connecting multiple LED chips 10, and metal electrodes 20 are correspondingly provided. As an example of the present invention, as Figure 4 , Figure 5 , Figure 8 and Figure 10 As shown, when multiple LED chips 10 are serially connected in series to form an LED chip group, the arrangement positions of respective metal electrodes 20 are correspondingly determined according to the coordinate positions of the positive and negative electrodes of respective LED chips 10, and metal electrodes 20 are provided at the arrangement positions of respective metal electrodes 20, thereby forming the transparent conductive film 2 as shown in Figure 4 As shown.
[0078] Furthermore, the metal electrode 20 includes a connection electrode 21 and a test electrode 22. The above steps of manufacturing the transparent conductive film provided with multiple metal electrodes include:
[0079] A connection electrode is arranged in a position area on the transparent conductive film for series and / or parallel connection with the electrodes of each LED chip in the LED chip group;
[0080] A test electrode is arranged in a position area on the transparent conductive film corresponding to the electrodes of the head and tail LED chips in the LED chip group, wherein the size of the test electrode is larger than that of the electrode of the LED chip, and the test electrode penetrates the transparent conductive film.
[0081] That is to say, each of its connection electrodes 21 is used to connect the electrodes of adjacent LED chips 10 so as to realize series or parallel connection between the LED chips 10. As an example of the present invention, such as Figure 4 、 Figure 5 And Figure 8 As shown, its connection electrodes 21 are respectively connected to the N electrode of the previous LED chip 10 and the P electrode of the next LED chip 10, so as to form an LED chip group by connecting multiple LED chips 10 in series. And each of its test electrodes 22 is used to connect the electrodes of the head and tail LED chips 10 in the LED chip group that are not connected to the connection electrodes 21. As Figure 4 、 Figure 5 And Figure 8 As shown, its test electrode 22 is separately connected to the P electrode of the head-end LED chip 10 and the N electrode of the tail-end LED chip 10 in the LED chip group, so that when performing optoelectronic characteristic tests on the LED chip group, only two probes 3 in each group of probes 3 need to be placed on the two test electrodes 22 respectively.
[0082] Furthermore, referring to Figure 9 As shown, as an example of the present invention, the LED chip 10 generally includes a substrate 11, an epitaxial layer 12 located on the substrate 11, and a conductive electrode 13 located on the epitaxial layer 12. The epitaxial layer 12 includes a first semiconductor layer 121, a light-emitting layer 122, and a second semiconductor layer 123 sequentially arranged on the substrate 11. The conductive electrode 13 includes a first electrode 131 electrically connected to the first semiconductor layer 121 and a second electrode 132 electrically connected to the second semiconductor layer 123. Specifically, in the example of the present invention, the first semiconductor layer 121 is a P-type semiconductor layer, the second semiconductor layer 123 is an N-type semiconductor layer, the first electrode 131 is a P electrode, and the second electrode 132 is an N electrode. At this time, both electrodes of the LED chip 10 are located on the exposed surface, and the height of the P electrode is lower than that of the N electrode. It can be understood that in other embodiments of the present invention, the first semiconductor can also be an N semiconductor layer, which is set according to actual use needs and will not be specifically limited here.
[0083] Accordingly, the transparent conductive film 2 produced thereby includes a base and a boss, wherein the position of each boss corresponds to the position of the P electrode with a relatively lower height, so that when the transparent conductive film 2 is attached to the LED wafer 1, the boss in the transparent conductive film 2 can be attached to the P electrode with a lower height, while the base in the transparent conductive film 2 can be attached to the N electrode with a higher height, avoiding the problem that the transparent conductive film 2 cannot be attached to the electrode with a lower height due to the height difference between the two electrodes in the LED chip 10. At this time, in an example of the present invention, when the LED chips 10 of the LED chip group are connected in series, the setting of the connection electrode 21 refers to Figure 4 , Figure 5 , Figure 8 and Figure 10 as shown. The connection electrode 21 is provided on the back surface of the transparent conductive film 2 and is connected from the corresponding position of the N electrode of the previous LED chip 10 to the corresponding position of the P electrode of the next LED chip 10. At the same time, the size of the connection electrode 21 is smaller than the size of the electrode of the LED chip 10, and the connection electrode 21 is exposed on the front surface of the transparent conductive film 2. It can be understood that in other embodiments of the present invention, the size of the connection electrode 21 may also be greater than or equal to the size of the electrode of the LED chip 10 and may not be connected to the adjacent electrodes in the same LED chip 10, and it is set according to actual use needs. Accordingly, the setting of the test electrode 22 refers to Figure 4 , Figure 5 , Figure 8 and Figure 10 as shown. The size of the test electrode 22 is larger than the size of the electrode of the LED chip 10, and the test electrode 22 penetrates the transparent conductive film 2. At this time, the test electrode 22 is exposed on the front surface of the transparent conductive film 2, so that when the optoelectronic characteristics of each LED chip 10 are tested, the probe 3 in each group of probes 3 can be inserted into the test electrode 22 that penetrates the transparent conductive film 2. In an example of the present invention, the size of the test electrode 22 on the front and back surfaces of the transparent conductive film 2 is the same and larger than the size of the electrode of the LED chip 10. It can be understood that in other embodiments of the present invention, the size of the test electrode 22 may also be smaller on the back surface of the transparent conductive film 2, and when it penetrates the transparent conductive film 2 to the front surface of the transparent conductive film 2, the size of the test electrode 22 is larger on the front surface of the transparent conductive film 2, so that the test electrode 22 can be connected to the electrode of the LED chip 10 with a smaller size on the back surface of the transparent conductive film 2, and the test electrode 22 is connected to the probe 3 with a larger size on the front surface of the transparent conductive film 2, so as to increase the area of the region in contact with the probe 3, thereby realizing the rapid alignment of the probe 3 and the test electrode 22 and reducing the precision requirement when the probe 3 moves.
[0084] Further, the step of setting connection electrodes in the position area on the transparent conductive film for series and / or parallel connection with the electrodes of each LED chip in the LED chip group includes:
[0085] Array a preset number of connection electrodes in the middle area of the transparent conductive film, so that the same preset number of LED chips are connected in series and / or in parallel in each row to form multiple groups of first LED chip groups;
[0086] Set corresponding connection electrodes in the edge area of the transparent conductive film according to the number of remaining LED chips in each row, so that the remaining number of LED chips are connected in series and / or in parallel in each row to form multiple groups of second LED chip groups.
[0087] Specifically, as an example of the present invention, refer to Figure 4 and Figure 5 As shown, a preset number of connection electrodes 21 are arrayed in the middle area of the transparent conductive film 2, so that the same preset number of LED chips 10 are connected in series in each row to form multiple groups of first LED chip groups, and at the same time, each group of first LED chip groups are arranged in sequence in each column. Specifically, the number of LED chips 10 connected in series in the first LED chip group is set accordingly according to parameters such as the voltage and current of the constant current source connected by the probe 3. In the example of the present invention, 8 LED chips 10 are connected in series in each row of the first LED chip group, that is, 7 connection electrodes 21 are provided in each group of first LED chip groups. It can be understood that in other embodiments of the present invention, the number of LED chips 10 connected in series in each row of the first LED chip group can also be other, which is set according to actual use needs and is not specifically limited herein. Further, in the edge area of the transparent conductive film 2, since it is impossible to connect in series and / or in parallel a preset number of connection electrodes 21, corresponding connection electrodes 21 are set in the edge area of the transparent conductive film 2 according to the number of remaining LED chips 10 in each row, so that the remaining number of LED chips 10 are connected in series and / or in parallel in each row to form multiple groups of second LED chip groups, which can be specifically referred to Figure 4 and Figure 5 As shown. At this time, by arraying a preset number of connection electrodes 21 in the middle area of the transparent conductive film 2, when performing optoelectronic characteristic tests on the LED chip group, the relative positions of the two probes 3 in each group of probes 3 are kept fixed, and only a relatively small displacement needs to be moved to test adjacent LED chip groups, thus increasing the test efficiency.
[0088] Further, the step of setting test electrodes in the position area on the transparent conductive film corresponding to the electrodes of the first and last LED chips in the LED chip group includes:
[0089] A test electrode of a first shape is provided at a position area corresponding to the electrode of the first LED chip of the LED chip group on the transparent conductive film;
[0090] A test electrode of a second shape is provided at a position area corresponding to the electrode of the last LED chip of the LED chip group on the transparent conductive film.
[0091] Specifically, to achieve the identification of the polarities at both ends of the LED chip group and avoid the problem of damaging each LED chip 10 of the LED chip group due to connecting the opposite positive and negative power supplies when connecting the constant current source, test electrodes 22 of different polarities correspond to different shapes. Specifically, as an example of the present invention, referring to Figure 4 、 Figure 5 and Figure 8 shown, the shape of the test electrode 22 connected to the P electrode of the first LED chip 10 is set as a square, and the shape of the test electrode 22 connected to the N electrode of the last LED chip 10 is set as a circle. When performing optoelectronic characteristic tests on the LED chip group, two probes 3 in the probe group 3 are respectively placed on the two test electrodes 22, and the probe 3 placed on the square test electrode 22 is connected to the positive power supply of the constant current source, and the probe 3 placed on the circular test electrode 22 is connected to the negative power supply of the constant current source. It can be understood that in other embodiments of the present invention, other shapes can also be set for the test electrode 22, which is not specifically limited herein.
[0092] Furthermore, the transparent conductive film 2 is a soft thin film with elasticity or flexibility. The advantage of the transparent conductive film 2 having elasticity or flexibility at this time is that even if the tops of the test electrode pairs 22 are not on the same plane, or the two electrodes of the LED chip 10 are not on the same plane, or the blue film bonding and carrying the LED wafer 1 is bent, etc., the deformation of the elastic / flexible transparent conductive film 2 can ensure that the test electrode 22 fits well on the surfaces of the two electrodes of all LED chips 10, so as to ensure that the test electrode 22, the connecting electrode 21, and the two electrodes of the LED chip 10 are evenly close to each other, avoiding uneven height differences and large differences in the degree of capacitive coupling formed, resulting in uneven electroluminescence effects and unsatisfactory test effects.
[0093] Step S02: Attach the transparent conductive film to the LED wafer so that the electrodes of each LED chip are respectively in contact with the corresponding metal electrodes to form multiple groups of LED chip groups in which multiple LED chips are connected in series and / or in parallel.
[0094] Among them, referring to the above, when a plurality of marking points 4 for identifying the positions of each LED chip 10 are respectively provided on the LED wafer 1 and the transparent conductive film 2, the above step of attaching the transparent conductive film to the LED wafer includes:
[0095] Attach the transparent conductive film at positions corresponding to the respective marking points on the LED wafer according to the respective marking points on the transparent conductive film.
[0096] Specifically, as an example of the present invention, refer to Figure 5 , Figure 8 and Figure 10 As shown, it is a schematic diagram when the transparent conductive film 2 is attached to the LED wafer 1. After the transparent conductive film 2 is attached to the LED wafer 1 according to the corresponding marking points 4, the metal electrodes 20 on the transparent conductive film 2 are connected to the electrodes of the respective LED chips 10 on the LED wafer 1. Specifically, as described above, at this time, the connection electrodes 21 in the metal electrodes 20 are respectively connected to the N electrode of the previous LED chip 10 and the P electrode of the next LED chip 10, and the test electrode 22 in the metal electrodes 20 is separately connected to the P electrode of the first LED chip 10 at the head end of the LED chip group and the N electrode of the last LED chip 10 at the tail end. When performing optoelectronic characteristic tests on the LED chip group, only need to place the two probes 3 in each group of probes 3 on the two test electrodes 22 respectively.
[0097] Step S03: Sequentially place a preset number of groups of probes on the metal electrodes at the head and tail ends of each group of LED chip groups in the transparent conductive film to simultaneously test the optoelectronic parameter data of multiple groups of LED chip groups, and remove the transparent conductive film after all the LED chip groups on the LED wafer are tested.
[0098] Each group of probes 3 includes two probes 3, which are respectively a P electrode probe 31 and an N electrode probe 32. Specifically, when in use, the P electrode probe 31 is inserted into the P electrode of the LED chip 10, and the N electrode probe 32 is inserted into the N electrode of the LED chip 10. At the same time, the P electrode probe 31 is connected to the positive electrode (+) of the constant current source, and the N electrode probe 32 is connected to the negative electrode (-) of the constant current source.
[0099] In the embodiment of the present invention, by sequentially placing a preset number of groups of probes 3 on the test electrodes 22 in the metal electrodes 20 in the transparent conductive film 2 to simultaneously test the optoelectronic parameter data of multiple groups of LED chip groups. Referring to the above, the P electrode probe 3 is inserted into the P-polarity test electrode 22 in the metal electrode 20 on the front side of the transparent conductive film 2. Specifically, as described above, the P electrode probe 3 is inserted into the square test electrode 22, and the N electrode probe 3 is inserted into the circular test electrode 22. Among them, the above-mentioned optoelectronic parameter data includes optical parameter data and electrical parameter data. The optical parameter data includes the dominant wavelength Wd and the luminance Iv; the electrical parameter data includes the forward voltage VF, the leakage current Ir, and the electrostatic discharge resistance ESD.
[0100] Further, in the prior art, one or more sets of probes 3 are usually adopted, and the number of the probes 3 is set according to the capacity limit of the probe 3 platform. For example, Figure 7 as shown, when four sets of probes 3 are used to test the optoelectronic characteristics of the LED chip 10, in one test, only four LED chips 10 can be tested simultaneously by the four sets of probes 3 at this time. In the embodiment of the present invention, as Figure 8 and Figure 10 shown, the four sets of probes 3 can simultaneously test four sets of LED chip groups, and each set of LED chip groups has 8 LED chips 10. Therefore, compared with the prior art where the probe 3 can only test a single LED chip 10, in the embodiment of the present invention, the probe 3 can test the LED chip group formed by the series connection and / or parallel connection of multiple LED chips 10, which can save more test time and greatly increase the test efficiency.
[0101] Further, after the optoelectronic parameter data of the corresponding LED chip group are simultaneously tested by multiple sets of probes 3, the multiple sets of probes 3 are moved to the position of the test electrode 22 corresponding to the next LED chip group to be tested until all the LED chip groups on the LED wafer 1 are completely tested, and then the transparent conductive film 2 is removed.
[0102] Further, when all the LED wafers 1 are completely identical in production, the transparent conductive film 2 can also be used on other LED wafers 1, so that after the transparent conductive film 2 is fabricated once, it can be reused.
[0103] In summary, in the LED chip testing method in the above embodiments of the present invention, a transparent conductive film provided with a plurality of metal electrodes is directly fabricated according to the arrangement of each LED chip cut from the LED wafer, so that the transparent conductive film can be attached to the LED wafer and its metal electrodes are connected to the electrodes of the LED chips. Therefore, the probe can be directly inserted into the metal electrodes of the transparent conductive film for testing, rather than directly acting on the electrodes of the LED chips themselves, so that no pin marks will be left on the LED chips during testing due to the intermediate buffering effect of the transparent conductive film; at the same time, since the metal electrodes are used to connect with the electrodes of each LED chip to form multiple sets of series-connected and / or parallel-connected LED chip groups, and since the multiple sets of probes are used for simultaneous testing, each set of probes can test the LED chip group formed by the series connection and / or parallel connection of multiple LED chips, which can save more test time and effectively increase the test efficiency, and solves the problems of low test efficiency and easy generation of pin marks in the prior art during the testing of LED chips.
[0104] Embodiment 2
[0105] Please refer to Figure 2, which shows the LED chip testing method in the second embodiment of the present invention. The method specifically includes steps S11 to S18.
[0106] Step S11: According to the arrangement of each LED chip cut from the LED wafer, a transparent conductive film provided with a plurality of metal electrodes is made. Each metal electrode is used to connect with the electrodes of each LED chip to form multiple groups of series-connected and / or parallel-connected LED chip groups.
[0107] Step S12: Attach the transparent conductive film to the LED wafer so that the electrodes of each LED chip are respectively in contact with the corresponding metal electrodes to form multiple groups of LED chip groups in which a plurality of LED chips are connected in series and / or parallel.
[0108] Step S13: Sequentially place a preset number of multiple groups of probes on the metal electrodes at both ends of each group of LED chip groups in the transparent conductive film to simultaneously test the optoelectronic parameter data of multiple groups of LED chip groups. After all the LED chip groups on the LED wafer are tested, remove the transparent conductive film.
[0109] Among them, the specific processes of steps S11 - S13 are substantially the same as those in the foregoing embodiment, and can be specifically referred to as described in the foregoing embodiment, and will not be specifically limited herein.
[0110] Furthermore, the above step S13 further includes:
[0111] Sequentially place a preset number of multiple groups of probes on the metal electrodes at both ends of each group of LED chip groups in the transparent conductive film to simultaneously test the electrical parameter data of multiple groups of LED chip groups. The electrical parameter data includes forward voltage VF, leakage current Ir, and electrostatic discharge resistance ESD.
[0112] That is to say, when multiple groups of probes 3 perform optoelectronic characteristic tests on multiple groups of LED chip groups, they can only test the electrical parameter data of each group of LED chip groups without testing the optical parameter data of the LED chip groups. At this time, compared with the existing method of simultaneously testing optoelectronic parameter data, it can save about 2.5 times the testing time.
[0113] Step S14: Expand the film to separate each LED chip in the LED wafer into an equally spaced arrangement.
[0114] Among them, after the LED wafer 1 is scribed and cut into multiple LED chips 10, since the individual LED chips 10 are still arranged closely with a very small spacing (about 0.1 mm), it is not conducive to the operation of subsequent processes. Therefore, in the embodiment of the present invention, a film expanding machine is used to expand the blue film bonding the LED chips 10, so that the individual LED chips 10 are separated into an equally spaced arrangement. Specifically, for example, the spacing between the individual LED chips 10 is stretched to about 0.6 mm. Of course, in other embodiments of the present invention, the blue film can also be expanded manually, but it is very easy to cause problems such as dropping and wasting of the LED chips 10.
[0115] Further, in an embodiment of the present invention, after step S13 or step S14, it further includes:
[0116] Using a standard machine to sample and measure the optoelectronic parameter data of the LED chips;
[0117] According to the sampled and measured optoelectronic parameter data of the LED chips, correcting the optoelectronic parameter data of the LED chips measured by each group of probes.
[0118] Specifically, after the optoelectronic parameter data of each LED chip group is tested, or only after the electrical parameter data of the LED chip group is tested, it uses a standard machine to sample and measure the optoelectronic parameter data of the LED chips 10. Specifically, it can sample and measure the optoelectronic parameter data of a group of LED chip groups or sample and measure the optoelectronic parameter data of one LED chip 10 in a group of LED chip groups. It can also sample and measure the optoelectronic parameter data of a group of LED chip groups or sample and measure the optoelectronic parameter data of one LED chip 10 in a group of LED chip groups at every preset group of LED chip groups. At this time, since the optical property difference between adjacent LED chips 10 in the LED wafer 1 is small, the sampled and measured optoelectronic parameter data of the LED chips 10 can replace the optical property parameter data of the untested LED chips 10. At the same time, it corrects the optoelectronic parameter data of the LED chips 10 measured by each group of probes 3 according to the currently sampled and measured optoelectronic parameter data of the LED chips 10, avoiding the optoelectronic parameter data differences caused by test errors or the differences of each group of probes 3.
[0119] Step S15, performing AOI appearance inspection on each LED chip.
[0120] Among them, in the embodiment of the present invention, after the individual LED chips 10 in the LED wafer 1 are separated into an equally spaced arrangement by film expansion, it performs appearance inspection on each LED chip 10 through an AOI appearance detector to determine whether there are any defective problems in the appearance of each LED chip 10.
[0121] Step S16, applying glue to the LED chips with defective optoelectronic parameter data and defective appearance inspection.
[0122] Among them, step S16 specifically includes:
[0123] Mark the LED chip groups with poor optoelectronic parameter data among the tested groups of LED chip groups;
[0124] Mark the LED chips with poor appearance detection among the individual LED chips subjected to AOI appearance detection;
[0125] Apply glue to the marked LED chip groups with poor optoelectronic parameter data and the LED chips with poor appearance detection.
[0126] Specifically, in the aforementioned step S13, when it simultaneously tests the optoelectronic parameter data of multiple groups of LED chip groups through multiple groups of probes 3 respectively, it will mark the LED chip groups with poor optoelectronic parameter data among the tested groups of LED chip groups. Specifically, it marks the coordinate positions of the LED chip groups. The specific poor optoelectronic parameter data means that the tested optoelectronic parameter data exceeds the reasonable range of optoelectronic parameters. Correspondingly, in the aforementioned step S15, when it performs appearance detection on each LED chip 10 through an AOI appearance detector, it will correspondingly mark the LED chips 10 with poor appearance detection. Further, apply glue to the marked LED chip groups with poor optoelectronic parameter data and the LED chips 10 with poor appearance detection. Specifically, the glue can be UV glue or curing glue.
[0127] Among them, since when detecting that the optoelectronic parameter data of an LED chip group is poor, it may only be the optoelectronic parameter data of one or more LED chips 10 in the LED chip group that is poor, rather than the optoelectronic parameter data of all the LED chips 10 in the LED chip group. Therefore, in an embodiment of the present invention, it can be to apply glue to all the LED chips 10 in the poor LED chip group to remove the LED chips 10 in the entire LED chip group. Of course, in other embodiments of the present invention, it can also separately perform another optoelectronic characteristic test on all the LED chips 10 in the poor LED chip group, so as to determine the LED chips 10 with poor optoelectronic parameter data and apply glue, while retaining the LED chips 10 with qualified other optoelectronic parameter data.
[0128] Specifically, the step of applying glue to the marked LED chip groups with poor optoelectronic parameter data and the LED chips with poor appearance detection further includes:
[0129] Place multiple groups of probes with a preset quantity on the electrodes of the individual LED chips in the marked LED chip groups with poor optoelectronic parameter data respectively and simultaneously test the optoelectronic parameter data of multiple LED chips;
[0130] Mark the LED chips with poor optoelectronic parameter data in the LED chip group with poor optoelectronic parameter data to be tested;
[0131] Apply glue dots on the marked LED chips with poor optoelectronic parameter data and the LED chips with poor appearance detection.
[0132] Step S17: Attach an empty blue film to the surface of each LED chip so that the glued LED chips adhere to the empty blue film.
[0133] Among them, in the embodiment of the present invention, after applying glue dots to the LED chips 10 with poor optoelectronic parameter data and poor appearance detection, a new empty blue film is used to attach to the surface of each LED chip 10, so that the glued LED chips 10 adhere to the empty blue film.
[0134] Step S18: Cure the glue by UV irradiation or heating, and tear off the empty blue film to peel off the adhered LED chips.
[0135] Among them, in the embodiment of the present invention, when the applied glue is UV glue, the UV glue can be cured by UV irradiation, and the empty blue film adheres to the LED chips 10 with poor optoelectronic parameter data and poor appearance detection through the UV glue; when the applied glue is curing glue, the curing glue can be cured by heating, and the empty blue film adheres to the LED chips 10 with poor optoelectronic parameter data and poor appearance detection through the curing glue. Further, after the glue is completely cured, the empty blue film is torn off, so that the defective LED chips 10 adhered to the empty blue film can be quickly peeled off, which can save the removal time of the defective LED chips 10. In the prior art, it is necessary to sort and remove the LED chips 10 with poor appearance and poor optoelectronic parameter data one by one through a sorting device, resulting in an increase in the removal time of the defective LED chips 10.
[0136] In summary, in the LED chip testing method in the above embodiments of the present invention, after the optoelectronic characteristics test is completed, the appearance is detected, and glue dots are applied to the LED chips with poor optoelectronic parameter data and poor appearance, and an empty blue film is attached, so that the empty blue film can adhere all the defective LED chips. Therefore, when tearing off the empty blue film, all the adhered defective LED chips can be removed and peeled off, which can save time and avoid the problem of long time caused by sorting one by one through a sorter in the prior art.
[0137] In the description of this specification, the description referring to terms such as "one embodiment", "some embodiments", "examples", "specific examples", or "some examples", etc. means that the specific features, structures, materials, or characteristics described in connection with the embodiment or example are included in at least one embodiment or example of the present invention. In this specification, the schematic expressions of the above terms do not necessarily refer to the same embodiment or example. Moreover, the specific features, structures, materials, or characteristics described can be combined in a suitable manner in any one or more embodiments or examples.
[0138] The above-described embodiments only represent several implementation manners of the present invention. The description is relatively specific and detailed, but it should not be construed as a limitation on the scope of the patent for the present invention. It should be noted that for those of ordinary skill in the art, without departing from the concept of the present invention, several modifications and improvements can still be made, and these all belong to the protection scope of the present invention. Therefore, the protection scope of the patent for the present invention should be subject to the appended claims.
Claims
1. A method for testing an LED chip, characterized in that, The method includes: According to the arrangement of each LED chip cut from the LED wafer, a transparent conductive film provided with a plurality of metal electrodes is fabricated. Each metal electrode is used to connect with the electrodes of each LED chip to form multiple groups of series-connected and / or parallel-connected LED chip groups. The metal electrodes include connection electrodes and test electrodes. The step of fabricating the transparent conductive film provided with a plurality of metal electrodes includes: Setting connection electrodes in the position areas on the transparent conductive film for series connection and / or parallel connection with the electrodes of each LED chip in the LED chip group. Setting test electrodes in the position areas on the transparent conductive film corresponding to the electrodes of the first and last LED chips in the LED chip group. The size of the test electrode is larger than that of the electrode of the LED chip, and the test electrode penetrates the transparent conductive film. Attaching the transparent conductive film to the LED wafer so that the electrodes of each LED chip are respectively in contact with the corresponding metal electrodes to form multiple groups of LED chip groups composed of multiple series-connected and / or parallel-connected LED chips. Sequentially placing a preset number of probe groups on the metal electrodes at both ends of each group of LED chip groups in the transparent conductive film to simultaneously test the optoelectronic parameter data of multiple groups of LED chip groups until all the LED chip groups on the LED wafer are tested and then removing the transparent conductive film.
2. The LED chip testing method according to claim 1, wherein The method further includes: Expanding the film to separate each LED chip in the LED wafer into an equally spaced arrangement. Performing AOI appearance inspection on each LED chip. Applying glue to the LED chips with poor optoelectronic parameter data and poor appearance inspection. Attaching an empty blue film to the surface of each LED chip so that the glued LED chips adhere to the empty blue film. Curing the glue by UV irradiation or heating and tearing off the empty blue film to peel off the adhered LED chips.
3. The LED chip testing method according to claim 1, characterized in that, A plurality of marking points for identifying the positions of each LED chip are respectively provided on the LED wafer and the transparent conductive film. The step of fabricating the transparent conductive film provided with a plurality of metal electrodes includes: Determining the positions of each LED chip according to the plurality of marking points set on the transparent conductive film. Determining the arrangement positions of each metal electrode for connecting the electrodes of multiple series-connected and / or parallel-connected LED chips according to the positions of each LED chip. Setting metal electrodes at each arrangement position on the transparent conductive film. The step of attaching the transparent conductive film to the LED wafer includes: Attaching the transparent conductive film to the position corresponding to each marking point on the LED wafer according to the marking points on the transparent conductive film.
4. The LED chip testing method according to claim 1, characterized in that, The step of setting connection electrodes in the position areas on the transparent conductive film for series connection and / or parallel connection with the electrodes of each LED chip in the LED chip group includes: Arraying a preset number of connection electrodes in the middle area of the transparent conductive film so that the same preset number of LED chips are connected in series and / or parallel in each row to form multiple groups of first LED chip groups. Setting corresponding connection electrodes in the edge area of the transparent conductive film according to the number of remaining LED chips in each row so that the remaining number of LED chips are connected in series and / or parallel in each row to form multiple groups of second LED chip groups.
5. The LED chip testing method according to claim 1, wherein The step of setting test electrodes at position regions corresponding to the electrodes of the head and tail LED chips of the LED chip group on the transparent conductive film includes: Setting test electrodes of a first shape at a position region corresponding to the electrode of the head LED chip of the LED chip group on the transparent conductive film; Setting test electrodes of a second shape at a position region corresponding to the electrode of the tail LED chip of the LED chip group on the transparent conductive film.
6. The LED chip testing method according to claim 2, wherein The step of dispensing glue on the LED chips with poor optoelectronic parameter data and poor appearance detection includes: Marking the LED chip groups with poor optoelectronic parameter data among the tested groups of LED chip groups; Marking the LED chips with poor appearance detection among the individual LED chips subjected to AOI appearance detection; Dispensing glue on the marked LED chip groups with poor optoelectronic parameter data and the LED chips with poor appearance detection.
7. The LED chip testing method according to claim 6, wherein The step of dispensing glue on the marked LED chip groups with poor optoelectronic parameter data and the LED chips with poor appearance detection further includes: Sequentially placing a preset number of multiple groups of probes on the electrodes of each LED chip in the marked LED chip groups with poor optoelectronic parameter data to simultaneously test the optoelectronic parameter data of multiple LED chips; Marking the LED chips with poor optoelectronic parameter data among the tested LED chip groups with poor optoelectronic parameter data; Dispensing glue on the marked LED chips with poor optoelectronic parameter data and the LED chips with poor appearance detection.
8. The LED chip testing method according to claim 1, wherein, The step of sequentially placing a preset number of multiple groups of probes on the metal electrodes at both ends of each LED chip group in the transparent conductive film to simultaneously test the optoelectronic parameter data of multiple groups of LED chip groups includes: Sequentially placing a preset number of multiple groups of probes on the metal electrodes at both ends of each LED chip group in the transparent conductive film to simultaneously test the electrical parameter data of multiple groups of LED chip groups, where the electrical parameter data includes forward voltage VF, leakage current Ir, and electrostatic discharge resistance ESD.
9. The LED chip testing method according to claim 1 or 8, characterized in that The method further includes: Using a standard machine to randomly test the optoelectronic parameter data of the LED chips; Correcting the optoelectronic parameter data of the LED chips measured by each group of probes according to the optoelectronic parameter data of the LED chips obtained by the random test.
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