A balance chamber leak detection optimization system for blood purification
By introducing two signal generation circuits, programmable amplifiers, high-speed ADCs, and MCU timing control AI intelligent algorithm units into the blood purification equipment, AC square wave signals are generated and multi-channel parallel detection is performed. This solves the problem of false alarms and missed alarms when the blood purification equipment detects leakage in the balance chamber, and achieves accurate detection and improved sensitivity for minute leaks.
Patent Information
- Application Number
- CN202210434716.7
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Filing Date
- 2022-04-24
- Publication Date
- 2025-11-25
- Estimated Expiration
- 2042-04-24
AI Technical Summary
Existing blood purification equipment has difficulty effectively distinguishing minute leaks when detecting leaks in the balance chamber, resulting in false alarms and false negatives. In particular, its large dynamic range and simple algorithm lead to insufficient detection capabilities.
It employs a dual-channel signal generation circuit, a programmable amplifier, a high-speed ADC, and an MCU timing control AI intelligent algorithm unit. By generating an AC square wave signal, combined with the programmable amplifier and high-speed ADC, it uses intelligent algorithms to perform multi-channel parallel detection, dynamically adjust the amplification factor, and perform real-time sampling and trend judgment to optimize leakage detection.
It enables precise detection of minute leaks, reduces false alarms and false negatives, improves detection sensitivity and accuracy, solves the problem of large dynamic range, and enhances the ability to detect instantaneous leaks.
Smart Images

Figure CN114812959B_ABST
Abstract
Description
Technical Field
[0001] This invention belongs to the technical field of blood purification equipment, specifically relating to a blood purification balance chamber leakage detection and optimization system. Background Technology
[0002] Existing blood purification equipment uses a balance chamber leakage detection system, such as Figure 1 As shown. This detection system can detect whether the balance chamber is switching normally or leaking in real time, ensuring patient safety. Existing technologies have difficulty detecting minute leaks. Because they use resistance detection, the resistance value changes from 100Ω to 100MΩ, which is difficult for a single amplifier to handle. Existing detection uses a multi-channel scanning method, which involves channel switching and lacks the ability to detect instantaneous leaks. The algorithm is also simple and may have problems with false alarms and missed detections. Summary of the Invention
[0003] In view of the above-mentioned shortcomings in the prior art, the present invention provides an optimized system for detecting leakage in the balance chamber of blood purification, which solves the problem that existing blood purification equipment cannot effectively address the issues of false alarms and missed alarms.
[0004] To achieve the aforementioned objectives, the present invention employs the following technical solution: a blood purification balance chamber leakage detection optimization system, comprising a detection circuit and a balance chamber. The detection circuit includes a two-channel signal generation circuit, a programmable amplifier and a high-speed ADC, and an MCU timing control AI intelligent algorithm unit. The programmable amplifier and high-speed ADC are connected to the MCU timing control AI intelligent algorithm unit. The balance chamber is equivalent to the solenoid valve equivalent resistances R103 and R203 and the diaphragm equivalent resistance R1-2. The output signal Vout1 of the two-channel signal generation circuit is connected to the solenoid valve equivalent resistance R103 through the signal input impedance R101. One end of the circuit is connected to the grounding resistor R102. The output signal Vout2 of the two-channel signal generation circuit is connected to one end of the equivalent resistance R203 of the solenoid valve and the grounding resistor R202 through the signal input impedance R202. The other end of the equivalent resistance R103 of the solenoid valve is connected to one end of the equivalent resistance R1-2 of the diaphragm and the grounding resistor R104 to generate the input signal Vin1, which is connected to the programmable amplifier and the high-speed ADC. The other end of the equivalent resistance R203 of the solenoid valve is connected to the other end of the equivalent resistance R1-2 of the diaphragm and the grounding resistor R204 to generate the input signal Vin2, which is connected to the programmable amplifier and the high-speed ADC.
[0005] Furthermore, the output signals Vout1 and Vout2 are square wave AC signals with an amplitude of ±5V.
[0006] Further, the signal input impedance R101 and the ground resistance R102 are provided with a waste liquid inlet, the signal input impedance R201 and the ground resistance R202 are provided with a dialysate inlet, the ground resistance R104 and the programmable amplification and high-speed ADC are provided with a waste liquid outlet, and the ground resistance R204 and the programmable amplification and high-speed ADC are provided with a dialysate outlet.
[0007] Further, the programmable amplification and high-speed ADC includes a solenoid valve leakage detection circuit, which includes a positive feedback square wave transmitter and a programmable amplifier connected through an intermediate plug J1, the positive feedback square wave transmitter includes a square wave generator 1 and a square wave generator 2, the output signal Vout1 of the square wave generator 1 is connected to the 2 terminal of the intermediate plug J1, the output signal Vout2 of the square wave generator 2 is connected to the 1 terminal of the intermediate plug J1, and the programmable amplifier includes a filter and program-controlled amplifier 1 and a filter and program-controlled amplifier 2, the input signal Vin1 of the filter and program-controlled amplifier 1 is connected to the 4 terminal of the intermediate plug J1, and the input signal Vin2 of the filter and program-controlled amplifier 2 is connected to the 3 terminal of the intermediate plug J1.
[0008] Further, the square wave generator 1 and the square wave generator 2 have the same structure, both including an operational amplifier U1A and an operational amplifier U1B, the model numbers of the operational amplifier U1A and the operational amplifier U1B are both TL072, the 2 terminals of the operational amplifier U1A are respectively connected to one terminal of a capacitor C1 and one terminal of a resistor R5, the 3 terminals of the operational amplifier U1A are respectively connected to one terminal of a resistor R1 and one terminal of a resistor R3, the other terminal of the resistor R1 and the other terminal of the capacitor C1 are both connected to DGND, the other terminal of the resistor R5 and the other terminal of the resistor R3 are both connected to the 1 terminal of the operational amplifier U1A and connected to the 5 terminal of the operational amplifier U1B, the 6 terminal of the operational amplifier U1B is connected to the 7 terminal of the operational amplifier U1B and outputs a signal Vout1 / Vout2, the 4 terminal of the operational amplifier U1B is respectively connected to-5VA and one terminal of a capacitor C4, the other terminal of the capacitor C4 is connected to DGND, the 8 terminal of the operational amplifier U1B is respectively connected to +5VA and one terminal of a capacitor C3, and the other terminal of the capacitor C3 is connected to DGND.
[0009] Further, the filter and program-controlled amplifier 1 and the filter and program-controlled amplifier 2 are structurally identical, and each includes an amplifier U3A and an amplifier U3B, the model numbers of the amplifiers U3A and U3B are both ADM8253, one end of the capacitor C10 and one end of the resistor R10 are connected to the 10 end of the amplifier U3A, the other end of the capacitor C10 is connected to one end of the capacitor C8 and one end of the resistor R8, the other end of the resistor R8 is connected to the input signal Vin1 / Vin2, the 1 end of the amplifier U3A is connected to one end of the resistor R12, the 7 end of the amplifier U3A is connected to the positive electrode of the diode D1 through the resistor R14, the negative electrode of the diode D1 is connected to one end of the capacitor C12 and one end of the resistor R16, and outputs the signal MCU-ADC1 / MCU-ADC2 to the MCU timing control AI intelligent algorithm unit, and the other end of the capacitor C8, the other end of the resistor R10, the other end of the resistor R12, the other end of the capacitor C12, and the other end of the resistor R16 are all connected to the AG signal; the 2 end of the amplifier U3B is connected to the AG signal, the 3 end is connected to -5VA, the 4 end inputs the AD1A0 / AD2A0 signal of the MCU timing control AI intelligent algorithm unit, the 5 end inputs the AD1A1 / AD2A1 signal of the MCU timing control AI intelligent algorithm unit, the 6 end inputs the AD1WR / AD2WR signal of the MCU timing control AI intelligent algorithm unit, and the 8 end is connected to +5VA.
[0010] Further, the amplifiers U3A and U3B have four amplification factors of 1, 10, 100, and 1000.
[0011] Further, the MCU timing control AI intelligent algorithm unit is provided with a leakage detection subprogram, and the specific steps of the leakage detection subprogram are as follows:
[0012] S1, collect the leakage ADC signals MCU-ADC1 and MCU-ADC2;
[0013] S2, when the AD values of the MCU-ADC1 and MCU-ADC2 signals are greater than 2048, reduce the amplification factors of the amplifiers U3A and U3B, and return to step S1, otherwise, proceed to step S3;
[0014] S3, when the AD values of the MCU-ADC1 and MCU-ADC2 signals are less than 128, increase the amplification factors of the amplifiers U3A and U3B, and return to step S1, otherwise, proceed to step S4;
[0015] S4, obtain the leakage voltage value according to the AD value;
[0016] S5, filter and trend judge according to the leakage voltage value to obtain the leakage level;
[0017] S6. Perform alarm and early warning processing according to the leakage level.
[0018] Furthermore: the specific steps of filtering and trend judgment in step S5 are as follows:
[0019] S51. Sampling of densely collected data from the recording channel at 1kHz;
[0020] S52. Perform data filtering and outlier removal on the sampled data to obtain the trend, conductivity value, flow velocity and limit;
[0021] S53. Analyze the data during the solenoid valve's closing period;
[0022] S54. Calculate the average value AVG, maximum value Max, number of times above 80% of the maximum value MaxTime, and number of times above 20% of the average value for the analyzed data, and form a FIFO array;
[0023] S55. Analyze the FIFO array and obtain the leakage risk level (0-5) based on trends, conductivity, flow rate, and limits.
[0024] S56. Update the average value AVG as a reference for the next calculation.
[0025] Further: Step S6 specifically involves: when the leakage level is 0-4, a warning is issued; when the leakage level is 5, an alarm is triggered.
[0026] The beneficial effects of this invention are as follows: This invention uses a programmable amplifier with a gain of 1-128 to solve the problem of large dynamic range of leakage resistance; it uses multi-channel parallel technology to solve the problem of poor instantaneous leakage detection capability caused by switching; and it uses high-speed real-time sampling and intelligent judgment technology of waveform curve trend to solve the problem of possible false alarms and missed alarms. Attached Figure Description
[0027] Figure 1 This is a structural diagram of a blood purification balance chamber leakage detection system in the background art;
[0028] Figure 2 This is a schematic diagram illustrating the principle of leakage detection in the balance cavity of this invention.
[0029] Figure 3 This is a circuit diagram of a solenoid valve leakage detection circuit.
[0030] Figure 4 This is the circuit diagram of a square wave signal generator;
[0031] Figure 5 This is a circuit diagram for a filter and a programmable amplifier.
[0032] Figure 6Here is a flowchart of the leak detection subroutine;
[0033] Figure 7 This is a flowchart illustrating the specific process of filtering and trend determination. Detailed Implementation
[0034] The specific embodiments of the present invention are described below to enable those skilled in the art to understand the present invention. However, it should be understood that the present invention is not limited to the scope of the specific embodiments. For those skilled in the art, various changes are obvious as long as they are within the spirit and scope of the present invention as defined and determined by the appended claims. All inventions utilizing the concept of the present invention are protected.
[0035] like Figure 2 As shown, a blood purification balance chamber leakage detection optimization system includes a detection circuit and a balance chamber. The detection circuit includes a two-channel signal generation circuit, a programmable amplifier and a high-speed ADC, and an MCU timing control AI intelligent algorithm unit. The programmable amplifier and high-speed ADC are connected to the MCU timing control AI intelligent algorithm unit. The balance chamber is equivalent to the solenoid valve equivalent resistances R103 and R203 and the diaphragm equivalent resistance R1-2. The output signal Vout1 of the two-channel signal generation circuit is connected to one end of the solenoid valve equivalent resistance R103 and the grounding resistance R10 through the signal input impedance R101. 2. The output signal Vout2 of the two signal generation circuits is connected to one end of the equivalent resistance R203 of the solenoid valve and the grounding resistance R202 through the signal input impedance R202. The other end of the equivalent resistance R103 of the solenoid valve is connected to one end of the equivalent resistance R1-2 of the diaphragm and the grounding resistance R104 to generate the input signal Vin1, which is connected to the programmable amplifier and the high-speed ADC. The other end of the equivalent resistance R203 of the solenoid valve is connected to the other end of the equivalent resistance R1-2 of the diaphragm and the grounding resistance R204 to generate the input signal Vin2, which is connected to the programmable amplifier and the high-speed ADC.
[0036] Vout1 and Vout2 are AC square wave signal outputs (50% duty cycle) with an amplitude of ±5V. AC signals are used to avoid polarization corrosion of the electrodes caused by DC, which would affect the measurement.
[0037] R101 and R201 are the signal input impedances, which are generally small, less than 100Ω, and generally do not change with other conditions.
[0038] R103 and R203 are the resistances at both ends of the liquid circuit after the solenoid valve is closed. When there is no leakage after closing, the resistance is generally greater than 100MΩ. After leakage, the resistance changes exponentially with the leakage, ranging from 100 to 1MΩ.
[0039] R1-2 is the resistance across the diaphragm. Normally it is greater than 10MΩ. After leakage, it changes exponentially with the leakage, ranging from 100 to 1MΩ.
[0040] R102 and R202 are the signal input resistors, typically around 10kΩ, which increase proportionally with the increase of the liquid's conductivity.
[0041] R104 and R204 are the signal input resistors, typically around 10kΩ, which increases proportionally with the increase of the liquid's conductivity.
[0042] Vin1 and Vin2 are the signal input terminals for detection, with signal amplitudes around 0-3V; leakage is generally around 0-10mV.
[0043] The programmable amplifier and high-speed ADC section has four amplification factors: 1, 10, 100, and 1000. The ADC uses the 12-bit built-in STM32F103 and has a speed of 1MHz.
[0044] For the MCU and timing control AI intelligent algorithm part, because the balance cavity needs to be opened and closed dynamically, the detection circuit needs to detect only when it is closed. The pulses of the product that may be switched need to be analyzed and processed. Because the detection circuit may be affected by liquid conductivity, water circuit resistance, switching effects, scaling of components, etc., it is necessary to comprehensively evaluate the size of the leak by dynamically tracking and historical trend changes, optimize the alarm logic, and reduce false alarms and missed alarms.
[0045] like Figure 3 , Figure 4 and Figure 5 As shown, the programmable amplifier and high-speed ADC include a solenoid valve leakage detection circuit. The solenoid valve leakage detection circuit includes a positive feedback square wave transmitter and a programmable amplifier connected through an intermediate plug-in J1. The positive feedback square wave transmitter includes a square wave generator 1 and a square wave generator 2. The output signal Vout1 of the square wave generator 1 is connected to terminal 2 of the intermediate plug-in J1, and the output signal Vout2 of the square wave generator 2 is connected to terminal 1 of the intermediate plug-in J1. The programmable amplifier includes a filter and programmable amplifier 1 and a filter and programmable amplifier 2. The input signal Vin1 of the filter and programmable amplifier 1 is connected to terminal 4 of the intermediate plug-in J1, and the input signal Vin2 of the filter and programmable amplifier 2 is connected to terminal 3 of the intermediate plug-in J1.
[0046] The left side of the leakage detection circuit diagram shows a typical positive feedback square wave transmitter, outputting a square wave signal with a duty cycle of ±5V, output through pins 1 and 2 of the intermediate connector. The right side shows a programmable amplifier using an ADm8253, with four amplification factors: 1, 10, 100, and 1000. The amplification factor is controlled by the microcontroller's AD1A0, AD1A1, and AD1WR signals. When AD1A1 and AD1A0 are logic "00", the amplification factor is 1; when AD1A1 and AD1A0 are logic "01", the amplification factor is 10; when AD1A1 and AD1A0 are logic "10", the amplification factor is 1000; and when AD1A1 and AD1A0 are logic "01", the amplification factor is 1000. To change the amplification factor, first set AD1A1 and AD1A0 to logic levels, and then lock the amplification factor through the falling edge of AD1WR.
[0047] The square wave generator 1 and square wave generator 2 have the same structure, both including operational amplifier U1A and operational amplifier U1B. The operational amplifiers U1A and U1B are both TL072. Terminal 2 of operational amplifier U1A is connected to one end of capacitor C1 and one end of resistor R5, respectively. Terminal 3 of operational amplifier U1A is connected to one end of resistor R1 and one end of resistor R3, respectively. The other end of resistor R1 and the other end of capacitor C1 are both connected to DGND. The other ends of resistor R5 and resistor R3 are both connected to terminal 1 of operational amplifier U1A and connected to terminal 5 of operational amplifier U1B. Terminal 6 and terminal 7 of operational amplifier U1B are connected and output signals Vout1 / Vout2. Terminal 4 of operational amplifier U1B is connected to -5VA and one end of capacitor C4, respectively. The other end of capacitor C4 is connected to DGND. Terminal 8 of operational amplifier U1B is connected to +5VA and one end of capacitor C3, respectively. The other end of capacitor C3 is connected to DGND.
[0048] The square wave generator uses the TL072 operational amplifier, and the oscillation frequency is determined by the time constants of resistors R5 and C1.
[0049] The filter and programmable amplifier 1 and filter and programmable amplifier 2 have the same structure, both including amplifier U3A and amplifier U3B. Amplifier U3A and amplifier U3B are both model ADM8253. Terminal 10 of amplifier U3A is connected to one end of capacitor C10 and one end of resistor R10, respectively. The other end of capacitor C10 is connected to one end of capacitor C8 and one end of resistor R8, respectively. The other end of resistor R8 is connected to the input signal Vin1 / Vin2. Terminal 1 of amplifier U3A is connected to one end of resistor R12. Terminal 7 of amplifier U3A is connected to the positive terminal of diode D1 through resistor R14. The negative terminal of diode D1 is connected to one end of capacitor C12 and resistor R14, respectively. One end of 16 is connected to and outputs signals MCU-ADC1 / MCU-ADC2 to the MCU timing control AI intelligent algorithm unit. The other ends of capacitor C8, resistor R10, resistor R12, capacitor C12, and resistor R16 are all connected to the AG signal. The amplifier U3B has AG signal connected at 2, -5VA at 3, AD1A0 / AD2A0 signals of the MCU timing control AI intelligent algorithm unit input at 4, AD1A1 / AD2A1 signals of the MCU timing control AI intelligent algorithm unit input at 5, AD1WR / AD2WR signals of the MCU timing control AI intelligent algorithm unit input at 6, and +5VA at 8.
[0050] R8, C8, R10, and C10 filter the detection signal and form a stable new signal;
[0051] The programmable amplifier, using the ADM8253, has four amplification factors: 1, 10, 100, and 1000. The amplification factor is controlled by the microcontroller's AD1A0, AD1A1, and AD1WR signals. When AD1A1 and AD1A0 are logic "00", the amplification factor is 1; when AD1A1 and AD1A0 are logic "01", the amplification factor is 10; when AD1A1 and AD1A0 are logic "10", the amplification factor is 100; and when AD1A1 and AD1A0 are logic "01", the amplification factor is 1000. To change the amplification factor, first set AD1A1 and AD1A0 to logic levels, and then lock the amplification factor through the falling edge of AD1WR.
[0052] R14, D1, C12, and R16 rectify and filter the signal in the positive direction to obtain a DC signal, which is then output to the microcontroller for sampling and calculation.
[0053] like Figure 6 As shown, the MCU timing control AI intelligent algorithm unit includes a leakage detection subroutine. The specific steps of the leakage detection subroutine are as follows:
[0054] S1. Acquire leaked ADC signals MCU-ADC1 and MCU-ADC2;
[0055] S2. When the AD values of MCU-ADC1 and MCU-ADC2 signals are greater than 2048, reduce the amplification factor of amplifier U3A and amplifier U3B and return to step S1; otherwise, proceed to step S3.
[0056] S3. When the AD values of MCU-ADC1 and MCU-ADC2 signals are less than 128, increase the amplification factor of amplifier U3A and amplifier U3B and return to step S1; otherwise, proceed to step S4.
[0057] S4. Obtain the leakage voltage value based on the AD value;
[0058] S5. Filter and determine the trend of the leakage voltage value to obtain the leakage level;
[0059] like Figure 7 As shown, the specific steps for filtering and trend judgment in step S5 are as follows:
[0060] S51, Record channel densely collects data at 1kHz sampling;
[0061] S52. Perform data filtering and outlier removal on the sampled data to obtain the trend, conductivity value, flow velocity and limit;
[0062] S53. Analyze the data during the solenoid valve's closing period;
[0063] S54. Calculate the average value AVG, maximum value Max, number of times above 80% of the maximum value MaxTime, and number of times above 20% of the average value for the analyzed data, and form a FIFO array;
[0064] S55. Analyze the FIFO array and obtain the leakage risk level (0-5) based on trends, conductivity, flow rate, and limits.
[0065] S56. Update the average value AVG as a reference for the next calculation.
[0066] S6. Implement alarm and early warning procedures based on the leakage level. When the leakage level is 0-4, implement early warning procedures; when the leakage level is 5, implement alarm procedures.
Claims
1. A blood purification balance chamber leakage detection and optimization system, characterized in that, The system includes a detection circuit and a balancing cavity. The detection circuit comprises two signal generation circuits, a programmable amplifier and a high-speed ADC, and an MCU timing control AI intelligent algorithm unit. The programmable amplifier and high-speed ADC are connected to the MCU timing control AI intelligent algorithm unit. The balancing cavity is equivalent to the solenoid valve equivalent resistances R103 and R203 and the diaphragm equivalent resistances R1-2. The output signal Vout1 of the two signal generation circuits is connected to one end of the solenoid valve equivalent resistance R103 and the grounding resistance R102 through the signal input impedance R101. The output signal Vout2 of the generator circuit is connected to one end of the equivalent resistance R203 of the solenoid valve and the grounding resistance R202 through the signal input impedance R201. The other end of the equivalent resistance R103 of the solenoid valve is connected to one end of the equivalent resistance R1-2 of the diaphragm and the grounding resistance R104 to generate the input signal Vin1, which is connected to the programmable amplifier and the high-speed ADC. The other end of the equivalent resistance R203 of the solenoid valve is connected to the other end of the equivalent resistance R1-2 of the diaphragm and the grounding resistance R204 to generate the input signal Vin2, which is connected to the programmable amplifier and the high-speed ADC. The programmable amplifier and high-speed ADC include a solenoid valve leakage detection circuit. The solenoid valve leakage detection circuit includes a positive feedback square wave transmitter and a programmable amplifier connected through an intermediate plug-in J1. The positive feedback square wave transmitter includes a square wave generator 1 and a square wave generator 2. The output signal Vout1 of the square wave generator 1 is connected to terminal 2 of the intermediate plug-in J1, and the output signal Vout2 of the square wave generator 2 is connected to terminal 1 of the intermediate plug-in J1. The programmable amplifier includes a filter and programmable amplifier 1 and a filter and programmable amplifier 2. The input signal Vin1 of the filter and programmable amplifier 1 is connected to terminal 4 of the intermediate plug-in J1, and the input signal Vin2 of the filter and programmable amplifier 2 is connected to terminal 3 of the intermediate plug-in J1. The filter and programmable amplifier 1 and filter and programmable amplifier 2 have the same structure, both including amplifier U3A and amplifier U3B. Terminal 10 of amplifier U3A is connected to one end of capacitor C10 and one end of resistor R10, respectively. The other end of capacitor C10 is connected to one end of capacitor C8 and one end of resistor R8, respectively. The other end of resistor R8 is connected to the input signals Vin1 / Vin2. Terminal 1 of amplifier U3A is connected to one end of resistor R12. Terminal 7 of amplifier U3A is connected to the anode of diode D1 through resistor R14. The cathode of diode D1 is connected to one end of capacitor C12 and one end of resistor R16, respectively, and outputs signal M. The CU-ADC1 / MCU-ADC2 to MCU timing control AI intelligent algorithm unit has the other ends of capacitor C8, resistor R10, resistor R12, capacitor C12, and resistor R16 all connected to the AG signal; the amplifier U3B has AG signal connected at terminals 2, -5VA connected at terminal 3, AD1A0 / AD2A0 signals of the MCU timing control AI intelligent algorithm unit input at terminal 4, AD1A1 / AD2A1 signals of the MCU timing control AI intelligent algorithm unit input at terminal 5, AD1WR / AD2WR signals of the MCU timing control AI intelligent algorithm unit input at terminal 6, and +5VA connected at terminal 8; The MCU timing control AI intelligent algorithm unit includes a leakage detection subroutine. The specific steps of the leakage detection subroutine are as follows: S1. Acquire leaked ADC signals MCU-ADC1 and MCU-ADC2; S2. When the AD values of MCU-ADC1 and MCU-ADC2 signals are greater than 2048, reduce the amplification factor of amplifier U3A and amplifier U3B and return to step S1; otherwise, proceed to step S3. S3. When the AD values of MCU-ADC1 and MCU-ADC2 signals are less than 128, increase the amplification factor of amplifier U3A and amplifier U3B and return to step S1; otherwise, proceed to step S4. S4. Obtain the leakage voltage value based on the AD value; S5. Filter and determine the trend of the leakage voltage value to obtain the leakage level; S6. Perform alarm and early warning processing according to the leakage level.
2. The blood purification balance chamber leakage detection and optimization system according to claim 1, characterized in that, The output signals Vout1 and Vout2 are square wave AC signals with an amplitude of ±5V.
3. The blood purification balance chamber leakage detection and optimization system according to claim 1, characterized in that, A waste liquid inlet is provided between the signal input impedance R101 and the grounding resistor R102; a dialysate inlet is provided between the signal input impedance R201 and the grounding resistor R202; a waste liquid outlet is provided between the grounding resistor R104 and the programmable amplifier and the high-speed ADC; and a dialysate outlet is provided between the grounding resistor R204 and the programmable amplifier and the high-speed ADC.
4. The blood purification balance chamber leakage detection and optimization system according to claim 1, characterized in that, The square wave generator 1 and square wave generator 2 have the same structure, both including operational amplifier U1A and operational amplifier U1B. The operational amplifiers U1A and U1B are both TL072. Terminal 2 of operational amplifier U1A is connected to one end of capacitor C1 and one end of resistor R5, respectively. Terminal 3 of operational amplifier U1A is connected to one end of resistor R1 and one end of resistor R3, respectively. The other end of resistor R1 and the other end of capacitor C1 are both connected to DGND. The other ends of resistor R5 and resistor R3 are both connected to terminal 1 of operational amplifier U1A and connected to terminal 5 of operational amplifier U1B. Terminal 6 and terminal 7 of operational amplifier U1B are connected and output signals Vout1 / Vout2. Terminal 4 of operational amplifier U1B is connected to -5VA and one end of capacitor C4, respectively. The other end of capacitor C4 is connected to DGND. Terminal 8 of operational amplifier U1B is connected to +5VA and one end of capacitor C3, respectively. The other end of capacitor C3 is connected to DGND.
5. The blood purification balance chamber leakage detection and optimization system according to claim 1, characterized in that, Both amplifiers U3A and U3B are model ADM8253.
6. The blood purification balance chamber leakage detection and optimization system according to claim 5, characterized in that, The amplifiers U3A and U3B have four amplification factors: 1, 10, 100, and 1000.
7. The blood purification balance chamber leakage detection and optimization system according to claim 1, characterized in that, The specific steps for filtering and trend judgment in step S5 are as follows: S51. Sampling of densely collected data from the recording channel at 1kHz; S52. Perform data filtering and outlier removal on the sampled data to obtain the trend, conductivity value, flow velocity and limit; S53. Analyze the data during the solenoid valve's closing period; S54. Calculate the average value AVG, maximum value Max, number of times above 80% of the maximum value MaxTime, and number of times above 20% of the average value for the analyzed data, and form a FIFO array; S55. Analyze the FIFO array and obtain the leakage risk level (0-5) based on trends, conductivity, flow rate, and limits. S56. Update the average value AVG as a reference for the next calculation.
8. The blood purification balance chamber leakage detection and optimization system according to claim 1, characterized in that, Specifically, step S6 involves: when the leakage level is 0-4, a warning is issued; when the leakage level is 5, an alarm is triggered.
Citation Information
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