A method of forming a metal wire or piece

Abstract

The present application relates to a forming method of metal wire or metal piece, belonging to the field of semiconductor manufacturing, and used for removing defects in metal wire or metal piece prepared by prior art. The method comprises: providing a substrate, depositing an insulating layer with an initial thickness on the substrate; forming a metal via in the insulating layer with the initial thickness; forming a metal wire or metal piece in the metal via, the height of the metal wire or metal piece being greater than the initial thickness of the insulating layer; performing a first removal treatment on the metal wire or metal piece and the insulating layer with the initial thickness to the top surface or below the top surface of the insulating layer with the initial thickness, obtaining an insulating layer with a first thickness; performing an etching treatment on the insulating layer with the first thickness, obtaining an insulating layer with a second thickness, wherein the second thickness is less than the first thickness; and performing a second removal treatment on the metal wire or metal piece and the insulating layer with the second thickness. The present application can effectively improve the forming quality of the metal wire or metal piece.

Description

Technical Field

[0001] This invention relates to the field of semiconductor manufacturing technology, and in particular to a method for forming metal wires or metal parts. Background Technology

[0002] Metallization refers to the deposition of a thin metal film on the surface of a device. The metal layer conducts signals in an integrated circuit, while the dielectric layer ensures that the signal is not affected by adjacent metal lines. Metal layers include interconnects, contacts, and vias. Interconnects are metal wires made of materials such as aluminum, polysilicon, or copper that enable the transmission of electrical signals between different devices. Contacts are the connections between devices in a chip and the first metal layer. Vias are openings that pass through the dielectric layer between two metal layers, providing conductivity.

[0003] CMP (Chemical-Mechanical Planarization) is a global surface planarization technique that planarizes the silicon wafer surface through relative motion between a silicon wafer and a grinding head. An abrasive slurry is placed between the wafer and the grinding head, and pressure is applied simultaneously. CMP achieves a uniform silicon wafer surface by removing high-area patterns at a faster rate than removing low-area patterns. Because it can precisely and uniformly planarize silicon wafers to the desired thickness and flatness, it has become one of the most widely used techniques.

[0004] Traditional chemical mechanical planarization (CMP) processes include: Step 1, material removal; Step 2, cleaning and drying. In some cases, when metal wires are tightly connected, the material thickness reduction in the center of the pattern is greater than at the edges during CMP, resulting in depressions. Furthermore, after the metal layer is formed, during subsequent heat treatment, the metal is subject to gravity, which can easily cause gaps or voids to appear on the metal wires or parts. Figure 1 As shown, these defects become traps for capturing chemicals used in subsequent processes, leading to metal loss, such as... Figure 2 As shown, this can cause abnormal resistance in metal wires or metal parts, affecting device performance. Therefore, this invention proposes a method for removing metal wires or metal parts, which can effectively remove defects in metal wires or metal layers, reduce particulate matter on the metal surface, and improve the forming quality of metal wires or metal parts. Summary of the Invention

[0005] Based on the above analysis, the present invention aims to provide a method for forming a metal wire or metal part to remove defects in metal wires or metal parts prepared by the prior art.

[0006] This invention provides a method for forming a metal wire or metal part, comprising: providing a substrate; depositing an insulating layer of initial thickness on the substrate; forming a metal via in the insulating layer of initial thickness; forming a metal wire or metal part in the metal via, wherein the height of the metal wire or metal part is greater than the height of the insulating layer of initial thickness; performing a first removal process on the metal wire or metal part down to the top surface of the insulating layer of initial thickness, or performing a first removal process on the metal wire or metal part and the insulating layer of initial thickness down to below the top surface of the insulating layer of initial thickness, to obtain an insulating layer of first thickness, wherein the height of the metal wire or metal part after the first removal process is the same as the height of the insulating layer of first thickness; etching the insulating layer of first thickness to obtain an insulating layer of second thickness, wherein the second thickness is less than the first thickness; and performing a second removal process on the metal wire or metal part and the insulating layer of second thickness.

[0007] Furthermore, a metal via is formed in the insulating layer of initial thickness, including:

[0008] A photoresist layer is formed on an insulating layer of initial thickness; the photoresist layer and the insulating layer of initial thickness are photolithographically and etched to the substrate surface, the photoresist layer is removed, and a metal via is formed in the insulating layer of initial thickness.

[0009] Furthermore, forming a metal wire or metal part in a metal through-hole, the height of which is greater than the initial thickness of an insulating layer, includes: forming a barrier layer on the inner wall of the metal through-hole; and forming a metal wire or metal part on the barrier layer, the height of which is greater than the initial thickness of an insulating layer.

[0010] Furthermore, the insulating layer material is one of oxides, nitrides, low-k materials, and polymers.

[0011] Furthermore, the material of the metal wire or metal part is one of tungsten, copper, titanium, titanium nitride, and aluminum.

[0012] Furthermore, the first removal process of the metal wire or metal part from the initial thickness of the insulating layer is either the first dry etching or the first chemical mechanical planarization.

[0013] Furthermore, the etching process for the first thickness of the insulating layer is either a second dry etching or a first wet etching.

[0014] Furthermore, a third dry etching process is used for the second removal of the metal wire or metal part and the second thickness of the insulating layer.

[0015] Furthermore, a second chemical mechanical planarization is employed for the second removal process of the metal wire or metal part and the second thickness of the insulation layer.

[0016] Furthermore, in the first chemical mechanical planarization, the selection ratio of the metal wire or metal part to the initial thickness of the insulation layer is 10:1 or higher.

[0017] Furthermore, a metal wire or metal element is formed in the metal through-hole, the height of which is greater than the initial thickness of the insulating layer, wherein defects are generated in the metal wire or metal element in the opening region of the metal through-hole.

[0018] Furthermore, the insulating layer of the first thickness is etched to obtain an insulating layer of the second thickness, wherein the lower limit of the etching process is not higher than the lowest point of the defect.

[0019] Furthermore, the first thickness is 100 angstroms or more.

[0020] Furthermore, the thickness difference between the second thickness and the first thickness is at least 10 angstroms.

[0021] Furthermore, the size of the defect is greater than 10 angstroms.

[0022] Compared with the prior art, the present invention can achieve at least one of the following beneficial effects:

[0023] 1. By increasing the thickness of the initial insulation layer (the thickness of the initial insulation layer is greater than the thickness of the target product), the location of defects in the metal wire or metal part is improved. During the processing of the metal wire or metal part, the target thickness of the metal wire or metal part can be guaranteed, and the quality of the metal wire or metal part can be improved. In particular, the problem of abnormal resistance caused by metal defects is solved.

[0024] 2. In the process of removing defects in metal wires or metal parts, the process includes removing the insulation layer area of ​​the first thickness around the metal wire or metal part down to below the defect, and removing the area of ​​the metal wire or metal part that caused the defect. Step-by-step removal can improve the accuracy of defect removal.

[0025] 3. By using a second dry etching or a first wet etching to remove the first insulating layer area around the metal line or metal part down to below the defect, the number of particles can be effectively reduced.

[0026] 4. By using a third dry etching process or a second chemical mechanical planarization process to remove defective metal lines or metal parts, the probability of particulate matter generation can be effectively reduced.

[0027] In this invention, the above-described technical solutions can be combined with each other to achieve more preferred combinations. Other features and advantages of this invention will be set forth in the following description, and some advantages may become apparent from the description or be learned by practicing the invention. The objects and other advantages of this invention can be realized and obtained from the description and drawings, which are particularly pointed out. Attached Figure Description

[0028] The accompanying drawings are for illustrative purposes only and are not intended to limit the invention. Throughout the drawings, the same reference numerals denote the same parts.

[0029] Figure 1 This refers to metal voids that exist in existing technologies;

[0030] Figure 2 A cross-sectional view of a metal defect existing in the prior art;

[0031] Figure 3 A cross-sectional view of a metal wire or metal part;

[0032] Figure 4 This is a cross-sectional view after the first removal of the insulation layer of the metal wire or metal part from the initial thickness.

[0033] Figure 5 This is a cross-sectional view of the insulating layer of the first thickness after etching.

[0034] Figure 6 This is a cross-sectional view after the second removal process of the metal wire or metal part and the second thickness of the insulation layer;

[0035] Figure 7 This is a flowchart of the process method of the present invention.

[0036] Figure label:

[0037] 1-Insulation layer of initial thickness; 2-Metal wire or metal part; 3-Defect; 4-Insulation layer of first thickness; 5-Insulation layer of second thickness. Detailed Implementation

[0038] Embodiments of the present disclosure will now be described with reference to the accompanying drawings. However, it should be understood that these descriptions are exemplary only and are not intended to limit the scope of the disclosure. Furthermore, descriptions of well-known structures and technologies are omitted in the following description to avoid unnecessarily obscuring the concepts of the present disclosure.

[0039] The accompanying drawings illustrate various structural schematics according to embodiments of the present disclosure. These drawings are not to scale, and some details have been enlarged for clarity, and some details may have been omitted. The shapes of the various regions and layers shown in the drawings, as well as their relative sizes and positional relationships, are merely exemplary and may deviate from reality due to manufacturing tolerances or technical limitations. Furthermore, those skilled in the art can design regions / layers with different shapes, sizes, and relative positions as needed.

[0040] In the context of this disclosure, when a layer / element is referred to as being "above" another layer / element, the layer / element may be directly above the other layer / element, or there may be an intermediate layer / element between them. Additionally, if a layer / element is "above" another layer / element in one orientation, then when the orientation is reversed, the layer / element may be "below" the other layer / element.

[0041] This invention provides a method for forming a metal wire or metal part, which, in conjunction with the accompanying drawings, includes:

[0042] A substrate is provided, an insulating layer 1 of initial thickness is deposited on the substrate, and a metal via is formed;

[0043] For example, a chemical vapor deposition process can be used to deposit an insulating layer on a substrate, and the insulating layer can be chemically and mechanically planarized to obtain an insulating layer 1 with an initial thickness of 4000 to 6000 angstroms. The silicon wafer is then cleaned and dried in sequence to remove particles introduced during the planarization process.

[0044] Next, the metal via is fabricated. A photoresist layer is formed on the insulating layer 1 of initial thickness. The photoresist layer and the insulating layer 1 of initial thickness are photolithographically and etched to the substrate surface. The photoresist layer is then removed, and a metal via is formed in the insulating layer 1 of initial thickness. For example, a metal via with a diameter of 0.08 to 0.15 μm and a depth of 4000 to 6000 angstroms can be etched.

[0045] A metal wire or metal part 2 is formed in the metal through hole, the height of which is greater than the initial thickness of the insulating layer 1;

[0046] For example, a tantalum or titanium barrier layer can be deposited on the inner wall of the metal via using physical vapor deposition. Then, metal is deposited on the barrier layer and the initial thickness of the insulating layer 1 using chemical vapor deposition, filling the metal via and forming a metal wire or metal element 2. Figure 3 As shown.

[0047] The metal wire or metal part 2 and the initial thickness insulation layer 1 are subjected to a first removal process to the top surface or below the top surface of the initial thickness insulation layer 1. That is, the metal wire or metal part 2 is subjected to a first removal process to the top surface of the initial thickness insulation layer 1, or the metal wire or metal part 2 and the initial thickness insulation layer 1 are subjected to a first removal process to the bottom surface of the initial thickness insulation layer 1, to obtain an insulation layer 4 of the first thickness. The height of the metal wire or metal part 2 after the first removal process is the same as the height of the insulation layer 4 of the first thickness. Defect 3 is generated in the metal wire or metal part 2 in the metal through hole opening area.

[0048] For example, a first chemical mechanical planarization (CMP) treatment or a first dry etching process can be used to remove the metal wire or metal part 2 from the initial thickness of the insulating layer 1. If a first CMP treatment is used, the selection ratio of the metal wire or metal part 2 to the initial thickness of the insulating layer 1 is 50:1. The grinding head pressure for CMP is 35–40 kPa, the rotary table speed is 60–80 rpm, the abrasive is Al2O3 or Mn2O3, the pH of the polishing slurry is 2–6, and the polishing time is 5–10 min. If dry etching is used, the etching rate is 1000–1500 nm / min, the etching gas is NF3 or SF6, and the etching time is 15–30 s, resulting in an insulating layer 4 of the first thickness. Defects 3 are generated in the metal wire or metal part 2 in the metal via opening area, such as… Figure 4 As shown.

[0049] The insulating layer 4 of the first thickness is etched to obtain the insulating layer 5 of the second thickness, wherein the second thickness is less than the first thickness;

[0050] For example, the etching method can be dry or wet etching. If dry etching is used, the etching rate can be 500–750 nm / min, the etching gas can be CF4 or NF3, and the etching time can be 30–60 s. If wet etching is used, the etching solution can be HF, the etching time can be 5–10 s, and the selectivity ratio in the etching process can be in the range of 120:1–150:1. Figure 5 As shown, after etching, the height of the resulting metal wire or metal part 2 is greater than the height of the second-thickness insulating layer 5.

[0051] A second removal process is performed on the metal wire or metal part 2 and the second thickness of the insulating layer 5.

[0052] For example, dry etching or chemical mechanical planarization is used to remove the metal line or metal part 2 and the second-thickness insulating layer 5. If dry etching is used, firstly, the structure of the metal line or metal part 2 and the second-thickness insulating layer 5 is etched in the photolithography area using deep ultraviolet lithography. Then, the metal line or metal part 2 and the second-thickness insulating layer 5 are etched. During the etching process, the etching rate can be 1000–1500 nm / min, the etching gas can be NF3 or SF6, and the etching time can be 15–45 s. If chemical mechanical planarization is used, the grinding head pressure can be 35–40 kPa, the rotary table speed can be 60–80 rpm, the abrasive can be Al2O3 or Mn2O3, the pH value of the polishing slurry can be 2–6, and the polishing time can be 5–10 min. After etching, the defects 3 in the area of ​​the metal line or metal part 2 are removed, and the height of the resulting metal line or metal part 2 is the same as the thickness of the second-thickness insulating layer 5. Figure 6 As shown.

[0053] It should be noted that by increasing the thickness of the initial insulating layer 1, the present invention improves the position of the defect 3 in the metal wire or metal part 2. During the processing of the metal wire or metal part 2, the target thickness of the metal wire or metal part 2 can be guaranteed, and the quality of the metal wire or metal part 2 can be improved. In particular, it solves the problem of abnormal resistance caused by metal defect 3. In the process of removing the defect 3 in the metal wire or metal part 2, the process includes removing the area of ​​the first thickness of the insulating layer 4 around the metal wire or metal part 2 to below the defect 3, and removing the area of ​​the metal wire or metal part 2 where the defect 3 is generated. The stepwise removal can improve the accuracy of defect 3 removal. Using a second dry etching or a first wet etching to remove the area of ​​the first thickness of the insulating layer 4 around the metal wire or metal part 2 to below the defect 3 can effectively reduce the number of particles. Using a third dry etching or a second chemical mechanical planarization process to remove the area of ​​the metal wire or metal part 2 where the defect 3 is generated can effectively reduce the probability of particle generation.

[0054] Example 1

[0055] A method for forming a metal wire or metal part, comprising:

[0056] A substrate is provided, on which a low-k dielectric of initial thickness is deposited and a metal via is formed;

[0057] Specifically, a low-k dielectric is deposited using chemical vapor deposition (CVD), and then chemically and mechanically planarized to obtain a low-k dielectric with an initial thickness of 4000 angstroms. The silicon wafer is then sequentially cleaned and dried.

[0058] Next, the metal vias are fabricated. A photoresist layer is formed on a low-k dielectric of initial thickness. The photoresist layer and the low-k dielectric of initial thickness are photolithographically and etched to the substrate surface. The photoresist layer is then removed, and the metal vias are formed in the low-k dielectric of initial thickness. The etched vias have a diameter of 0.08 μm and a depth of 4000 angstroms.

[0059] A copper wire is formed in a metal via, the height of which is greater than the initial thickness of the low-k dielectric.

[0060] Specifically, a tantalum barrier layer is deposited on the inner wall of the metal via using physical vapor deposition. Then, metallic copper is deposited on the barrier layer and a low-k dielectric of initial thickness using chemical vapor deposition, filling the via with copper and forming a copper wire.

[0061] The copper wire and the low-k dielectric of initial thickness are first removed to the top surface or below the top surface of the low-k dielectric of initial thickness, wherein gaps are generated in the copper wire in the metal through-hole opening area.

[0062] Specifically, a first chemical mechanical planarization (CMP) process is used to remove the low-k medium of the initial thickness from the metal wire. The selection ratio of the copper wire to the low-k medium of the initial thickness is 50:1. The CMP grinding head pressure is 35 kPa, the rotary table speed is 60 rpm, the abrasive is Al2O3, the pH of the polishing slurry is 2, and the polishing time is 5 min. The resulting low-k medium of the first thickness is the same as the height of the copper wire, and gaps are generated in the copper wire in the metal through-hole opening area.

[0063] The low-k dielectric of the first thickness is etched to obtain the low-k dielectric of the second thickness, wherein the second thickness is less than the first thickness.

[0064] Specifically, the etching method was wet etching, the etching solution was HF, the etching time was 5 seconds, and the selectivity ratio during etching was 120:1. After etching, the height of the metallic copper line was greater than the thickness of the second-thickness low-k dielectric.

[0065] A second removal process is performed on the copper wire and the second-thickness low-k dielectric.

[0066] Specifically, in the photolithography area, deep ultraviolet lithography is used to etch copper wires and a second layer of low-k dielectric. Dry etching is then used to remove the copper wires and the second layer of low-k dielectric. The etching rate is 1000 nm / min, the etching gas is NF3, and the etching time is 42 s. The gaps in the copper wires are removed, and the height of the removed copper wires is the same as the thickness of the second layer of low-k dielectric.

[0067] Example 2

[0068] A method for forming a metal wire or metal part, comprising:

[0069] A substrate is provided, on which a low-k dielectric of initial thickness is deposited and a metal via is formed;

[0070] Specifically, a low-k dielectric is deposited using a chemical vapor deposition process. The low-k dielectric is then subjected to chemical mechanical planarization to obtain a low-k dielectric with an initial thickness of 4500 angstroms. The silicon wafer is then cleaned and dried sequentially.

[0071] Next, the metal vias are fabricated. A photoresist layer is formed on a low-k dielectric of initial thickness. The photoresist layer and the low-k dielectric of initial thickness are photolithographically and etched to the substrate surface. The photoresist layer is then removed, and the metal vias are formed in the low-k dielectric of initial thickness. The etched vias have a diameter of 0.08 μm and a depth of 4500 angstroms.

[0072] A copper wire is formed in a metal via, the height of which is greater than the initial thickness of the low-k dielectric.

[0073] Specifically, a tantalum barrier layer is deposited on the inner wall of a metal via using physical vapor deposition. Then, copper is deposited on the tantalum barrier layer and a low-k dielectric of initial thickness using chemical vapor deposition. The via is filled with copper, forming a copper wire.

[0074] The copper wire and the low-k dielectric of initial thickness are first removed to the top surface or below the top surface of the low-k dielectric of initial thickness, wherein gaps are generated in the copper wire in the metal through-hole opening area.

[0075] Specifically, photolithography and etching are performed on the copper wire and the low-k dielectric of initial thickness. The copper wire and the low-k dielectric of initial thickness are then subjected to a first dry etching process with an etching rate of 1200 nm / min, an etching gas of SF6, and an etching time of 25 s. After the etching process, a low-k dielectric of the first thickness is obtained. The height of the copper wire is the same as the thickness of the low-k dielectric of the first thickness. Gaps are generated in the copper wire in the metal via opening area.

[0076] The low-k dielectric of the first thickness is etched to obtain the low-k dielectric of the second thickness, wherein the second thickness is less than the first thickness;

[0077] Specifically, a wet etching process is used to remove the first thickness of low-k dielectric material. The etching solution is HF, and the etching time is 10 seconds. After etching, a second thickness of low-k dielectric material is obtained, with the height of the copper wires exceeding the thickness of the second thickness of the low-k dielectric material.

[0078] A second removal process is performed on the copper wire and the second-thickness low-k dielectric.

[0079] Chemical mechanical planarization (CMP) was used to remove the copper wire and the second layer of low-k medium. Specifically, the grinding head pressure of CMP was 40 kPa, the rotary table speed was 80 rpm, the abrasive was Mn2O3, the pH of the grinding fluid was 4, and the polishing time was 8 min. The gaps in the copper wire area were removed, and the height of the removed copper wire was the same as the thickness of the low-k medium.

[0080] Example 3

[0081] A method for forming a metal wire or metal part, comprising:

[0082] A substrate is provided, on which a low-k dielectric of initial thickness is deposited and a metal via is formed;

[0083] A low-k dielectric was deposited using chemical vapor deposition (CVD), followed by chemical mechanical planarization to obtain an initial low-k dielectric thickness of 5000 angstroms. The silicon wafer was then sequentially cleaned and dried.

[0084] Next, the metal vias are fabricated. A photoresist layer is formed on a low-k dielectric of initial thickness. The photoresist layer and the low-k dielectric of initial thickness are photolithographically and etched to the substrate surface. The photoresist layer is then removed, and the metal vias are formed in the low-k dielectric of initial thickness. The etched vias have a diameter of 0.1 μm and a depth of 5000 angstroms.

[0085] A tungsten wire is formed in a metal via, the height of which is greater than the initial thickness of the low-k dielectric.

[0086] Specifically, a titanium barrier layer is deposited on the inner wall of a metal via using physical vapor deposition. Then, tungsten is deposited on the titanium barrier layer and the initial thickness of the low-k medium using chemical vapor deposition. The via is filled with tungsten, forming a tungsten wire. The height of the tungsten wire is greater than the initial thickness of the low-k medium.

[0087] The tungsten wire and the low-k medium of initial thickness are subjected to a first removal process to the top surface or below the top surface of the low-k medium of initial thickness to obtain a low-k medium of first thickness. The height of the tungsten wire is the same as the height of the low-k medium of first thickness. Voids are generated in the tungsten wire in the metal through-hole opening area.

[0088] Specifically, a first chemical mechanical planarization (CMP) treatment was used to remove the tungsten wire and the initial thickness of the low-k medium. The selection ratio of the tungsten wire to the initial thickness of the low-k medium was 50:1. The CMP grinding head pressure was 40 kPa, the rotary table speed was 70 rpm, the abrasive was Al2O3, the pH of the polishing slurry was 4, and the polishing time was 5 min. After the removal treatment, the height of the tungsten wire was the same as the thickness of the initial thickness of the low-k medium. Voids were generated in the tungsten wire within the metal through-hole opening area.

[0089] The low-k dielectric of the first thickness is etched to obtain the low-k dielectric of the second thickness, wherein the second thickness is less than the first thickness;

[0090] Specifically, a dry etching process was used to etch the first thickness of the low-k dielectric at an etching rate of 600 nm / min, using NF3 as the etching gas, for a time of 40 s. After etching, a second thickness of low-k dielectric was obtained, with the height of the tungsten wire exceeding the thickness of the second thickness of the low-k dielectric.

[0091] A second removal process is performed on the tungsten wire and the low-k dielectric of the second thickness.

[0092] Specifically, in the photolithography area, deep ultraviolet lithography is used to etch tungsten lines and a second layer of low-k dielectric structure. Dry etching is then used to remove the tungsten lines and the second layer of low-k dielectric structure at an etching rate of 1300 nm / min, using NF3 as the etching gas, for 15 s. This process removes voids in the tungsten line region, and the height of the removed tungsten lines is the same as the thickness of the second layer of low-k dielectric.

[0093] Example 4

[0094] A method for forming a metal wire or metal part, comprising:

[0095] A substrate is provided, on which a low-k dielectric of initial thickness is deposited and a metal via is formed;

[0096] Specifically, a low-k dielectric is deposited using chemical vapor deposition (CVD), followed by chemical mechanical planarization to obtain a low-k dielectric with an initial thickness of 5000 angstroms. The silicon wafer is then sequentially cleaned and dried.

[0097] Next, the metal vias are fabricated. A photoresist layer is formed on a low-k dielectric of initial thickness. The photoresist layer and the low-k dielectric of initial thickness are photolithographically and etched to the substrate surface. The photoresist layer is then removed, and the metal vias are formed in the low-k dielectric of initial thickness. The etched vias have a diameter of 0.12 μm and a depth of 5000 angstroms.

[0098] A tungsten wire is formed in a metal via, the height of which is greater than the initial thickness of the low-k dielectric.

[0099] A tantalum barrier layer is deposited on the inner wall of a metal via using physical vapor deposition. Then, tungsten is deposited on the tantalum barrier layer and an initial-thickness low-k dielectric using chemical vapor deposition. The via is filled with tungsten, resulting in a tungsten wire with a height greater than the initial thickness of the low-k dielectric.

[0100] The tungsten wire and the low-k medium of initial thickness are removed for the first time until the top surface or below the top surface of the low-k medium of initial thickness is obtained, and the height of the tungsten wire is the same as the height of the low-k medium of first thickness. In this process, gaps are generated in the tungsten wire in the metal through-hole opening area.

[0101] Specifically, a first dry etching process is used to remove the tungsten wire and the initial thickness of the low-k dielectric. The etching rate is 1000 nm / min, the etching gas is NF3, and the etching time is 21 s. This process yields the tungsten wire and the first thickness of the low-k dielectric, with the height of the tungsten wire being the same as the thickness of the first thickness of the low-k dielectric.

[0102] The low-k dielectric of the first thickness is etched to obtain the low-k dielectric of the second thickness, wherein the second thickness is less than the first thickness;

[0103] Specifically, a wet etching process is used to remove the first thickness of low-k dielectric material. The etching solution is HF, and the etching time is 5 seconds. After etching, a second thickness of low-k dielectric material is obtained, with the height of the tungsten wire exceeding the thickness of the second thickness of the low-k dielectric material.

[0104] A second removal process is performed on the tungsten wire and the second thickness of the low-k dielectric.

[0105] Chemical mechanical planarization (CMP) was used to remove the tungsten wire and the second layer of low-k medium. The CMP grinding head pressure was 35 kPa, the rotary table speed was 65 rpm, the abrasive was Al2O3, the pH of the grinding fluid was 3, and the polishing time was 5 min. The gaps in the tungsten wire were removed, and the height of the removed tungsten wire was the same as the thickness of the second layer of low-k medium.

[0106] The above description is only a preferred embodiment of the present invention, but the scope of protection of the present invention is not limited thereto. Any changes or substitutions that can be easily conceived by those skilled in the art within the scope of the technology disclosed in the present invention should be included within the scope of protection of the present invention.

Claims

1. A method for forming a metal part, characterized in that, include: A substrate is provided on which an insulating layer of initial thickness is deposited, the initial thickness of which is greater than the thickness of the insulating layer in the target product, thereby improving the location of defects in the metal part; Metal vias are formed in the insulating layer of the initial thickness; A metal part is formed in the metal through hole, the height of the metal part being greater than the initial thickness of the insulating layer; The metal part and the initial thickness of the insulating layer are subjected to a first removal process to the top surface or below the top surface of the initial thickness of the insulating layer to obtain an insulating layer of the first thickness. The height of the metal part after the first removal process is the same as the height of the insulating layer of the first thickness, and a defect with a size of 10 angstroms or more is generated in the metal part in the metal through-hole opening area. An insulating layer of the first thickness is etched, wherein the lower limit of the etch is not higher than the lowest point of the defect, to obtain an insulating layer of the second thickness, wherein the second thickness is less than the first thickness, and the thickness difference between the second thickness and the first thickness is at least 10 angstroms. A second removal process is performed on the metal part and the insulating layer of the second thickness; The first removal process employs chemical mechanical planarization, and the selection ratio of the metal part to the initial thickness of the insulating layer is 10:1 or higher. The second removal process employs dry etching or chemical mechanical planarization. After the second removal process, the defects in the metal part are completely removed, and the final height of the metal part is the same as the thickness of the second-thickness insulating layer.

2. The method for forming a metal part according to claim 1, characterized in that, The process of forming a metal via in an insulating layer of initial thickness includes: A photoresist layer is formed on an insulating layer of initial thickness; The photoresist layer and the initial thickness of the insulating layer are photolithographically and etched to the substrate surface. The photoresist layer is then removed, and a metal via is formed in the initial thickness of the insulating layer.

3. The method for forming a metal part according to claim 1, characterized in that, The process of forming a metal part in a metal through-hole, wherein the height of the metal part is greater than the initial thickness of the insulating layer, includes: A barrier layer is formed on the inner wall of the metal through-hole; A metal part is formed on an insulating layer and a barrier layer of initial thickness, the height of which is greater than that of the insulating layer of initial thickness.

4. The method for forming a metal part according to claim 1, characterized in that, The insulating layer material is one of oxides, nitrides, low-k materials, and polymers.

5. The method for forming a metal part according to claim 1, characterized in that, The metal part is made of one of the following materials: tungsten, copper, titanium, titanium nitride, and aluminum.

6. The method for forming a metal part according to claim 1, characterized in that, The first removal process employs dry etching.

7. The method for forming a metal part according to claim 1, characterized in that, The etching process employs either dry etching or wet etching.

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