Fingerprint recognition display panel and preparation method thereof

Abstract

The fingerprint recognition display panel and its preparation method provided in the embodiment of the present application include a substrate, an array layer and an organic light emitting diode layer stacked in sequence, wherein a fingerprint module for fingerprint recognition is integrated in the array layer. When fingerprint recognition is required, the finger will press the fingerprint recognition display panel, thereby reflecting the light emitted by the organic light emitting diode layer to the fingerprint module integrated in the array layer, and then the fingerprint recognition function can be realized by identifying the difference in light reflection of the valley and ridge of the finger. The fingerprint module is integrated in the array layer, which not only does not affect the realization of the fingerprint recognition function, but also reduces the thickness of the fingerprint recognition display panel, and can realize comprehensive fingerprint recognition, thereby enhancing the market competitiveness of the fingerprint recognition display panel.

Description

Technical Field

[0001] The present application relates to the field of display technology, and in particular to a fingerprint recognition display panel and a method for preparing the same. Background Art

[0002] In recent years, with the development of science and technology, electronic products with biometric functions have gradually entered people's lives and work. Fingerprints are unique and immutable and can be used for personal identity authentication, so fingerprint recognition technology has attracted much attention. With the development of fingerprint recognition technology, it has been widely used in many fields, such as mobile phones, tablet computers and TVs in electronic equipment terminals, access control and safes in security protection systems, etc.

[0003] Generally speaking, the implementation methods of fingerprint recognition technology mainly include optical, capacitive and ultrasonic imaging. Optical and ultrasonic fingerprint recognition use photoelectric conversion and acoustic-electric conversion respectively to realize the imaging of finger ridges and valleys, while capacitive fingerprint recognition is based on the capacitance difference between the finger ridges and valleys to realize imaging. Among them, the existing fingerprint module is usually set under the display screen. The module can receive the amount of light reflected by the finger from the OLED display light source, and realize the fingerprint recognition function by identifying the difference in light reflection of the finger valleys and ridges. However, since the fingerprint module needs to be made separately on the back of the display screen, it will not only increase the cost of the product, but also increase the thickness of the product, and is not conducive to the realization of a comprehensive fingerprint recognition function.

[0004] Therefore, how to provide a fingerprint recognition display panel that can reduce the thickness of the display panel is a difficult problem that existing panel manufacturers need to work hard to overcome. Summary of the invention

[0005] The purpose of the embodiments of the present application is to provide a fingerprint recognition display panel and a method for manufacturing the same, which can solve the technical problem that the existing fingerprint recognition display panel is relatively thick.

[0006] The present application provides a fingerprint recognition display panel, including:

[0007] substrate;

[0008] An array layer, wherein the array layer is arranged on the substrate, wherein a fingerprint module is integrated in the array layer, and the fingerprint module is used to realize a fingerprint recognition function;

[0009] An organic light emitting diode layer is arranged on a surface of the array layer away from the substrate.

[0010] In the fingerprint recognition display panel described in the present application, the fingerprint module includes an optical fingerprint sensor and a fingerprint driving thin film transistor, and the optical fingerprint sensor is electrically connected to the fingerprint driving thin film transistor.

[0011] In the fingerprint recognition display panel described in the present application, the optical fingerprint sensor includes a lower electrode, an insulating layer, a first semiconductor layer, a transparent electrode layer, a protective layer and an upper electrode layer; wherein,

[0012] The insulating layer is arranged on the lower electrode layer and covers the lower electrode layer. The first semiconductor layer is arranged on a side of the insulating layer away from the lower electrode layer. The transparent electrode layer is arranged on a side of the first semiconductor layer away from the lower electrode layer. The protective layer is arranged on a side of the transparent electrode layer away from the lower electrode layer and covers the transparent electrode layer and the first semiconductor layer. The upper electrode layer is arranged on a side of the protective layer away from the lower electrode layer. The protective layer is provided with a first via hole and a second via hole. The first via hole penetrates the protective layer to the transparent electrode layer. The second via hole penetrates the protective layer and the insulating layer in sequence. The upper electrode layer is connected to the transparent electrode layer via the first via hole, and the upper electrode layer is connected to the lower electrode layer via the second via hole.

[0013] In the fingerprint recognition display panel described in the present application, the fingerprint-driven thin film transistor includes a second semiconductor layer, a first gate insulating layer, a first gate layer, a second gate insulating layer and a first source and drain layer, the first gate insulating layer is arranged on the second semiconductor layer and covers the second semiconductor layer, the first gate layer is arranged on a side of the first gate insulating layer away from the second semiconductor layer, the second gate insulating layer is arranged on a side of the first gate layer away from the second semiconductor layer and covers the first gate layer, the first source and drain layer is arranged on a side of the second gate insulating layer away from the second semiconductor layer, and the first source and drain layer sequentially penetrates the protective layer, the insulating layer, the second gate insulating layer and the first gate insulating layer is connected to the second semiconductor layer, and the first source and drain layer is connected to the upper electrode layer.

[0014] In the fingerprint recognition display panel described in the present application, the first source and drain layer is arranged on the same layer as the upper electrode layer.

[0015] In the fingerprint recognition display panel described in the present application, the array layer further includes a display driving thin film transistor, and the display driving thin film transistor includes a third semiconductor layer, a second gate layer, a third gate layer, an interlayer insulating layer and a second source and drain layer; wherein,

[0016] The first gate insulating layer is arranged on the third semiconductor layer and covers the third semiconductor layer, the second gate layer is arranged on a side of the first gate insulating layer away from the third semiconductor layer, the second gate insulating layer is arranged on a side of the second gate layer away from the third semiconductor layer, and the second gate insulating layer covers the second gate layer, the third gate layer is arranged on a side of the second gate insulating layer away from the third semiconductor layer, the interlayer insulating layer is arranged on a side of the third gate layer away from the third semiconductor layer and covers the third gate layer, the second source and drain layer is arranged on a side of the interlayer insulating layer away from the third semiconductor layer, and the second source and drain layer sequentially penetrates the protective layer, the insulating layer, the interlayer insulating layer, the second gate insulating layer and the first gate insulating layer to be connected to the third semiconductor layer.

[0017] In the fingerprint recognition display panel described in the present application, the second semiconductor layer and the third semiconductor layer are arranged in the same layer, the first gate layer and the second gate layer are arranged in the same layer, and the first source and drain layer and the second source and drain layer are arranged in the same layer.

[0018] In the fingerprint recognition display panel described in the present application, the fingerprint recognition display panel also includes an encapsulation layer, a touch layer and a module layer. The encapsulation layer is arranged on a side of the organic light-emitting diode layer away from the substrate, the touch layer is arranged on a side of the encapsulation layer away from the substrate, and the module layer is arranged on a side of the touch layer away from the substrate.

[0019] The present application also provides a method for preparing a fingerprint recognition display panel, the method comprising:

[0020] providing a substrate;

[0021] forming an array layer on the substrate, wherein a fingerprint module is integrated in the array layer, and the fingerprint module is used for fingerprint recognition;

[0022] forming an organic light emitting diode layer on a surface of the array layer away from the substrate;

[0023] A touch layer is formed on a surface of the organic light emitting diode layer away from the substrate.

[0024] In the method for preparing the fingerprint recognition display panel described in the present application, the specific step of forming the array layer on the substrate includes:

[0025] forming a substrate on the base plate, forming a buffer layer on the substrate, and forming a second semiconductor layer and a third semiconductor layer on the buffer layer;

[0026] forming a first gate insulating layer on the second semiconductor layer and the third semiconductor layer, wherein the first gate insulating layer covers the second semiconductor layer and the third semiconductor layer, and forming a first gate and a second gate on the first gate insulating layer;

[0027] forming a second gate insulating layer on the first gate and the second gate, the second gate insulating layer covering the first gate and the second gate, and forming a third gate on the second gate insulating layer;

[0028] forming an interlayer insulating layer on the third gate, the interlayer insulating layer covering the third gate, and forming a lower electrode layer on the third gate;

[0029] forming an insulating layer on the lower electrode layer, the insulating layer covering the lower electrode layer, and forming a first semiconductor layer on the insulating layer;

[0030] forming a transparent electrode layer on the first semiconductor layer;

[0031] forming a protective layer on the transparent electrode layer, the protective layer covering the transparent electrode layer and the first semiconductor layer, and forming a first via hole penetrating the protective layer and a second via hole penetrating the protective layer and the insulating layer in sequence on the protective layer;

[0032] forming a third via hole, a fourth via hole, a fifth via hole and a sixth via hole on the protective layer, sequentially penetrating the protective layer, the insulating layer, the interlayer insulating layer, the second insulating layer and the first insulating layer;

[0033] An upper electrode layer, a first source-drain electrode layer, and a second source-drain electrode layer are formed on the protective layer, the upper electrode layer is connected to the transparent electrode layer through the first via hole, the upper electrode layer is connected to the lower electrode layer through the second via hole, the first source-drain electrode layer is connected to the second semiconductor layer through the third via hole and the fourth via hole, and the second source-drain electrode layer is connected to the third semiconductor layer through the fifth via hole and the sixth via hole.

[0034] In the fingerprint recognition display panel and its preparation method provided in the embodiment of the present application, a substrate, an array layer and an organic light emitting diode layer are stacked in sequence, wherein a fingerprint module for fingerprint recognition is integrated in the array layer. When fingerprint recognition is required, the finger presses the fingerprint recognition display panel, thereby reflecting the light emitted by the organic light emitting diode layer to the fingerprint module integrated in the array layer, and then the fingerprint recognition function can be realized by identifying the difference in light reflection of the valley and ridge of the finger. The fingerprint module is integrated in the array layer, which not only does not affect the realization of the fingerprint recognition function, but also reduces the thickness of the fingerprint recognition display panel, and can realize comprehensive fingerprint recognition, thereby enhancing the market competitiveness of the fingerprint recognition display panel. BRIEF DESCRIPTION OF THE DRAWINGS

[0035] In order to more clearly illustrate the technical solutions in the embodiments of the present application, the drawings required for use in the description of the embodiments will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present application. For those skilled in the art, other drawings can be obtained based on these drawings without creative work.

[0036] Figure 1 A first structural schematic diagram of a first implementation manner of a fingerprint recognition display panel provided in an embodiment of the present application.

[0037] Figure 2 This is a second structural schematic diagram of the first implementation manner of the fingerprint recognition device provided in an embodiment of the present application.

[0038] Figure 3 A first structural schematic diagram of a first implementation manner of an array layer provided in an embodiment of the present application.

[0039] Figure 4 A third schematic diagram of the first implementation manner of the fingerprint recognition display panel provided in an embodiment of the present application.

[0040] Figure 5 A schematic structural diagram of a second implementation manner of the array layer provided in an embodiment of the present application.

[0041] Figure 6 A schematic structural diagram of a third implementation manner of the array layer provided in an embodiment of the present application.

[0042] Figure 7 A schematic structural diagram of a second implementation of a fingerprint recognition display panel provided in an embodiment of the present application.

[0043] Figure 8 A schematic diagram of a process for preparing a fingerprint recognition display panel provided in an embodiment of the present application.

[0044] Fig. 9A schematic diagram of a sub-process of a method for preparing a fingerprint recognition display panel provided in an embodiment of the present application.

[0045] Fig.10 This is a schematic structural diagram of the array layer 200 corresponding to step 3021 of the method for preparing a fingerprint recognition display panel provided in an embodiment of the present application.

[0046] Fig.11 This is a schematic structural diagram of the array layer 200 corresponding to step 3022 of the method for preparing a fingerprint recognition display panel provided in an embodiment of the present application.

[0047] Fig.12 This is a schematic structural diagram of the array layer 200 corresponding to step 3023 of the method for preparing a fingerprint recognition display panel provided in an embodiment of the present application.

[0048] Fig.13 This is a schematic structural diagram of the array layer 200 corresponding to step 3024 of the method for preparing a fingerprint recognition display panel provided in an embodiment of the present application.

[0049] Fig.14 This is a schematic structural diagram of the array layer 200 corresponding to step 3025 of the method for preparing a fingerprint recognition display panel provided in an embodiment of the present application.

[0050] Fig.15 This is a schematic structural diagram of the array layer 200 corresponding to step 3026 of the method for preparing a fingerprint recognition display panel provided in an embodiment of the present application.

[0051] Fig.16 This is a schematic structural diagram of the array layer 200 corresponding to step 3027 of the method for preparing a fingerprint recognition display panel provided in an embodiment of the present application.

[0052] Fig.17 This is a schematic structural diagram of the array layer 200 corresponding to step 3028 of the method for preparing a fingerprint recognition display panel provided in an embodiment of the present application.

[0053] Fig.18 This is a schematic structural diagram of the array layer 200 corresponding to step 3029 of the method for preparing a fingerprint recognition display panel provided in an embodiment of the present application. DETAILED DESCRIPTION

[0054] The technical solutions in the embodiments of the present application will be described clearly and completely below in conjunction with the drawings in the embodiments of the present application. Obviously, the described embodiments are only part of the embodiments of the present application, rather than all of the embodiments. Based on the embodiments in the present application, all other embodiments obtained by those skilled in the art without creative work are within the scope of protection of the present application.

[0055] See also Figure 1 , Figure 1 This is a first structural schematic diagram of a first implementation of a fingerprint recognition display panel provided in an embodiment of the present application. Figure 1 As shown, the fingerprint identification display panel 10 provided in the embodiment of the present application includes a substrate 101 , an array layer 102 , and an organic light emitting diode layer 103 .

[0056] The array layer 102 is disposed on the substrate 101 . The array layer 102 is integrated with a fingerprint module 102 a , which is used to implement a fingerprint recognition function. The organic light emitting diode layer 103 is disposed on a side of the array layer 102 away from the substrate 101 .

[0057] When fingerprint recognition is required, the finger presses the fingerprint recognition display panel 10. At this time, the light emitted by the organic light emitting diode layer 103 to the outside will be reflected back into the fingerprint recognition panel 10 by the finger. This light penetrates the organic light emitting diode layer 103 and is emitted to the fingerprint module 102a integrated in the array layer 102. The fingerprint module 102a realizes the fingerprint recognition function by identifying the difference in light reflection between the valleys and ridges of the finger.

[0058] It should be noted that, firstly, since the fingerprint module 102a is integrated in the array layer 102, the fingerprint module 102a can be integrated in any position in the array layer 102, and multiple fingerprint modules can be provided. Therefore, no matter where the finger touches the touch layer 102, the fingerprint module 102a can receive the light reflected back from the finger by the organic light emitting diode layer 103 to the outside world, thereby realizing comprehensive fingerprint recognition. Secondly, since the array layer 102 is closer to the organic light emitting diode layer 103, the fingerprint module 102a receives a stronger light reflected back from the finger by the organic light emitting diode layer 103 to the outside world, thereby making it easier for the fingerprint module 102a to recognize the fingerprint, which helps to improve the fingerprint recognition quality of the fingerprint recognition display panel 10. Thirdly, since the fingerprint module 102a is integrated in the array layer 102, the fingerprint module 102a does not need to be provided on the side of the substrate 101 away from the organic light emitting diode layer 103, thereby reducing the thickness of the fingerprint recognition display panel 10. Therefore, integrating the fingerprint module 102 a into the array layer 102 can help improve the market competitiveness of the fingerprint recognition display panel 10 .

[0059] It should be noted that the fingerprint module 102a utilizes the photosensitive properties of semiconductors, that is, the magnitude of the photocurrent generated by semiconductors is different in the dark state and in the light state; and the driving control of thin film transistors to achieve the fingerprint recognition function. In addition, high temperature annealing is also required in the semiconductor manufacturing process to achieve better current characteristics, where high temperature refers to a temperature greater than 200 degrees.

[0060] Among them, firstly, the organic light-emitting diode layer 103 is a continuous vacuum process, while the semiconductor layer and the thin film transistor need to be prepared under non-vacuum conditions, so the fingerprint module 102a cannot be integrated in the organic light-emitting diode layer 103. Secondly, the preparation process of the organic light-emitting diode layer 103 needs to be carried out at a relatively low temperature, which is a temperature less than 100 degrees. Therefore, the fingerprint module 102a cannot be integrated in the organic light-emitting diode layer 103.

[0061] See also Figure 2 , Figure 2 A second structural diagram of the first implementation of the fingerprint recognition device provided in the embodiment of the present application is shown in FIG. Figure 2 As shown, Figure 2 The fingerprint recognition device 10 shown is Figure 1 The difference between the fingerprint recognition device shown is that the fingerprint module 102a includes an optical fingerprint sensor 1021 and a fingerprint driving thin film transistor 1022. The optical fingerprint sensor 1021 is electrically connected to the fingerprint driving thin film transistor 1022.

[0062] It should be noted that the optical fingerprint sensor 1021 is used to receive the light emitted by the organic light emitting diode layer 103 to the outside and reflected back by the finger, and the fingerprint driving thin film transistor 1022 is used to drive the optical fingerprint sensor 1021 to work.

[0063] See also Figure 3 , Figure 3 This is a first structural schematic diagram of a first implementation of the array layer provided in the embodiment of the present application. Figure 3 As shown, the optical fingerprint sensor 1021 includes a lower electrode 1021a, an insulating layer 1021b, a first semiconductor layer 1021c, a transparent electrode layer 1021d, a protective layer 1021e, and an upper electrode layer protective layer 1021f. The fingerprint driving thin film transistor 1022 includes a second semiconductor layer 1022a, a first gate insulating layer 1022b, a first gate layer 1022c, a second gate insulating layer 1022d, and a first source and drain layer 1022e.

[0064] The insulating layer 1021b is disposed on the lower electrode layer 1021a and covers the lower electrode layer 1021a. The first semiconductor layer 1021c is disposed on the side of the insulating layer 1021b away from the lower electrode layer 1021a. The transparent electrode layer 1021d is disposed on the side of the first semiconductor layer 1021c away from the lower electrode layer 1021a. The protective layer 1021e is disposed on the side of the transparent electrode layer 1021d away from the lower electrode layer 1021a and covers the transparent electrode layer 1021d and the first semiconductor layer 1021c. The upper electrode layer 1021f is disposed on the side of the protective layer 1021e away from the lower electrode layer 1021a. The protective layer 1021e is provided with a first via hole 1021g and a second via hole 1021h. The first via hole 1021g penetrates the protective layer 1021e to the transparent electrode layer 1021d, and the second via hole 1021h penetrates the protective layer 1021e and the insulating layer 1021b in sequence. The upper electrode layer 1021f is connected to the transparent electrode layer 1021d through the first via hole 1021g, and the upper electrode layer 1021f is connected to the lower electrode layer 1021a through the second via hole 1021h.

[0065] It should be noted that the material of the first semiconductor layer 1021c includes one of indium gallium zinc oxide (IGZO) and indium gallium tin oxide (IGTO).

[0066] It should be noted that the material of the transparent electrode layer 1021d includes one of indium tin oxide (ITO) and indium zinc oxide (IZO).

[0067] It should be noted that the materials of the upper electrode layer 1021f and the lower electrode layer 1021a are the same, both of which are metal conductive materials. Specifically, the materials of the upper electrode layer 1021f and the lower electrode layer 1021a include one or a combination of zinc, copper and silver.

[0068] The transparent electrode layer 1021d and the projection of the first semiconductor layer 1021c on the lower electrode layer 1021a completely overlap, that is, the transparent electrode layer 1021d completely covers the first semiconductor layer 1021c. It should be noted that, firstly, the transparent electrode layer 1021d completely covers the first semiconductor layer 1021c, so that the transparent electrode layer 1021d can protect the first semiconductor layer 1021c; secondly, the transparent electrode layer 1021d completely covers the first semiconductor layer 1021c, which can prevent the upper electrode layer 1021f from being mistakenly connected to the first semiconductor layer 1021c when connecting to the transparent electrode layer 1021d.

[0069] The first gate insulating layer 1022b is disposed on the second semiconductor layer 1022a and covers the second semiconductor layer 1022a. The first gate layer 1022c is disposed on a surface of the first gate insulating layer 1022b away from the second semiconductor layer 1022a. The second gate insulating layer 1022d is disposed on a surface of the first gate layer 1022c away from the second semiconductor layer 1022a and covers the first gate layer 1022c. The first source-drain electrode layer 1022e is disposed on a surface of the second gate insulating layer 1022c away from the second semiconductor layer 1022a, and the first source-drain electrode layer 1022e sequentially penetrates the protective layer 1021e, the insulating layer 1021b, the second gate insulating layer 1022d and the first gate insulating layer 1022b and is connected to the second semiconductor layer 1022a.

[0070] The first source-drain layer 1022b is connected to the upper electrode layer 1021f, so that the fingerprint driving thin film transistor 1022 can transmit a signal to the optical fingerprint sensor 1021, thereby driving the optical fingerprint sensor 1021 to work.

[0071] It should be noted that the material of the second semiconductor layer 1022a includes one of amorphous silicon, polycrystalline silicon, indium gallium zinc oxide (IGZO) and the like.

[0072] It should be noted that the first source and drain layer 1022b is arranged on the same layer as the upper electrode layer 1021f, so that the thickness of the array layer 102 can be reduced, and then the thickness of the fingerprint recognition display panel 10 can be reduced, which helps to improve the market competitiveness of the fingerprint recognition display panel 10.

[0073] See also Figure 4 , Figure 4 This is a third schematic diagram of the first implementation of the fingerprint recognition display panel provided in the embodiment of the present application. Figure 4 As shown, Figure 4 The fingerprint recognition display panel 10 shown is Figure 2 The difference of the fingerprint recognition display panel 10 shown is that the array layer 102 further includes a display driving thin film transistor 1023 , and the fingerprint driving thin film transistor 1022 and the display driving thin film transistor 1023 are arranged in the same layer.

[0074] It should be noted that the display driving thin film transistor 1023 is used to drive the organic light emitting diode layer 103 to emit light, and the fingerprint driving thin film transistor 1022 is set on the same layer as the display driving thin film transistor 1023, so as to reduce the thickness of the array layer 102, and then reduce the thickness of the fingerprint recognition display panel 10, which helps to improve the market competitiveness of the fingerprint recognition display panel 10.

[0075] See also Figure 5 , Figure 5 This is a schematic diagram of the structure of the second implementation of the array layer provided in the embodiment of the present application. Figure 5 As shown, Figure 5 The array layer 102 is shown with Figure 3 The difference of the array layer 102 shown is that the array layer 102 further includes a display driving thin film transistor 1023. The display driving thin film transistor 1023 includes a third semiconductor layer 1023a, a second gate layer 1023b, a third gate layer 1023c, an interlayer insulating layer 1023d and a second source and drain layer 1023e.

[0076] The first gate insulating layer 1022b is disposed on the third semiconductor layer 1023a and covers the third semiconductor layer 1023a. The second gate layer 1023b is disposed on a surface of the first gate insulating layer 1022b away from the third semiconductor layer 1023a. The second gate insulating layer 1022d is disposed on a surface of the second gate layer 1023b away from the third semiconductor layer 1023a, and the second gate insulating layer 1022d covers the second gate layer 1023b. The third gate layer 1023c is disposed on a surface of the second gate insulating layer 1022d away from the third semiconductor layer 1023a. The interlayer insulating layer 1023d is disposed on a surface of the third gate layer 1023c away from the third semiconductor layer 1023a, and covers the third gate layer 1023c. The second source-drain layer 1023e is arranged on a surface of the interlayer insulating layer 1023d away from the third semiconductor layer 1023a, and the second source-drain layer 1023e sequentially penetrates the protective layer 1021e, the insulating layer 1021b, the interlayer insulating layer 1023d, the second gate insulating layer 1022d and the first gate insulating layer 1022b to be connected to the third semiconductor layer 1023a.

[0077] Among them, the second semiconductor layer 1022a and the third semiconductor layer 1023a are arranged in the same layer, the first gate layer 1022c and the second gate layer 1023b are arranged in the same layer, and the first source and drain layer 1022e and the second source and drain layer and the first source and drain layer 1023e are arranged in the same layer. The fingerprint driving thin film transistor 1022 and the display driving thin film transistor 1023 share the first gate insulating layer 1022b to protect the second semiconductor layer 1022a and the third semiconductor layer 1023a, and the fingerprint driving thin film transistor 1022 and the display driving thin film transistor 1023 share the second gate insulating layer 1022d to protect the first gate 1022c and the second gate 1023b. It should be noted that many film layers of the fingerprint driving thin film transistor 1022 and the display driving thin film transistor 1023 are arranged in the same layer or shared, so that the thickness of the array layer 102 can be reduced, and then the thickness of the fingerprint recognition display panel 10 can be reduced, which helps to improve the market competitiveness of the fingerprint recognition display panel 10.

[0078] It should be noted that the display driving thin film transistor 1023 can be provided with only one gate layer, that is, only the second gate layer 1023b is provided, so there is no need to provide a third gate layer 1023c and an interlayer insulating layer 1023d, thereby reducing the thickness of the array layer 102, and further reducing the thickness of the fingerprint recognition display panel 10, which helps to improve the market competitiveness of the fingerprint recognition display panel 10.

[0079] See also Figure 6 , Figure 6 This is a schematic diagram of the structure of the third embodiment of the array layer provided in the present application. Figure 6 As shown, the array layer 102 further includes a substrate 1024 and a buffer layer 1025 .

[0080] The buffer layer 1025 is disposed on a side of the first gate insulating layer 1022b away from the first source-drain electrode layer 1022e. The substrate 1024 is disposed on a side of the buffer layer 1025 away from the first source-drain electrode layer 1022e. It should be noted that the substrate 1024 can facilitate the use of a process to form each film layer of the optical fingerprint sensor 1021, the fingerprint driving thin film transistor 1022, and the display driving thin film transistor 1023.

[0081] See also Figure 7 , Figure 7 This is a schematic diagram of the structure of the second implementation of the fingerprint recognition display panel provided in the embodiment of the present application. Figure 7 As shown, Figure 7 The fingerprint recognition display panel 10 shown is Figure 1 The difference between the fingerprint recognition display panel 10 shown is that the fingerprint recognition display panel 10 further includes a touch layer 104 , a packaging layer 105 and a module layer 106 .

[0082] Among them, the encapsulation layer 105 is arranged on the side of the organic light-emitting diode layer 103 away from the substrate 101. The touch layer 104 is arranged on the side of the encapsulation layer 105 away from the substrate 101. The module layer 106 is arranged on the side of the touch layer 104 away from the substrate 101. It should be noted that the encapsulation layer 105 is used to prevent external water and oxygen from entering the organic light-emitting diode layer 103 and the array layer 102 and damaging the internal electronic devices. The module layer 106 usually includes film layers such as polarizers, optical glue, and protective glass. The module layer 106 can not only protect the array layer 102 and the organic light-emitting diode layer 104, but also prevent the external ambient light from interfering with the light output of the organic light-emitting diode layer 104.

[0083] Among them, firstly, the touch layer 104 is a continuous vacuum process, while the semiconductor layer and the thin film transistor need to be prepared under non-vacuum conditions, so the fingerprint module 102a cannot be integrated in the touch layer 104. Secondly, the preparation process of the touch layer 104 needs to be carried out at a relatively low temperature, which is a temperature less than 100 degrees. Therefore, the fingerprint module 102a cannot be integrated in the touch layer 104.

[0084] Among them, the fingerprint recognition display panel provided by the embodiment of the present application includes a substrate, an array layer and an organic light-emitting diode layer stacked in sequence, wherein a fingerprint module for fingerprint recognition is integrated in the array layer. When fingerprint recognition is required, the finger will press the fingerprint recognition display panel, thereby reflecting the light emitted by the organic light-emitting diode layer to the fingerprint module integrated in the array layer, and then the fingerprint recognition function can be realized by identifying the difference in light reflection of the finger valley and ridge. The fingerprint module is integrated in the array layer, which not only does not affect the realization of the fingerprint recognition function, but also reduces the thickness of the fingerprint recognition display panel, and can realize comprehensive fingerprint recognition, thereby enhancing the market competitiveness of the fingerprint recognition display panel.

[0085] The present application also provides a method for preparing a fingerprint recognition display panel. Figure 8 , Figure 8 The following is a flow chart of a method for preparing a fingerprint recognition display panel provided in an embodiment of the present application. Figure 8 As shown, the method for preparing the fingerprint recognition display panel provided in the embodiment of the present application includes the following steps:

[0086] Step 301: provide a substrate.

[0087] Step 302: forming an array layer 200 on a substrate, wherein a fingerprint module is integrated in the array layer 200, and the fingerprint module is used for fingerprint recognition.

[0088] See also Fig. 9 , Fig. 9 A schematic diagram of a sub-process of a method for preparing a fingerprint recognition display panel provided in an embodiment of the present application. Fig. 9 As shown, step 102 provided in the embodiment of the present application specifically includes the following steps:

[0089] Step 3021 : forming a substrate 201 on a base plate, forming a buffer layer 202 on the substrate 201 , and forming a second semiconductor layer 203 a and a third semiconductor layer 203 b on the buffer layer 202 .

[0090] See also Fig.10 , Fig.10The schematic diagram of the structure of the array layer 200 corresponding to step 3021 of the method for manufacturing a fingerprint recognition display panel provided in an embodiment of the present application is shown in FIG.

[0091] Step 3022 , forming a first gate insulating layer 204 on the second semiconductor layer 203 a and the third semiconductor layer 203 b , the first gate insulating layer 204 covers the second semiconductor layer 203 a and the third semiconductor layer 203 b , and forming a first gate 205 a and a second gate 205 b on the first gate insulating layer 204 .

[0092] See also Fig.11 , Fig.11 The schematic diagram of the structure of the array layer 200 corresponding to step 3022 of the method for manufacturing a fingerprint recognition display panel provided in an embodiment of the present application is shown in FIG.

[0093] Step 3023 , forming a second gate insulating layer 206 on the first gate 205 a and the second gate 205 b , the second gate insulating layer 206 covers the first gate 205 a and the second gate 205 b , and forming a third gate 207 on the second gate insulating layer 206 .

[0094] See also Fig.12 , Fig.12 The schematic diagram of the structure of the array layer 200 corresponding to step 3023 of the method for manufacturing a fingerprint recognition display panel provided in an embodiment of the present application is shown in FIG.

[0095] Step 3024 , forming an interlayer insulating layer 208 on the third gate 207 , the interlayer insulating layer 208 covers the third gate 207 , and forming a lower electrode layer 209 on the third gate 207 .

[0096] See also Fig.13 , Fig.13 The schematic diagram of the structure of the array layer 200 corresponding to step 3024 of the method for manufacturing a fingerprint recognition display panel provided in an embodiment of the present application is as follows: The lower electrode layer 209 is formed by an exposure and etching process.

[0097] Step 3025 , forming an insulating layer 210 on the lower electrode layer 209 , the insulating layer 210 covers the lower electrode layer 209 , and forming a first semiconductor layer 211 on the insulating layer 210 .

[0098] See also Fig.14 , Fig.14This is a schematic diagram of the structure of the array layer 200 corresponding to step 3025 of the method for manufacturing a fingerprint recognition display panel provided in an embodiment of the present application. The first semiconductor layer 211 is formed by an exposure and etching process.

[0099] Step 3026 , forming a transparent electrode layer 212 on the first semiconductor layer 211 .

[0100] See also Fig.15 , Fig.15 The schematic diagram of the structure of the array layer 200 corresponding to step 3026 of the method for manufacturing a fingerprint recognition display panel provided in an embodiment of the present application is as follows: The transparent electrode layer 212 is formed by an exposure and etching process.

[0101] Step 3027, forming a protective layer 213 on the transparent electrode layer 212, the protective layer 213 covers the transparent electrode layer 212 and the first semiconductor layer 211, and forming a first via hole 216a penetrating the protective layer 213 and a second via hole 216b penetrating the protective layer 213 and the insulating layer 210 in sequence on the protective layer 213.

[0102] See also Fig.16 , Fig.16 This is a schematic structural diagram of the array layer 200 corresponding to step 3027 of the method for preparing a fingerprint recognition display panel provided in an embodiment of the present application.

[0103] Step 3028 , forming a third via hole 216 c , a fourth via hole 216 d , a fifth via hole 216 e and a sixth via hole 216 f on the protective layer 213 , which successively penetrate the protective layer 213 , the insulating layer 210 , the interlayer insulating layer 208 , the second insulating layer 206 and the first insulating layer 204 .

[0104] See also Fig.17 , Fig.17 This is a schematic structural diagram of the array layer 200 corresponding to step 3028 of the method for preparing a fingerprint recognition display panel provided in an embodiment of the present application.

[0105] Step 3029, an upper electrode layer 214, a first source-drain layer 215a and a second source-drain layer 215b are formed on the protective layer 213, the upper electrode layer 214 is connected to the transparent electrode layer 212 through the first via hole 216a, the upper electrode layer 214 is connected to the lower electrode layer 209 through the second via hole 216b, the first source-drain layer 215a is connected to the second semiconductor layer 203a through the third via hole 216c and the fourth via hole 216d, and the second source-drain layer 215b is connected to the third semiconductor layer 203b through the fifth via hole 216e and the sixth via hole 216f.

[0106] See also Fig.18 , Fig.18This is a schematic structural diagram of the array layer 200 corresponding to step 3029 of the method for preparing a fingerprint recognition display panel provided in an embodiment of the present application.

[0107] Step 303: forming an organic light emitting diode layer on a surface of the array layer away from the substrate.

[0108] Step 304 : forming a touch layer on a surface of the organic light emitting diode layer away from the substrate.

[0109] The fingerprint recognition display panel 10 may be specifically described with reference to the above description of the fingerprint recognition display panel, which will not be elaborated here.

[0110] In the preparation method of the fingerprint recognition display panel provided in the embodiment of the present application, a substrate, an array layer and an organic light emitting diode layer are stacked in sequence, wherein a fingerprint module for fingerprint recognition is integrated in the array layer. When fingerprint recognition is required, the finger presses the fingerprint recognition display panel, thereby reflecting the light emitted by the organic light emitting diode layer to the fingerprint module integrated in the array layer, and then the fingerprint recognition function can be realized by identifying the difference in light reflection of the valley and ridge of the finger. The fingerprint module is integrated in the array layer, which not only does not affect the realization of the fingerprint recognition function, but also reduces the thickness of the fingerprint recognition display panel, and can realize comprehensive fingerprint recognition, thereby enhancing the market competitiveness of the fingerprint recognition display panel.

[0111] The above is a detailed introduction to a fingerprint recognition display panel and a preparation method thereof provided in an embodiment of the present application. Specific examples are used herein to illustrate the principles and implementation methods of the present application. The description of the above embodiments is only used to help understand the method of the present application and its core idea. At the same time, for technical personnel in this field, according to the idea of ​​the present application, there will be changes in the specific implementation method and application scope. In summary, the content of this specification should not be understood as a limitation on the present application.

Claims

1. A fingerprint recognition display panel, characterized in that: include: substrate; An array layer, wherein the array layer is arranged on the substrate, wherein a fingerprint module is integrated in the array layer, and the fingerprint module is used to realize a fingerprint recognition function; An organic light emitting diode layer, wherein the organic light emitting diode layer is arranged on a surface of the array layer away from the substrate; The fingerprint module includes an optical fingerprint sensor and a fingerprint driving thin film transistor, and the optical fingerprint sensor is electrically connected to the fingerprint driving thin film transistor; The optical fingerprint sensor includes a lower electrode layer, an insulating layer, a first semiconductor layer, a transparent electrode layer, a protective layer and an upper electrode layer; the insulating layer is arranged on the lower electrode layer and covers the lower electrode layer, the first semiconductor layer is arranged on a side of the insulating layer away from the lower electrode layer, the transparent electrode layer is arranged on a side of the first semiconductor layer away from the lower electrode layer, the protective layer is arranged on a side of the transparent electrode layer away from the lower electrode layer and covers the transparent electrode layer and the first semiconductor layer, the upper electrode layer is arranged on a side of the protective layer away from the lower electrode layer, a first via hole and a second via hole are arranged on the protective layer, the first via hole penetrates the protective layer to the transparent electrode layer, the second via hole penetrates the protective layer and the insulating layer in sequence, the upper electrode layer is connected to the transparent electrode layer via the first via hole, and the upper electrode layer is connected to the lower electrode layer via the second via hole; The fingerprint driven thin film transistor comprises a second semiconductor layer, a first gate insulating layer, a first gate layer, a second gate insulating layer and a first source and drain electrode layer; The transparent electrode layer and the first semiconductor layer are completely overlapped in projection on the lower electrode layer, and the first source and drain electrode layer is arranged on the same layer as the upper electrode layer.

2. The fingerprint recognition display panel according to claim 1, characterized in that: The first gate insulating layer is arranged on the second semiconductor layer and covers the second semiconductor layer, the first gate layer is arranged on a side of the first gate insulating layer away from the second semiconductor layer, the second gate insulating layer is arranged on a side of the first gate layer away from the second semiconductor layer and covers the first gate layer, the first source and drain layer is arranged on a side of the second gate insulating layer away from the second semiconductor layer, and the first source and drain layer sequentially penetrates the protective layer, the insulating layer, the second gate insulating layer, and the first gate insulating layer is connected to the second semiconductor layer, and the first source and drain layer is connected to the upper electrode layer.

3. The fingerprint recognition display panel according to claim 2, characterized in that: The array layer further includes a display driving thin film transistor, and the display driving thin film transistor includes a third semiconductor layer, a second gate layer, a third gate layer, an interlayer insulating layer and a second source and drain layer; wherein, The first gate insulating layer is arranged on the third semiconductor layer and covers the third semiconductor layer, the second gate layer is arranged on a side of the first gate insulating layer away from the third semiconductor layer, the second gate insulating layer is arranged on a side of the second gate layer away from the third semiconductor layer, and the second gate insulating layer covers the second gate layer, the third gate layer is arranged on a side of the second gate insulating layer away from the third semiconductor layer, the interlayer insulating layer is arranged on a side of the third gate layer away from the third semiconductor layer and covers the third gate layer, the second source and drain layer is arranged on a side of the interlayer insulating layer away from the third semiconductor layer, and the second source and drain layer sequentially penetrates the protective layer, the insulating layer, the interlayer insulating layer, the second gate insulating layer and the first gate insulating layer to be connected to the third semiconductor layer.

4. The fingerprint recognition display panel according to claim 3, characterized in that: The second semiconductor layer is disposed in the same layer as the third semiconductor layer, the first gate layer is disposed in the same layer as the second gate layer, and the first source-drain electrode layer is disposed in the same layer as the second source-drain electrode layer.

5. The fingerprint recognition display panel according to claim 1, characterized in that: The fingerprint recognition display panel also includes an encapsulation layer, a touch layer and a module layer. The encapsulation layer is arranged on a side of the organic light-emitting diode layer away from the substrate, the touch layer is arranged on a side of the encapsulation layer away from the substrate, and the module layer is arranged on a side of the touch layer away from the substrate.

6. A method for preparing a fingerprint recognition display panel, characterized in that: The preparation method comprises: providing a substrate; forming an array layer on the substrate, wherein a fingerprint module is integrated in the array layer, and the fingerprint module is used for fingerprint recognition; forming an organic light emitting diode layer on a surface of the array layer away from the substrate; forming a touch layer on a surface of the organic light emitting diode layer away from the substrate; The specific steps of forming an array layer on the substrate include: forming a substrate on the base plate, forming a buffer layer on the substrate, and forming a second semiconductor layer and a third semiconductor layer on the buffer layer; forming a first gate insulating layer on the second semiconductor layer and the third semiconductor layer, wherein the first gate insulating layer covers the second semiconductor layer and the third semiconductor layer, and forming a first gate and a second gate on the first gate insulating layer; forming a second gate insulating layer on the first gate and the second gate, the second gate insulating layer covering the first gate and the second gate, and forming a third gate on the second gate insulating layer; forming an interlayer insulating layer on the third gate, the interlayer insulating layer covering the third gate, and forming a lower electrode layer on the third gate; forming an insulating layer on the lower electrode layer, the insulating layer covering the lower electrode layer, and forming a first semiconductor layer on the insulating layer; forming a transparent electrode layer on the first semiconductor layer; forming a protective layer on the transparent electrode layer, the protective layer covering the transparent electrode layer and the first semiconductor layer, and forming a first via hole penetrating the protective layer and a second via hole penetrating the protective layer and the insulating layer in sequence on the protective layer; forming a third via hole, a fourth via hole, a fifth via hole and a sixth via hole on the protective layer, sequentially penetrating the protective layer, the insulating layer, the interlayer insulating layer, the second gate insulating layer and the first gate insulating layer; An upper electrode layer, a first source-drain electrode layer, and a second source-drain electrode layer are formed on the protective layer, the upper electrode layer is connected to the transparent electrode layer through the first via hole, the upper electrode layer is connected to the lower electrode layer through the second via hole, the first source-drain electrode layer is connected to the second semiconductor layer through the third via hole and the fourth via hole, and the second source-drain electrode layer is connected to the third semiconductor layer through the fifth via hole and the sixth via hole.

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