A semiconductor switching component and its control method

Abstract

This invention relates to the field of semiconductor technology, specifically disclosing a semiconductor switching assembly, including a high-voltage non-tailed current switching device, a low-voltage non-tailed current switching device, and a tailed current switching device; the tailed current switching device and the low-voltage non-tailed current switching device are connected in series, and the high-voltage non-tailed current switching device, the series-connected tailed current switching device, and the low-voltage non-tailed current switching device are connected in parallel. The technical solution of this invention allows for lower switching losses, lower conduction losses, and higher reliability under the premise that switching losses, conduction losses, and reliability are mutually constrained.

Description

Technical Field

[0001] This invention relates to the field of semiconductor technology, and in particular to a semiconductor switching assembly and its control method. Background Technology

[0002] IGBT devices are widely used in power electronic converters due to their low conduction losses in high-voltage, high-current applications. From a working principle perspective, an IGBT can be approximated as a composite of a bipolar junction transistor (BJT) and an insulated-gate field-effect transistor (MOSFET). An external circuit drives the MOSFET, which in turn drives the BJT, which outputs a large current. Due to the carrier concentration modulation effect of the BJT, the internal resistance of the IGBT's drift region decreases as the current flowing through it increases, thus maintaining a very small change in the IGBT's on-state voltage drop with current, typically much less than the first power. In contrast, the on-state voltage drop of a conventional MOSFET is approximately proportional to the first power with current, and high-voltage, low-resistance MOSFETs have a larger chip area. Therefore, in high-voltage, high-current applications, IGBTs often exhibit conduction losses far lower than MOSFETs of the same area.

[0003] However, due to the aforementioned carrier concentration modulation effect, for an IGBT, after its input stage MOSFET is turned off, the residual carriers in its output stage BJT require a certain amount of time to recombine, resulting in a current tailing effect during turn-off. During this period, the tailing current leads to additional carrier injection, and therefore this process is often lengthy under large turn-off currents. Thus, reducing the turn-off current of the IGBT device can significantly reduce turn-off losses.

[0004] Meanwhile, during IGBT turn-on, its output stage BJT needs to short-circuit its own junction capacitance as well as the capacitance and reverse recovery charge of other AC equivalent parallel devices. Therefore, during turn-on, the IGBT output BJT needs to withstand high voltage and high current simultaneously. This process can easily cause the output BJT to run out of control, leading to device failure. To prevent turn-on failure, the conduction speed of IGBT devices is usually artificially limited, thus limiting the switching frequency and efficiency of power electronic converters using IGBTs. Reducing the turn-on voltage of the IGBT device to near zero volts can almost completely eliminate the high transient current during turn-on, thereby eliminating this failure mechanism and allowing for faster turn-on speeds, lower turn-on losses, and higher switching frequencies.

[0005] Existing solutions often use a high-voltage MOSFET and an IGBT connected in parallel to form a switching assembly. The turn-on and turn-off delays of the IGBT / high-voltage MOSFET are controlled by adjusting the gate timing. This allows the high-voltage MOSFET to turn on first, followed by the IGBT (hereinafter referred to as the turn-on dead time), and the IGBT to turn off first, followed by the high-voltage MOSFET (hereinafter referred to as the turn-off dead time). This increases turn-on reliability and reduces turn-off losses. When the IGBT is on, the high-voltage MOSFET and IGBT share the current, allowing the use of IGBTs with smaller switching capacities, thus reducing cost and parasitic capacitance.

[0006] To reduce parasitic capacitance and cost, the above-mentioned solutions typically use high-voltage MOSFETs with high internal resistance. Therefore, the on-state voltage drop of the high-voltage MOSFET is relatively large during the turn-off dead zone, sufficient to sustain the tail current of the IGBT. Although this tail current is much smaller than that of an IGBT without a parallel high-voltage MOSFET, it still exists and takes a considerable amount of time to dissipate. Therefore, the turn-off dead zone must be long enough to ensure that the IGBT does not suffer significant losses due to the tail current. During the turn-off dead zone, the current flowing through the switching component is entirely borne by the high-voltage MOSFET; therefore, the longer the turn-off dead zone, the greater the conduction losses of the circuit. To compensate for the conduction losses caused by the additional turn-off dead zone, it is often necessary to reduce or even eliminate the turn-on dead zone. This trade-off, while reducing conduction losses, increases the IGBT's turn-on voltage change rate, current change rate, and transient current, thereby reducing the reliability of the switching component. Therefore, this solution requires a trade-off between switching losses, conduction losses, and reliability. This trade-off severely limits the highest reliably achievable switching frequency of the above-mentioned switching components, thus limiting the power density and efficiency of power converters using these switching components. Summary of the Invention

[0007] One of the objectives of this invention is to provide a semiconductor switching assembly that allows for lower switching losses, lower conduction losses, and higher reliability under the premise that switching losses, conduction losses, and reliability are mutually constrained.

[0008] To solve the above-mentioned technical problems, this application provides the following technical solution:

[0009] A semiconductor switching assembly includes a high-voltage non-tailed current switching device, a low-voltage non-tailed current switching device, and a tailed current switching device; the tailed current switching device and the low-voltage non-tailed current switching device are connected in series, and the high-voltage non-tailed current switching device, the series-connected tailed current switching device, and the low-voltage non-tailed current switching device are connected in parallel.

[0010] Furthermore, the high-voltage tailless current switching device and the low-voltage tailless current switching device adopt JFET devices or HEMT devices; the tailed current switching device adopts BJT switching devices.

[0011] Furthermore, the high-voltage tailless current switching device adopts a high-voltage MOSFET device, the low-voltage tailless current switching device adopts a low-voltage MOSFET device, and the tailed current switching device adopts an IGBT device.

[0012] Furthermore, it also includes a timing generation circuit, a high-voltage MOSFET driving circuit, and a low-voltage MOSFET driving circuit; the output terminal of the timing generation circuit is connected to the input terminals of the low-voltage MOSFET driving circuit and the high-voltage MOSFET driving circuit, respectively.

[0013] The output of the low-voltage MOSFET drive circuit is connected to the gate and source of the low-voltage MOSFET device, and the output of the high-voltage MOSFET drive circuit is connected to the gate and source of the high-voltage MOSFET device.

[0014] Furthermore, it also includes an IGBT driving circuit, which is an active driving circuit, and the output terminal of the IGBT driving circuit is connected to the gate and emitter of the IGBT device.

[0015] Furthermore, an anti-parallel diode is connected in parallel between the emitter and collector of the IGBT device.

[0016] Furthermore, it also includes an IGBT driving circuit, which is a bias voltage power supply circuit. The gate of the IGBT device is connected to the IGBT driving circuit, and the emitter of the IGBT device is connected to the drain of the low-voltage MOSFET device.

[0017] Furthermore, the high-voltage MOSFET drive circuit includes a drive resistor R2, a drive resistor R3, a balun L1, and low-voltage P MOSFET Q1 and N MOSFET Q2;

[0018] The low-voltage MOSFET drive circuit includes drive resistor R5, drive resistor R6, balun L2, and low-voltage P MOSFET Q3 and N MOSFET Q4;

[0019] The source of P MOSFET Q1 is connected to the drive power supply, the gate is connected to the timing generator circuit, and the drain is connected to one end of the drive resistor R2; the source of N MOSFET Q2 is grounded, the gate is connected to the timing generator circuit, and the drain is connected to one end of the drive resistor R3; the other ends of drive resistors R2 and R3 are both connected to one positive input side of balun L1; the other positive input side of balun L1 is connected to the gate of the high-voltage MOSFET device, and one negative input side of balun L1 is grounded;

[0020] The source of P MOSFET Q3 is connected to the drive power supply, the gate is connected to the timing generator circuit, and the drain is connected to one end of the drive resistor R5; the source of N MOSFET Q4 is grounded, the gate is connected to the timing generator circuit, and the drain is connected to one end of the drive resistor R6; the other ends of drive resistors R5 and R6 are both connected to one positive input side of balun L2; the other positive input side of balun L2 is connected to the gate of the low-voltage MOSFET device, and one negative input side of balun L2 is grounded;

[0021] The other negative input side of balun L1, the other negative input side of balun L2, the source of the high-voltage MOSFET device, and the source of the low-voltage MOSFET device are all connected to the negative output terminal.

[0022] The collector of the IGBT device and the drain of the high-voltage MOSFET device are both connected to the positive output terminal.

[0023] The second objective of this invention is to provide a semiconductor switching component control method, comprising the following:

[0024] When the switching component needs to be turned on, the timing generation circuit outputs a high-voltage MOSFET turn-on signal, and the high-voltage MOSFET driving circuit pulls up the gate-source level of the high-voltage MOSFET device, thereby turning on the high-voltage MOSFET device.

[0025] After the dead time is turned on, the timing generation circuit outputs the IGBT and low-voltage MOSFET turn-on signals. The IGBT drive circuit pulls up the gate-emitter level of the IGBT device, and the low-voltage MOSFET drive circuit pulls up the gate-source level of the low-voltage MOSFET device, thereby turning on the IGBT device and the low-voltage MOSFET device.

[0026] When the switching components need to be turned off, the dead time is turned off in advance. The timing generation circuit outputs the IGBT and low-voltage MOSFET turn-off signals. The IGBT drive circuit pulls down the gate-emitter level of the IGBT device, and the low-voltage MOSFET drive circuit pulls down the gate-source level of the low-voltage MOSFET device, thereby turning off the IGBT device and the low-voltage MOSFET device.

[0027] After the dead time is turned off, the timing generation circuit outputs a high-voltage MOSFET turn-off signal, and the high-voltage MOSFET drive circuit pulls down the gate-source level of the high-voltage MOSFET device, thereby turning off the high-voltage MOSFET device.

[0028] Furthermore, it also includes uniformly delaying the opening and closing times by a preset time.

[0029] Compared with the prior art, the advantages of the present invention are as follows:

[0030] 1. This solution can significantly reduce the turn-off dead time required for IGBT devices to achieve turn-off without tail current. The tail current of IGBT devices has always been a pain point in the power electronics industry when using such devices. In order to solve the tail current, the complexity of the drive circuit has been increased (negative voltage power supply is required to accelerate the turn-off of tail current). This invention will eliminate the need for negative voltage drive for IGBT devices, greatly simplifying the complexity of the power supply circuit and drive circuit.

[0031] 2. This solution achieves IGBT soft turn-off without significantly affecting conduction losses and turn-on reliability. The switching process is mainly handled by parallel high-voltage MOSFET devices.

[0032] 3. In summary, this solution can improve the switching frequency and conversion efficiency of the power electronic converter, thereby achieving higher power density, while also improving the operational reliability of IGBT devices. Attached Figure Description

[0033] Figure 1 This is a logic block diagram of a semiconductor switching component according to an embodiment;

[0034] Figure 2 This is a schematic diagram of a timing generation circuit and a driving circuit in a semiconductor switching assembly according to an embodiment;

[0035] Figure 3 This is a schematic diagram of a timing generation circuit in a semiconductor switching assembly according to an embodiment;

[0036] Figure 4 A circuit diagram of a semiconductor switching assembly is provided as an example.

[0037] Figure 5 This is a timing diagram of a semiconductor switching component control method according to an embodiment;

[0038] Figure 6 This is a timing diagram of a semiconductor switching component control method according to an embodiment. Detailed Implementation

[0039] The following detailed description illustrates the specific implementation method:

[0040] Example 1

[0041] A semiconductor switching component according to this embodiment includes: a timing generation circuit, a high-voltage non-tailed current switching device, a low-voltage non-tailed current switching device, a tailed current switching device, and driving circuits corresponding to the high-voltage non-tailed current switching device, the low-voltage non-tailed current switching device, and the tailed current switching device.

[0042] The high-voltage and low-voltage tailless current switching devices can be corresponding MOSFET devices, JFET devices, or HEMT devices. In this embodiment, the high-voltage tailless current switching device is a high-voltage MOSFET device, and the low-voltage tailless current switching device is a low-voltage MOSFET device. In other embodiments, the high-voltage MOSFET device can also be replaced by a series combination of a high-voltage depletion-type device such as a high-voltage MESFET or JFET and another low-voltage MOSFET, which is functionally equivalent to a tailless current switching device.

[0043] The tail current switching device can be an IGBT or other switching devices with tail current such as a BJT. In this embodiment, an IGBT is used. In other embodiments, the IGBT can be replaced with a depletion-type IGBT with a JFET input, whose gate is connected to the source of a low-voltage MOSFET or a low bias voltage.

[0044] In this embodiment, the driving circuit specifically adopts an IGBT driving circuit, a high-voltage MOSFET driving circuit, and a low-voltage MOSFET driving circuit.

[0045] The IGBT device is connected in series with the low-voltage MOSFET device, and the high-voltage MOSFET device and the series-connected IGBT device are connected in parallel with the low-voltage MOSFET device.

[0046] like Figure 1 As shown, the output of the timing generator circuit is connected to the inputs of the IGBT drive circuit, the low-voltage MOSFET drive circuit, and the high-voltage MOSFET drive circuit, respectively. This connects the high-voltage MOSFET drive signal to the high-voltage MOSFET drive circuit, and the IGBT and low-voltage MOSFET drive signals to the IGBT drive circuit and the low-voltage MOSFET drive circuit, respectively.

[0047] The output terminals of the drive circuit are connected to the gate and source (emitter) of the corresponding power device, respectively. Specifically, when the IGBT drive circuit is an active drive circuit, the output terminal is connected to the gate and emitter of the IGBT device. The output terminal of the low-voltage MOSFET drive circuit is connected to the gate and source of the low-voltage MOSFET device, and the output terminal of the high-voltage MOSFET drive circuit is connected to the gate and source of the high-voltage MOSFET device. The specific drive circuit design and power device selection depend on the system requirements.

[0048] Optionally, an anti-parallel diode or equivalent circuit can be connected in parallel between the emitter and collector of the IGBT device to prevent the charge stored at the drain-source terminals of the low-voltage MOSFET device in the off state from being applied to the emitter-collector terminals of the IGBT device through the high-voltage MOSFET device at the moment of turn-on, thereby avoiding reverse breakdown of the IGBT device and damage.

[0049] The timing generation circuit and driving circuit (IGBT driving circuit, high-voltage MOSFET driving circuit, low-voltage MOSFET driving circuit) described above can be implemented in various ways. This embodiment provides a reference implementation:

[0050] like Figure 2 As shown, integrated circuit IC1 integrates a timing generator circuit and a driver circuit. When the input PWM signal enters integrated circuit IC1, IC1 generates the following two delayed signals through the delay unit of the timing generator circuit: the signal after the input signal is delayed by the turn-off dead time, and the signal after the input signal is delayed by the turn-off dead time plus the turn-on dead time.

[0051] The signal after the turn-off dead time delay is output to the high-voltage MOSFET drive circuit. The signal after the turn-off dead time and turn-on dead time delay is ANDed with the input signal, and the result is output to the IGBT drive circuit and the low-voltage MOSFET drive circuit.

[0052] like Figure 3 As shown, the timing generation circuit receives a drive signal input, and its internal lookup table and delay unit generate complementary drive signals for NMOSFETs and PMOSFETs. This circuit inverts the input signal and adds a dead time.

[0053] Optionally, special operating conditions such as continuous high or continuous low can be handled by intermittently adding jumps to ensure the normal operation of the internal level shifting circuit.

[0054] The complementary drive signals of the P MOSFET and N MOSFET of the timing generation circuit enter the following drive circuit.

[0055] The high-voltage MOSFET drive circuit and the low-voltage MOSFET drive circuit share a common ground. Both are composed of low-voltage P MOSFETs and N MOSFETs forming an inverter structure. The source of the P MOSFET is connected to the drive power supply, the gate of the P MOSFET is connected to the timing generation circuit, and the drain of the P MOSFET is connected to the positive input side of the balun through a drive resistor.

[0056] The source of the N MOSFET is grounded, the gate of the N MOSFET is connected to the timing generator circuit, and the drain of the N MOSFET is connected to the positive input side of the balun through a drive resistor.

[0057] The balun has its negative input side grounded, and its positive and negative output sides connected to the gate and source of the high-voltage and low-voltage MOSFETs, respectively. The balun is used to implement a single-ended to differential function, thereby achieving a Kelvin connection in a common-ground system.

[0058] Specifically, such as Figure 4As shown, the high-voltage MOSFET drive circuit includes drive resistor R2, drive resistor R3, balun L1, and low-voltage P MOSFET Q1 and N MOSFET Q2.

[0059] The low-voltage MOSFET drive circuit includes drive resistor R5, drive resistor R6, balun L2, and low-voltage P MOSFET Q3 and N MOSFET Q4;

[0060] The source of P MOSFET Q1 is connected to the drive power supply, the gate is connected to the timing generator circuit, and the drain is connected to one end of the drive resistor R2; the source of N MOSFET Q2 is grounded, the gate is connected to the timing generator circuit, and the drain is connected to one end of the drive resistor R3; the other ends of drive resistors R2 and R3 are both connected to one positive input side of balun L1; the other positive input side of balun L1 is connected to the gate of the high-voltage MOSFET device, and one negative input side of balun L1 is grounded;

[0061] The source of P MOSFET Q3 is connected to the drive power supply, the gate is connected to the timing generator circuit, and the drain is connected to one end of the drive resistor R5; the source of N MOSFET Q4 is grounded, the gate is connected to the timing generator circuit, and the drain is connected to one end of the drive resistor R6; the other ends of drive resistors R5 and R6 are both connected to one positive input side of balun L2; the other positive input side of balun L2 is connected to the gate of the low-voltage MOSFET device, and one negative input side of balun L2 is grounded;

[0062] The other negative input side of balun L1, the other negative input side of balun L2, the source of the high-voltage MOSFET device, and the source of the low-voltage MOSFET device are all connected to the negative output terminal.

[0063] The gate of the IGBT device is connected to the IGBT drive circuit, which is a bias voltage power supply circuit. The emitter of the IGBT device is connected to the drain of the low-voltage MOSFET device. The collector of the IGBT device and the drain of the high-voltage MOSFET device are both connected to the positive output terminal.

[0064] The IGBT device's gate is connected to a fixed bias voltage. When the low-voltage MOSFET Q6 is turned on, it pulls the IGBT's emitter low, resulting in a voltage close to the bias voltage between the IGBT's gate and emitter, thus turning the IGBT on. When the low-voltage MOSFET is turned off, the current flowing through the IGBT charges the drain-source junction of the MOSFET, raising the drain voltage (i.e., the emitter voltage) until the IGBT turns off at low voltage. The IGBT's low-voltage gate only requires an external fixed bias voltage and is driven by the low-voltage MOSFET; no active drive circuit is needed. In other implementations, the IGBT can be driven by an independent active drive circuit.

[0065] This solution, after undergoing dual-pulse testing, achieved approximately 99.5% reduction in turn-off loss (~600uJ -> ~3uJ) compared to the device under test using only the same type of IGBT under the same test conditions. Compared to the solution using a high-voltage MOSFET and IGBT in parallel to form a switching assembly, it achieved approximately 90% reduction in turn-off loss (~30uJ -> ~3uJ), while reducing the turn-off dead time by approximately 80% (200ns -> 40ns). To achieve the above performance indicators without using this solution, one would have to use power conductor devices that are several times more expensive and have higher parameters.

[0066] Based on a semiconductor switching component, this embodiment also provides a semiconductor switching component control method, including the following:

[0067] When the switching component needs to be turned on, the timing generation circuit outputs a high-voltage MOSFET turn-on signal, and the high-voltage MOSFET driving circuit pulls up the gate-source level of the high-voltage MOSFET device, thereby turning on the high-voltage MOSFET device.

[0068] After the turn-on dead time, the timing generation circuit outputs turn-on signals for the IGBT and low-voltage MOSFET. The IGBT drive circuit and the low-voltage MOSFET drive circuit pull up the gate-emitter / gate-source levels of the IGBT and low-voltage MOSFET, thereby turning on the IGBT and low-voltage MOSFET. Because the high-voltage MOSFET turns on before the IGBT, the stress on the IGBT during turn-on is relatively small, thus improving system reliability.

[0069] When the switching components need to be turned off, the turn-off dead time is advanced. The timing generation circuit outputs turn-off signals for the IGBT and low-voltage MOSFET. The IGBT drive circuit and the low-voltage MOSFET drive circuit pull down the gate-emitter / gate-source levels of the IGBT and low-voltage MOSFET, thereby turning off the IGBT and low-voltage MOSFET. At this time, the output voltage of the switching components is clamped by the high-voltage MOSFET, not exceeding the withstand voltage of the low-voltage MOSFET. Therefore, the low-voltage MOSFET can completely cut off the tail current of the IGBT, and the injected carriers in the IGBT can recombine rapidly. After the turn-off dead time, the timing generation circuit outputs a high-voltage MOSFET turn-off signal. The high-voltage MOSFET drive circuit pulls down the gate-source level of the high-voltage MOSFET, thereby turning off the high-voltage MOSFET. See the specific timing diagram below. Figure 5 As shown (excluding non-human-added control and drive delays).

[0070] like Figure 6 As shown, in some systems, the shutdown time may not be predictable. Therefore, optionally, the activation and shutdown times can be delayed by a preset time to ensure that the system's output always lags behind the input. The preset time can be set according to the actual situation.

[0071] When the switching assembly is turned on, the high-voltage MOSFET turns on first, followed by the IGBT and low-voltage MOSFET, achieving zero-voltage turn-on for the IGBT and improving system reliability. When the switching assembly is turned off, the high-voltage IGBT and low-voltage MOSFET turn off first. Because the low-voltage MOSFET has a higher withstand voltage than the high-voltage MOSFET at this time, it completely cuts off the tail current path of the IGBT, and no more carriers are injected into the IGBT drift region. At this point, the previously injected carriers recombine rapidly. Then, the high-voltage MOSFET turns off, and the collector-emitter voltage of the IGBT rises. By this time, the injected carriers in the IGBT drift region have almost completely recombinated, allowing the IGBT to achieve tail-current-free turn-off, thus eliminating losses caused by tail current.

[0072] Because the series low-voltage MOSFET device completely cuts off the path of the tail current of the IGBT device, the present invention can significantly shorten the time required for carrier recombination in the IGBT drift region, thereby allowing the use of a shorter turn-off dead time, and thus allowing for lower switching losses, lower conduction losses and higher reliability under the premise that switching losses, conduction losses and reliability are mutually constrained.

[0073] The above are merely embodiments of the present invention. The invention is not limited to the fields covered by these embodiments. Commonly known structures and characteristics in the solutions are not described in detail here. Those skilled in the art are aware of all common technical knowledge in the field prior to the application date or priority date, are able to access all existing technologies in that field, and have the ability to apply conventional experimental methods prior to that date. Those skilled in the art can, under the guidance of this application, improve and implement this solution in combination with their own capabilities. Some typical known structures or methods should not be obstacles for those skilled in the art to implement this application. It should be noted that those skilled in the art can make several modifications and improvements without departing from the structure of the present invention. These should also be considered within the scope of protection of the present invention, and will not affect the effectiveness of the implementation of the present invention or the practicality of the patent. The scope of protection claimed in this application should be determined by the content of its claims, and the specific embodiments described in the specification can be used to interpret the content of the claims.

Claims

1. A semiconductor switch assembly, characterized by The high-voltage non-tail current switch device, the low-voltage non-tail current switch device and the tail current switch device are connected in series, and the high-voltage non-tail current switch device is connected in parallel with the tail current switch device and the low-voltage non-tail current switch device in series; The high-voltage non-tail current switch device adopts a high-voltage MOSFET device, the low-voltage non-tail current switch device adopts a low-voltage MOSFET device, and the tail current switch device adopts an IGBT device; The timing generation circuit, the high-voltage MOSFET driving circuit and the low-voltage MOSFET driving circuit are further included; the output terminals of the timing generation circuit are connected with the input terminals of the low-voltage MOSFET driving circuit and the high-voltage MOSFET driving circuit respectively; The output terminal of the low-voltage MOSFET driving circuit is connected with the gate and the source of the low-voltage MOSFET device, and the output terminal of the high-voltage MOSFET driving circuit is connected with the gate and the source of the high-voltage MOSFET device.

2. The semiconductor switch assembly of claim 1, wherein: The IGBT driving circuit is a bias voltage power supply circuit, the gate of the IGBT device is connected with the IGBT driving circuit, and the emitter of the IGBT device is connected with the drain of the low-voltage MOSFET device.

3. The semiconductor switch assembly of claim 2, wherein: The high-voltage MOSFET driving circuit includes a driving resistor R2, a driving resistor R3, a balun L1, and a low-voltage P MOSFET Q1 and a low-voltage N MOSFET Q2; 4. The semiconductor switch assembly of claim 3, wherein: The low-voltage MOSFET driving circuit includes a driving resistor R5, a driving resistor R6, a balun L2, and a low-voltage P MOSFET Q3 and a low-voltage N MOSFET Q4; 5. The semiconductor switch assembly of claim 4, wherein: The source of the P MOSFET Q1 is connected with driving power supply, the gate is connected with the timing generation circuit, and the drain is connected with one end of the driving resistor R2; the source of the N MOSFET Q2 is grounded, the gate is connected with the timing generation circuit, and the drain is connected with one end of the driving resistor R3; the other ends of the driving resistor R2 and the driving resistor R3 are both connected with one positive input side of the balun L1; the other positive input side of the balun L1 is connected with the gate of the high-voltage MOSFET device, and one negative input side of the balun L1 is grounded; The source of the P MOSFET Q3 is connected with driving power supply, the gate is connected with the timing generation circuit, and the drain is connected with one end of the driving resistor R5; the source of the N MOSFET Q4 is grounded, the gate is connected with the timing generation circuit, and the drain is connected with one end of the driving resistor R6; The other ends of the driving resistor R5 and the driving resistor R6 are both connected with one positive input side of the balun L2; the other positive input side of the balun L2 is connected with the gate of the low-voltage MOSFET device, and one negative input side of the balun L2 is grounded; The other negative input side of the balun L1, the other negative input side of the balun L2, the source of the high-voltage MOSFET device and the source of the low-voltage MOSFET device are all connected with a negative output terminal; ​ ​ The collector of the IGBT device and the drain of the high-voltage MOSFET device are connected with the positive output terminal.

6. A method of controlling a semiconductor switch assembly using the switch assembly of any one of claims 1-5, characterized by, The application comprises the following contents: When the switch assembly needs to be turned on, the timing generation circuit outputs a high-voltage MOSFET on signal, and the high-voltage MOSFET drive circuit pulls up the gate-source level of the high-voltage MOSFET device, thereby turning on the high-voltage MOSFET device; After the turn-on dead zone, the timing generation circuit outputs IGBT and low-voltage MOSFET on signals, the IGBT drive circuit pulls up the gate-emitter level of the IGBT device, and the low-voltage MOSFET drive circuit pulls up the gate-source level of the low-voltage MOSFET device, thereby turning on the IGBT device and the low-voltage MOSFET device; When the switch assembly needs to be turned off, the timing generation circuit outputs IGBT and low-voltage MOSFET off signals, the IGBT drive circuit pulls down the gate-emitter level of the IGBT device, and the low-voltage MOSFET drive circuit pulls down the gate-source level of the low-voltage MOSFET device, thereby turning off the IGBT device and the low-voltage MOSFET device; After the turn-off dead zone, the timing generation circuit outputs a high-voltage MOSFET off signal, and the high-voltage MOSFET drive circuit pulls down the gate-source level of the high-voltage MOSFET device, thereby turning off the high-voltage MOSFET device.

7. The semiconductor switch assembly control method of claim 6, wherein: The application also comprises uniformly delaying the turn-on time and the turn-off time by a preset time.

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