A semiconductor laser with a strain asymmetric structure and a preparation method thereof

By designing an asymmetric waveguide layer and a strain-gradient barrier layer, the dislocation problem in high-In-component semiconductor lasers was solved, improving photoelectric conversion efficiency and reliability, and enabling efficient and stable operation of the laser.

CN114865455BActive Publication Date: 2025-11-07Shandong Huaguang Optoelectronics Co. Ltd.
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Patent Information

Application Number
CN202210422309.4
Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
Filing Date
2022-04-21
Publication Date
2025-11-07
Estimated Expiration
2042-04-21

AI Technical Summary

Technical Problem

Existing semiconductor lasers are prone to dislocations under high In composition conditions, which affects luminous efficiency and reliability. Existing strain compensation methods have failed to effectively solve the interface roughening and dislocation problems caused by lattice mismatch.

Method used

By employing an asymmetric waveguide layer and a strain-gradient barrier layer design, strain compensation and lattice mismatch are achieved through gradually changing Al and P compositions. Combined with a GaAs buffer layer to optimize the growth interface, the carrier confinement capability and the compression of optical field shift are increased.

Benefits of technology

It improves photoelectric conversion efficiency, reduces absorption loss, and enhances the reliability and operational stability of the laser.

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Abstract

The application discloses a semiconductor laser with a strain asymmetric structure, wherein the laser comprises, from bottom to top, a GaAs substrate, a GaAs transition layer, an Al x1 Ga 1‑x1 As lower graded layer, an Al x2 Ga 1‑x2 As lower confinement layer, an Al x3 Ga 1‑x3 As lower waveguide layer, an Al x4 Ga 1‑x4 As y1 P 1‑y1 barrier layer, a GaAs buffer layer, an In x5 Ga 1‑x5 As quantum well, an Al x6 Ga 1‑x6 As upper waveguide layer, an Al x7 Ga 1‑x7 As upper graded layer, an Al x8 Ga 1‑x8 As upper confinement layer, an Al x9 Ga 1‑x9 As upper graded layer and a GaAs cap layer. Through the design of the asymmetric waveguide layer and the confinement layer, the application increases the carrier confinement capability, compresses the light field offset to the N side, reduces the absorption loss, improves the conversion efficiency and working reliability.
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Description

TECHNICAL FIELD

[0001] The present application relates to the technical field of semiconductor laser, in particular to a semiconductor laser with asymmetric strain structure and a preparation method thereof. BACKGROUND

[0002] The information disclosed in the background of the present application is only intended to increase the understanding of the overall background of the present application and should not necessarily be regarded as acknowledging or implicitly suggesting that this information forms the prior art known to those skilled in the art.

[0003] Semiconductor lasers in the 800-1064nm band have wide applications in the fields of laser printing, gesture recognition, free space communication, fiber laser seed source, pumping of rare earth doped fiber lasers, solid state lasers and fiber amplifiers, etc. These applications all require the laser to have high output power and reliability. Semiconductor lasers based on InGaAs / GaAs quantum well material can obtain laser output in the wavelength range of 880-1060nm by adjusting the In composition in the quantum well and the thickness of the quantum well. However, when the output wavelength of the quantum well laser is greater than 1000nm, it is necessary to increase the In composition of the InGaAs / GaAs quantum well. Higher In composition can make the thickness of the grown quantum well close to the critical thickness of the material, and thus easily generate a higher proportion of dislocation lines, reducing the light emitting efficiency of the material. Meanwhile, the large strain formed by high In composition can accelerate the growth of dislocation lines during the use of the laser, thereby affecting the reliability of the laser.

[0004] To overcome the above problems, existing documents propose to use a tensilely strained GaAsP barrier layer to strain compensate the InGaAs quantum well, solving the influence of large strain on the reliability of the laser. However, the large lattice mismatch between the InGaAs / GaAsP well and the barrier can easily lead to interface roughening, generating dislocations and reducing the light emitting efficiency, affecting the reliability. Another document proposes to insert a very thin GaAs buffer layer at the growth interface, which can optimize the growth interface and reduce the roughness. However, when the thickness of the GaAs is thin, it cannot solve the dislocations caused by the large lattice mismatch, and when the thickness of the GaAs is thick, it will replace GaAsP as the barrier layer, which cannot play a strain compensation role. Chinese patent CN201210380805.4 discloses an asymmetric waveguide 1060nm semiconductor laser structure, which selects an InGaAsP material system with small conduction band difference on the N surface and an AlGaAs material system with large conduction band difference on the P surface, reduces the voltage drop of the device, increases the restriction of the injection carriers by the restriction structure, and improves the injection efficiency and output power of the device. However, the problem of the influence of large high strain of In composition on the growth quality of the material is still not solved. SUMMARY

[0005] In view of the above problems, the present application provides a semiconductor laser with a strain asymmetric structure and a preparation method thereof. The present application realizes a high electro-optical conversion efficiency laser design through the design of an asymmetric waveguide layer and a strain gradient barrier layer. To achieve the above purpose, the present application discloses the technical solutions shown below.

[0006] In the first aspect of the present application, a semiconductor laser with a strain asymmetric structure is disclosed, which comprises, from bottom to top, a GaAs substrate, a GaAs transition layer, an Al x1 Ga 1-x1 As lower gradient layer, an Al x2 Ga 1-x2 As lower confinement layer, an Al x3 Ga 1-x3 As waveguide layer, an Al x4 Ga 1-x4 As y1 P 1-y1 barrier layer, a GaAs buffer layer, an In x5 Ga 1-x5 As quantum well, an Al x6 Ga 1-x6 As upper waveguide layer, an Al x7 Ga 1-x7 As upper gradient layer, an Al x8 Ga 1-x8 As upper confinement layer, an Al x9 Ga 1-x9 As upper gradient layer and a GaAs cap layer.

[0007] Among them, x1 in the Al x1 Ga 1-x1 As lower gradient layer gradually changes from its lower limit value to the value of x2 from bottom to top. x4 in the Al x4 Ga 1-x4 As y1 P 1-y1 barrier layer and x3 in the Al x3 Ga 1-x3 As waveguide layer have the same value, and y1 gradually changes from high to low from bottom to top. x7 in the Al x7 Ga 1-x7 As upper gradient layer gradually changes from the value of x6 to the value of x8 from bottom to top. x4 in the Al x9 Ga 1-x9As lower graded layer x9 from bottom to top by the value of x8 gradually to the lower limit value of x9. And, the value of x3, x6, x8 increases in turn, namely the lower waveguide layer adopts low Al component of AlGaAs, the upper waveguide layer improves Al component in AlGaAs, increases the restriction to the carrier, improves the photoelectric conversion efficiency; the upper restriction layer adopts high Al component of AlGaAs, to compress the light field to N side offset, reduce the absorption loss. At the same time, due to the value of x6 is greater than x3, the upper waveguide layer and the lower waveguide layer show the characteristics of asymmetric design. In addition, the value of x2 is less than the value of x8, so that the lower restriction layer and the upper restriction layer also show the characteristics of asymmetric design, which can effectively increase the carrier restriction ability, compress the light field to N side offset, reduce the absorption loss, and improve the photoelectric conversion efficiency.

[0008] Further, in the laser, 0.03≤x1≤0.25, 0.1≤x2≤0.25, 0.03≤x3≤0.07, 0.03≤x4≤0.07, 0.75≤y1≤0.95, 0.2≤x5≤0.3, 0.1≤x6≤0.2, 0.1≤x7≤0.6, 0.4≤x8≤0.6, 0.03≤x9≤0.6.

[0009] Further, in the laser, the Al x1 Ga 1-x1 As lower graded layer x1 from bottom to top by 0.03 to 0.25, namely Al x1 Ga 1-x1 The lower limit value of x1 in the upper layer of Al

[0010] Further, in the laser, the Al x4 Ga 1-x4 As y1 P 1-y1 Barrier layer x4 and Al x3 Ga 1-x3 As lower waveguide layer x3 value is the same, y1 from bottom to top by 0.95 to 0.75, so that Al x4 Ga 1-x4 As y1 P 1-y1 The tensile strain gradually decreases during the growth of Al

[0011] Further, in the laser, the Al x7 Ga 1-x7x7 in the As upper graded layer gradually changes from 0.1 to 0.6 from bottom to top, i.e. gradually changes from the value of x6 to the value of x8, so as to reduce the voltage rise caused by band gap transition, and meanwhile improve the carrier collection efficiency by using the graded structure.

[0012] Further, in the laser, the Al x9 Ga 1-x9 x9 in the As upper graded layer gradually changes from 0.6 to 0.03 from bottom to top, i.e. gradually changes from the value of the lower layer to the value of the upper layer, so as to reduce the voltage rise caused by band gap transition. x8 Ga 1-x8 The value of x8 in the As upper confinement layer gradually changes to 0.03, so as to reduce the voltage rise caused by band gap transition.

[0013] In the second aspect of the present application, a preparation method of the semiconductor laser with the strained asymmetric structure is disclosed, comprising the following steps:

[0014] S1: placing a GaAs substrate in a growth chamber, baking after temperature rising in H2 environment, and inputting AsH3 atmosphere to perform surface thermal treatment on the GaAs substrate.

[0015] S2: continuing to input TMGa and AsH3 atmosphere after reducing the temperature in the growth chamber, and growing a GaAs transition layer on the GaAs substrate.

[0016] S3: inputting TMAl, TMGa and AsH3 atmosphere, and growing an Al x1 Ga 1-x1 As lower graded layer, and adjusting the Al component in the growth process by changing the flow of Al and Ga.

[0017] S4: inputting TMAl, TMGa and AsH3 atmosphere, and growing an Al x2 Ga 1-x2 As lower confinement layer.

[0018] S5: inputting TMAl, TMGa and AsH3 atmosphere, and growing an Al x3 Ga 1-x3 As lower waveguide layer.

[0019] S6: inputting TMAl, TMGa, AsH3 and PH3 atmosphere, and growing an Al x4 Ga 1-x4 As y1 P 1-y1 barrier layer. In this process, the PH3 incorporation amount is reduced with the temperature reduction, and meanwhile the PH3 flow is reduced to gradually change the P content from high to low, gradually reduce the strain, and reduce the lattice constant mismatch with the GaAs buffer layer.

[0020] S7: Introduce AsH3 atmosphere to stop growth of the barrier layer and to eliminate PH3 in the reaction chamber to reduce the formation of GaAsP phase during growth of the GaAs buffer layer.

[0021] S8: Introduce TMGa and AsH3 atmosphere to grow GaAs buffer layer on the barrier layer to reduce interface roughness and reduce dislocations caused by lattice mismatch between well and barrier.

[0022] S9: Introduce TMGa, TMIn and AsH3 atmosphere to grow In x5 Ga 1-x5 As quantum well on the buffer layer.

[0023] S10: Introduce TMAl, TMGa and AsH3 atmosphere to grow Alx6Ga1-x6As upper waveguide layer on the quantum well.

[0024] S11: Introduce TMAl, TMGa and AsH3 atmosphere to grow Al x7 Ga 1-x7 As upper graded layer by increasing TMAl flow and decreasing TMGa flow during growth to realize the value of x7 in the Al x7 Ga 1-x7 As upper graded layer gradually changes from low to high from bottom to top to reduce voltage rise caused by band gap discontinuity between upper confinement layer and upper waveguide layer.

[0025] S12: Introduce TMAl, TMGa and AsH3 atmosphere to grow Al x7 Ga 1-x7 As upper graded layer on the Al x8 Ga 1-x8 As upper confinement layer.

[0026] S13: Introduce TMAl, TMGa and AsH3 atmosphere to grow Al x9 Ga 1-x9 As upper graded layer by decreasing TMAl flow and increasing TMGa flow during growth to realize the value of x9 in the Al x9 Ga 1-x9 As upper graded layer gradually changes from high to low to reduce band gap discontinuity between upper confinement layer and cap layer.

[0027] S14: Introduce TMGa and AsH3 atmosphere to grow GaAs cap layer on the Al x9 Ga 1-x9 As upper graded layer.

[0028] Further, the temperature in S1, S11 and S12 is 680±10℃, the temperature in S2-S5 and S10 is 640±10℃, the temperature in S6-S9 and S13 is 600±10℃, and the temperature in S4 is 540±10℃.

[0029] Further, in S2, the doping concentration of Si atoms or Te atoms in the GaAs transition layer is 1E18-3E18 atoms / cm 3 , and the thickness is 0.1-0.3 μm.

[0030] Further, in S3, the thickness of the Al x1 Ga 1-x1 As lower graded layer is 0.1-0.4 μm, and the doping concentration of Si atoms or Te atoms is 5E17-2E18 atoms / cm 3 , wherein x1 is graded from a lower limit value to a value in the Al x2 Ga 1-x2 As lower confining layer.

[0031] Further, in S4, the thickness of the Al x2 Ga 1-x2 As lower confining layer is 1.0-2.5 μm, and the doping concentration is 5E17-2E18 atoms / cm 3 .

[0032] Further, in S5, the thickness of the Al x3 Ga 1-x3 As lower waveguide layer is 0.5-1.5 μm, and the portion of the lower waveguide layer contacting the lower confining layer is doped with Si or Te atoms to form a doped layer to reduce the series resistance. Preferably, the doping concentration of the Si or Te atoms is 5E16-2E17 atoms / cm3, and the thickness of the doped atom layer is 1 / 3-2 / 3 of the thickness of the lower waveguide layer.

[0033] Further, in S6, the thickness of the Al x4 Ga 1-x4 As y1 P 1-y1 barrier layer is 6-10 nm and is unintentionally doped, wherein x4 is the same as x3, and y1 is graded from low to high. During temperature reduction, the flow ratio of PH3 / AsH3 is graded from 12 to 2 to reduce the P content, reduce the strain, and reduce the lattice difference between the Al x4 Ga 1-x4 As y1 P 1-y1 barrier layer and the GaAs buffer layer.

[0034] Further, in the S8, the thickness of the GaAs buffer layer is 1-5 nm, and it is unintentionally doped.

[0035] Further, in the S9, In x5 Ga 1-x5 The thickness of the Alx5Ga

[0036] Further, in the S10, Alx6Ga 1-x6 As upper waveguide layer is 0.2-0.5 μm, and it is unintentionally doped. Wherein, 0.1≤x6≤0.2. By increasing the Al component in the Alx6Ga 1-x6 As upper waveguide layer, the confinement of the carriers is increased, and the photoelectric conversion efficiency is improved.

[0037] Further, in the S11, Al x7 Ga 1-x7 The thickness of the Alx7Ga 3 As upper graded layer is 0.1-0.3 μm. Wherein, the original doping concentration of C atoms in the upper graded layer is 5E17-1E18 atoms / cm 3 . By increasing the TMAl flow and reducing the TMGa flow during the growth process, the value of x7 of the upper graded layer is gradually changed from the value of x6 of the upper waveguide layer to the value of x8 of the upper confinement layer; so as to reduce the voltage rise caused by the high band gap difference.

[0038] Further, in the S12, Al x8 Ga 1-x8 The thickness of the Alx7Ga 3 As upper confinement layer is 0.5-1.0 μm, wherein the doping concentration of C atoms is 5E17-2E18 atoms / cm 3 , and 0.4≤x7≤0.6. The Al component in the upper confinement layer is higher than that in the lower confinement layer, so that the lower confinement layer and the upper confinement layer also have the feature of asymmetric design, thereby compressing the light field to the N side and reducing the absorption loss.

[0039] Further, in the S13, the Al x9 Ga 1-x9 The thickness of the Alx9Ga 3 As upper graded layer is 0.1-0.3 μm, wherein the doping concentration of C atoms is 5E17-2E18 atoms / cm 3 . The value of x9 is gradually changed from the value of x8 of the upper confinement layer to the lower limit value of x9, so as to reduce the voltage rise caused by the high band gap difference.

[0040] Furthermore, in S14, the thickness of the cap layer is 0.1–0.5 μm, wherein the C atom doping concentration is 4E19–1E20 atoms / cm². 3 .

[0041] Compared with the prior art, the present invention has the following beneficial effects:

[0042] Compared to existing lasers, the laser of this invention has Al x1 Ga 1-x1 In the gradient layer below As, x1 gradually changes from its lower limit value to the value of x2 from bottom to top. x4 Ga 1-x4 As y1 P 1-y1 x4 and Al in the barrier layer x3 Ga 1-x3 In the lower waveguide layer As, the x3 value is the same, and the y1 gradually decreases from high to low from bottom to top. x7 Ga 1-x7 In the gradient layer on As, x7 gradually changes from the value of x6 to the value of x8 from bottom to top. (The last part, "Al," appears to be a fragment and doesn't translate directly.) x9 Ga 1-x9 In the gradient layer of AlGaAs, x9 gradually changes from the value of x8 to the lower limit of x9 from bottom to top. Furthermore, the values ​​of x3, x6, and x8 increase sequentially. This means that the lower waveguide layer uses AlGaAs with a low Al content, while the upper waveguide layer increases the Al content in AlGaAs, increasing carrier confinement and improving photoelectric conversion efficiency. The upper confinement layer uses AlGaAs with a high Al content to compress the light field towards the N-side, reducing absorption loss. Simultaneously, since the value of x6 is greater than x3, the upper and lower waveguide layers exhibit an asymmetric design. Additionally, the value of x2 is less than the value of x8, further contributing to the asymmetric design of the lower and upper confinement layers. This asymmetric design effectively increases carrier confinement, compresses the light field towards the N-side, reduces absorption loss, and improves photoelectric conversion efficiency.

[0043] In summary, this invention enhances carrier confinement capability and compresses the optical field towards the N-side through the design of an asymmetric waveguide layer and confinement layer, thereby reducing absorption loss and improving photoelectric conversion efficiency. Simultaneously, this invention utilizes Al with a gradually decreasing P-component. x4 Ga 1-x4 As y1 P 1-y1 A barrier layer is formed, and a GaAs buffer layer is grown to achieve strain compensation while reducing dislocations caused by lattice mismatch, thereby improving conversion efficiency and operational reliability. Attached Figure Description

[0044] The accompanying drawings, which form a part of this specification, are included to provide a further understanding of the application and are incorporated in and constitute a part of this specification. The embodiments of the application, and their

[0045] Figure 1 is a structure schematic diagram of a strained asymmetric structure semiconductor laser in the embodiments of the application.

[0046] Figure 2 is a bar test result of the strained asymmetric structure semiconductor laser (b figure) of embodiment 1 of the application and the conventional semiconductor laser (a figure) of the comparative example.

[0047] The above Figure 1 The numerals marked respectively represent: 1 - GaAs substrate, 2 - GaAs transition layer, 3 - Al x1 Ga 1-x1 As lower graded layer, 4 - Al x2 Ga 1-x2 As lower confinement layer, 5 - Al x3 Ga 1-x3 As lower waveguide layer, 6 - Al x4 Ga 1-x4 As y1 P 1-y1 barrier layer, 7 - GaAs buffer layer, 8 - In x5 Ga 1-x5 As quantum well, 9 - Al x6 Ga 1-x6 As upper waveguide layer, 10 - Al x7 Ga 1-x7 As upper graded layer, 11 - Al x8 Ga 1- x8 As upper confinement layer, 12 - Al x9 Ga 1-x9 As upper graded layer, 13 - GaAs cap layer. DETAILED DESCRIPTION

[0048] It should be noted that the following detailed description is illustrative only, and is intended to provide further description of the application. Unless otherwise defined, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this application belongs.

[0049] It is to be understood that the terminology used herein is for the purpose of describing particular embodiments only and is not intended to be limiting of example embodiments in accordance with the present application. As used herein, the singular forms "a", "an" and "the" are intended to include the plural forms as well, unless the context clearly indicates otherwise. It will be further understood that the terms "comprises" and / or "comprising," when used in this specification, specify the presence of stated features, steps, operations, elements, components, and / or groups thereof, but do not preclude the presence or addition of one or more other features, steps, operations, elements, components, and / or groups thereof.

[0050] For the convenience of description, if the terms "upper", "lower", "left", "right" are used in the present application, they only mean the same direction as the upper, lower, left and right directions of the drawings themselves, and do not limit the structure, but only for the convenience of describing the present application and simplifying the description, and are not intended to indicate or imply that the device or element referred to has a specific orientation, is constructed and operated in a specific orientation, and therefore cannot be understood as a limitation on the present application. The technical solutions of the present application will be further described in conjunction with the drawings and specific embodiments of the present application.

[0051] Example 1

[0052] A method for preparing a semiconductor laser with a strain asymmetric structure, comprising the following steps:

[0053] S1, placing a GaAs substrate 1 in a MOCVD device growth chamber, baking in a H2 environment to 680±10℃, and passing in AsH3 to perform surface thermal treatment on the GaAs substrate 1.

[0054] S2, slowly reducing the temperature to 640±10℃ at a rate of 60℃ / min, continuing to pass in TMGa and AsH3, and growing a GaAs transition layer 2 on the GaAs substrate 1, with a thickness of 0.2μm and a Si atomic doping concentration of 2E18 atoms / cm 3 .

[0055] S3, maintaining the temperature at 640±10℃, passing in TMAl, TMGa and AsH3, and growing an Al x1 Ga 1-x1 As lower graded layer 3 on the lower transition layer, gradually changing the TMAl flow from 3.12 to 15.6sccm and the TMGa flow from 35.4 to 31sccm, gradually changing the Al composition x1 from 0.03 to 0.15, growing a thickness of 0.2μm, and Si doping concentration of 1.5E18 atoms / cm 3 .

[0056] S4, maintaining the temperature at 640±10℃, passing in TMAl, TMGa and AsH3, and growing an Al x2 Ga 1-x2As lower confining layer 4, x2 is 0.15, growth thickness is 1.5 μm, Si doping concentration is 1.2E18 atoms / cm 3 .

[0057] S5, temperature is kept at 640±10℃, TMAl, TMGa and AsH3 are input, Al x3 Ga 1-x3 As lower waveguide layer 5, x3 is 0.05, growth thickness is 0.8 μm, doping is close to lower confining layer 0.5 μm, Si doping concentration is 1E17 atoms / cm 3 .

[0058] S6, temperature is gradually changed from 640±10℃ to 600±10℃, TMAl, TMGa, AsH3 and PH3 are input, Al x4 Ga 1-x4 As y1 P 1-y1 Barrier layer 6, in this process, as the temperature decreases, the PH3 incorporation decreases, at the same time, the PH3 flow is gradually changed from 600 to 100 sccm, the P content is gradually changed from high to low, the strain is gradually reduced, the lattice constant mismatch with GaAs buffer layer 7 is reduced, x4 is 0.05, growth thickness is 8 nm, y1 is gradually changed from 0.75 to 0.95.

[0059] S7, temperature is kept at 600±10℃, AsH3 is input, the growth of the barrier layer 6 is stopped, the PH3 atmosphere in the reaction chamber is excluded, and the formation of GaAsP phase in the growth process of GaAs is reduced.

[0060] S8, temperature is kept at 600±10℃, TMGa and AsH3 are input, GaAs buffer layer 7 is grown on the barrier layer to reduce interface roughness and reduce dislocations caused by well-barrier lattice mismatch, growth thickness is 2 nm.

[0061] S9, temperature is kept at 600±10℃, TMGa, TMIn and AsH3 are input, In x5 Ga 1-x5 As quantum well 8, x5 is 0.26, growth thickness is 8 nm.

[0062] S10, temperature is gradually changed to 640±10℃, TMAl, TMGa and AsH3 are input, Al x6 Ga 1-x6 As upper waveguide layer 9, x6 is 0.15, carrier confinement ability is improved, growth thickness is 0.3 μm.

[0063] S11, temperature is gradually changed to 680±10℃, TMAl, TMGa and AsH3 are inputted, and Al x7 Ga 1-x7 As upper graded layer 10, TMAl flow is gradually changed from 15.6 to 57.2 sccm, TMGa flow is gradually changed from 31 to 16.4 sccm during the growth process, x7 is gradually changed from 0.15 to 0.55, the band gap discontinuity of the upper confining layer and the upper waveguide layer is reduced, the voltage rise caused thereby is reduced, the growth thickness is 0.2 μm, and the C atom doping concentration is 7E17 atoms / cm 3 .

[0064] S12, temperature is kept at 680±10℃, TMAl, TMGa and AsH3 are inputted, and Al x8 Ga 1-x8 As upper confining layer 11, x8 is 0.55, the non-symmetrical structure is used to compress the light field to offset to the N side, the absorption loss is reduced, and the photoelectric conversion efficiency is improved, the growth thickness is 0.6 μm, and the C atom doping concentration is 1.4E18 atoms / cm 3 .

[0065] S13, temperature is gradually changed to 600±10℃, TMAl, TMGa and AsH3 are inputted, and Al x9 Ga 1-x9 As upper graded layer 12, TMAl flow is gradually changed from 57.2 to 3.12 sccm, TMGa flow is gradually changed from 16.4 to 35.4 sccm during the growth process, x9 is gradually changed from 0.55 to 0.03, the band gap discontinuity of the upper confining layer and the cap layer is reduced, the growth thickness is 0.2 μm, and the C atom doping concentration is 1.4E18 atoms / cm 3 .

[0066] S14, temperature is reduced to 540±10℃, TMGa and AsH3 are continuously inputted, and GaAs cap layer 13 is grown on the upper graded layer 12, the growth thickness is 0.2 μm, and the C atom doping concentration is 7E19 atoms / cm 3 The obtained strained non-symmetrical structure semiconductor laser is as shown in Figure 1 .

[0067] Example 2

[0068] A preparation method of a strained non-symmetrical structure semiconductor laser, comprising the following steps:

[0069] S1, GaAs substrate 1 is placed in a growth chamber of a MOCVD device, H2 environment is heated to 680±10℃ for baking, and AsH3 is inputted to perform surface thermal treatment on the GaAs substrate 1.

[0070] S2, the temperature is slowly decreased to 640±10°C at a rate of 60°C / min, TMGa and AsH3 are continuously introduced, and a GaAs transition layer 2 with a thickness of 0.3 μm and a Si atomic doping concentration of 3E18 atoms / cm 3 .

[0071] S3, the temperature is kept at 640±10°C, TMAl, TMGa and AsH3 are introduced, and an Al x1 Ga 1-x1 As graded layer 3 is grown on the lower transition layer 2, the TMAl flow is gradually changed from 3.12 to 10.4 sccm, the TMGa flow is gradually changed from 35.4 to 32.9 sccm, the Al component x1 is gradually changed from 0.03 to 0.1 during the growth, the growth thickness is 0.1 μm, and the Si doping concentration is 2E18 atoms / cm 3 .

[0072] S4, the temperature is kept at 640±10°C, TMAl, TMGa and AsH3 are introduced, and an Al x2 Ga 1-x2 As confinement layer 4 is grown on the lower graded layer 3, x2 is 0.1, the growth thickness is 2.5 μm, and the Si doping concentration is 1.5E18 atoms / cm 3 .

[0073] S5, the temperature is kept at 640±10°C, TMAl, TMGa and AsH3 are introduced, and an Al x3 Ga 1-x3 As waveguide layer 5 is grown on the lower confinement layer 4, x3 is 0.03, the growth thickness is 1 μm, and the doping is 0.6 μm close to the lower confinement layer, and the Si doping concentration is 1.5E17 atoms / cm 3 .

[0074] S6, the temperature is gradually changed to 600±10°C, TMAl, TMGa, AsH3 and PH3 are introduced, and an Al x4 Ga 1-x4 As y1 P 1-y1 barrier layer 6 is grown on the lower waveguide layer 5, during this process, as the temperature decreases, the PH3 incorporation decreases, at the same time, the PH3 flow is gradually changed from 600 to 200 sccm, the P content is gradually changed from high to low, the strain is gradually reduced, the lattice constant mismatch with the GaAs buffer layer 7 is reduced, x4 is 0.03, the growth thickness is 10 nm, and y1 is gradually changed from 0.75 to 0.9.

[0075] S7, temperature is kept at 600±10℃, AsH3 is introduced to stop the growth of the barrier layer 6, PH3 atmosphere in the reaction chamber is removed to reduce the formation of GaAsP phase during the growth of GaAs.

[0076] S8, temperature is kept at 600±10℃, TMGa and AsH3 are introduced to grow the GaAs buffer layer 7 on the barrier layer 6, reduce the interface roughness, reduce the dislocation caused by the lattice mismatch of the well and barrier, and the growth thickness is 3nm.

[0077] S9, temperature is kept at 600±10℃, TMGa, TMIn and AsH3 are introduced to grow the In x5 Ga 1-x5 As quantum well 8, x5 is 0.26, and the growth thickness is 8nm.

[0078] S10, temperature is gradually changed to 640±10℃, TMAl, TMGa and AsH3 are introduced to grow the Al x6 Ga 1-x6 As upper waveguide layer 9, x6 is 0.1, the carrier confinement ability is improved, and the growth thickness is 0.5μm.

[0079] S11, temperature is gradually changed to 680±10℃, TMAl, TMGa and AsH3 are introduced to grow the Al x7 Ga 1-x7 As upper graded layer 10, the TMAl flow is gradually changed from 10.4 to 62.4sccm, the TMGa flow is gradually changed from 32.9 to 14.6sccm, x7 is gradually changed from 0.1 to 0.6, the voltage rise caused by the band gap discontinuity of the upper confinement layer and the upper waveguide layer is reduced, the growth thickness is 0.1μm, and the C atom doping concentration is 1E18 atoms / cm 3 .

[0080] S12, temperature is kept at 680±10℃, TMAl, TMGa and AsH3 are introduced to grow the Al x8 Ga 1-x8 As upper confinement layer 11, x8 is 0.6, the non-symmetrical structure is used to compress the light field to the N side, reduce the absorption loss, and improve the photoelectric conversion efficiency, the growth thickness is 0.5μm, and the C atom doping concentration is 2E18 atoms / cm 3 .

[0081] S13, temperature is gradually changed to 600±10℃, TMAl, TMGa and AsH3 are introduced to grow the Al x9 Ga 1-x9As the upper graded layer 12, the TMAl flow rate is gradually changed from 62.4 to 3.12 sccm and the TMGa flow rate is gradually changed from 14.6 to 35.4 sccm during the growth process, so that x9 is gradually changed from 0.6 to 0.03, the band gap discontinuity between the upper confining layer and the cap layer is reduced, the growth thickness is 0.1 μm, and the C atom doping concentration is 2E18 atoms / cm 3 .

[0082] S14, the temperature is reduced to 540±10℃, TMGa and AsH3 continue to be introduced, and a GaAs cap layer 13 is grown on the upper graded layer 12, the growth thickness is 0.15 μm, and the C atom doping concentration is 5E19 atoms / cm 3 The obtained strained asymmetric structure semiconductor laser is as shown in Figure 1 .

[0083] Example 3

[0084] A preparation method of a strained asymmetric structure semiconductor laser, comprising the following steps:

[0085] S1, a GaAs substrate 1 is placed in a growth chamber of a MOCVD device, the H2 environment is heated to 680±10℃ for baking, and AsH3 is introduced to perform surface thermal treatment on the GaAs substrate 1.

[0086] S2, the temperature is slowly reduced to 640±10℃ at a rate of 60℃ / min, TMGa and AsH3 continue to be introduced, and a GaAs transition layer 2 is grown on the GaAs substrate 1, the thickness is 0.3 μm, and the Si atom doping concentration is 3E18 atoms / cm 3 .

[0087] S3, the temperature is kept at 640±10℃, TMAl, TMGa and AsH3 are introduced, and Al x1 Ga 1-x1 As lower graded layer 3, the TMAl flow rate is gradually changed from 3.12 to 26 sccm and the TMGa flow rate is gradually changed from 35.4 to 27.4 sccm, so that the Al component x1 is gradually changed from 0.03 to 0.25 during the growth process, the growth thickness is 0.4 μm, and the Si doping concentration is 2E18 atoms / cm 3 .

[0088] S4, the temperature is kept at 640±10℃, TMAl, TMGa and AsH3 are introduced, and Al x2 Ga 1-x2 As lower confining layer 4, x2 is 0.25, the growth thickness is 1 μm, and the Si doping concentration is 5E17 atoms / cm 3 .

[0089] S5, temperature is kept at 640±10℃, TMAl, TMGa and AsH3 are inputted, Al x3 Ga 1-x3 As lower waveguide layer 5, x3 is 0.07, growth thickness is 0.5μm, doping is close to lower limiting layer 0.3μm, Si doping concentration is 5E16 atoms / cm 3 .

[0090] S6, temperature is gradually changed to 600±10℃, TMAl, TMGa, AsH3 and PH3 are inputted, Al x4 Ga 1-x4 As y1 P 1-y1 Barrier layer 6, in this process, as the temperature decreases, the PH3 incorporation decreases, at the same time, the PH3 flow is gradually changed from 600 to 200sccm, the P content is gradually changed from high to low, the strain is gradually reduced, the lattice constant mismatch with GaAs buffer layer 7 is reduced, x4 is 0.07, growth thickness is 10nm, y1 is gradually changed from 0.75 to 0.95.

[0091] S7, temperature is kept at 600±10℃, AsH3 is inputted, the barrier layer 6 is stopped growing, the PH3 atmosphere in the reaction chamber is excluded, the formation of GaAsP phase in the GaAs growth process is reduced.

[0092] S8, temperature is kept at 600±10℃, TMGa and AsH3 are inputted, GaAs buffer layer 7 is grown on the barrier layer 6, the interface roughness is reduced, the dislocation caused by the lattice mismatch of well and barrier is reduced, growth thickness is 5nm.

[0093] S9, temperature is kept at 600±10℃, TMGa, TMIn and AsH3 are inputted, In x5 Ga 1-x5 As quantum well 8, x5 is 0.3, growth thickness is 6nm.

[0094] S10, temperature is gradually changed to 640±10℃, TMAl, TMGa and AsH3 are inputted, Al x6 Ga 1-x6 As upper waveguide layer 9, x6 is 0.2, carrier confinement ability is improved, growth thickness is 0.2μm.

[0095] S11, temperature is gradually changed to 680±10℃, TMAl, TMGa and AsH3 are inputted, Al x7 Ga 1-x7As the upper graded layer 10, the TMAl flow rate is gradually changed from 10.4 to 62.4 sccm, and the TMGa flow rate is gradually changed from 32.9 to 14.6 sccm during the growth process, so that x7 is gradually changed from 0.1 to 0.6, the band gap discontinuity of the upper confining layer and the upper waveguide layer is reduced, the voltage rise caused thereby is reduced, the growth thickness is 0.1 μm, and the C atom doping concentration is 5E17 atoms / cm 3 .

[0096] S12, the temperature is kept at 680±10℃, TMAl, TMGa and AsH3 are introduced, and Al x8 Ga 1-x8 As the upper confining layer 11, x8 is 0.6, the non-symmetrical structure is used to design the compression optical field to be offset to the N side, the absorption loss is reduced, the photoelectric conversion efficiency is improved, the growth thickness is 1 μm, and the C atom doping concentration is 5E17 atoms / cm 3 .

[0097] S13, the temperature is gradually changed to 600±10℃, TMAl, TMGa and AsH3 are introduced, and Al x9 Ga 1-x9 As the upper graded layer 12, the TMAl flow rate is gradually changed from 62.4 to 3.12 sccm, and the TMGa flow rate is gradually changed from 14.6 to 35.4 sccm during the growth process, so that x9 is gradually changed from 0.6 to 0.03, the band gap discontinuity of the upper confining layer and the cap layer is reduced, the growth thickness is 0.3 μm, and the C atom doping concentration is 5E17 atoms / cm 3 .

[0098] S14, the temperature is reduced to 540±10℃, TMGa and AsH3 are continuously introduced, and the GaAs cap layer 13 is grown on the upper graded layer 12, the growth thickness is 0.5 μm, and the C atom doping concentration is 1E20 atoms / cm 3 The obtained strained non-symmetrical structure semiconductor laser is as shown in Figure 1 .

[0099] Comparative Example 1

[0100] A preparation method of a waveguide layer symmetrical structure semiconductor laser, in which the waveguide layer thickness and composition are symmetrically arranged, comprises the following steps:

[0101] S1, the GaAs substrate 1 is placed in a growth chamber of a MOCVD device, is baked at 680±10℃ in an H2 environment, and is subjected to surface thermal treatment by introducing AsH3.

[0102] S2, the temperature is slowly decreased to 640±10℃ at a rate of 60℃ / min, TMGa and AsH3 are continuously introduced, a GaAs transition layer 2 is grown on the GaAs substrate 1, with a thickness of 0.3μm and a Si atomic doping concentration of 3E18 atoms / cm 3 .

[0103] S3, the temperature is kept at 640±10℃, TMAl, TMGa and AsH3 are introduced, an Al x1 Ga 1-x1 As lower graded layer 3 is grown on the lower transition layer 2, TMAl flow is graded from 3.12 to 10.4sccm, TMGa flow is graded from 35.4 to 32.9sccm, x1 is graded from 0.03 to 0.1, the layer has a thickness of 0.1μm and a Si doping concentration of 2E18 atoms / cm 3 .

[0104] S4, the temperature is kept at 640±10℃, TMAl, TMGa and AsH3 are introduced, an Al x2 Ga 1-x2 As lower confinement layer 4 is grown on the lower graded layer 3, x2 is 0.1, the layer has a thickness of 2μm and a Si doping concentration of 1.5E18 atoms / cm 3 .

[0105] S5, the temperature is kept at 640±10℃, TMAl, TMGa and AsH3 are introduced, an Al x3 Ga 1-x3 As lower waveguide layer 5 is grown on the lower confinement layer 4, x3 is 0.03, the layer has a thickness of 0.5μm, 0.3μm of the layer is doped near the lower confinement layer, and the Si doping concentration is 1.5E17 atoms / cm 3 .

[0106] S6, the temperature is graded to 600±10℃, TMAl, TMGa, AsH3 and PH3 are introduced, an Al x4 Ga 1-x4 As y1 P 1-y1 barrier layer 6 is grown on the lower waveguide layer 5, during the process, as the temperature decreases, the PH3 incorporation decreases, at the same time, the PH3 flow is graded from 600 to 200sccm, the P content is graded from high to low, the strain gradually decreases, the lattice constant mismatch with the GaAs buffer layer 77 is reduced, x4 is 0.03, the layer has a thickness of 10nm, and y1 is graded from 0.75 to 0.95.

[0107] S7, the temperature is kept at 600±10℃, AsH3 is introduced to stop the growth of the barrier layer 6, the PH3 atmosphere in the reaction chamber is removed, and the formation of GaAsP phase during the growth of GaAs is reduced.

[0108] S8, temperature is kept at 600±10℃, TMGa, AsH3 are introduced, GaAs buffer layer 7 is grown on the barrier layer 6, interface roughness is reduced, dislocation caused by well-barrier lattice mismatch is reduced, and the growth thickness is 3nm.

[0109] S9, temperature is kept at 600±10℃, TMGa, TMIn and AsH3 are introduced, In x5 Ga 1-x5 As quantum well 8, x5 is 0.26, and the growth thickness is 8nm.

[0110] S10, temperature is gradually changed to 640±10℃, TMAl, TMGa and AsH3 are introduced, Al x6 Ga 1-x6 As upper waveguide layer 9, x6 is 0.03, and the growth thickness is 0.5μm.

[0111] S11, temperature is gradually changed to 680±10℃, TMAl, TMGa and AsH3 are introduced, Al x7 Ga 1-x 7 As upper graded layer 10, TMAl flow is gradually changed from 10.4 to 62.4sccm, TMGa flow is gradually changed from 35.4 to 14.6sccm, x7 is gradually changed from 0.1 to 0.6, band gap discontinuity of upper confinement layer 11 and upper waveguide layer is reduced, voltage rise caused by the band gap discontinuity is reduced, the growth thickness is 0.1μm, and C atom doping concentration is 1E18 atoms / cm 3 .

[0112] S12, temperature is kept at 680±10℃, TMAl, TMGa and AsH3 are introduced, Al x8 Ga 1-x8 As upper confinement layer 11, x8 is 0.6, the asymmetric structure is used to compress the light field to the N side, absorption loss is reduced, and photoelectric conversion efficiency is improved, the growth thickness is 0.5μm, and C atom doping concentration is 2E18 atoms / cm 3 .

[0113] S13, temperature is gradually changed to 600±10℃, TMAl, TMGa and AsH3 are introduced, Al x9 Ga 1-x9 As upper graded layer 12, TMAl flow is gradually changed from 62.4 to 3.12sccm, TMGa flow is gradually changed from 14.6 to 35.4sccm, x9 is gradually changed from 0.6 to 0.03, band gap discontinuity of upper confinement layer 11 and cap layer is reduced, the growth thickness is 0.1μm, and C atom doping concentration is 2E18 atoms / cm 3.

[0114] S14, the temperature is reduced to 540±10℃, TMGa and AsH3 are continuously introduced, a GaAs cap layer 13 is grown on the upper graded layer 12, the thickness is 0.15μm, the C atom doping concentration is 5E19 atoms / cm 3 The symmetric structure semiconductor laser is obtained.

[0115] Comparative Example 2

[0116] A preparation method of a symmetric structure semiconductor laser with a confinement layer, the thickness and component of the confinement layer are symmetrically arranged, comprising the following steps:

[0117] S1, the GaAs substrate 1 is placed in the growth chamber of the MOCVD device, the H2 environment is heated to 680±10℃ for baking, and AsH3 is introduced to perform surface thermal treatment on the GaAs substrate 1.

[0118] S2, the temperature is slowly reduced to 680±10℃ at a rate of 60℃ / min, TMGa and AsH3 are continuously introduced, and a GaAs transition layer 2 is grown on the GaAs substrate 1, the thickness is 0.3μm, and the Si atom doping concentration is 3E18 atoms / cm 3 .

[0119] S3, the temperature is kept at 680±10℃, TMAl, TMGa and AsH3 are introduced, and an Al x1 Ga 1-x1 As lower graded layer 3 is grown on the lower transition layer 2, the TMAl flow is gradually changed from 3.12 to 46.8sccm, the TMGa flow is gradually changed from 36.5 to 20.1sccm, the Al component during growth is gradually changed from x1 0.03 to 0.45, the growth thickness is 0.1μm, and the Si doping concentration is 2E18 atoms / cm 3 .

[0120] S4, the temperature is kept at 680±10℃, TMAl, TMGa and AsH3 are introduced, and an Al x2 Ga 1-x2 As lower confinement layer 4 is grown on the lower graded layer 3, x2 is 0.45, the growth thickness is 1μm, and the Si doping concentration is 1.5E18 atoms / cm 3 .

[0121] S5, the temperature is gradually changed to 640±10℃, TMAl, TMGa and AsH3 are introduced, and an Al x3 Ga 1-x3 As lower waveguide layer 5 is grown on the lower confinement layer 4, x3 is 0.03, the growth thickness is 1μm, and the doping is 0.6μm close to the lower confinement layer, and the Si doping concentration is 1.5E17 atoms / cm3 .

[0122] S6, temperature gradually changes to 600±10℃, TMAl, TMGa, AsH3 and PH3 are input, Al x4 Ga 1-x4 As y1 P 1-y1 barrier layer 6, in this process, as the temperature decreases, the PH3 incorporation decreases, at the same time, the PH3 flow gradually changes from 600 to 100 sccm, the P content gradually changes from high to low, the strain gradually decreases, the lattice constant mismatch with the GaAs buffer layer 77 is reduced, x4 is 0.03, the growth thickness is 10 nm, y1 gradually changes from 0.75 to 0.95.

[0123] S7, the temperature is kept at 600±10℃, AsH3 is input, the growth of the barrier layer 6 is stopped, the PH3 atmosphere in the reaction chamber is excluded, and the formation of the GaAsP phase in the GaAs growth process is reduced.

[0124] S8, the temperature is kept at 600±10℃, TMGa and AsH3 are input, the GaAs buffer layer 7 is grown on the barrier layer 6, the interface roughness is reduced, the dislocation caused by the lattice mismatch of the well and the barrier is reduced, and the growth thickness is 3 nm.

[0125] S9, the temperature is kept at 600±10℃, TMGa, TMIn and AsH3 are input, In x5 Ga 1-x5 As quantum well 8, x5 is 0.26, and the growth thickness is 8 nm.

[0126] S10, the temperature gradually changes to 640±10℃, TMAl, TMGa and AsH3 are input, Al x6 Ga 1-x6 As upper waveguide layer 9, x6 is 0.1, the carrier confinement ability is improved, and the growth thickness is 0.5μm.

[0127] S11, the temperature gradually changes to 680±10℃, TMAl, TMGa and AsH3 are input, Al x7 Ga 1-x7 As upper gradual layer 10, the TMAl flow gradually changes from 10.4 to 46.8 sccm, the TMGa flow gradually changes from 36.5 to 20.1 sccm, x7 gradually changes from 0.1 to 0.45, the voltage rise caused by the discontinuity of the band gap of the upper confinement layer 11 and the upper waveguide layer is reduced, the growth thickness is 0.1μm, and the C atom doping concentration is 1E18 atoms / cm 3 .

[0128] S12, temperature is kept at 680±10℃, TMAl, TMGa and AsH3 are introduced, Al x8 Ga 1-x8 As upper grading layer 11, x8 is 0.45, symmetric structure is set, growth thickness is 1 μm, C atom doping concentration is 2E18 atoms / cm 3 .

[0129] S13, temperature is graded to 600±10℃, TMAl, TMGa and AsH3 are introduced, Al x9 Ga 1-x9 As upper grading layer 12, TMAl flow is graded from 46.8 to 3.12 sccm, TMGa flow is graded from 20.1 to 35.4 sccm, x9 is graded from 0.45 to 0.03, upper limiting layer 11 and cap layer band gap discontinuity is reduced, growth thickness is 0.1 μm, C atom doping concentration is 2E18 atoms / cm 3 .

[0130] S14, temperature is decreased to 540±10℃, TMGa and AsH3 are continuously introduced, GaAs cap layer 13 is grown on upper grading layer 12, growth thickness is 0.15 μm, C atom doping concentration is 5E19 atoms / cm 3 The symmetric structure semiconductor laser of limiting layer is obtained.

[0131] Comparative Example 3

[0132] A preparation method of a non-symmetric semiconductor laser with fixed barrier layer composition, comprising the following steps:

[0133] S1, GaAs substrate 1 is placed in a growth chamber of a MOCVD device, heated to 680±10℃ in H2 environment, baked and AsH3 is introduced for surface thermal treatment of GaAs substrate 1.

[0134] S2, temperature is slowly decreased to 640±10℃ at a rate of 60℃ / min, TMGa and AsH3 are continuously introduced, GaAs transition layer 2 is grown on GaAs substrate 1, thickness is 0.3 μm, Si atom doping concentration is 3E18 atoms / cm 3 .

[0135] S3, temperature is kept at 640±10℃, TMAl, TMGa and AsH3 are introduced, Al x1 Ga 1-x1As lower graded layer 3, TMAl flow is graded from 3.12 to 10.4 sccm, TMGa flow is graded from 35.4 to 32.9 sccm, x1 is graded from 0.03 to 0.1, thickness is 0.1 μm, Si doping concentration is 2E18 atoms / cm 3 .

[0136] S4, temperature is kept at 640±10℃, TMAl, TMGa and AsH3 are introduced, Al x2 Ga 1-x2 As lower confining layer 4, x2 is 0.1, thickness is 2 μm, Si doping concentration is 1.5E18 atoms / cm 3 .

[0137] S5, temperature is kept at 640±10℃, TMAl, TMGa and AsH3 are introduced, Al x3 Ga 1-x3 As lower waveguide layer 5, x3 is 0.03, thickness is 1 μm, doping is 0.6 μm close to lower confining layer, Si doping concentration is 1.5E17 atoms / cm 3 .

[0138] S6, temperature is graded to 600±10℃, TMGa, AsH3 and PH3 are introduced, GaAs is grown on the lower waveguide layer 5 y1 P 1-y1 Barrier layer 6, thickness is 10 nm, y1 is 0.85.

[0139] S7, temperature is kept at 600±10℃, AsH3 is introduced, the barrier layer 6 is stopped growing, PH3 atmosphere in the reaction chamber is excluded, formation of GaAsP phase in the process of GaAs growth is reduced.

[0140] S8, temperature is kept at 600±10℃, TMGa and AsH3 are introduced, GaAs buffer layer 7 is grown on the barrier layer 6, interface roughness is reduced, dislocation caused by well-barrier lattice mismatch is reduced, thickness is 3 nm.

[0141] S9, temperature is kept at 600±10℃, TMGa, TMIn and AsH3 are introduced, In x5 Ga 1-x5 As quantum well 8, x5 is 0.26, thickness is 8 nm.

[0142] S10, temperature is graded to 640±10℃, TMAl, TMGa and AsH3 are introduced, Al x6 Ga 1-x6As the upper waveguide layer 9, x6 is 0.1, the carrier confinement ability is improved, and the growth thickness is 0.5 μm.

[0143] In S11, the temperature is gradually changed to 680±10℃, TMAl, TMGa and AsH3 are input, the Alx7Ga1-x7As upper graded layer 10 is grown on the upper waveguide layer 9, the TMAl flow is gradually changed from 10.4 to 62.4 sccm, the TMGa flow is gradually changed from 35.4 to 14.6 sccm, x7 is gradually changed from 0.1 to 0.6, the band gap discontinuity of the upper confinement layer 11 and the upper waveguide layer is reduced, the voltage rise caused thereby is reduced, the growth thickness is 0.1 μm, and the C atom doping concentration is 1E18 atoms / cm 3 .

[0144] In S12, the temperature is kept at 680±10℃, TMAl, TMGa and AsH3 are input, the Al x8 Ga 1-x8 As upper confinement layer 11 is grown on the upper graded layer 10, x8 is 0.6, the non-symmetrical structure is used to compress the light field to the N side, the absorption loss is reduced, the photoelectric conversion efficiency is improved, the growth thickness is 0.5 μm, and the C atom doping concentration is 2E18 atoms / cm 3 .

[0145] In S13, the temperature is gradually changed to 600±10℃, TMAl, TMGa and AsH3 are input, the Al x9 Ga 1-x9 As upper graded layer 12 is grown on the upper confinement layer 11, the TMAl flow is gradually changed from 62.4 to 3.12 sccm, the TMGa flow is gradually changed from 14.6 to 35.4 sccm, x9 is gradually changed from 0.6 to 0.03, the band gap discontinuity of the upper confinement layer 11 and the cap layer is reduced, the growth thickness is 0.1 μm, and the C atom doping concentration is 2E18 atoms / cm 3 .

[0146] In S14, the temperature is reduced to 540±10℃, TMGa and AsH3 are continuously input, and the GaAs cap layer 13 is grown on the upper graded layer 12, the growth thickness is 0.15 μm, and the C atom doping concentration is 5E19 atoms / cm 3 An asymmetric semiconductor laser with a fixed structure of the barrier layer 6 is obtained.

[0147] Comparative Example 4

[0148] A preparation method of a symmetric semiconductor laser, comprising the following steps:

[0149] S1, put GaAs substrate 1 into MOCVD equipment growth chamber, bake in H2 environment to 680±10℃, and pass in AsH3 to perform surface thermal treatment on GaAs substrate 1.

[0150] S2, slowly reduce temperature to 640±10℃ at a rate of 60℃ / min, continue to pass in TMGa and AsH3, grow GaAs transition layer 2 on GaAs substrate 1, thickness 0.3μm, Si atomic doping concentration 3E18 atoms / cm 3 .

[0151] S3, keep temperature at 640±10℃, pass in TMAl, TMGa and AsH3, grow Al x1 Ga 1-x1 As lower graded layer 3 on the lower transition layer 2, TMAl flow is graded from 3.12 to 31.2sccm, TMGa flow is graded from 35.4 to 25.6sccm, adjust Al composition during growth to make x1 graded from 0.03 to 0.3, growth thickness 0.1μm, Si doping concentration 2E18 atoms / cm 3 .

[0152] S4, keep temperature at 640±10℃, pass in TMAl, TMGa and AsH3, grow Al x2 Ga 1-x2 As lower confinement layer 4, x2 is 0.3, growth thickness 1.5μm, Si doping concentration 1.5E18 atoms / cm 3 .

[0153] S5, keep temperature at 640±10℃, pass in TMAl, TMGa and AsH3, grow Al x3 Ga 1-x3 As lower waveguide layer 5, x3 is 0.05, growth thickness 0.6μm, 0.3μm doped near lower confinement layer, Si doping concentration 1.5E17 atoms / cm 3 .

[0154] S6, gradually change temperature to 600±10℃, pass in TMGa, AsH3 and PH3, grow GaAs y1 P 1-y1 barrier layer 6, growth thickness 10nm, y1 is 0.85.

[0155] S7, keep temperature at 600±10℃, pass in AsH3 to stop growth of the barrier layer 6, remove PH3 atmosphere in the reaction chamber to reduce formation of GaAsP phase during GaAs growth.

[0156] S8, temperature is kept at 600±10℃, TMGa, AsH3 are introduced, GaAs buffer layer 7 is grown on the barrier layer 6, interface roughness is reduced, dislocation caused by well-barrier lattice mismatch is reduced, and the growth thickness is 3nm.

[0157] S9, temperature is kept at 600±10℃, TMGa, TMIn and AsH3 are introduced, In x5 Ga 1-x5 As quantum well 8, x5 is 0.26, and the growth thickness is 8nm.

[0158] S10, temperature is gradually changed to 640±10℃, TMAl, TMGa and AsH3 are introduced, Al x6 Ga 1-x6 As upper waveguide layer 9, x6 is 0.05, and the growth thickness is 0.6μm.

[0159] S11, temperature is gradually changed to 680±10℃, TMAl, TMGa and AsH3 are introduced, Alx7Ga1-x7As upper gradient layer 10 is grown on the upper waveguide layer 9, TMAl flow is gradually changed from 5.2 to 31.2sccm, TMGa flow is gradually changed from 34.7 to 25.6sccm, x7 is gradually changed from 0.05 to 0.3, voltage rise caused by band gap discontinuity of upper confinement layer 11 and upper waveguide layer is reduced, the growth thickness is 0.1μm, and C atom doping concentration is 1E18 atoms / cm 3 .

[0160] S12, temperature is kept at 680±10℃, TMAl, TMGa and AsH3 are introduced, Al x8 Ga 1-x8 As upper confinement layer 11, x8 is 0.3, the growth thickness is 1.5μm, and C atom doping concentration is 2E18 atoms / cm 3 .

[0161] S13, temperature is gradually changed to 600±10℃, TMAl, TMGa and AsH3 are introduced, Al x9 Ga 1-x9 As upper gradient layer 12, TMAl flow is gradually changed from 31.2 to 3.12sccm, TMGa flow is gradually changed from 25.6 to 35.4sccm, x9 is gradually changed from 0.3 to 0.03, band gap discontinuity of upper confinement layer 11 and cap layer is reduced, the growth thickness is 0.1μm, and C atom doping concentration is 2E18 atoms / cm 3 .

[0162] S14, the temperature is reduced to 540±10℃, TMGa and AsH3 are continuously introduced, a GaAs cap layer 13 is grown on the upper graded layer 12, the thickness is 0.15 μm, and the C atom doping concentration is 5E19 atoms / cm 3 The symmetric structure semiconductor laser obtained.

[0163] Performance Testing

[0164] Figure 2 is a bar test chart of the laser of Comparative Example 1 and the laser prepared in Example 1 of the present application, wherein, Figure 2 a is the test result of a conventional laser, Figure 2 b is the test result of the laser of Example 1. Table 1 is the bar test result of the lasers prepared in Example 1 and Comparative Examples 1-4.

[0165] From the above test results, it can be seen that the laser prepared in Example 1 has good consistency, smaller threshold current, higher slope efficiency, and obviously improved output power. This is because the laser prepared in Example 1 increases the carrier confinement ability, compresses the light field to the N side, reduces the absorption loss, and improves the carrier confinement ability and band separation, thereby improving the photoelectric conversion efficiency, by means of the design of the asymmetric waveguide layer and the confinement layer. At the same time, the laser prepared in Example 1 reduces the Al x4 Ga 1-x4 As y1 P 1-y1 barrier layer 6, and combines the GaAs buffer layer 7, to realize strain compensation, reduce dislocations caused by lattice mismatch, improve conversion efficiency and working reliability, thereby significantly improving the photoelectric conversion efficiency and output power of the laser.

[0166] Table 1

[0167]

[0168]

[0169] Finally, it should be noted that any modification, equivalent replacement, improvement, etc. made within the spirit and principles of the present application should be included in the protection scope of the present application. Although the specific embodiments of the present application have been described above with reference to the accompanying drawings, the present application is not limited to the scope of the above description, and those skilled in the art should understand that various modifications or changes made on the basis of the technical solutions of the present application without creative labor are still within the protection scope of the present application.

Claims

1. A semiconductor laser of strained asymmetric structure, wherein, The laser comprises, from bottom to top, a GaAs substrate, a GaAs transition layer, an Al x1 Ga 1-x1 As lower graded layer, an Al x2 Ga 1-x2 As lower confinement layer, an Al x3 Ga 1-x3 As lower waveguide layer, an Al x4 Ga 1-x4 As y1 P 1-y1 barrier layer, a GaAs buffer layer, an In x5 Ga 1-x5 As quantum well, an Al x6 Ga 1-x6 As upper waveguide layer, an Al x7 Ga 1-x7 As upper graded layer, an Al x8 Ga 1-x8 As upper confinement layer, an Al x9 Ga 1-x9 As upper graded layer and a GaAs cap layer; wherein: The x1 gradually changes from the lower limit value to the value of the x2 from bottom to top; The x4 has the same value as the x3, and the y1 gradually changes from high to low from bottom to top; The x7 gradually changes from the value of the x6 to the value of the x8 from bottom to top; The x9 gradually changes from the value of the x8 to the lower limit value of the x9 from bottom to top; The values of the x3, x6 and x8 gradually increase, and the value of the x2 is less than the value of the x8.

2. The strained asymmetrically structured semiconductor laser of claim 1, wherein, In the laser, 0.03≤x1≤0.25, 0.1≤x2≤0.25, 0.03≤x3≤0.07, 0.03≤x4≤0.07, 0.75≤y1≤0.95, 0.2≤x5≤0.3, 0.1≤x6≤0.2, 0.1≤x7≤0.6, 0.4≤x8≤0.6, 0.03≤x9≤0.

6.

3. The strained asymmetrically structured semiconductor laser of claim 2, wherein, The x1 gradually changes from 0.03 to 0.25 from bottom to top.

4. The strained asymmetrically structured semiconductor laser of claim 2, wherein, The x4 is same as Al x3 Ga 1-x3 The x3 in the lower waveguide layer is same as As, and y1 gradually changes from 0.95 to 0.75 from bottom to top.

5. The strained asymmetrically structured semiconductor laser of claim 2, wherein, The x7 gradually changes from 0.1 to 0.6 from bottom to top.

6. The strained asymmetrically structured semiconductor laser of claim 2, wherein, The x9 gradually changes from 0.6 to 0.03 from bottom to top.

7. The method of producing a strained asymmetric structure semiconductor laser as claimed in any one of claims 1 to 6, characterized in that, The method comprises the following steps: S1: placing a GaAs substrate in a growth chamber, baking after temperature rising in a H2 environment, and inputting an AsH3 atmosphere to perform surface thermal treatment on the GaAs substrate; S2: continuing to input a TMGa and AsH3 atmosphere after reducing the temperature in the growth chamber, and growing a GaAs transition layer on the GaAs substrate; S3: TMAl, TMGa and AsH3 atmosphere is introduced, and Al x1 Ga 1-x1 As lower graded layer, Al composition in the growth process is adjusted by changing Al and Ga flow rate; S4: introducing TMAl, TMGa and AsH atmosphere 3, growing Al x2 Ga 1-x2 As lower confinement layer; S5: TMAl, TMGa and AsH3 atmosphere is introduced, and Al x3 Ga 1-x3 As lower waveguide layer; S6: TMAl, TMGa, AsH3 and PH3 atmosphere is introduced, and Al x4 Ga 1-x4 As y1 P 1-y1 barrier layer; during the process, as the temperature decreases, the PH3 incorporation decreases, and at the same time, the PH3 flow is reduced, so that the P content gradually decreases from high to low. S7: inputting an AsH3 atmosphere to stop growing the barrier layer, and excluding PH3 in the reaction chamber to reduce the formation of a GaAsP phase in the GaAs buffer layer during growth; S8: inputting a TMGa and AsH3 atmosphere to grow a GaAs buffer layer on the barrier layer; S9: growing InAs quantum dots on the buffer layer by introducing TMGa, TMIn and AsH3 atmosphere x5 Ga 1-x5 As quantum wells; S10: inputting a TMAl, TMGa and AsH3 atmosphere to grow an Alx6Ga1-x6As upper waveguide layer on the quantum well; S11: Introduce a TMAl, TMGa, and AsH3 atmosphere to grow Al on the upper waveguide layer. x7 Ga 1-x7 As a gradient layer, the Al is achieved by increasing the TMAl flow rate and decreasing the TMGa flow rate during the growth process. x7 Ga 1-x7 In the gradient layer on As, the value of x7 gradually increases from low to high from bottom to top; S12: TMAl, TMGa and AsH3 atmosphere is introduced, and Al x7 Ga 1-x7 As upper graded layer is grown on the Al x8 Ga 1-x8 As upper confinement layer; S13: TMAl, TMGa, and AsH3 are introduced into the atmosphere to grow Al on the upper confinement layer. x9 Ga 1-x9 As a gradient layer, the Al is achieved by reducing the TMAl flow rate and increasing the TMGa flow rate during the growth process. x9 Ga 1-x9 In the gradient layer on As, the value of x9 gradually decreases from high to low. S14: Introduce TMGa and AsH3 atmosphere, grow GaAs cap layer on the graded layer of Al x9 Ga 1-x9 As 8. The method for fabricating the strain-asymmetric semiconductor laser according to claim 7, characterized in that, The temperature in the S1, S11 and S12 is 680±10℃, the temperature in the S2-S5 and S10 is 640±10℃, the temperature in the S6-S9 and S13 is 600±10℃, and the temperature in the S4 is 540±10℃.

9. The method of claim 7, wherein the method further comprises: forming a first strain layer on the first semiconductor layer; and forming a second strain layer on the second semiconductor layer. The Si or Te atomic doping concentration in the GaAs transition layer in S2 is 1E18-3E18 atoms / cm 3 , and the thickness is 0.1-0.3 μm.

10. The method of claim 7, wherein the method further comprises: In the S3, Al x1 Ga 1-x1 The thickness of the lower graded layer of As is 0.1-0.4 μm, wherein the Si or Te atomic doping concentration is 5E17-2E18 atoms / cm 3 . ​ 11. The method of claim 7, wherein the method further comprises: In the S4, Al x2 Ga 1-x2 The thickness of the lower As limit layer is 1.0-2.5 μm, and the doping concentration is 5E17-2E18 atoms / cm 3 . ​ 12. The method of claim 7, wherein the method further comprises: In S5, Al x3 Ga 1-x3 The lower waveguide layer has a thickness of 0.5-1.5 μm, and the portion of the lower waveguide layer contacting the lower confinement layer is doped with Si or Te atoms to form a doped layer. ​ 13. The method for fabricating the strain-asymmetric semiconductor laser according to claim 12, characterized in that, The doping concentration is 5E16-2E17 atoms / cm3, and the thickness of the doped atomic layer is 1 / 3-2 / 3 of the thickness of the lower waveguide layer.

14. The method of claim 7, wherein the method further comprises: In the S6, Al x4 Ga 1-x4 As y1 P 1-y1 The thickness of the barrier layer is 6-10 nm, wherein the value of x4 is the same as x3, and the value of y1 gradually changes from low to high. ​ 15. The method for fabricating the strain-asymmetric semiconductor laser according to claim 7, characterized in that, In the S7, the PH3 / AsH3 flow ratio gradually changes from 12 to 2, so that the value of y1 gradually changes from low to high from bottom to top.

16. The method of claim 7, wherein the method further comprises: In the S8, the thickness of the GaAs buffer layer is 1-5 nm. ​ 17. The method for fabricating the strain-asymmetric semiconductor laser according to claim 7, characterized in that, In the S9, In x5 Ga 1-x5 The thickness of the As quantum well is 6-11 nm; wherein 0.2≤x5≤0.

3.

18. The method of claim 7, wherein the method further comprises: In the S10, Alx6Ga 1-x6 As the thickness of the upper waveguide layer is 0.2-0.5 μm, and 0.1≤x6≤0.

2. ​ 19. The method for fabricating the strain-asymmetric semiconductor laser according to claim 7, characterized in that, In the S11, Al x7 Ga 1-x7 The thickness of the upper graded layer is 0.1-0.3 μm; wherein the original doping concentration of C atoms in the upper graded layer is 5E17-1E18 atoms / cm 3 .

20. The method of claim 7, wherein the method further comprises: In the S11, the value of x7 gradually changes from the value of x6 of the upper waveguide layer to the value of x8 of the upper limiting layer by increasing the TMAl flow and reducing the TMGa flow during growth. ​ 21. The method of claim 7, wherein the method further comprises: In the S12, Al x8 Ga 1-x8 The thickness of the upper limiting layer is 0.5-1.0 μm, and the doping concentration of C atoms is 5E17-2E18 atoms / cm 3 0.4≤x7≤0.

6. ​ 22. The method for fabricating the strain-asymmetric semiconductor laser according to claim 7, characterized in that, In the S13, the Al x9 Ga 1-x9 The thickness of the As graded layer is 0.1-0.3 μm, wherein the atomic doping concentration of XXX is 5E17-2E18 atoms / cm 3 .

23. The method for fabricating the strain-asymmetric semiconductor laser according to claim 7, characterized in that, In the S13, x9 gradually changes from the value of x8 of the upper limiting layer to the lower limit value of x9 by reducing the TMAl flow and increasing the TMGa flow during growth.

24. The method of claim 7, wherein the method further comprises: In the S14, the cap layer has a thickness of 0.1-0.5 μm, and a C atom doping concentration of 4E19-1E20 atoms / cm 3 . ​

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