An interval temperature compensation circuit and a temperature compensation crystal oscillator circuit

Abstract

The application discloses an interval temperature compensation circuit and a temperature compensation crystal oscillator circuit, mainly comprising N temperature interval generating units, N peak compensation units and an adder; each temperature interval generating unit is used for generating a first control voltage for controlling an upper limit of a temperature interval, a second control voltage for controlling a peak point of the temperature interval and a third control voltage for controlling a lower limit of the temperature interval according to input first and second voltages; each peak compensation unit is used for receiving the first control voltage, the second control voltage and the third control voltage of the corresponding temperature interval generating unit, determining a temperature interval and a peak value to be compensated by the first control voltage, the second control voltage and the third control voltage, and generating a compensation current in the determined temperature interval to be compensated; and the adder is used for summing the compensation currents of the N peak compensation units to generate an interval compensation voltage in the whole working temperature range.

Description

Technical Field

[0001] This invention belongs to the field of temperature compensation technology, specifically relating to a temperature compensation circuit and a temperature compensation crystal oscillator circuit using the device. Background Technology

[0002] The frequency drift of the output signal due to temperature changes (temperature drift) is a core indicator of temperature-compensated crystal oscillators. Within the operating temperature range, the smaller the maximum absolute value of this indicator, the better the performance of the temperature-compensated crystal oscillator. The temperature drift characteristic of a crystal oscillator can generally be represented as the superposition of multiple higher-order functions and randomly discrete interval peaks. For example... Figure 1 As shown in the image above.

[0003] Based on the above principles, common temperature-compensated crystal oscillators use high-order function circuits to compensate for the crystal's temperature drift characteristics over the entire operating temperature range. The compensated temperature drift characteristics retain compensation errors and range peaks, such as... Figure 1 As shown in the figure below, these two non-ideal characteristics generally only appear in certain local temperature ranges and cannot be canceled out again by higher-order functions, resulting in limitations on the final temperature drift index. Summary of the Invention

[0004] Purpose of the invention: To reduce the overall temperature drift of a temperature-compensated crystal oscillator, this invention proposes a range temperature compensation circuit and a temperature-compensated crystal oscillator circuit using the device. Based on the results of higher-order temperature compensation, compensation is performed within a specified temperature range, thereby further reducing the overall temperature drift of the temperature-compensated crystal oscillator.

[0005] Technical solution: A temperature range compensation circuit, comprising: N temperature range generation units, N peak compensation units, and an adder;

[0006] Each temperature range generation unit is configured to generate, based on the input first voltage and second voltage, a first control voltage for controlling the upper limit of the temperature range, a second control voltage for controlling the peak point of the temperature range, and a third control voltage for controlling the lower limit of the temperature range; the first voltage corresponds to the circuit ambient temperature; the second voltage is used to determine the center of the temperature range for compensation.

[0007] Each of the peak compensation units is used to receive the first control voltage, the second control voltage and the third control voltage of the corresponding temperature range generation unit, and to determine the temperature range and peak value to be compensated by the first control voltage, the second control voltage and the third control voltage, and to generate a compensation current within the determined temperature range.

[0008] The adder is used to sum the compensation currents of N peak compensation units to generate an interval compensation voltage over the entire operating temperature range.

[0009] Furthermore, the temperature range generating unit includes a bias current source I, a first MOSFET, a second MOSFET, a third MOSFET, a fourth MOSFET, a first resistor, a second resistor, a third resistor, and a fourth resistor;

[0010] The source of the first MOSFET is connected to one end of the third resistor, and the other end of the third resistor is connected to the bias current source I; the gate of the first MOSFET is connected to a first voltage, and the drain of the first MOSFET is connected to the drain of the third MOSFET; the source of the second MOSFET is connected to one end of the fourth resistor, and the other end of the fourth resistor is connected to the bias current source I; the gate of the second MOSFET is connected to a second voltage, and the drain of the second MOSFET is connected to the drain of the fourth MOSFET; the source of the third MOSFET is connected to an external power supply, and the gate of the third MOSFET is connected to the gate of the fourth MOSFET, and the drain of the third MOSFET is connected to the drain of the first MOSFET; the source of the fourth MOSFET is connected to an external power supply, and the gate of the fourth MOSFET is connected to the gate of the third MOSFET, and the drain of the fourth MOSFET is connected to the drain of the second MOSFET; one end of the first resistor is connected to the drain of the third MOSFET, and the other end of the first resistor is connected to the gate of the third MOSFET; one end of the second resistor is connected to the drain of the fourth MOSFET, and the other end of the second resistor is connected to the gate of the fourth MOSFET.

[0011] In this configuration, the drain of the fourth MOSFET is used as the output terminal for the first control voltage; the gate of the third MOSFET is used as the output terminal for the second control voltage; and the drain of the first MOSFET is used as the output terminal for the third control voltage.

[0012] Furthermore, the peak compensation unit includes a bias current source IB, a fifth MOSFET, a sixth MOSFET, and a seventh MOSFET;

[0013] The drain of the fifth MOSFET is connected to an external power supply, and the gate of the fifth MOSFET is connected to a temperature range to generate the first control voltage of the unit output; the fifth MOSFET generates a bias current I0 based on the first control voltage, and the source of the fifth MOSFET is connected to the bias current source IB.

[0014] The drain of the seventh MOSFET is connected to an external power supply, and the gate of the seventh MOSFET is connected to the temperature range to generate the third control voltage of the unit output; the seventh MOSFET generates a bias current I2 based on the third control voltage, and the source of the seventh MOSFET is connected to the bias current source IB.

[0015] The drain of the sixth MOSFET is connected to the input of the adder via a 2-to-1 switch, and the gate of the sixth MOSFET is connected to the temperature range to generate the second control voltage of the unit output.

[0016] The peak compensation unit generates a compensation current within its defined temperature range for compensation, denoted as IB-I2-I0.

[0017] Furthermore, the amplifier is a fully differential amplifier.

[0018] The present invention also discloses a temperature-compensated crystal oscillator circuit, comprising:

[0019] A temperature detection circuit is used to detect the ambient temperature of the circuit and output a corresponding first voltage.

[0020] A preset compensation temperature module is used to provide a corresponding second voltage for the interval temperature compensation circuit;

[0021] The interval temperature compensation circuit is used to output an interval compensation voltage for the entire temperature range based on the first voltage and the second voltage.

[0022] A voltage-controlled oscillator is used to achieve temperature frequency compensation based on the range compensation voltage output by a range temperature compensation circuit.

[0023] The aforementioned interval temperature compensation circuit is one such interval temperature compensation circuit disclosed above.

[0024] Beneficial effects: Compared with the prior art, the present invention has the following advantages:

[0025] (1) The temperature compensation circuit of the present invention can achieve accurate compensation for a small range of temperature drift independently;

[0026] (2) The temperature compensation circuit of the present invention uses an adder as the output, which is compatible with traditional compensation methods. Attached Figure Description

[0027] Figure 1 To compensate for the temperature drift profile of the crystal over the entire operating temperature range, a high-order function circuit is used, as well as for existing temperature-compensated crystal oscillators.

[0028] Figure 2 This is a block diagram of the temperature-compensated crystal oscillator circuit of the present invention;

[0029] Figure 3 This is a circuit structure diagram and a schematic diagram of the working principle of the temperature range generation unit of the present invention;

[0030] Figure 4 This is a circuit structure diagram and a schematic diagram of the working principle of the peak compensation unit of the present invention;

[0031] Figure 5 This is a circuit diagram of the adder of the present invention and a schematic diagram of the compensation effect;

[0032] Figure 6The uncompensated temperature drift curve and the temperature drift curve obtained using the present invention over the entire operating temperature range. Detailed Implementation

[0033] The technical solution of the present invention will now be further described in conjunction with the accompanying drawings and embodiments.

[0034] This invention discloses a temperature range compensation circuit, which mainly includes multiple temperature range generation units, multiple peak compensation units, and an adder. Each temperature range generation unit generates a control voltage based on an externally input first voltage and a second voltage. This control voltage includes three voltages that sequentially control the upper limit of the temperature range, the peak point of the temperature range, and the lower limit of the temperature range. Each peak compensation unit receives the control voltage from its corresponding temperature range generation unit and determines the temperature range to be compensated based on the control voltage. Each peak compensation unit generates a compensation current within its determined temperature range. The adder sums the compensation currents generated by all peak compensation units to generate a range compensation voltage for the entire operating temperature range. This range compensation voltage is used to control a voltage-controlled oscillator to produce a temperature frequency compensation effect.

[0035] Now combined Figure 2 The present invention provides a further description of a temperature compensation circuit structure for a given temperature range.

[0036] For the first temperature range generation unit, it generates a control voltage VC1<2:0> based on the externally input first voltage VT and second voltage VS1. The generated control voltage VC1<2:0> is input to the first peak compensation unit, and the first peak compensation unit generates a compensation current IP1 within the temperature range determined by the control voltage VC1<2:0>.

[0037] For the second temperature range generation unit, it generates a control voltage VC2<2:0> based on the externally input first voltage VT and second voltage VS2. The generated control voltage VC2<2:0> is input to the second peak compensation unit, and the second peak compensation unit generates a compensation current IP2 within the temperature range determined by the control voltage VC2<2:0>.

[0038] For the Nth temperature range generation unit, it generates a control voltage VCN<2:0> based on the externally input first voltage VT and second voltage VSN. The generated control voltage VCN<2:0> is input to the Nth peak compensation unit, and the Nth peak compensation unit generates a compensation current IPN within the temperature range determined by the control voltage VCN<2:0>.

[0039] The generated compensation currents IP1, IP2, ..., IPN are summed by an adder to generate a range compensation voltage for the entire operating temperature range.

[0040] Now combined Figure 3 The temperature range generating unit of the present invention will be further described.

[0041] Figure 3 The left figure shows the structure of the temperature range generation unit, including a first MOSFET M0, a second MOSFET M1, a third MOSFET M2, a fourth MOSFET M3, a first resistor R0, a second resistor R1, a third resistor R2, and a fourth resistor R4.

[0042] The source of the first MOSFET M0 is connected to one end of the third resistor R2, and the other end of the third resistor R2 is connected to the bias current source I. The gate of the first MOSFET M0 is connected to a first voltage, and the drain of the first MOSFET M0 is connected to the drain of the third MOSFET M2. The bias current source I is... Figure 3 The MOSFET in the circuit provides the quiescent operating current.

[0043] The source of the second MOSFET M1 is connected to one end of the fourth resistor R3, and the other end of the fourth resistor R3 is connected to the bias current source I; the gate of the second MOSFET M1 is connected to the second voltage, and the drain of the second MOSFET M1 is connected to the drain of the fourth MOSFET M3.

[0044] The source of the third MOSFET M2 is connected to an external power supply, the gate of the third MOSFET M2 is connected to the gate of the fourth MOSFET M3, and the drain of the third MOSFET M2 is connected to the drain of the first MOSFET M0.

[0045] The source of the fourth MOSFET M3 is connected to an external power supply, the gate of the fourth MOSFET M3 is connected to the gate of the third MOSFET M2, and the drain of the fourth MOSFET M3 is connected to the drain of the second MOSFET M1.

[0046] One end of the first resistor R0 is connected to the drain of the third MOSFET M2, and the other end is connected to the gate of the third MOSFET M2.

[0047] One end of the second resistor R1 is connected to the drain of the fourth MOSFET M3, and the other end is connected to the gate of the fourth MOSFET M3.

[0048] Among them, the first MOSFET M0 and the second MOSFET M1 form a differential amplification function, the third resistor R2 and the fourth resistor R3 are degraded devices, and the first resistor R0, the second resistor R1, the third MOSFET M2 and the fourth MOSFET M3 together form a load current mirror.

[0049] The drain of the fourth MOSFET M3 is used as the output terminal of the first control voltage, which is used to control the upper limit of the temperature range; the gate of the third MOSFET M2 is used as the output terminal of the second control voltage, which is used to control the peak point of the temperature range; and the drain of the first MOSFET M0 is used as the output terminal of the third control voltage, which is used to control the lower limit of the temperature range. These three control voltages VC<2:0> are then transferred to the subsequent peak compensation unit.

[0050] Figure 3 The right figure illustrates the working principle of the temperature range generation unit. Taking the first temperature range generation unit as an example, the working principle of the temperature range generation unit will be explained. The first voltage VT and the second voltage VS1 intersect at temperature point T1, which is the center of the temperature range to be compensated. By adjusting the second voltage VS1, the temperature range to be compensated can be shifted. The control voltage VC output by the first temperature range generation unit... <2> VC <1> and VC <0> Similarly, at temperature point T1, the control voltage VC... <2> and control voltage VC <0> Relative to control voltage VC <1> Symmetrical, control voltage VC <2> and control voltage VC <0> The slope can be adjusted using the third resistor R2 and the fourth resistor R3.

[0051] Now combined Figure 4 The peak compensation unit of the present invention will be further described.

[0052] Figure 4 The left figure shows the structure of the peak compensation unit of the present invention, which mainly includes: bias current source IB, fifth MOSFET M4, sixth MOSFET M5 and seventh MOSFET M6.

[0053] The drain of the fifth MOSFET M4 is connected to an external power supply, and the gate of the fifth MOSFET M4 is connected to the temperature range to generate the first control voltage of the unit output; the fifth MOSFET M4 generates a bias current I0 based on the first control voltage, and the source of the fifth MOSFET M4 is connected to the bias current source IB.

[0054] The drain of the sixth MOSFET M5 is connected to the 2-to-1 switch S0. The gate of the sixth MOSFET M5 is connected to the temperature range to generate the second control voltage of the unit output. The sixth MOSFET M5 generates a bias current I1 based on the second control voltage. The source of the sixth MOSFET M5 is connected to the bias current source IB.

[0055] The drain of the seventh MOSFET M6 is connected to an external power supply, and the gate of the seventh MOSFET M6 is connected to the temperature range to generate the third control voltage of the unit output; the seventh MOSFET M6 generates a bias current I2 based on the third control voltage, and the source of the seventh MOSFET M6 is connected to the bias current source IB.

[0056] Taking the first peak compensation unit as an example, the first peak compensation unit generates a compensation current IP1 within the temperature range, which is the difference between IP1_P and IP1_N. Here, IP1_P is the drain of the sixth MOSFET M5 connected to the circuit via a 2-to-1 switch S0. Figure 5 The resistor RP_1 in the diagram is connected; IP1_N is the drain of the sixth MOSFET M5 connected to the circuit via a 2-to-1 switch S0. Figure 5 The resistor RN_1 in the circuit is connected to obtain the circuit.

[0057] Figure 4 The right figure illustrates the working principle of the peak compensation unit of this invention. The MOS transistor current exhibits a square-law characteristic. Figure 4 In the right figure, T1 is the center of the temperature range for compensation. On either side of temperature T1, one of the bias currents I2 and I0 will increase rapidly, while the other will decrease rapidly. The circuit output current satisfies the condition IP_P - IP_N|=IB - I2 - I0, and its direction is determined by switch S0. The output current of the peak compensation unit exhibits peak characteristics within the temperature range. The current peak occurs at temperature T1, at which point the control voltages and currents of the fifth MOSFET M4, sixth MOSFET M5, and seventh MOSFET M6 are the same, and the peak current equals IB / 3.

[0058] Now combined Figure 5 The adder of the present invention will be further described.

[0059] Figure 5 The left figure shows the structure of the adder, which mainly includes: a fully differential amplifier A1, a fifth resistor RP, a sixth resistor RN, a seventh resistor R7, and an eighth resistor R8. The fifth resistor RP is connected to the compensation current IP_P output from the peak compensation unit, the sixth resistor RN is connected to the compensation current IP_N output from the peak compensation unit, one end of the seventh resistor R7 is connected to the negative input terminal of the fully differential amplifier A1, and the other end is connected to the positive output terminal of the fully differential amplifier A1. One end of the eighth resistor R8 is connected to the positive input terminal of the fully differential amplifier A1, and the other end is connected to the negative output terminal of the fully differential amplifier A1. The output voltage of the fully differential amplifier A1 is denoted as VA, which serves as the control voltage for the subsequent voltage-controlled oscillator.

[0060] Let the centers of the N compensated temperature intervals be: temperature T 补1 Temperature T 补2 ... temperature T 补N Each compensation interval has its own independently set compensation range, peak direction, and peak height. The compensation effect of the output voltage VA of the differential amplifier A1 is as follows: Figure 5 As shown on the right.

[0061] The temperature compensation circuit of the present invention is now applied to a temperature-compensated crystal oscillator circuit. For details, please refer to [link to specific structure]. Figure 2 In other words, the first voltage and the second voltage input to the temperature range generation unit are generated by the temperature detection circuit and the preset compensation temperature module, respectively. The temperature detection circuit detects the ambient temperature and outputs the first voltage to each temperature range generation unit. The preset compensation temperature module generates the second voltage, which is related to the compensation range and has a one-to-one correspondence with each range. The output voltage of the fully differential amplifier acts on the voltage-controlled oscillator to achieve temperature frequency compensation.

[0062] The compensation effect in practical applications is as follows Figure 6 As shown. Among them Figure 6 The above figure shows the results using only conventional high-order compensation, achieving a temperature drift level of ±0.2ppm; Figure 6 The image below shows the effect of adding temperature range compensation, which can achieve a temperature drift of ±0.1ppm.

Claims

1. A range temperature compensation circuit, characterized in that: include: N temperature range generation units, N peak compensation units, and one adder; Each temperature range generation unit is configured to generate, based on the input first voltage and second voltage, a first control voltage for controlling the upper limit of the temperature range, a second control voltage for controlling the peak point of the temperature range, and a third control voltage for controlling the lower limit of the temperature range; the first voltage corresponds to the circuit ambient temperature; the second voltage is used to determine the center of the temperature range for compensation. Each of the peak compensation units is used to receive the first control voltage, the second control voltage and the third control voltage of the corresponding temperature range generation unit, determine the temperature range and peak value to be compensated by the first control voltage, the second control voltage and the third control voltage, and generate a compensation current within the determined temperature range to be compensated. The adder is used to sum the compensation currents of N peak compensation units to generate an interval compensation voltage over the entire operating temperature range.

2. The interval temperature compensation circuit according to claim 1, characterized in that: The temperature range generation unit includes a bias current source I, a first MOSFET, a second MOSFET, a third MOSFET, a fourth MOSFET, a first resistor, a second resistor, a third resistor, and a fourth resistor; The source of the first MOSFET is connected to one end of the third resistor, and the other end of the third resistor is connected to the bias current source I; the gate of the first MOSFET is connected to a first voltage, and the drain of the first MOSFET is connected to the drain of the third MOSFET; the source of the second MOSFET is connected to one end of the fourth resistor, and the other end of the fourth resistor is connected to the bias current source I; the gate of the second MOSFET is connected to a second voltage, and the drain of the second MOSFET is connected to the drain of the fourth MOSFET; the source of the third MOSFET is connected to an external power supply, and the gate of the third MOSFET is connected to the gate of the fourth MOSFET, and the drain of the third MOSFET is connected to the drain of the first MOSFET; the source of the fourth MOSFET is connected to an external power supply, and the gate of the fourth MOSFET is connected to the gate of the third MOSFET, and the drain of the fourth MOSFET is connected to the drain of the second MOSFET; one end of the first resistor is connected to the drain of the third MOSFET, and the other end of the first resistor is connected to the gate of the third MOSFET; one end of the second resistor is connected to the drain of the fourth MOSFET, and the other end of the second resistor is connected to the gate of the fourth MOSFET. In this configuration, the drain of the fourth MOSFET is used as the output terminal for the first control voltage; the gate of the third MOSFET is used as the output terminal for the second control voltage; and the drain of the first MOSFET is used as the output terminal for the third control voltage.

3. The interval temperature compensation circuit according to claim 2, characterized in that: The peak compensation unit includes a bias current source IB, a fifth MOSFET, a sixth MOSFET, and a seventh MOSFET; The drain of the fifth MOSFET is connected to an external power supply, and the gate of the fifth MOSFET is connected to a temperature range to generate the first control voltage of the unit output; the fifth MOSFET generates a bias current I0 based on the first control voltage, and the source of the fifth MOSFET is connected to the bias current source IB. The drain of the seventh MOSFET is connected to an external power supply, and the gate of the seventh MOSFET is connected to a temperature range to generate the third control voltage of the unit output. The seventh MOSFET generates a bias current I2 based on the third control voltage, and the source of the seventh MOSFET is connected to the bias current source IB. The drain of the sixth MOSFET is connected to the input of the adder via a 2-to-1 switch, and the gate of the sixth MOSFET is connected to the temperature range to generate the second control voltage of the unit output. The peak compensation unit generates a compensation current within its defined temperature range for compensation, denoted as IB-I2-I0.

4. A temperature-compensated crystal oscillator circuit, characterized in that: include: A temperature detection circuit is used to detect the ambient temperature of the circuit and output a corresponding first voltage. A preset compensation temperature module is used to provide a corresponding second voltage for the interval temperature compensation circuit; The interval temperature compensation circuit is used to output an interval compensation voltage for the entire temperature range based on the first voltage and the second voltage. A voltage-controlled oscillator is used to achieve temperature frequency compensation based on the range compensation voltage output by a range temperature compensation circuit. The interval temperature compensation circuit is an interval temperature compensation circuit as described in any one of claims 1 to 3.

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