Distributed phase modifier grid interaction characteristic and avc comprehensive coordinated control strategy detection platform

Abstract

The present application relates to the distributed phase modifier involves the network characteristics and the AVC comprehensive coordination control strategy detection platform, including: coordination control system and a plurality of detection platforms that are communicatively connected with the coordination control system;The detection platform includes a real-time simulator, an FPGA network card and a digital-to-analog conversion module, and the real-time simulator performs high-speed data interaction with the digital-to-analog conversion module through at least one FPGA network card.Have the beneficial effect: have the system framework distribution, the simulation speed is fast, the simulation scale is big, the data interaction delay is low, the communication jitter is small, be suitable for multi-system (the phase modifier excitation system and the AVC control system) large-scale joint test and the like characteristics.

Description

Technical Field

[0001] The present invention relates to the field of ultra-high voltage direct current (UHVDC) power transmission, and in particular to a distributed phase regulator grid-related characteristics and AVC integrated coordinated control strategy detection platform. Background Art

[0002] The UHVDC transmission-end supporting power supply plan integrates DC power through a multi-energy complementary approach: hydropower, solar power, wind power, thermal power, storage, and transmission. Renewable energy accounts for a large proportion, power supply combinations are diverse, and grid operation is complex and changeable. After the UHVDC project is put into operation, the high proportion of new energy access and the high proportion of power electronic components have made voltage control and voltage stability issues in the regional power grid more prominent, posing greater challenges to the safe and stable operation of the power grid and the absorption of new energy:

[0003] On the one hand, the DC near-region lacks synchronous generators capable of providing dynamic voltage support. With centralized access to renewable energy, power electronic equipment, due to measurement and filtering, experiences a certain delay in active and reactive response during rapid system voltage changes. This causes reactive reverse regulation during rapid voltage changes caused by bipolar blocking, resulting in DC continuous commutation failures. This increases overvoltage levels, causing transient voltages at renewable energy stations to exceed 1.3 pu. In severe cases, this can lead to widespread disconnection of renewable energy stations from the grid. Constrained by transient overvoltage issues with renewable energy, the DC transmission capacity is strongly coupled with renewable energy in the near-region, directly impacting the clean energy consumption of the regional power grid.

[0004] On the other hand, large-scale renewable energy is connected to the grid in a centralized manner, and the voltage support capacity of the main grid is insufficient. The volatility and uncertainty of renewable energy output cause large fluctuations in the main grid current, and the steady-state voltage regulation pressure of the power grid increases significantly. The large-capacity DC access system cannot provide the dynamic voltage support capability of conventional power sources, and may even increase the regulation burden of the system. At the same time, after a DC fault occurs and is locked, considering the maximum tolerable imbalance of the regional power grid, in order to ensure the stability of the regional power grid frequency, the corresponding units need to be removed. After the unit is cut off, the power fallback of the DC near-region power grid is reduced, causing the voltage of different levels of DC buses in the near-region to easily exceed the rated withstand voltage of the equipment. In addition, as the DC transmission capacity increases, the steady-state overvoltage problem will be further aggravated. It is necessary to optimize the steady-state voltage regulation strategy of the reactive compensation equipment of the new energy power station to reduce the steady-state overvoltage after the stable control unit is cut off.

[0005] As dynamic voltage regulation devices, phase regulators not only improve the system's transient voltage stability, but also increase the system's static voltage stability margin, resolving various voltage stability issues at the sending end of the power grid. During transient conditions, such as DC faults, the layered phase regulators, thanks to their inherent dynamic voltage regulation capabilities, are largely unaffected by the system voltage. They offer the unique advantages of strong instantaneous reactive power support and short-term overload capacity in fault conditions, resolving transient overvoltage issues at converter stations and renewable energy stations. During the steady-state phase following DC fault lockout and generator tripping, phase regulators can also regulate the steady-state voltage, reducing the steady-state overvoltage after controlled generator tripping.

[0006] The control strategy of the phase-shifting condenser with layered access needs to be coordinated with the regional AVC coordinated regulation to achieve the expected effect. Before being applied to actual power grid projects, the regional AVC coordinated control strategy and the coordinated control function with the grid-related characteristics of the phase-shifting condenser need to be simulated and verified before grid connection. However, there is currently a lack of such type of detection platform for simulation verification. Summary of the Invention

[0007] The technical problem to be solved by the present invention is to provide a distributed phase regulator network-related characteristics and AVC comprehensive coordinated control strategy detection platform to overcome the deficiencies in the above-mentioned prior art.

[0008] The technical solution of the present invention to solve the above technical problems is as follows: a distributed phase regulator network-related characteristics and AVC comprehensive coordinated control strategy detection platform, including: a coordinated control system and multiple detection platforms communicated with the coordinated control system; the detection platform includes a real-time simulator, an FPGA network card and a digital-to-analog conversion module, and the real-time simulator performs high-speed data interaction with the digital-to-analog conversion module through at least one FPGA network card.

[0009] On the basis of the above technical solution, the present invention can also be improved as follows.

[0010] Furthermore, the real-time emulator is based on the PowerPC computing platform and deploys the VxWorks real-time operating system.

[0011] Furthermore, the real-time simulator contains multiple CPUs, which are internally connected through high-speed interconnect chips. The data interaction delay between multiple CPUs is less than 2us, and the jitter is less than 2us.

[0012] Furthermore, data is transmitted between the real-time simulator and the digital-to-analog conversion module via a 5Gbps RapidIO high-speed serial optical fiber link.

[0013] Furthermore, the digital-to-analog conversion module includes a main control board and a power supply board, an AD / DA function board, a DI function board, a DO function board, a message communication function board and a signal amplification function board electrically connected thereto.

[0014] Furthermore, the main control board is based on the simulation interface module designed on the ARM+FPGA architecture development platform, and adopts the TL5728F-EVM development board designed with TI SitaraAM5728+Xilinx Artix-7FPGA. The internal AM5728 communicates with the FPGA through the GPMC bus, forming a DSP+ARM+FPGA architecture.

[0015] Furthermore, its operation method is:

[0016] S100, the coordinated control system sends the test case to the corresponding test platform;

[0017] S200. After the test platform obtains the test case, the real-time simulator in the test platform simulates various transient processes of UHVDC transmission and the nearby power grid through electromagnetic transient simulation technology, simulates the AVC substations of phase regulators in different locations, and simultaneously connects to the excitation systems and AVC master stations of multiple phase regulators through the digital-to-analog conversion module to verify the grid-related characteristics of the phase regulators in the regional power grid and the AVC comprehensive coordinated control strategy;

[0018] S300: The verification results are transmitted back to the coordinated control system, which performs unified summary, analysis and comparison to achieve a large-scale coordinated control and detection function.

[0019] Furthermore, S200 is specifically:

[0020] The real-time simulator simulates various transient processes of UHVDC transmission and proximal power grids through electromagnetic transient simulation technology. It uses the synchronous signal as the operation base and communicates with the digital-to-analog conversion module every DT. After receiving the calculation results of the real-time simulator, the FPGA of the digital-to-analog conversion module starts the DA and DO conversion process, sends the converted DO signal directly to the device under test, amplifies the converted AO signal, and outputs the actual electrical quantity to the device under test, providing actual current and voltage signals for the phase-shifting excitation system, and then transmits the current grid information and switch position information to the phase-shifting excitation system, and collects the excitation voltage response of the excitation system in real time. The response is fed back to the real-time simulator via the FPGA and substituted into the calculation program to complete the calculation before the next data exchange time. This process is repeated for closed-loop control of the phase-shifting body control.

[0021] At the same time, the AVC master station collects operating information from different locations in the power grid through each AVC digital substation, conducts comprehensive analysis, and issues new voltage and power control strategies to form a closed-loop control of the control strategy. The closed-loop control of the phase-shifting machine itself and the AVC comprehensive coordinated control strategy are intertwined and coupled to verify the grid-related characteristics of the phase-shifting machine and the AVC comprehensive coordinated control strategy.

[0022] Furthermore, the working sequence of the detection platform is:

[0023] Assume that the calculation process is that after the digital side simulation calculation is completed at each time step, the calculation process exchanges data with the digital-to-analog conversion module through the message passing interface: that is, the analog side equivalent historical current source value calculated last time is sent to the digital-to-analog conversion module, and at the same time, the last analog side voltage sampling result is obtained from the digital-to-analog conversion module. The digital-to-analog conversion module calls the D / A conversion driver and the A / D conversion driver in sequence, executes the analog side current source signal output and receives the analog side voltage measurement value. At the same time, the calculation process executes the equivalent historical current source calculation module.

[0024] The beneficial effects of the present invention are: distributed system architecture, fast simulation speed, large simulation scale, low data interaction delay, small communication jitter, and applicability to large-scale joint testing of multiple systems (phase modulator excitation system and AVC control system). BRIEF DESCRIPTION OF THE DRAWINGS

[0025] Figure 1 This is a basic principle block diagram of a distributed phase regulator network-related characteristics and AVC integrated coordinated control strategy detection platform provided by the present invention;

[0026] Figure 2 This is the principle block diagram of the digital-to-analog conversion module;

[0027] Figure 3 This is a top view schematic diagram of the digital-to-analog conversion module structure;

[0028] Figure 4 Schematic diagram for testing network-related characteristics and AVC integrated coordinated control strategy for single / multiple phase regulators in the present invention; DETAILED DESCRIPTION

[0029] The principles and features of the present invention are described below with reference to the accompanying drawings. The examples given are only used to explain the present invention and are not used to limit the scope of the present invention.

[0030] Example 1

[0031] like Figure 1 As shown, a distributed phase-shifting phase-shifting network-related characteristics and AVC integrated coordinated control strategy detection platform includes:

[0032] A coordinated control system 1 and multiple testing platforms 2 that are communicatively connected to the coordinated control system, i.e., the coordinated control system can connect and manage collaborative testing of multiple testing platforms. Typically, the coordinated control system and each testing platform 2 establish data exchange through wireless communication, such as 5G / 2.4G wireless communication;

[0033] The coordinated control system 1 is responsible for the control operations such as starting, pausing, and stopping of multiple detection platforms. Before the detection begins, the detection cases required by each detection platform 2 are sent to each detection platform 2 via wireless communication. After the detection is completed, the test results of each detection platform 2 are collected and analyzed and compared in a unified manner, thereby achieving a large-scale coordinated control detection function;

[0034] The detection platform 2 includes a real-time simulator 3, an FPGA network card 4 and a digital-to-analog conversion module 5;

[0035] The real-time simulator performs high-speed data interaction with the digital-to-analog conversion module through at least one FPGA network card.

[0036] Example 2

[0037] like Figure 1 As shown, this embodiment is a further improvement on the basis of embodiment 1, specifically as follows:

[0038] Real-time simulator 3 is based on a PowerPC computing platform and deploys the VxWorks real-time operating system. This platform contains multiple CPUs, which are connected together through high-speed interconnect chips to achieve multi-CPU joint simulation computing. The data exchange delay between multiple CPUs is less than 2us, and the jitter is less than 2us.

[0039] The real-time simulator 3 has one or more built-in FPGA network cards. The FPGA network card is based on the FPGA PCIExpress x4 network card and supports the PCI Express Gen2.0 specification. Each FPGA network card has four fiber optic communication interfaces and one IRIG-B timing interface. The fiber optic communication interface is in the form of SFP+ and supports the RapidIO communication protocol with a communication rate of 5 Gbps. The timing interface is in the form of a fiber optic ST interface and supports IRIG-B timing signals. The real-time simulator can be timed through the FPGA network card.

[0040] The RapidIO communication protocol is used to reduce the digital-to-analog conversion transmission delay to less than 2us.

[0041] The real-time simulator 3 completes two predetermined processes according to the DT interval between the FPGA network card 4 and the digital-to-analog conversion module 5, which are:

[0042] Simulation calculation, data communication, interface output, DA conversion, and system under test;

[0043] System under test, AD conversion, interface input, data communication, and simulation calculation.

[0044] As for DT, the minimum simulation and output step length for detection can be 50us.

[0045] Example 3

[0046] like Figure 2 、 Figure 3 As shown, this embodiment is a further improvement on the basis of embodiment 1 or 2, specifically as follows:

[0047] The digital-to-analog conversion module 5 includes a chassis and a backplane, a power board, a main control board, a function board, and an LCD screen located inside the chassis;

[0048] The back panel is arranged perpendicularly to the upper panel and the lower panel of the chassis;

[0049] The power board, main control board and function board are all fixed through the slots provided on the upper panel, lower panel and back panel of the chassis;

[0050] The LCD screen is installed on the front panel of the chassis and connected to the back panel via the RS485 bus;

[0051] The power board is perpendicular to the back panel and the upper panel, and the function board and the power board are arranged in parallel;

[0052] The backplane obtains power signals from the power board, obtains synchronization signals through the main control board, and forwards the obtained signals to the function board through the power bus and synchronization signal bus;

[0053] The main control board is responsible for the overall operation scheduling of the digital-to-analog conversion module, and has a synchronization signal interface that supports IEEE1588 and IRIG-B timing methods;

[0054] The power board provides a power signal interface with an AC220V input, which is internally divided into two paths. One path is converted into 24V through an AD / DC converter and supplies power to the main control board and function boards through the backplane bus; the other path directly supplies power to the power part of the signal amplification function board for signal amplification. The power board uses an isolated power supply and is stabilized by multi-stage lines, fully considering the circuit and wiring to reduce the impact of power ripple on the analog circuit and ensure accuracy.

[0055] The main control board is based on the simulation interface module designed based on the ARM+FPGA architecture development platform. This platform uses the TL5728F-EVM development board designed with TI SitaraAM5728 (floating-point dual DSPC66x + dual ARMCortex-A15) + Xilinx Artix-7FPGA. The internal AM5728 communicates with the FPGA through the GPMC bus to form a DSP+ARM+FPGA architecture. The ARM side of the development board is mainly used for control, display, and simple algorithm processing; the FPGA side is mainly used for acquisition, high-speed AD / DA control, IO expansion, etc.; AD, DA, DI, DO, and message communication interface boards are expanded through the FMC interface.

[0056] Function boards include but are not limited to AD function board, DA function board, DI function board, DO function board, message communication function board, and signal amplification function board;

[0057] Among them, the AD function board has 16 AD acquisition channels and adopts the ADC7608 chip. The chip supports 18-bit 8-channel high-speed acquisition and matches the peripheral circuit. It can acquire ±16V voltage signals and 4mA~20mA current signals. The acquisition speed of voltage signals is 1M / s.

[0058] The DA function board has 24 DA acquisition channels (16 of which are output through the panel and 8 are internally connected to the signal amplification module). It uses the DAC9881 chip, which supports 18-bit 8-channel high-speed output. When matched with the peripheral circuit, it can output ±16V voltage signals and 4mA~20mA current signals. The output voltage signal speed is 1M / s.

[0059] The DI function board has 16 DI acquisition channels, supports 0-24V level acquisition, 0-3.5V is logic 0, 4-24V is logic 1, and the acquisition rate is 1M / s;

[0060] The DO function board has 16 DO acquisition channels and relay output. When the logic is 1, the relay is closed, and when the logic is 0, the relay is open. The typical action delay of the relay is 4ms.

[0061] The message communication function board has 8 Ethernet ports and supports the IEC104 communication protocol. The ARM in the development board is responsible for encoding and organizing the communication message format, while the FPGA is responsible for refreshing the changes in real time and refreshing or reading the messages according to a fixed timing.

[0062] The signal amplification function board has 4-channel voltage amplification modules and 4-channel current amplification modules. The DA function board mentioned above provides 8-channel DA signals as the input of the signal amplification module. After signal isolation, filtering and amplification, the amplified voltage output range is 0-120 VRMS, and the current output range is: 0-30 ARMS;

[0063] The voltage power amplifier uses an 1166 direct-coupled power amplifier, with a total of 4 independent units. The voltage power amplifier has a gain of 20 times and is equipped with a short-circuit alarm circuit, DC output protection circuit, power amplifier tube damage protection circuit, and overheating protection circuit.

[0064] The current power amplifier adopts a converter output type Class D switching power amplifier circuit, equipped with alarm protection and overheating protection circuit; the power supply unit consists of two parts: the signal-level power supply adopts a special ultra-thin switching power supply for power equipment (5V+15V / -15V 24V), with a total of 3 groups of outputs; the power amplifier level power supply adopts a 3301 power amplifier power supply, with a total of four groups of outputs: (+55V / -55V), (+186V / -186V), +12V, and +12V / -12V.

[0065] In addition, the digital-to-analog conversion module performs clock synchronization through external GPS signals, supports IEEE1588, IRIG-B, and time synchronization methods, and the synchronization error is less than 1us. When the digital-to-analog conversion modules operate in coordination, the synchronization error is less than 1us.

[0066] The chassis panel is equipped with a power switch, device working status indicator light, etc.

[0067] The chassis adopts a 19-inch, 8U high all-aluminum chassis with 10 slots. Slot 1# and slot 2# are respectively inserted with the power board and main control board. Slots 3# to 9# can be inserted with various functional boards such as AD / DA, DI, DO and message communication. Slot 10# is a dedicated slot for the signal amplification functional board, and slot 10# occupies the width of 3 standard slot spacing.

[0068] like Figure 4 The figure shows the principle diagram of the detection of the network-related characteristics of the phase regulator and the AVC comprehensive coordinated control strategy based on the detection platform provided by the present invention:

[0069] The AVC master station is the master station system in the actual power grid, and the AVC substation is an AVC digital substation model simulated by the detection platform near each phase regulator. The two communicate through the message communication function board of the detection platform. The protocol format is IEC104. The AVC digital substation simulates a slave station and communicates with the actual master station.

[0070] The AVC master station needs complete grid model data for comprehensive coordinated control calculations. It can calculate state estimation and power flow. This data is provided by the detection platform in the form of grid CIM / CIM-E files, and contains equipment information such as lines, main transformers, windings, busbars, circuit breakers, switches, and capacitive reactance. The AVC comprehensive coordinated control calculates real-time grid data, including telemetry and telesignaling data, which is provided by the detection platform and obtained using the C interface.

[0071] The AVC master station sends the upper and lower limits of the high-voltage bus voltage and the reactive power setting value to the condenser substation. It uses remote adjustment to set points and sends control instructions to the AVC digital substation model at fixed intervals.

[0072] The AVC digital substation model then sends the control command to the phase regulator excitation system or the digital phase regulator model (including the excitation system), thereby controlling the phase regulator to observe the phase regulation coordination response.

[0073] The control instructions between the AVC digital substation model and the actual phase-converter excitation system can be transmitted through the ±16V / 4~20mA small signal of the DA function board in the detection platform, or through the IEC104 protocol message transmission of the message communication function board;

[0074] The condenser model is connected to the actual condenser excitation system through actual electrical quantity signals. The detection platform sends the terminal voltage and stator current to the excitation system through the signal amplification function board, and collects the excitation voltage signal through the AD function board.

[0075] Furthermore, during the detection process, the real-time simulator simulates various transient processes of ultra-high voltage direct current transmission and proximal power grids through electromagnetic transient simulation technology, takes the synchronous signal as the operating base, and communicates with the digital-to-analog conversion module every DT through the 5G optical fiber network in accordance with the RapidIO communication protocol. After the FPGA of the digital-to-analog conversion module receives the calculation results of the real-time simulator, it starts the DA and DO conversion process, sends the converted DO signal directly to the device under test, sends the converted AO signal to the signal amplification module for signal amplification, and outputs the actual electrical quantity to the device under test, providing actual current, voltage and other signals for the phase regulator excitation system, and then transmits the current grid information and switch position information to the phase regulator excitation system, and collects the excitation voltage response of the excitation system in real time, and feeds it back to the real-time simulator through the AD function board via the FPGA in real time, and substitutes it into the calculation program to complete the calculation before the next data exchange time arrives. The closed-loop control of the phase regulator body control is repeated in this way;

[0076] At the same time, the AVC master station collects operating information from different locations in the power grid through each AVC digital substation, conducts comprehensive analysis, and issues new voltage and power control strategies to form a closed-loop control of the control strategy. The closed-loop control of the phase-shifting phase itself and the AVC comprehensive coordinated control strategy are intertwined and coupled to operate, thereby verifying the grid-related characteristics of the phase-shifting phase and the AVC comprehensive coordinated control strategy.

[0077] Although the embodiments of the present invention have been shown and described above, it will be understood that the above embodiments are illustrative and are not to be construed as limitations on the present invention. A person skilled in the art may change, modify, replace and modify the above embodiments within the scope of the present invention.

Claims

1. A distributed phase-shifting phase-shifting network-related characteristics and AVC integrated coordinated control strategy detection platform, characterized by: include: A coordinated control system and a plurality of detection platforms communicatively connected to the coordinated control system; The detection platform includes a real-time simulator, an FPGA network card and a digital-to-analog conversion module, wherein the real-time simulator performs high-speed data interaction with the digital-to-analog conversion module through at least one FPGA network card; Its operation method is: S100, the coordinated control system sends the test case to the corresponding test platform; S200. After the test platform obtains the test case, the real-time simulator in the test platform simulates various transient processes of UHVDC transmission and the nearby power grid through electromagnetic transient simulation technology, simulates the AVC substations of phase regulators in different locations, and simultaneously connects to the excitation systems and AVC master stations of multiple phase regulators through the digital-to-analog conversion module to verify the grid-related characteristics of the phase regulators in the regional power grid and the AVC comprehensive coordinated control strategy; S300: The verification results are transmitted back to the coordinated control system, which performs unified summary, analysis and comparison to achieve a large-scale coordinated control and detection function.

2. The distributed phase regulator network-related characteristics and AVC integrated coordinated control strategy detection platform according to claim 1 is characterized by: The real-time simulator is based on a PowerPC computing platform and deploys a VxWorks real-time operating system.

3. The distributed phase regulator network-related characteristics and AVC integrated coordinated control strategy detection platform according to claim 2 is characterized by: The real-time simulator includes multiple CPUs, which are internally connected through a high-speed interconnect chip. The data interaction delay between the multiple CPUs is less than 2us, and the jitter is less than 2us.

4. The distributed phase regulator network-related characteristics and AVC integrated coordinated control strategy detection platform according to claim 1 is characterized by: The real-time simulator and the digital-to-analog conversion module are transmitted via a 5Gbps RapidIO high-speed serial optical fiber link.

5. The distributed phase regulator network-related characteristics and AVC integrated coordinated control strategy detection platform according to claim 1 is characterized by: The digital-to-analog conversion module includes a main control board and a power supply board, an AD / DA function board, a DI function board, a DO function board, a message communication function board and a signal amplification function board electrically connected thereto respectively.

6. The distributed phase regulator network-related characteristics and AVC integrated coordinated control strategy detection platform according to claim 5 is characterized by: The main control board is based on the simulation interface module designed on the ARM+FPGA architecture development platform, and adopts the TL5728F-EVM development board designed with TISitara AM5728+Xilinx Artix-7FPGA. The internal AM5728 communicates with the FPGA through the GPMC bus, forming a DSP+ARM+FPGA architecture.

7. The distributed phase regulator network-related characteristics and AVC integrated coordinated control strategy detection platform according to claim 1 is characterized by: S200 is specifically: The real-time simulator simulates various transient processes of UHVDC transmission and proximal power grids through electromagnetic transient simulation technology. It uses the synchronous signal as the operation base and communicates with the digital-to-analog conversion module every DT. After receiving the calculation results of the real-time simulator, the FPGA of the digital-to-analog conversion module starts the DA and DO conversion process, sends the converted DO signal directly to the device under test, amplifies the converted AO signal, and outputs the actual electrical quantity to the device under test, providing actual current and voltage signals for the phase-shifting excitation system, and then transmits the current grid information and switch position information to the phase-shifting excitation system, and collects the excitation voltage response of the excitation system in real time. The response is fed back to the real-time simulator via the FPGA and substituted into the calculation program to complete the calculation before the next data exchange time. This process is repeated for closed-loop control of the phase-shifting body control. At the same time, the AVC master station collects operating information from different locations in the power grid through each AVC digital substation, conducts comprehensive analysis, and issues new voltage and power control strategies to form a closed-loop control of the control strategy. The closed-loop control of the phase-shifting machine itself and the AVC comprehensive coordinated control strategy are intertwined and coupled to verify the grid-related characteristics of the phase-shifting machine and the AVC comprehensive coordinated control strategy.

Images