A trench Schottky device and a method for manufacturing the same

By using a multi-layer field plate structure and an etch stop layer in the production of trench Schottky devices, the problems of high etching costs and poor uniformity of contact holes are solved, and cost reduction and etch uniformity are achieved.

CN114927421BActive Publication Date: 2025-06-06捷捷微电(南通)科技有限公司
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Patent Information

Application Number
CN202210547545.9
Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
Filing Date
2022-05-18
Publication Date
2025-06-06
Estimated Expiration
2042-05-18

AI Technical Summary

Technical Problem

In the prior art, the cost of contact hole etching is high and the uniformity is difficult to guarantee.

Method used

A multi-layer field plate structure is adopted, including an etch stop layer. By providing the etch stop layer, dry or wet etching is allowed to be used when subsequent etching of contact holes, reducing equipment and production costs, and ensuring uniformity of etching.

Benefits of technology

Through the use of multi-layer field plate structure, the cost of contact hole etching is reduced, and the uniformity of etching is improved, avoiding the use of precision instruments.

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Abstract

The present application provides a trench Schottky device and a method for making the same, and relates to the field of semiconductor technology. First, an epitaxial wafer is provided, wherein the epitaxial wafer includes a trench, and then a multilayer field plate structure is grown based on the sidewall of the trench and the table of the epitaxial wafer; wherein the multilayer field plate structure includes an etch stop layer, and then polysilicon and a dielectric layer are deposited on the surface of the multilayer field plate structure, and then the dielectric layer is etched until the etch stop layer is etched to form a contact hole, and then the field plate structure located on the table of the epitaxial wafer in the contact hole is removed, and finally a barrier metal and a front metal are deposited along the surface of the contact hole. The trench Schottky device and the method for making the same provided by the present application have the advantages of reducing costs and improving the uniformity of contact hole etching.
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Description

Technical Field

[0001] The present application relates to the field of semiconductor technology, and in particular to a trench Schottky device and a method for manufacturing the same. Background Art

[0002] The preparation process of trench Schottky devices has been relatively complete. At present, the common preparation process is generally to perform polycrystalline filling after growing the field plate oxide layer, then deposit the dielectric layer after flattening the polycrystalline, and etch the contact holes using the dry etching process, and then use conventional processes to complete the preparation of trench Schottky devices.

[0003] However, when dry etching the contact holes, high photolithography accuracy is required, so precise equipment is needed, resulting in very high equipment and production costs. In addition, it is difficult to ensure etching uniformity when using dry etching equipment to etch the contact holes.

[0004] In summary, the prior art has the problems of high cost and difficulty in ensuring uniformity when etching contact holes. Summary of the invention

[0005] The purpose of the present application is to provide a trench Schottky device and a method for manufacturing the same, so as to solve the problems in the prior art of high cost and difficulty in ensuring uniformity when etching contact holes.

[0006] In order to achieve the above purpose, the technical solution adopted in the embodiment of the present application is as follows:

[0007] On the one hand, an embodiment of the present application provides a method for manufacturing a trench Schottky device, and the method for manufacturing a trench Schottky device includes:

[0008] Providing an epitaxial wafer, wherein the epitaxial wafer comprises a groove;

[0009] Growing a multi-layer field plate structure based on the sidewall of the trench and the terrace of the epitaxial wafer; wherein the multi-layer field plate structure includes an etch stop layer;

[0010] Depositing polysilicon and a dielectric layer on the surface of the multi-layer field plate structure;

[0011] Etching the dielectric layer until the etching stops at the etching stop layer to form a contact hole;

[0012] Removing the field plate structure located on the mesa of the epitaxial wafer in the contact hole;

[0013] A barrier metal and a front metal are deposited along the surface of the contact hole.

[0014] Optionally, the step of growing a multilayer field plate structure based on the sidewall of the trench and the terrace of the epitaxial wafer includes:

[0015] Growing a buffer oxide layer based on the sidewall of the trench and the terrace of the epitaxial wafer;

[0016] Growing an etch stop layer based on the surface of the buffer oxide layer;

[0017] A field plate oxide layer is grown on the surface of the etch stop layer.

[0018] Optionally, the step of growing an etch stop layer based on the surface of the buffer oxide layer comprises:

[0019] An etch stop layer thinner than the field plate oxide layer is grown based on the surface of the buffer oxide layer.

[0020] Optionally, the step of removing the field plate structure located on the mesa of the epitaxial wafer in the contact hole comprises:

[0021] Removing the etching stop layer located on the mesa of the epitaxial wafer in the contact hole;

[0022] The buffer oxide layer located on the mesa of the epitaxial wafer in the contact hole is removed.

[0023] Optionally, the step of growing a buffer oxide layer based on the sidewall of the trench and the terrace of the epitaxial wafer comprises:

[0024] A buffer oxide layer of 150 to 500 angstroms is grown based on the sidewalls of the trench and the terrace of the epitaxial wafer.

[0025] Optionally, the step of growing a field plate oxide layer based on the surface of the etch stop layer comprises:

[0026] A field plate oxide layer with a thickness of 500 to 5000 angstroms is grown on the surface of the etch stop layer.

[0027] Optionally, the step of etching the dielectric layer until the etching stops at the etching stop layer to form the contact hole includes:

[0028] The dielectric layer is etched using a wet etching process.

[0029] Optionally, the step of etching the dielectric layer until the etching stops at the etching stop layer to form the contact hole includes:

[0030] The dielectric layer is etched using a dry etching process.

[0031] On the other hand, an embodiment of the present application further provides a trench Schottky device, which is manufactured by the above-mentioned trench Schottky device manufacturing method.

[0032] Compared with the prior art, this application has the following beneficial effects:

[0033] The present application provides a trench Schottky device and a method for manufacturing the same. First, an epitaxial wafer is provided, wherein the epitaxial wafer includes a trench, and then a multilayer field plate structure is grown based on the sidewall of the trench and the table of the epitaxial wafer; wherein the multilayer field plate structure includes an etch stop layer, and then polysilicon and a dielectric layer are deposited on the surface of the multilayer field plate structure, and then the dielectric layer is etched until the etch stop layer is etched to form a contact hole, and then the field plate structure located on the table of the epitaxial wafer in the contact hole is removed, and finally a barrier metal and a front metal are deposited along the surface of the contact hole. Since the present application adopts a multilayer field plate structure when manufacturing the field plate structure, and the multilayer field plate structure includes an etch stop layer, by setting the etch stop layer, it is ensured that in the subsequent etching of the contact hole, not only dry etching but also wet etching can be used, and no precision instrument is required, so the cost is reduced. In addition, by setting the etch stop layer, it is ensured that the etching of the contact hole can stop at the position of the etch stop layer during the etching process, thereby ensuring the uniformity of the etching.

[0034] In order to make the above-mentioned objects, features and advantages of the present application more obvious and easy to understand, preferred embodiments are specifically cited below and described in detail with reference to the attached drawings. BRIEF DESCRIPTION OF THE DRAWINGS

[0035] In order to more clearly illustrate the technical solutions of the embodiments of the present application, the drawings required for use in the embodiments will be briefly introduced below. It should be understood that the following drawings only show certain embodiments of the present application and therefore should not be regarded as limiting the scope. For ordinary technicians in this field, other related drawings can be obtained based on these drawings without paying creative work.

[0036] Figure 1 It is a cross-sectional schematic diagram after the groove is etched in the prior art.

[0037] Figure 2 It is a cross-sectional schematic diagram after removing the mask layer in the prior art.

[0038] Figure 3 It is a cross-sectional schematic diagram after the field plate oxide layer is grown in the prior art.

[0039] Figure 4 It is a cross-sectional schematic diagram after polysilicon is deposited in the prior art.

[0040] Figure 5 It is a cross-sectional schematic diagram of polysilicon after planarization in the prior art.

[0041] Figure 6 It is a cross-sectional schematic diagram after the dielectric layer is deposited in the prior art.

[0042] Figure 7It is a cross-sectional schematic diagram after etching the contact hole in the prior art.

[0043] Figure 8 It is a cross-sectional schematic diagram after the barrier metal is deposited in the prior art.

[0044] Fig. 9 It is a cross-sectional schematic diagram after depositing the front metal in the prior art.

[0045] Fig.10 An exemplary flow chart of a method for manufacturing a trench Schottky device provided in an embodiment of the present application.

[0046] Fig.11 Provided in the embodiments of this application Fig.10 An exemplary flowchart of the sub-steps of S104.

[0047] Fig.12 A cross-sectional schematic diagram of a multi-layer field plate structure provided in an embodiment of the present application.

[0048] Fig.13 This is a schematic cross-sectional view of the polysilicon after deposition provided in an embodiment of the present application.

[0049] Fig.14 This is a schematic cross-sectional view of the polysilicon after planarization provided in an embodiment of the present application.

[0050] Fig.15 This is a schematic cross-sectional view of a dielectric layer after deposition provided in an embodiment of the present application.

[0051] Fig.16 A schematic cross-sectional view of the etching of the contact hole according to an embodiment of the present application.

[0052] Fig.17 A schematic cross-sectional view of an embodiment of the present application after removing an etch stop layer and a buffer oxide layer.

[0053] Fig.18 This is a cross-sectional schematic diagram after the deposition of barrier metal and front metal provided in an embodiment of the present application. DETAILED DESCRIPTION

[0054] In order to make the purpose, technical solution and advantages of the embodiments of the present application clearer, the technical solution in the embodiments of the present application will be clearly and completely described below in conjunction with the drawings in the embodiments of the present application. Obviously, the described embodiments are part of the embodiments of the present application, rather than all the embodiments. The components of the embodiments of the present application described and shown in the drawings here can be arranged and designed in various different configurations.

[0055] Therefore, the following detailed description of the embodiments of the present application provided in the accompanying drawings is not intended to limit the scope of the present application for which protection is sought, but merely represents selected embodiments of the present application. Based on the embodiments in the present application, all other embodiments obtained by ordinary technicians in the field without creative work are within the scope of protection of the present application.

[0056] It should be noted that similar reference numerals and letters represent similar items in the following drawings, so once an item is defined in one drawing, it does not need to be further defined and explained in subsequent drawings. At the same time, in the description of this application, the terms "first", "second", etc. are only used to distinguish the description and cannot be understood as indicating or implying relative importance.

[0057] It should be noted that, in this article, relational terms such as first and second, etc. are only used to distinguish one entity or operation from another entity or operation, and do not necessarily require or imply any such actual relationship or order between these entities or operations. Moreover, the terms "include", "comprise" or any other variants thereof are intended to cover non-exclusive inclusion, so that a process, method, article or device including a series of elements includes not only those elements, but also other elements not explicitly listed, or also includes elements inherent to such process, method, article or device. In the absence of further restrictions, the elements defined by the sentence "comprise a ..." do not exclude the existence of other identical elements in the process, method, article or device including the elements.

[0058] In the description of the present application, it should be noted that the terms "upper", "lower", "inside", "outside", etc. indicate orientations or positional relationships based on the orientations or positional relationships shown in the accompanying drawings, or are the orientations or positional relationships in which the product of the application is usually placed when in use. They are only for the convenience of describing the present application and simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, be constructed and operated in a specific orientation, and therefore should not be understood as a limitation on the present application.

[0059] In the description of this application, it is also necessary to explain that, unless otherwise clearly specified and limited, the terms "disposed" and "connected" should be understood in a broad sense, for example, it can be a fixed connection, a detachable connection, or an integral connection; it can be a mechanical connection or an electrical connection; it can be a direct connection, or it can be an indirect connection through an intermediate medium, or it can be the internal communication of two elements. For ordinary technicians in this field, the specific meanings of the above terms in this application can be understood according to specific circumstances.

[0060] In conjunction with the accompanying drawings, some embodiments of the present application are described in detail below. In the absence of conflict, the following embodiments and features in the embodiments can be combined with each other.

[0061] At present, the production process of trench Schottky devices is relatively mature. The following is a brief description of the production process of trench Schottky devices in the prior art in conjunction with the accompanying drawings:

[0062] First, see Figure 1 , a mask layer is first formed on the epitaxial layer, and then trench etching is performed to form a plurality of trenches in the epitaxial layer. Then, refer to Figure 2 After the trench is etched, the mask layer is removed. Figure 3 , grow a field plate oxide layer on the terrace of the epitaxial wafer and the inner wall of the trench, for example, grow SiO 2 . Afterwards, see Figure 4 , a certain thickness of polysilicon is deposited upward from the bottom of the trench. In order to ensure that the trench is completely filled with polysilicon, it is necessary to ensure that the surface of the polysilicon is higher than the table of the epitaxial wafer. Then the polysilicon is flattened. The structure after flattening is as follows Figure 5 As shown in FIG, the purpose of planarization is to make the surface of the polysilicon flush with the surface of the trench. Figure 6 As shown, a dielectric layer is then deposited along the surface of the epitaxial layer. The thickness of the dielectric layer can be set according to actual needs. Figure 7 After the dielectric layer is deposited, contact holes need to be etched to expose part of the polysilicon. Figure 8 and Fig. 9 Then, the barrier metal and the front metal are sequentially deposited along the contact hole. Conventional processes are subsequently used to make trench Schottky devices, such as defining active areas and making electrodes, which will not be described in detail here.

[0063] Although the existing preparation process is relatively mature, the equipment and production costs are very high due to the high photolithography precision required when etching contact holes. DUV (deep ultraviolet) processing is required for 0.35um and below. In addition, only dry etching equipment can be used in the post-etching process, and there are many problems such as etching uniformity, field plate oxide layer loss, silicon damage, etc. In addition, since the thickness of the field plate oxide layer is relatively thick when growing the field plate oxide layer, and the field plate oxide layer is generally made by silicon oxide epitaxial layer, for example Figure 2 and Figure 3 As shown, in Figure 2 After the grooves are etched in the Figure 3 The field plate oxide layer structure shown in the figure is actually Figure 2 The surface of the epitaxial layer (made of silicon) is oxidized to form SiO 2 , thus forming Figure 3Therefore, in the prior art, a large amount of silicon is consumed when manufacturing the field plate oxide layer.

[0064] In view of this, the present application provides a method for manufacturing a trench Schottky device, and simultaneously sets a multi-layer field plate structure to achieve the effect of reducing costs and improving the quality of contact hole etching.

[0065] The following is an exemplary description of the method for manufacturing the trench Schottky device described in the present application:

[0066] As an alternative implementation, see Fig.10 , the trench Schottky device manufacturing method comprises:

[0067] S102, providing an epitaxial wafer, wherein the epitaxial wafer includes a groove.

[0068] S104, growing a multi-layer field plate structure based on the sidewalls of the trench and the terrace of the epitaxial wafer; wherein the multi-layer field plate structure includes an etch stop layer.

[0069] S106, depositing polysilicon and a dielectric layer on the surface of the multi-layer field plate structure.

[0070] S108, etching the dielectric layer until the etching stops at the etching stop layer to form a contact hole.

[0071] S110, removing the field plate structure located on the mesa of the epitaxial wafer in the contact hole.

[0072] S112, depositing barrier metal and front metal along the surface of the contact hole.

[0073] Since the present application adopts a multi-layer field plate structure when manufacturing the field plate structure, and the multi-layer field plate structure includes an etch stop layer, by setting the etch stop layer, it is ensured that when etching the contact hole subsequently, not only dry etching but also wet etching can be used, and no precision instrument is required, so the cost is reduced. In addition, by setting the etch stop layer, it is ensured that the etching of the contact hole can stop at the position of the etch stop layer during the etching process, thereby ensuring the uniformity of the etching.

[0074] Among them, the term "growing B on the surface of A" provided in this application means that for A, it includes two sides, namely the front side and the back side, and the back side faces the substrate, the front side faces the opposite direction of the substrate, and B is connected to the front side of A.

[0075] The epitaxial wafer described in the present application substantially includes a substrate and an epitaxial layer. On this basis, the step S102 includes:

[0076] S1021, provide a substrate.

[0077] S1022, growing an epitaxial layer based on the surface of the substrate.

[0078] S1023, etching a groove based on the epitaxial layer.

[0079] Among them, the present application does not limit the materials of the substrate and the epitaxial layer. For example, the substrate can be a SiC substrate, a Si substrate, a sapphire substrate, etc., the epitaxial layer can be homoepitaxial or heteroepitaxial, and a silicon substrate and a silicon epitaxial layer can be selected. Since the epitaxial growth process is relatively mature, the epitaxial growth process will not be described in detail. For example, the epitaxial layer can be grown by a vapor phase epitaxial process.

[0080] After the epitaxial layer is formed, a groove can be etched in the epitaxial layer. Figure 1 When etching a groove in the epitaxial layer, a mask layer may be provided for etching. The mask layer may be a photoresist. After coating the photoresist on the surface of the epitaxial layer and defining a patterned structure, a groove of a certain depth may be etched based on the photoresist on the surface. For example, a wet etching process may be used to etch a groove in the epitaxial layer according to the pattern of the photoresist. It is understandable that the depth of the groove may be set according to actual needs.

[0081] After etching the trench, the photoresist layer needs to be removed to form Figure 2 The present application does not limit the number of grooves. Figure 2 Only two grooves are shown in the figure, but in actual application, the number of grooves is not limited. For example, the number of grooves can be 15 or 20.

[0082] After etching the trench, a field plate oxide layer needs to be grown. In this application, a multi-layer field plate structure is used to replace the single-layer field plate oxide layer structure in the prior art. As an implementation method, please refer to Fig.11 , S104 includes:

[0083] S1041, growing a buffer oxide layer based on the sidewall of the trench and the terrace of the epitaxial wafer.

[0084] S1042, an etch stop layer is grown based on the surface of the buffer oxide layer.

[0085] S1043, growing a field plate oxide layer on the surface of the etch stop layer.

[0086] Among them, see Fig.12 The multilayer field plate structure provided in the present application includes a buffer oxide layer, an etch stop layer and a field plate oxide layer, wherein the buffer layer is used to play a buffering role between the etch stop layer and the epitaxial layer so that the etch stop layer can grow on the epitaxial layer with high quality. The field plate oxide layer serves as a field oxygen structure and has the same function as the existing field oxygen structure.

[0087] Since the field plate structure provided in the present application includes a three-layer structure, the buffer oxide layer actually only needs to play a buffering role, so the thickness of the buffer oxide layer can be made relatively thin. For example, in one implementation, a buffer oxide layer of 150 to 500 angstroms can be grown based on the sidewalls of the trench and the table of the epitaxial wafer.

[0088] Since the epitaxial layer is generally made of silicon, and in the prior art, field oxygen is generally obtained by oxidizing the silicon on the surface of the epitaxial layer to obtain silicon dioxide, a large amount of silicon is consumed. In the present application, due to the use of a multi-layer deposition structure, the buffer oxide layer can be set to be thinner, and less silicon is consumed when making the buffer oxide layer, and the width of the groove can be made relatively large, which can reach 0.5um.

[0089] The etch stop layer is used as a reference for stopping etching when subsequently etching the contact hole, thereby reducing costs and not being limited to dry etching, thereby ensuring device uniformity.

[0090] The field plate oxide layer is used as a field oxide structure. In order to ensure that the multi-layer field plate structure does not affect the performance of the device, the thickness of the field plate oxide layer is relatively thick. As an implementation method, the thickness of the etch stop layer is less than the thickness of the field plate oxide layer. In addition, the thickness of the field plate oxide layer can reach 500 to 5000 angstroms.

[0091] It should be noted that the buffer oxide layer provided in the present application may be SiO 2 The material of the etch stop layer can be SiN or AlN, and the field plate oxide layer can be SiO 2 layer.

[0092] After making the multi-layer field plate structure, refer to Fig.13 , polysilicon can be deposited in the trench and on the table of the epitaxial layer, wherein the deposited polysilicon is doped polysilicon, and the thickness of the polysilicon can be 4000 to 15000 angstroms.

[0093] See also Fig.14 , and then a polycrystalline planarization process can be performed, that is, the polycrystalline silicon on the table of the epitaxial wafer is removed, and only the polycrystalline silicon in the groove is retained. Among them, the present application does not limit the planarization process, for example, polycrystalline oxidation, CMP or polycrystalline etching can be used to achieve polycrystalline planarization.

[0094] See also Fig.15 , continue to deposit a dielectric layer, for example, the dielectric layer can be made of an oxide layer, LPTEOS, PETEOS, BPSG, PSG and other materials, and the thickness of the dielectric layer can be 2000 to 10000 angstroms. Among them, the dielectric layer used in this application is SiO 2Therefore, in the present application, the dielectric layer and the field plate oxide layer are made of the same material. When the dielectric layer needs to be removed, the field plate oxide layer located on the mesa of the epitaxial wafer can actually be removed at the same time.

[0095] Based on this, see Fig.16 , contact hole etching can be performed. As an implementation method, the present application can use a wet etching process to etch the dielectric layer. During the etching, the field plate oxide layer can be etched synchronously and terminated at the etching stop layer. By setting an etching stop layer, a wet etching process can be used instead of a traditional dry etching process, which reduces the cost while ensuring the uniformity of the device surface.

[0096] Of course, as another implementation method, the present application can also use a dry etching process to etch the dielectric layer. Compared with the traditional etching process, since there is no need to use a high-precision etching instrument, it can also reduce costs. Of course, since it stops at the etching stop layer, the uniformity of the device surface is also guaranteed.

[0097] After etching the contact hole, the etch stop layer and the buffer oxide layer on the mesa of the epitaxial layer in the etch hole are removed. The structure after removing the etch stop layer and the buffer oxide layer is as follows: Fig.17 As shown, it can be understood that the exposed etch stop layer is removed first, and then the exposed buffer oxide layer is removed.

[0098] It should be noted that when removing the etch stop layer and the buffer oxide layer, only the etch stop layer and the buffer oxide layer exposed on the table surface will be removed, while the etch stop layer and the buffer oxide layer located in the groove will be retained. At the same time, since the thickness of the buffer oxide layer is relatively thin, when using the oxide layer etching solution to remove the buffer oxide layer, the over-etching amount can be accurately controlled, and the wet etching does not damage the silicon epitaxial layer.

[0099] See also Fig.18 , and then continue to deposit barrier metal and front metal along the surface of the contact hole, wherein the barrier metal can be deposited Ti, Ni, NiPt, Mo, Cr, V and other metals to form a Schottky barrier layer after annealing, and the front metal can be obtained by depositing Al or Ti, Ni, Ag and etching a pattern, which is not limited here.

[0100] Afterwards, conventional processes are used to manufacture trench Schottky devices, such as defining active regions and manufacturing electrodes, which will not be described in detail here.

[0101] The trench Schottky device manufacturing method provided in this application has the following effects:

[0102] 1. The field plate adopts a multi-layer thin film field plate structure, which consumes less silicon.

[0103] 2. The multi-layer thin film field plate structure can reduce the accuracy requirements of trench lithography.

[0104] 3. The multi-layer thin film field plate structure can provide a stop layer for contact hole etching, which can avoid field plate damage during subsequent dry or wet etching.

[0105] 4. The contact holes of the multi-layer thin film field plate structure can be processed using a wet process, reducing equipment and production costs.

[0106] Based on the above implementation, an embodiment of the present application further provides a trench Schottky device, which is manufactured using the above trench Schottky device manufacturing method.

[0107] In summary, the present application provides a trench Schottky device and a method for manufacturing the same. First, an epitaxial wafer is provided, wherein the epitaxial wafer includes a trench, and then a multilayer field plate structure is grown based on the sidewall of the trench and the table of the epitaxial wafer; wherein the multilayer field plate structure includes an etch stop layer, and then polysilicon and a dielectric layer are deposited on the surface of the multilayer field plate structure, and then the dielectric layer is etched until the etch stop layer is etched to form a contact hole, and then the field plate structure located on the table of the epitaxial wafer in the contact hole is removed, and finally a barrier metal and a front metal are deposited along the surface of the contact hole. Since the present application adopts a multilayer field plate structure when manufacturing the field plate structure, and the multilayer field plate structure includes an etch stop layer, by setting the etch stop layer, it is ensured that when etching the contact hole subsequently, not only dry etching but also wet etching can be used, and no precision instrument is required, so the cost is reduced. In addition, by setting the etch stop layer, it is ensured that the etching of the contact hole can stop at the position of the etch stop layer during the etching process, thereby ensuring the uniformity of the etching.

[0108] The above description is only the preferred embodiment of the present application and is not intended to limit the present application. For those skilled in the art, the present application may have various modifications and variations. Any modification, equivalent replacement, improvement, etc. made within the spirit and principle of the present application shall be included in the protection scope of the present application.

[0109] It will be apparent to those skilled in the art that the present application is not limited to the details of the exemplary embodiments described above, and that the present application can be implemented in other specific forms without departing from the spirit or essential features of the present application. Therefore, the embodiments should be considered exemplary and non-limiting in all respects, and the scope of the present application is defined by the appended claims rather than the above description, and it is intended that all changes falling within the meaning and scope of the equivalent elements of the claims be included in the present application. Any reference numeral in a claim should not be considered as limiting the claim to which it relates.

Claims

1. A method for manufacturing a trench Schottky device, It is characterized in that The method for manufacturing a trench Schottky device comprises: Providing an epitaxial wafer, wherein the epitaxial wafer comprises a groove; Growing a multi-layer field plate structure based on the sidewall of the trench and the terrace of the epitaxial wafer; wherein the multi-layer field plate structure includes an etch stop layer; Depositing polysilicon on the surface of the multi-layer field plate structure, and depositing a dielectric layer after performing a polycrystalline planarization process; Etching the dielectric layer by wet etching until the etching stop layer is reached to form a contact hole, wherein the contact hole exposes a groove; Removing the field plate structure located on the mesa of the epitaxial wafer in the contact hole; Depositing barrier metal and front metal along the surface of the contact hole; wherein, The step of growing a multilayer field plate structure based on the sidewall of the trench and the terrace of the epitaxial wafer comprises: Growing a buffer oxide layer based on the sidewall of the trench and the terrace of the epitaxial wafer; Growing an etch stop layer based on the surface of the buffer oxide layer; A field plate oxide layer is grown on the surface of the etch stop layer.

2. The method for manufacturing a trench Schottky device according to claim 1, It is characterized in that The step of growing an etch stop layer based on the surface of the buffer oxide layer comprises: An etch stop layer thinner than the field plate oxide layer is grown based on the surface of the buffer oxide layer.

3. The method for manufacturing a trench Schottky device according to claim 1, It is characterized in that The step of removing the field plate structure located on the mesa of the epitaxial wafer in the contact hole comprises: Removing the etching stop layer located on the mesa of the epitaxial wafer in the contact hole; The buffer oxide layer located on the mesa of the epitaxial wafer in the contact hole is removed.

4. The method for manufacturing a trench Schottky device according to claim 1, It is characterized in that The step of growing a buffer oxide layer based on the sidewall of the trench and the terrace of the epitaxial wafer comprises: A buffer oxide layer of 150 to 500 angstroms is grown based on the sidewalls of the trench and the terrace of the epitaxial wafer.

5. The method for manufacturing a trench Schottky device according to claim 1, It is characterized in that The step of growing a field plate oxide layer on the surface of the etch stop layer comprises: A field plate oxide layer with a thickness of 500 to 5000 angstroms is grown on the surface of the etch stop layer.

6. The method for manufacturing a trench Schottky device according to claim 1, It is characterized in that The step of providing an epitaxial wafer comprises: providing a substrate; growing an epitaxial layer based on the surface of the substrate; A trench is etched based on the epitaxial layer.

7. A trench Schottky device, It is characterized in that The trench Schottky device is manufactured by the trench Schottky device manufacturing method according to any one of claims 1 to 6.

Citation Information

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