A capacitance measurement method for eliminating parasitic capacitance in a measurement circuit

Abstract

The present invention discloses a capacitance measurement method for eliminating parasitic capacitance in a measurement circuit. By generating negative capacitance based on the Miller effect to cancel out the parasitic capacitance, it solves the problems of limited measurement range and low measurement accuracy caused by parasitic capacitance in the current capacitance measurement field. At the same time, it can dynamically adapt to changes in the parasitic environment that cause changes in parasitic capacitance through logical functions, solving the problem that ordinary circuits cannot eliminate the influence of such parasitic capacitance, thereby improving the accuracy and measurement range of capacitance measurement. This method can be widely applied in fields such as capacitance sensors and touch screen designs.

Description

Technical Field

[0001] The present invention relates to a capacitance measurement method, and particularly to a capacitance measurement method for eliminating parasitic capacitance in a measurement circuit. Background Art

[0002] Capacitors are very frequently used electronic components in terms of both the types and quantities of use. With the development of electronic materials, processes, etc., on the one hand, capacitors are developing towards large capacitance and high frequency, and on the other hand, due to the requirement of equipment miniaturization development, the use of capacitors is becoming more and more widespread, which requires the measurement circuit to adapt to this continuous development need.

[0003] As the requirements for the accuracy and speed of capacitance measurement are getting higher and higher, the errors caused by some non-ideal factors in the actual circuit account for an increasingly large proportion, greatly affecting capacitance measurement. When measuring capacitance, in the internal structure of the circuit, the miniaturization of devices and connecting wires will bring parasitic capacitance, and some parasitic capacitances are even comparable to the capacitance to be measured, deteriorating the detection results. Therefore, in modern capacitance measurement technologies, more and more methods are applied to eliminate parasitic capacitance, such as the method of increasing the initial capacitance, the driven cable technique, and the overall shielding method. The method of increasing the initial capacitance value can reduce the parasitic capacitance relative to the capacitance of the capacitance sensor, but it is restricted by processing technology, assembly technology, accuracy, indication range, breakdown voltage, etc. To eliminate parasitic capacitance using the driven cable technique, it is necessary to strictly achieve that the amplification factor of the driving amplifier is equal to 1 and the phase shift between the input and output is zero in a very wide frequency band, and the design requirements are relatively high. The overall shielding method is to use the good absorption and reflection ability of metal materials for electromagnetic waves to carry out anti-interference, and shield the capacitive sensor, the measurement circuit adopted, the transmission cable, etc. with the same shielding shell, which will make the structure become relatively complex. These methods can reduce the influence of parasitic capacitance, but they bring more complex design structures and manufacturing costs, especially for integrated circuit design, occupying too much area. In addition, when environmental temperature, etc. changes, it causes the size of the parasitic capacitance to change, and the above traditional capacitance measurement methods cannot eliminate the influence of parasitic capacitance changing with the environment. Summary of the Invention

[0004] Object of the Invention: Aiming at the above-mentioned prior art, a capacitance measurement method for eliminating parasitic capacitance in a measurement circuit is proposed.

[0005] Technical Solution: A capacitance measurement method for eliminating parasitic capacitance in a measurement circuit includes: before the capacitance to be measured is connected to the capacitance measurement module, generating a negative capacitance through the Miller effect to cancel the equivalent input parasitic capacitance, and then connecting the capacitance to be measured for capacitance measurement.

[0006] Further, if the equivalent input parasitic capacitance detected by the capacitance measurement module is greater than the set threshold, the magnitude of the negative capacitance generated by the Miller effect is gradually increased until the condition is met, and then the capacitance to be measured is connected for capacitance measurement.

[0007] Further, after detecting and canceling the equivalent input parasitic capacitance every t time interval, the capacitance to be measured is measured again to realize the change of parasitic capacitance in adaptive capacitance measurement.

[0008] Further, the capacitance measurement module is used to convert the capacitance magnitude into an electrical analog quantity.

[0009] Further, the negative capacitance is generated by a negative capacitance generator, which consists of a non-inverting amplifier with adjustable gain and a feedback capacitor connected across the non-inverting amplifier. The output negative capacitance is connected in parallel at the input end of the capacitance measurement module.

[0010] Further, the capacitance value of the negative capacitance is adjusted by changing the capacitance value of the feedback capacitor connected across the non-inverting amplifier.

[0011] Further, the feedback capacitor includes (n + 1) capacitors connected in parallel, and a pair of switches are respectively provided on the branches of each capacitor, and the capacitor is located between the two switches.

[0012] Further, among the (n + 1) capacitors connected in parallel, the capacitance of the first capacitor is C B , starting from the second capacitor, the capacitance of the i-th capacitor is 2 (i-2) C B .

[0013] Beneficial effects: To solve the problems that during capacitance measurement, parasitic capacitance is generated due to design, manufacturing, and usage environment, resulting in limited capacitance measurement range and change of parasitic capacitance due to environmental changes, ultimately leading to measurement deviation. The present invention generates a negative capacitance based on the Miller effect to cancel the parasitic capacitance, solving the problems of limited measurement range and low measurement accuracy caused by parasitic capacitance in the current capacitance measurement field. At the same time, it can dynamically adapt to the change of parasitic capacitance caused by the change of parasitic environment through logical functions, solving the problem that ordinary circuits cannot eliminate the influence of such parasitic capacitance, thereby improving the accuracy and measurement range of capacitance measurement. This method can be widely applied in fields such as capacitance sensors and touch screen designs. Description of the Drawings

[0014] Figure 1 is the hardware structure block diagram based on the present invention;

[0015] Figure 2 is the structure block diagram of the negative capacitance generator in the invention;

[0016] Figure 3 Schematic diagram of the feedback capacitance structure of the negative capacitance generator;

[0017] Figure 4 Flow chart of the method of the present invention. Detailed implementation mode

[0018] The present invention will be further explained below with reference to the accompanying drawings.

[0019] The hardware circuit structure for implementing the method of the present invention is as Figure 1 shown, including the capacitance C to be measured X , input switch 2, logic control module 4, negative capacitance generator 5, and capacitance measurement module 6.

[0020] As Figure 2 shown, the negative capacitance generator 5 is composed of a non-inverting amplifier 501 and a feedback capacitance C F connected across the non-inverting amplifier 501. As Figure 3 shown, the feedback capacitance C F includes (n + 1) capacitors 503 connected in parallel. A pair of switches 504 are respectively provided on the branch of each capacitor 503. The capacitor is located between the two switches, that is, each capacitor is connected to the circuit under the simultaneous control of a pair of switches, and the switch pair is controlled by the logic module 4. In the capacitor array, the size of the first capacitor is C B , starting from the second capacitor, the size of the i-th capacitor is 2 (i-2) C B , that is, starting from the second capacitor, its capacitance increases in an arithmetic progression, and the difference is C B .

[0021] The capacitance C to be measured X is electrically connected to the input switch 2. The logic control module 4 is electrically connected to the negative capacitance generator 5 and the capacitance measurement module 6, and can control the input switch 2 and the switches in the feedback capacitance C F .

[0022] The equivalent input parasitic capacitance C P is the sum of all parasitic capacitances equivalent at the input end of the capacitance detection module 6 when the negative capacitance generator 5 does not connect the feedback capacitance C F . The equivalent input parasitic capacitance C P is the equivalent sum of all parasitic capacitances of the external capacitance to be measured interface end, the input end of the capacitance measurement module, and the input switch. The specific value of the equivalent input parasitic capacitance C P is caused by various factors such as the specific circuit design scheme adopted, the type of process used in the circuit, the measurement working environment, and process deviation, and is an uncertain value capacitance.

[0023] Based on the above structure, a capacitance measurement method for eliminating parasitic capacitance in a measurement circuit according to the present invention, for the capacitance C to be measured X Before accessing the capacitance measurement module 6 through the input switch 2, a negative capacitor 502 is generated by a negative capacitor generator 5 to cancel the equivalent input parasitic capacitance C P , and then the capacitance C to be measured is accessed X for capacitance measurement.

[0024] Specifically, the negative capacitor generator 5 generates a negative capacitor through the Miller effect. As Figure 2 shown, the feedback capacitor C F and the non-inverting amplifier 501 are actual devices. The capacitance equivalent to the input end of the non-inverting amplifier 501 is determined by the magnitude of the feedback capacitor C F and the amplification factor A V of the non-inverting amplifier 502 together. According to the Miller equivalent theorem, the magnitude of this capacitance is (1 - A V )C F . Since the gain of the non-inverting amplifier 501 is positive, when the amplification factor A V is greater than 1, the capacitance equivalent to the input end of the non-inverting amplifier 501 will become negative, thus providing a negative capacitor 502. The range of the negative capacitor 502 generated by the negative capacitor generator 5 should cover the variation range of the equivalent input parasitic capacitance C P .

[0025] The capacitance measurement module 6 can convert the capacitance value into an electrical quantity, and the electrical quantity can be recognized by the logic control module 4. When the negative capacitor 502 generated by the negative capacitor generator 5 through the Miller effect cancels the equivalent input parasitic capacitance C P , if the equivalent input parasitic capacitance C P detected by the capacitance measurement module 6 is greater than the set threshold, the magnitude of the negative capacitor 502 generated through the Miller effect is increased step by step until the condition is met, and then the capacitance C to be measured is accessed X for capacitance measurement. Specifically, the logic control module 4 performs logic control through the output quantity δ generated by the capacitance measurement module 6. The logic control module 4 includes a set error ε. In the state where the input switch 2 is disconnected, if the electrical quantity δ > ε, it means that the parasitic capacitance cancellation is not successful; if the electrical quantity δ < ε, it means that the parasitic capacitance cancellation is successful.

[0026] As Figure 3 shown, the feedback capacitor array structure can provide the minimum capacitance value C B , and can provide the maximum capacitance value (2 n + 1)C B . When the parasitic capacitance cancellation is not successful, the logic control module 4 controls the switch pair in the negative capacitor generator 5 to make the increment of the feedback capacitor C F be C B each time.。A negative capacitance generator 5 generates a negative capacitance 502 equal in magnitude to the equivalent input parasitic capacitance C P The negative capacitance 502 is connected in parallel at the input end of the capacitance measurement module 6, that is, the negative capacitance 502 is connected in parallel with the parasitic capacitance C P in parallel to achieve the purpose of canceling the parasitic capacitance. After canceling the parasitic capacitance, control the input switch 2 to close, and connect the capacitance C to be measured X to the capacitance measurement module 6 for capacitance measurement.

[0027] In the above process, the equivalent input parasitic capacitance C that changes with the environment is redetected and canceled every t time P After that, the capacitance C to be measured X is measured again to realize the change of the parasitic capacitance in the adaptive capacitance measurement.

[0028] As Figure 4 shown, a specific embodiment of the method of the present invention includes:

[0029] S1: The capacitance C to be measured X is connected to the circuit, and the circuit starts to work;

[0030] S2: The logic control module 4 controls the input switch 2 to disconnect, which is equivalent to not connecting the measurement capacitance C X , looking into from the input end, there is only the equivalent input parasitic capacitance C P ;

[0031] S3: The logic control module 4 controls all switch pairs in the negative capacitance generator 5 to disconnect, that is, the feedback capacitance C F is not connected;

[0032] S4: At this time, the capacitance measurement module 6 converts the magnitude of the equivalent input parasitic capacitance C P at this moment into an electrical quantity δ, and compares it with the set error ε. If the electrical analog quantity δ > ε, then execute S5, otherwise execute S6.

[0033] S5: The logic control module 4 controls the switch pairs in the negative capacitance generator 5 so that the increase in the feedback capacitance array is C B , and the magnitude of this feedback capacitance array connected to the circuit becomes C F ’ , and the gain generated by the non-inverting amplifier is A V . Due to the Miller effect, the feedback capacitance C F ’ connected across the non-inverting amplifier will equivalently generate a negative capacitance at the input end, and the capacitance value is (1 - A V1 )C F , which is connected in parallel with the parasitic capacitance; after completing the above operations, execute S4 again;

[0034] S6: The logic control module 4 controls the input switch 2 to close, that is, to turn on the capacitor C to be measured. At this time, the electrical quantity measured by the capacitance measurement module 6 is the corresponding capacitance conversion value. X

[0035] S7: After a time t, due to the change in the application environment, the equivalent input parasitic capacitance C P causes the logic control module 4 to control the circuit to restart and jump to execute S1, adaptively eliminating the influence of the changing parasitic capacitance, and obtaining a new capacitance conversion value of the capacitor C to be measured; X

[0036] S8: Calculate the number of measurements. If the number of measurements is less than the predetermined number n, return to S2; otherwise, complete the measurement step.

[0037] The above is only the preferred embodiment of the present invention. It should be noted that for those of ordinary skill in the art, without departing from the principle of the present invention, several improvements and refinements can be made, and these improvements and refinements should also be regarded as the protection scope of the present invention.

Claims

1. A capacitance measurement method for eliminating parasitic capacitance in a measurement circuit, characterized in that, Including: Before the capacitance to be measured is connected to the capacitance measurement module, a negative capacitance is generated through the Miller effect to cancel the equivalent input parasitic capacitance, and then the capacitance to be measured is connected for capacitance measurement. If the equivalent input parasitic capacitance detected by the capacitance measurement module is greater than the set threshold, the magnitude of the negative capacitance generated through the Miller effect is increased step by step until the condition is met, and then the capacitance to be measured is connected for capacitance measurement.

2. The capacitance measurement method for eliminating parasitic capacitance in a measurement circuit according to claim 1, characterized in that, After detecting and canceling the equivalent input parasitic capacitance every t time interval, the capacitance to be measured is measured again to realize the change of parasitic capacitance in adaptive capacitance measurement.

3. The capacitance measurement method for eliminating parasitic capacitance in a measurement circuit according to claim 1, characterized in that, The capacitance measurement module is used to convert the capacitance magnitude into an electrical analog quantity.

4. The capacitance measurement method for eliminating parasitic capacitance in a measurement circuit according to claim 1, characterized in that, The negative capacitance is generated by a negative capacitance generator, which is composed of a non-inverting amplifier with adjustable gain and a feedback capacitance connected across the non-inverting amplifier. The output negative capacitance is connected in parallel at the input end of the capacitance measurement module.

5. The capacitance measurement method for eliminating parasitic capacitance in a measurement circuit according to claim 4, characterized in that, The capacitance value of the negative capacitance is adjusted by changing the capacitance value of the feedback capacitance connected across the non-inverting amplifier.

6. The capacitance measurement method for eliminating parasitic capacitance in a measurement circuit according to claim 5, characterized in that, The feedback capacitance includes (n + 1) capacitors connected in parallel, and a pair of switches are respectively arranged on the branches of each capacitor, and the capacitor is located between the two switches.

7. The capacitance measurement method for eliminating parasitic capacitance in a measurement circuit according to claim 6, characterized in that, Among the (n + 1) capacitors connected in parallel, the first capacitor has a capacitance of C B , starting from the second capacitor, the capacitance of the i-th capacitor is 2 (i-2) C B .

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