Film bulk acoustic resonator with diverging electrodes

Abstract

An acoustic resonator has a first electrode with a first planar portion. A second electrode with a second planar portion is disposed parallel to the first planar portion. The second electrode has a diverging end portion defining a gap. A piezoelectric layer is disposed between and contacts both the first and second planar portions. The diverging end portion of the second electrode also contacts the piezoelectric layer. The gap is formed in the perimeter of each resonator within a filter. The gap is formed in a top electrode, which is typically formed of molybdenum, but can also be formed of other metals. Unlike the gap between the top electrode and the piezoelectric material, the gap described herein is entirely within the second electrode. This structure is compatible with an internal passivation layer, which enables a single crystal piezoelectric layer and a larger bottom electrode.

Description

BACKGROUND

[0001] Wireless communication devices, such as cellular telephones, typically include radio frequency (RF) filters to improve both reception and transmission of signals. RF filters can pass desired frequencies and reject undesired frequencies, enabling band selection and allowing the cellular telephone to process only intended signals. One preferred filter system utilizes resonators based on the piezoelectric effect, as these filter systems facilitate overall system miniaturization. In piezoelectric-based resonators, acoustic resonance modes are generated in a piezoelectric material. The acoustic waves are converted to electrical waves for electrical applications.

[0002] Two common types of acoustic resonators are surface acoustic wave resonators (SAW) and bulk acoustic wave resonators (BAW). In surface acoustic wave resonators, the acoustic signal is carried by surface waves. In bulk acoustic wave resonators, the acoustic signal is obtained through the bulk of the resonator film. One type of BAW is a film bulk acoustic resonator (FBAR). An FBAR includes an acoustic stack having a layer of piezoelectric material disposed between two electrodes. Acoustic waves achieve resonance across the acoustic stack, with the resonant frequency of the wave determined by the materials making up the stack and the configuration of the materials. FBARs typically resonate at gigahertz (GHz) frequencies.

[0003] FBARs and fabrication methods are presented in U.S. Patent No. 10,389,331 B2 to Dror Hurwitz, entitled “Single Crystal Piezoelectric RF Resonators and Filters,” the applicant of the present patent application. US 10,389,331 B2 is incorporated by reference herein in its entirety.

[0004] The quality of a resonator is given by its Q factor, the ratio of the stored energy to the dissipated power. A high Q factor indicates that the filter loses little energy during operation. This translates into lower insertion loss and a steeper skirt for discrimination of nearby bands. Ideally, a BAW or FBAR excites only thickness extensional modes, longitudinal mechanical waves propagating in the thickness direction (Z-axis) of the piezoelectric layer. Unfortunately, there are also transverse modes generated in the acoustic stack that propagate parallel to the surface of the piezoelectric layer (x-axis and y-axis). These transverse modes affect the Q factor, as energy is lost at the interfaces of the FBAR device.

[0005] U.S. Patent No. 8,902,023 B2 to Choy et al., entitled "Acoustic Resonator Structure Having an Electrode with a Cantilevered Portion," discloses forming a gap between a cantilevered electrode of an FBAR and the piezoelectric material. The gap is filled with a low acoustic impedance material such as air, carbon, doped Si02, a dielectric resin, or benzocyclobutene. The gap suppresses the lateral mode, thereby increasing the Q factor of the FBAR. SUMMARY

[0006] Disclosed herein is an acoustic resonator having a first electrode having a first planar portion. A second electrode having a second planar portion is disposed parallel to the first planar portion. The second electrode has a bifurcated end portion defining a gap. A piezoelectric layer is disposed between and contacts both the first planar portion and the second planar portion. The bifurcated end portion of the second electrode also contacts the piezoelectric layer.

[0007] The gap is formed in the perimeter of each resonator within the filter. The gap is formed in the top electrode, which is typically formed of molybdenum, but can also be formed of other metals. Unlike the gap between the top electrode and the piezoelectric material shown in US 8,902,023 B2, the gap described herein is wholly within the second electrode. This structure provides advantages with respect to yield and cost. In addition, this structure is compatible with an internal passivation layer, which enables a single crystal piezoelectric layer and a larger bottom electrode.

[0008] While a larger bottom electrode can seem to be a disadvantage due to increasing resonator size and filter chip (die) size, in high frequency (above 3 GHz) products and applications, particularly scandium (Sc) doped piezoelectric products, the size of the resonator is smaller, freeing up space on the chip. The larger bottom electrode improves the power handling of the filter. BRIEF DESCRIPTION OF DRAWINGS

[0009] Figure 1 The first step according to the method of manufacturing an acoustic resonator as described herein is a cross-sectional view of a starting wafer.

[0010] Figure 2 The second step according to the method of manufacturing is a cross-sectional view showing etching of the piezoelectric layer.

[0011] Figure 3 The third step according to the method of manufacturing is a cross-sectional view showing etching of the first (bottom) electrode and the gold tie layer.

[0012] Figure 4A buffer oxide etch of the buried oxide layer is shown according to a fourth step of the fabrication method.

[0013] Figure 5 Deposition of a passivation layer on the top surface in preparation for deposition of the second (top) electrode is shown according to a fifth step of the fabrication method.

[0014] Figure 6 Deposition of a material that will form the second (top) electrode is shown according to a sixth step of the fabrication method.

[0015] Figure 7 Mass loading of the second (top) electrode material is shown according to a seventh step of the fabrication method.

[0016] Figure 8 Deposition of a sacrificial layer used to form the acoustic gap and bifurcated end of the second electrode is shown according to an eighth step of the fabrication method.

[0017] Figure 9 Selective removal of a portion of the sacrificial layer to form the precursor of the acoustic gap and bifurcated end is shown according to a ninth step of the fabrication method.

[0018] Figure 10 Selective deposition of additional second (top) electrode material is shown according to a tenth step of the fabrication method.

[0019] Figure 11 Top surface passivation is shown according to an eleventh step of the fabrication method.

[0020] Figure 12 Selective removal of portions of the top surface passivation is shown according to a twelfth step of the fabrication method.

[0021] Figure 13 Selective removal of additional top surface passivation layer, second electrode material, and sacrificial layer to form the bifurcated end of the second electrode is shown according to a thirteenth step of the fabrication method.

[0022] Figure 14 Deposition of a gold pad for electrical interconnection is shown according to a fourteenth step of the fabrication method.

[0023] Figure 15 Adding temporary bonding material and device support material is shown according to a fifteenth step of the fabrication method.

[0024] Figure 16 Removal of a portion of the starting wafer under the piezoelectric layer is shown according to a sixteenth step of the fabrication method.

[0025] Figure 17 Removal of a portion of the buried oxide layer under the piezoelectric layer is shown according to a seventeenth step of the fabrication method.

[0026] Figure 18 A portion of the gold tie layer under the piezoelectric layer is removed according to the eighteenth step of the method of fabrication.

[0027] Figure 19 A first step of encapsulating the acoustic resonator with an organic material is shown.

[0028] Figure 20 A second step of encapsulating the acoustic resonator with an organic material is shown.

[0029] Figure 21 A third step of encapsulating the acoustic resonator with an organic material is shown. DETAILED DESCRIPTION

[0030] For fabricating Figure 21 The method of fabricating the acoustic resonator shown is described with reference to Figures 1 to 21 FIG. 1. Figure 1 The first step of the method of fabrication is a cross-sectional view of a starting wafer 10. The starting wafer has a silicon handle 12 that is thick enough to rigidly support the film layers that are subsequently deposited (such as by chemical vapor deposition) or formed (such as by thermal treatment). A buried oxide layer 14 (Si02) is formed on the surface of the silicon handle 12 by a process such as thermal oxide (TOX) or by a furnace or plasma enhanced vapor deposition (CVD) oxide. The buried oxide layer is thick enough to provide passivation so that the bottom electrode is larger than the piezoelectric layer. An exemplary thickness of the buried oxide layer is 1100 nanometers (nm).

[0031] A gold tie layer 16 is deposited on the buried oxide layer 14. The gold tie layer can be deposited directly on the buried oxide layer 14 or an intervening titanium layer (not shown). An exemplary thickness of the gold tie layer 16 is 500 nm. If an intervening titanium layer is present, an exemplary thickness of the intervening layer is 20 nm.

[0032] A molybdenum layer 18 is formed on the gold tie layer 16 by a process such as magnetron sputtering or other PVD process. The molybdenum layer 18 can be formed directly on the gold tie layer, or an intervening titanium layer can be present. If an intervening titanium layer is present, an exemplary thickness of the intervening layer is 20 nm. The molybdenum layer 18 will form the first (bottom) electrode, and has an exemplary thickness of 200 nm. A piezoelectric layer 20 contacts the first electrode 18. An exemplary thickness of the piezoelectric layer is in the range of 200 nm to 1100 nm, depending on the desired filter frequency response requirements. A thinner thickness of the piezoelectric layer (typically 300 nm or less) is usable for frequencies above 5 GHz, while a thicker thickness (500 nm or more) provides a frequency response below 3 GHz to the filter. A preferred material for the piezoelectric layer is single crystal aluminum nitride (AIN). It is more preferred to dope the single crystal aluminum nitride with scandium (Sc) to achieve a wider band filter.

[0033] Figure 2 The aluminum nitride piezoelectric layer 20 is shown formed into the desired configuration by etching. The surface to be retained is coated with a desired resist. An exemplary resist is a photoresist or a low temperature (350°C or less) silicon oxide hard mask. The etching conditions are selected to minimize removal of molybdenum from the first (bottom) electrode 18 to less than 100 nm. Suitable etching materials include KOH and chlorine based dry etching. A taper 22 is formed in the edge of the piezoelectric layer 20 to provide a profile for the top electrode (Mo / Au) step coverage, as will be described below. The angle of the taper 22 (measured where the sidewall of the piezoelectric layer 20 meets the first electrode 18) is 60° or less.

[0034] Figure 3 A third step of the fabrication method shows etching of the first (bottom) electrode 18 and the gold tie layer 16. A suitable etching material is argon or other inert gas dry etching, which will not affect the buried SiO2layer 14. The tapers 24, 26 formed in the first (bottom) electrode and the gold tie layer have approximately the same angle as the taper 22 in the sidewall of the piezoelectric layer 20.

[0035] Figure 4 A buffer oxide etch of the buried oxide layer is shown. The buffer oxide is typically hydrofluoric acid (HF), which is buffered to slow down and better control the etch rate. The buffered HF will etch SiO2, but not the silicon handle 12. The etch portion 28 facilitates singulation of the finished product by removal or scribing of the silicon handle 12 after fabrication is complete.

[0036] Figure 5Deposition of passivation layer 30 on the top surface is shown in preparation for deposition of the second (top) electrode material. Passivation layer 30 is preferably a SiO2layer that is selectively deposited on most of the surface, except for the central portion 32 of the piezoelectric layer 20. To minimize damage to the surface of the piezoelectric layer 20, the SiO2layer 30 is applied to an exemplary thickness of 2.5 microns + / - 0.1 microns by a low temperature plasma deposition process. The stress applied to the surface is preferably less than 50 MPa (megaPascals). Utilizing a low temperature plasma deposition also eliminates photoresist / polymer residue contamination of the surface.

[0037] Figure 6 Deposition of the top electrode material 34, which will form the second electrode, is shown according to the sixth step of the manufacturing method. While the top electrode material 34 is typically molybdenum, other metals such as tungsten or ruthenium can also be utilized. An exemplary thickness of the top electrode material is 200 nm. The top electrode material is deposited by a process such as low temperature (150°C) sputtering or other PVD process to obtain a high quality deposit characterized by high density, low stress (less than 100 MPa) and sheet resistance Rs = less than 0.5 + / - 0.05 ohms / square.

[0038] Figure 7 Mass loading 36 of the second (top) electrode material 34 is shown according to the seventh step of the manufacturing method. An additional amount of the second (top) electrode material 34 is deposited on portions of the second (top) electrode material that covers the piezoelectric layer 20. Typically, the mass loading 36 of the additional material is 50 nm to 100 nm in thickness, depending on design requirements. Low temperature sputtering is preferred to maintain stress on the piezoelectric layer 20 of less than 100 MPa. The peripheral region 38 terminates at a demarcation line 39 between the thickness of the top electrode material 34 and the mass loading 36, and forms a precursor to the diverging end of the second electrode.

[0039] Figure 8 Deposition of a sacrificial layer 40 is shown, which is used to form the acoustic gap and diverging end of the second electrode. An exemplary material for the sacrificial layer 40 is titanium and SiO2applied to a thickness of between 20 nm and 50 nm, depending on the desired gap size. The sacrificial layer 40 is applied by a method that achieves a low stress (less than 100 MPa) coating.

[0040] Figure 9 Selective removal of a portion of the sacrificial layer 40 to form a precursor 42 to the acoustic gap and diverging end of the second electrode is shown according to the ninth step of the manufacturing method.

[0041] Figure 10The tenth step of the fabrication method shows the selective deposition of additional top electrode material 46. The additional electrode material 46 encapsulates the sacrificial layer 40 at the perimeter region 38 to a thickness of 100 nm to 150 nm and applies low stress of less than 100 MPa. The remaining portion of the sacrificial layer covering the center portion 32 of the piezoelectric layer 20 is removed.

[0042] Figure 11 The eleventh step of the fabrication method shows the deposition of a top surface passivation layer 48. This top surface passivation layer is typically a non-piezoelectric aluminum nitride of ordinary quality that is deposited to a thickness of 100 nm + / - 10 nm.

[0043] Figure 12 The twelfth step of the fabrication method shows the selective removal of the top surface passivation 48 to provide electrical interconnect regions 50 to the top electrode material 34 and the bottom electrode material 18. Removal is typically by chemical etching that effectively removes the AIN, but does not remove the underlying metal (molybdenum).

[0044] Figure 13 The thirteenth step of the fabrication method shows the selective removal of the top surface passivation 48, the second electrode material 34, and the sacrificial layer to form diverging ends 52 of the second electrode. Prior to removal of the sacrificial layer, the top surface passivation and the second electrode material are removed by etching. Both layers can be etched simultaneously with an etchant that will not attack the piezoelectric layer 20 nor significantly increase the roughness of the top surface 53 of the piezoelectric layer 20. KOH + H2O2 is one suitable etching solution. A clean edge cut is desirable at the diverging ends 52 so that the sacrificial layer (typically titanium or SiO2) that filled the gap can be removed, leaving a well-defined acoustic gap 55.

[0045] Figure 14 The fourteenth step of the fabrication method shows the deposition of gold pads 54, 54' for electrical interconnection to the first electrode 18 and the second electrode 34. Instead of pure gold, a gold alloy such as Cr / Au or Ti / Au can be used. The thickness of the gold pads is approximately 250 nm to 800 nm.

[0046] Figure 15The addition of temporary bonding material 56 and device support layer 58 is shown according to the fifteenth step of the fabrication method. The bonding material is added as temporary bonding material 56. Suitable materials include organic materials such as tape or ultraviolet light (UV) sensitive gel. Device support layer 58, such as glass, is bonded to temporary bonding material 56. As the silicon handle 12 is thinned in subsequent fabrication steps, device support layer 58 provides rigidity and front side protection to the device. The thickness of the silicon handle 12 is reduced by mechanical grinding and polishing (mechanical, chemical or chemical mechanical polishing). The thickness of the silicon handle 12 is reduced to between 50 microns and 100 microns, depending on design requirements.

[0047] Figure 16 The removal of portion 60 of the silicon handle 12 under the piezoelectric layer 20 is shown to form the acoustic gap on the underside of the piezoelectric layer. The silicon can be selectively removed by deep reactive ion etching that will stop etching upon contact with the buried oxide layer 14. The use of deep reactive ion etching avoids the need for a polymeric based chemical resist material, thus ensuring that portion 60 is free of polymeric residue.

[0048] Figure 17 The removal of portion 62 of the buried oxide layer 14 under the piezoelectric layer 20 is shown. Typically, a dry etch is used to remove portion 62 of the buried oxide layer to form the acoustic gap on the underside of the piezoelectric layer 20, where etching stops upon contact with the gold bonding layer 16. A dry etch is preferred, particularly where there is a titanium layer (not shown) between the buried oxide layer 14 and the gold bonding layer 16. The removal rate of titanium is difficult to control with a wet etch, which leads to potential side etch problems.

[0049] Figure 18 The removal of a portion of the gold bonding layer 16 under the piezoelectric layer is shown according to the nineteenth step of the fabrication method. The removal can be an etch of KI / I2(mixed with isopropyl alcohol (IPA) or acetone) that will stop upon contact with titanium 64 that coats the first electrode 18. The removal of the titanium layer 64 under the first electrode 18 can be performed by a dilute hydrofluoric acid etch (100:1 ratio, 100 parts of water and 1.49% (volume) of HF) that will not etch the molybdenum first electrode 18. The bottom electrode 18 has a larger surface area compared to the piezoelectric layer 20, thus improving the power handling of the filter.

[0050] The completion of the fabrication steps results in an acoustic resonator having a first electrode 18 having a first planar portion 67 and a second electrode 34 having a second planar portion 65 disposed parallel to the first planar portion 67. The second electrode 34 also includes a diverging end portion 52 that defines the gap 55. The piezoelectric layer 20 is disposed between and contacts both the first planar portion 67 and the second planar portion 65. The diverging end portion 52 of the second electrode 34 is in direct contact with the piezoelectric layer 20 without any intervening material or gap.

[0051] Acoustic resonators are typically packaged to provide electrical interconnection to an external device or circuit board, and to provide environmental protection. One suitable package is formed from a polymer resin, as described in U.S. Patent Application Publication No. US 2021 / 0028766 Al, entitled “Packages with Organic Back Ends for Electronic Components,” by Hurwitz et al. The disclosure of US 2021 / 0028766 Al is incorporated herein by reference in its entirety.

[0052] Figure 19 A first step of encapsulating the acoustic resonator 68 in an organic material is shown. A silicon wafer cap 70 is bonded to the silicon stem 12 with an organic bonding film 72. An exemplary thickness of the silicon wafer cap is 400 microns. As shown, with the support of the silicon wafer cap 70, the acoustic gap material and device support layer can be removed. Figure 20

[0053] Figure 21 An organic-based wafer-level package 80 encapsulating the piezoelectric layer 20 is shown, which can be a component of the acoustic resonator described above. An organic wall 82, formed from a polymer such as a photosensitive material used for permanent structure formation, includes a via that is coated with an under bump metal 84 (UBM), formed from a conductive material such as nickel or copper. The UBM 84 provides electrical interconnection to the first and second electrode layers of the acoustic resonator. An organic top cap layer 86 has an extended via that is coated with a continuous UBM 84. A solder bump 88, such as a tin / silver alloy, fills the remainder of the via and extends beyond the surface 90 of the organic top cap layer 86 for attachment and electrical interconnection to a device or circuit board.

[0054] Reference is made to Figure 18 and Figure 21 ​The organic-based wafer-level package 80 includes an acoustic resonator. The acoustic resonator has a first electrode 18 having a first planar portion 67 and a second electrode 34 having a second planar portion 65 disposed parallel to the first planar portion 67. The diverging end 52 of the second electrode 34 defines a gap 55. A piezoelectric layer 20 having a first side and a second side is disposed between and contacts both the first planar portion 67 and the second planar portion 65. In addition, the diverging end 52 of the second electrode 34 contacts the piezoelectric layer 20.

[0055] An organic wall 82 contacts the first side of the piezoelectric layer 20, where a first wall via 87 extends through the organic wall 82 to contact the first electrode 18 and a second wall via 89 extends through the organic wall 82 to contact the second electrode 34. An organic cap 86 has first and second opposing sides, where the first side is bonded to the organic wall 82, a first cap via is aligned with the first wall via and a second cap via is aligned with the second wall via. The combination of the organic wall, the organic cap and the first planar portion define a first acoustic gap 92.

[0056] A silicon stem 12 contacts the second side of the piezoelectric layer 20 and a silicon wafer cap 94 is bonded to the silicon stem 12. The combination of the silicon stem 12, the silicon wafer cap 94 and the second planar portion 67 define a second acoustic gap 96.

[0057] Those skilled in the art will appreciate that the application described herein is not limited to what has been particularly shown and described hereinabove. Rather, the scope of the present application includes both combinations and sub-combinations of the various features described hereinabove, as well as variations and modifications thereof which would occur to persons of ordinary skill in the art upon reading the foregoing description. In the claims, the word "comprising" and variations thereof, such as "comprises" and "comprising," means a non-exclusive inclusion, so that a claim including "comprising" means excluding other non-claimed elements or steps.

Claims

1. An acoustic resonator, comprising: A first electrode, the first electrode having a first planar portion; The second electrode has a second planar portion that is configured to be parallel to the first planar portion, and the bifurcated end of the second electrode defines a gap. A piezoelectric layer is disposed between and in contact with the first planar portion and the second planar portion; and The gap is entirely within the second electrode and does not contact the piezoelectric layer; the first bifurcation end of the second electrode directly contacts the piezoelectric layer.

2. The acoustic resonator according to claim 1, wherein the piezoelectric layer is aluminum nitride.

3. The acoustic resonator according to claim 2, wherein the piezoelectric layer is a single-crystal aluminum nitride.

4. The acoustic resonator according to claim 3, wherein the aluminum nitride is doped with scandium.

5. The acoustic resonator of claim 1, wherein the surface of the first electrode has a larger surface area compared to the adjacent surface of the piezoelectric layer.

6. The acoustic resonator of claim 3, wherein the surface of the first electrode has a larger surface area compared to the adjacent surface of the piezoelectric layer.

7. The acoustic resonator of claim 6, wherein at least one of the first electrode and the second electrode is molybdenum.

8. The acoustic resonator according to claim 7, wherein both the first electrode and the second electrode are molybdenum.

9. The acoustic resonator of claim 6, wherein the piezoelectric layer has tapered sidewalls.

10. The acoustic resonator of claim 9, wherein the tapered sidewall forms an angle of 60° or less with the surface of the first electrode.

11. The acoustic resonator of claim 9, wherein gold or gold alloy pads are electrically interconnected to the first electrode and the second electrode to facilitate electrical interconnection to external components or devices.

12. The acoustic resonator of claim 2, wherein the gap is filled with an acoustically transparent material.

13. The acoustic resonator of claim 12, wherein the acoustically transparent material is selected from the group consisting of air, titanium, and silicon oxide.

14. An organic-based wafer-level package including an acoustic resonator, the organic-based wafer-level package comprising: The acoustic resonator has: A first electrode, the first electrode having a first planar portion; The second electrode has a second planar portion that is configured to be parallel to the first planar portion, and the bifurcated end of the second electrode defines a gap. A piezoelectric layer having a first side and a second side, the piezoelectric layer being disposed between and in contact with the first planar portion and the second planar portion; and The gap is entirely within the second electrode and does not contact the piezoelectric layer; the first bifurcation end of the second electrode directly contacts the piezoelectric layer; An organic wall that contacts the first side of the piezoelectric layer, wherein a first wall via extends through the organic wall and contacts the first electrode, and a second wall via extends through the organic wall and contacts the second electrode; An organic top cover having first and second opposing sides, wherein the first side is bonded to the organic wall, a first top cover through-hole is aligned with a first wall through-hole and a second top cover through-hole is aligned with a second wall through-hole, wherein the combination of the organic wall, the organic top cover and the first planar portion defines a first acoustic gap; A silicon shank, the silicon shank contacting the second side of the piezoelectric layer; and A silicon wafer cap is bonded to the silicon shank, wherein the combination of the silicon shank, the silicon wafer cap, and the second planar portion defines a second acoustic gap.

15. The organic-based wafer-level package of claim 14, wherein the first wall via and the first top cover via are electrically interconnected to the first electrode, and the second wall via and the second top cover via are electrically interconnected to the second electrode.

16. The organic-based wafer-level package of claim 15, wherein conductive material fills the first wall via, the first top cover via, the second wall via, and the second top cover via.

17. The organic-based wafer-level package of claim 16, wherein the conductive material extends beyond the second side of the organic top cover as solder bumps.

18. The organic-based wafer-level package of claim 17, wherein the piezoelectric layer is aluminum nitride.

19. The organic-based wafer-level package according to claim 18, wherein the piezoelectric layer is single-crystal aluminum nitride.

20. The organic-based wafer-level package of claim 19, wherein the aluminum nitride is doped with scandium.

21. The organic-based wafer-level package of claim 18, wherein the surface of the first electrode has a larger surface area compared to the adjacent surface of the piezoelectric layer.

22. The organic-based wafer-level package of claim 21, wherein a gold or gold alloy pad is electrically interconnected to the first electrode and the second electrode to facilitate electrical interconnection to conductive materials.

23. The organic-based wafer-level package of claim 22, wherein the first acoustic gap and the second acoustic gap are filled with an acoustically transparent material.

24. The organic-based wafer-level package of claim 23, wherein the acoustically transparent material is selected from the group consisting of air, titanium, and silicon oxide.

25. A method for manufacturing an acoustic resonator, the method comprising the following steps: a) Bond the piezoelectric layer to the first electrode layer; b) Selectively remove a portion of the piezoelectric layer to form a piezoelectric component of the desired size; c) Selectively remove a portion of the first electrode layer to form a first electrode of the desired size; d) Apply a mask to the first electrode and to a portion of the piezoelectric component; e) Deposit the second electrode material onto the mask and the piezoelectric component; f) Applying an acoustic gap sacrificial material to a segment of the second electrode, the segment being adjacent to the peripheral region of the piezoelectric component; g) Deposit the second electrode material onto the sacrificial material; and h) Remove the sacrificial material and any second electrode material that is closer to the edge of the piezoelectric component than the sacrificial material, thereby forming a gap in the bifurcated second electrode end adjacent to the peripheral region of the piezoelectric component.

26. The method of claim 25, wherein the sacrificial material is selected from the group consisting of titanium and SiO2, and the deposition applies a stress of less than 100 MPa to the surface of the piezoelectric layer.

27. The method of claim 26, wherein the second electrode is selected from the group consisting of molybdenum, tungsten, and ruthenium.

28. The method of claim 27, wherein the sacrificial material is removed by buffer oxide etching or dilute HF.

29. The method of claim 28, wherein in step (e), a portion of the second electrode is deposited directly onto the piezoelectric component, the portion forming a bifurcated second edge.

30. The method of claim 29, wherein in step (h), the gap is completely within the second electrode and does not contact the piezoelectric layer.

31. A method for manufacturing organic-based wafer-level packaging, the method comprising the following steps: An acoustic resonator is provided, the acoustic resonator having a first electrode, a second electrode, and a piezoelectric layer. The first electrode has a first planar portion, the second electrode has a second planar portion disposed parallel to the first planar portion, a bifurcated end of the second electrode defining a gap, the piezoelectric layer being disposed between and contacting the first planar portion and the second planar portion, and the gap being entirely within the second electrode and not contacting the piezoelectric layer; the first bifurcated end of the second electrode directly contacts the piezoelectric layer. and One or more acoustic resonators are encapsulated in an organic-based wafer-level package.

32. The method of claim 31, wherein the encapsulation step comprises: The organic wall is bonded to the acoustic resonator; An organic top cover is bonded to the organic wall such that the combination of the organic wall and the organic top cover defines a first acoustic gap, the first acoustic gap being adjacent to the second electrode; The silicon shank is bonded to the acoustic resonator; and A silicon wafer cap is bonded to the silicon shank such that the combination of the silicon shank and the silicon wafer cap defines a second acoustic gap adjacent to the first electrode.

33. The method of claim 32, further comprising extending a first conductive material via through both the organic wall and the organic top cover to electrically interconnect the second electrode to an external device and circuit, and extending a second conductive material via through both the organic wall and the organic top cover to electrically interconnect the first electrode to an external device and circuit.

34. The method according to claim 33, comprising the following steps: a) Apply a mask to the first electrode and to a portion of the piezoelectric component; b) Deposit the second electrode material onto the mask and the piezoelectric component; c) Applying an acoustic gap sacrificial material to a segment of the second electrode, the segment being adjacent to the peripheral region of the piezoelectric component; d) Depositing the second electrode material onto the sacrificial material; and e) Remove the sacrificial material and any second electrode material that is closer to the edge of the piezoelectric component than the sacrificial material, thereby forming the gap in the bifurcated second electrode end adjacent to the peripheral region of the piezoelectric component.

35. The method of claim 34, wherein the sacrificial material is selected from the group consisting of titanium and SiO2, and the deposition applies a stress of less than 100 MPa to the surface of the piezoelectric layer.

36. The method of claim 35, wherein the second electrode is selected from the group consisting of molybdenum, tungsten, and ruthenium.

37. The method of claim 36, wherein the sacrificial material is removed by buffer oxide etching or dilute HF.

38. The method of claim 37, wherein in step (b), a portion of the second electrode is deposited directly onto the piezoelectric component, the portion forming a bifurcated second edge.

39. The method of claim 38, wherein in step (e), the gap is completely within the second electrode and does not contact the piezoelectric layer.

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