Low Dropout Linear Regulator and Its Control System

Abstract

The present application discloses a low-voltage difference linear regulator and a control system, wherein the low-voltage difference linear regulator comprises an error amplifier branch, a first current branch and a resistance branch. The error amplifier branch is connected to the first current branch, a first reference voltage and a resistance branch, and the first current branch is connected to a first power supply. The error amplifier branch obtains a sampling voltage based on the voltage of the first connection point, and amplifies the difference between the sampling voltage and the first reference voltage to output a first voltage signal. The first current branch outputs a first current in response to the first voltage signal. The resistance branch generates a first voltage on the resistance branch in response to the first current, and the first voltage acts on the first connection point to introduce a zero point for compensating the first pole, and the frequency of the first pole is determined by the equivalent output resistance at the first end of the error amplifier branch and the equivalent capacitance at the first end of the first current branch. In the above manner, the stability of the circuit in the low-voltage difference linear regulator can be improved.

Description

Technical Field

[0001] The present application relates to the technical field of electronic circuits, and in particular to a low voltage drop linear regulator and a control system. Background Art

[0002] In power supply, Low Dropout Regulator (LDO) is widely used in different output voltage domains due to its advantages such as less peripheral component requirements, low output noise, small output ripple, and simple circuit structure.

[0003] The circuit of a low-dropout linear regulator often includes at least two poles. One is located at the output of the error amplifier, and its pole frequency is relatively fixed, while the other pole is located at the output of the low-dropout linear regulator, and its frequency changes with the load. This pole whose frequency changes with the load, combined with another pole whose frequency is relatively fixed, will cause the stability of the circuit in the low-dropout linear regulator to change. Therefore, in order to ensure the stability of the loop in the circuit of the low-dropout linear regulator under different load conditions, it is necessary to compensate the stability of the circuit of the low-dropout linear regulator. At present, the commonly used compensation method is to achieve it through the use of load current sampling technology.

[0004] However, due to changes in temperature, process parameters, peripheral components, and mismatches in the production process, the pole frequency of the loop will change significantly, making it difficult to ensure that the dynamic zero and output pole are fully matched over the full load range. This makes it difficult to implement load current sampling technology for loop compensation and poses a risk of instability. Summary of the invention

[0005] The present application aims to provide a low voltage dropout linear regulator and a control system, which can improve the stability of the circuit in the low voltage dropout linear regulator.

[0006] To achieve the above objectives, in a first aspect, the present application provides a low voltage dropout linear regulator, comprising:

[0007] An error amplifying branch, a first current branch and a resistance branch;

[0008] The first end of the error amplifying branch is connected to the first end of the first current branch, the second end of the first current branch is connected to the first power supply, the second end of the error amplifying branch is connected to the first reference voltage, the third end of the error amplifying branch is respectively connected to the third end of the first current branch and the first end of the resistance branch, the second end of the resistance branch is an output end, and the connection point between the third end of the error amplifying branch, the third end of the first current branch and the first end of the resistance branch is a first connection point, and the output end is used to be connected to a load;

[0009] The error amplification branch is configured to obtain a sampling voltage based on the voltage of the first connection point, and amplify the difference between the sampling voltage and the first reference voltage to output a first voltage signal;

[0010] The first current branch is configured to output a first current at a third end of the first current branch in response to the first voltage signal;

[0011] The resistance branch is configured to generate a first voltage on the resistance branch in response to the first current, wherein the first voltage acts on the first connection point to introduce a zero point for compensating a first pole, and the frequency of the first pole is determined by the equivalent output resistance of the first end of the error amplifier branch and the equivalent capacitance at the first end of the first current branch.

[0012] In an optional manner, the error amplification branch includes an operational amplifier and a voltage divider unit;

[0013] The output terminal of the operational amplifier is connected to the first terminal of the first current branch, the input power terminal of the operational amplifier is connected to the second power supply, the first input terminal of the operational amplifier is connected to the first terminal of the voltage divider unit, the second input terminal of the operational amplifier is connected to the first reference voltage, the ground terminal of the operational amplifier and the second terminal of the voltage divider unit are both grounded, and the third terminal of the voltage divider unit is connected to the first connection point;

[0014] The voltage dividing unit is used to divide the voltage of the first connection point and output the sampled voltage to the first input terminal of the operational amplifier;

[0015] The output end of the operational amplifier is the first end of the error amplification branch, the second input end of the operational amplifier is the second end of the error amplification branch, and the third end of the voltage divider unit is the third end of the error amplification branch.

[0016] In an optional manner, the voltage dividing unit includes a first resistor and a second resistor;

[0017] The first end of the first resistor is connected to the first connection point, the second end of the first resistor is respectively connected to the first input end of the operational amplifier and the first end of the second resistor, and the second end of the second resistor is grounded;

[0018] Wherein, the first end of the first resistor is the third end of the error amplification branch.

[0019] In an optional manner, the error amplification branch further includes a driving unit;

[0020] A first end of the driving unit is connected to the first power supply, a second end of the driving unit is connected to a first end of the first current branch, a third end of the driving unit is connected to an output end of the operational amplifier, and a fourth end of the driving unit is grounded;

[0021] The driving unit is configured to output the first voltage signal in response to the second voltage signal output by the operational amplifier, wherein the driving capability of the first voltage signal is stronger than that of the second voltage signal;

[0022] Wherein, the second end of the driving unit is the first end of the error amplification branch.

[0023] In an optional manner, the driving unit includes a current source and a third transistor;

[0024] The negative electrode of the current source is connected to the first power supply, the positive electrode of the current source is respectively connected to the second end of the third transistor and the first end of the first current branch, the first end of the third transistor is connected to the output end of the operational amplifier, and the third end of the third transistor is grounded.

[0025] In an optional manner, the first current branch includes a first transistor;

[0026] The first end of the first transistor is connected to the first end of the error amplifying branch, the second end of the first transistor is connected to the first power supply, and the third end of the first transistor is connected to the first connection point.

[0027] In an optional manner, the resistance branch includes a third resistor;

[0028] A first end of the third resistor is connected to the first connection point, and a second end of the third resistor is the output end.

[0029] In an optional manner, the resistance value r1 of the resistance branch, the equivalent output resistance r2 of the first end of the error amplification branch, and the equivalent capacitance c2 at the first end of the first current branch satisfy the following relationship:

[0030] r1=r2*c2 / cL;

[0031] Wherein, cL is the output capacitance in the load.

[0032] In an optional manner, the low voltage dropout linear regulator further includes a second current branch;

[0033] The first end of the second current branch is connected to the first end of the first current branch, the second end of the second current branch is connected to the first power supply, and the third end of the second current branch is connected to the output end;

[0034] The second current branch is configured to output a second current at a third end of the second current branch in response to the first voltage signal to generate a second voltage at the output end based on the first current and the second current, wherein the sum of the first voltage and the second voltage acts on the first connection point to introduce a zero point that compensates for the first pole.

[0035] In an optional manner, the second current branch includes a second transistor;

[0036] The first end of the second transistor is connected to the first end of the first current branch, the second end of the second transistor is connected to the first power supply, and the third end of the second transistor is connected to the output end.

[0037] In an optional manner, the transconductance of the second current branch is N times that of the first current branch, where N>1;

[0038] The resistance value r3 of the resistance branch, the equivalent output resistance r2 of the first end of the error amplification branch, and the equivalent capacitance c2 at the first end of the first current branch satisfy the following relationship:

[0039] r3=r2*c2*(N+1) / cL;

[0040] Wherein, cL is the output capacitance in the load.

[0041] In an optional manner, the low voltage dropout linear regulator further includes a current mirror branch;

[0042] The first end of the current mirror branch is connected to the first end of the first current branch, the second end of the current mirror branch is connected to the first power supply, the third end of the current mirror branch is connected to the first connection point, and the fourth end of the current mirror branch is grounded;

[0043] The current mirror branch is configured to generate a first direct current flowing out of the first connection point, wherein the first direct current is equal in magnitude to the direct current flowing through the first current branch, so that the direct current flowing through the resistance branch is zero.

[0044] In an optional manner, the current mirror branch includes a fourth transistor, a fifth transistor and a sixth transistor;

[0045] The fourth transistor is connected to the first current branch and the fifth transistor respectively, and the fourth transistor is used to generate a second direct current flowing through the fifth transistor;

[0046] The sixth transistor is connected to the fifth transistor and the first connection point respectively, and the sixth transistor is configured to generate the first direct current based on the second direct current.

[0047] In an optional manner, the first end of the fourth transistor is connected to the first end of the first current branch, the second end of the fourth transistor is connected to the first power supply, the third end of the fourth transistor and the third end of the fifth transistor are connected, the second end of the sixth transistor and the second end of the fifth transistor are both grounded, and the third end of the sixth transistor is connected to the first connection point;

[0048] Among them, the first end of the fourth transistor is the first end of the current mirror branch, the second end of the fourth transistor is the second end of the current mirror branch, the third end of the sixth transistor is the third end of the current mirror branch, and the second end of the sixth transistor is the fourth end of the current mirror branch.

[0049] In an optional manner, the low voltage dropout linear regulator further includes a filter branch;

[0050] The first end of the filter branch is connected to the first end of the fifth transistor, the second end of the filter branch is connected to the first end of the sixth transistor, and the third end of the filter branch is grounded;

[0051] The filtering branch is configured to perform low-pass filtering on the AC signal in the current mirror branch to keep the current in the current mirror branch as a DC current.

[0052] In an optional manner, the filtering branch includes a fourth resistor and a first capacitor;

[0053] The first end of the fourth transistor is connected to the first end of the first current branch, the second end of the fourth transistor is connected to the first power supply, the third end of the fourth transistor is respectively connected to the third end of the fifth transistor, the first end of the fourth resistor and the first end of the fifth transistor, the second end of the fourth resistor is respectively connected to the first end of the sixth transistor and the first end of the first capacitor, the second end of the sixth transistor, the second end of the fifth transistor and the second end of the first capacitor are all grounded, and the third end of the sixth transistor is connected to the first connection point;

[0054] Among them, the first end of the fourth transistor is the first end of the current mirror branch, the second end of the fourth transistor is the second end of the current mirror branch, the third end of the sixth transistor is the third end of the current mirror branch, and the second end of the sixth transistor is the fourth end of the current mirror branch.

[0055] In a second aspect, the present application provides a control system, comprising:

[0056] a load and a low dropout linear regulator as described above;

[0057] The low voltage drop linear regulator is connected to the load and is used to provide voltage and current for the load.

[0058] The beneficial effects of the present application are as follows: the low voltage difference linear regulator provided by the present application includes an error amplifier branch, a first current branch and a resistance branch. Among them, the first end of the error amplifier branch is connected to the first end of the first current branch, the second end of the first current branch is connected to the first power supply, the second end of the error amplifier branch is connected to the first reference voltage, the third end of the error amplifier branch is respectively connected to the third end of the first current branch and the first end of the resistance branch, the second end of the resistance branch is the output end, and the connection point between the third end of the error amplifier branch, the third end of the first current branch and the first end of the resistance branch is the first connection point, and the output end is used to connect to the load. The error amplifier branch is configured to obtain a sampled voltage based on the voltage of the first connection point, and amplify the difference between the sampled voltage and the first reference voltage to output a first voltage signal. The first current branch is configured to output a first current at the third end of the first current branch in response to the first voltage signal. The resistance branch is configured to generate a first voltage on the resistance branch in response to a first current, wherein the first voltage acts on a first connection point to introduce a zero point for compensating the first pole. Therefore, through the above method, a zero point can be introduced to compensate for the first pole existing in the low-voltage difference linear regulator, and since the frequency of the first pole is determined by the equivalent output resistance of the first end of the error amplifier branch and the equivalent capacitance at the first end of the first current branch, the first pole does not change with load changes, and relatively stable compensation can be achieved, thereby improving the stability of the circuit in the low-voltage difference linear regulator. BRIEF DESCRIPTION OF THE DRAWINGS

[0059] One or more embodiments are exemplarily described by pictures in the corresponding drawings, and these exemplified descriptions do not constitute limitations on the embodiments. Elements with the same reference numerals in the drawings represent similar elements, and unless otherwise stated, the figures in the drawings do not constitute proportional limitations.

[0060] Figure 1 It is a schematic diagram of the circuit structure of a low voltage drop linear regulator in the prior art;

[0061] Figure 2 A schematic diagram of the structure of a low voltage dropout linear regulator provided in an embodiment of the present application;

[0062] Figure 3 A schematic diagram of the circuit structure of a low voltage dropout linear regulator provided in an embodiment of the present application;

[0063] Figure 4 A schematic diagram of the circuit structure of a low voltage dropout linear regulator provided in another embodiment of the present application;

[0064] Figure 5 A schematic diagram of the circuit structure of a low voltage dropout linear regulator provided in yet another embodiment of the present application;

[0065] Figure 6 A schematic diagram of the circuit structure of a low voltage dropout linear regulator provided in yet another embodiment of the present application;

[0066] Figure 7 A schematic diagram of the circuit structure of a low voltage dropout linear regulator provided in yet another embodiment of the present application. DETAILED DESCRIPTION

[0067] In order to make the purpose, technical solution and advantages of the embodiments of the present application clearer, the technical solution in the embodiments of the present application will be clearly and completely described below in conjunction with the drawings in the embodiments of the present application. Obviously, the described embodiments are part of the embodiments of the present application, not all of the embodiments. Based on the embodiments in the present application, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of this application.

[0068] Please refer to Figure 1 , Figure 1 FIG. 1 is a schematic diagram of a circuit structure of a low dropout linear regulator (LDO) in the prior art. Figure 1 As shown, the circuit structure of the low voltage dropout linear regulator substantially includes two poles.

[0069] Among them, the first pole: the high-impedance output resistor at the output end of the error amplifier Ua and the parasitic gate capacitance of the power tube PM1 will produce the first pole, and the calculation formula of the frequency of this pole is: Among them C p1 is the capacitance value of the gate parasitic capacitance of the power tube PM1, r o1 is the resistance value of the error amplifier Ua output resistor, f P1 is the frequency of the first pole.

[0070] Second pole: The output equivalent resistance RaL and the external filter capacitor CaL at the output end VOUT of the low voltage drop linear regulator will produce a second pole. The calculation formula of the frequency of this pole is: Among them, C L is the capacitance value of the external filter capacitor CaL, R L is the resistance value of the equivalent output resistance RaL of the load, f p2is the frequency of the second pole.

[0071] It is understandable that in a circuit with a feedback loop, the capacitance on the circuit node will slow down the analog signal frequency response. The pole reflects the change in output impedance, where below the pole frequency, the output impedance is determined by the output impedance of the node, and above the pole frequency, the output impedance is determined by the capacitance of the node.

[0072] Then, from the above formulas ① and ②, it can be seen that when the current of the load connected to the output terminal VOUT of the low voltage drop linear regulator is small (the resistance value of the equivalent output resistor RaL is R L The main pole is at the output of the low voltage drop linear regulator, and the capacitance value C of the external capacitor CaL L And the resistance value R of the equivalent output resistance RaL L However, the larger the power tube PM1 is, the larger its gate parasitic capacitance C p1 The larger the value, the greater f p1 The lower the quiescent current is, the smaller the r o1 The larger the value, the greater the f p1 The more f p1 With f p2 Therefore, in order to stabilize the loop, the structure needs to introduce a compensation circuit for stability compensation. o1 , C p1 The larger the value, the stronger the compensation circuit needs to be, which will narrow the loop bandwidth and slow down the dynamic response. In practical applications, the compensation circuit can usually use Miller compensation to make f p1 and f p2 Separate to make it stable.

[0073] In addition, the dynamic response of the low-dropout linear regulator also depends on the gate slew rate of the power tube PM1. The smaller the power tube drive current and the larger the power tube, the more difficult it is for its gate voltage to change to adjust the output current of the loop. Among them, the gate slew rate of the power tube PM1 means that when the load current changes, the gate voltage of the power tube PM1 also needs to change to adjust the output current of the low-dropout linear regulator.

[0074] In summary, loop stability and dynamic response become limiting factors for directly reducing static power consumption. Furthermore, in the prior art, in order to maintain the loop stability of the low-dropout linear regulator and improve its dynamic response under low static power consumption, it is usually necessary to set a compensation circuit that can be dynamically adjusted as the load changes. The specific implementation process is: the control circuit senses the current of the power tube PM1, and then controls the compensation circuit to obtain a dynamic zero compensation output pole (i.e., the second pole mentioned above). The dynamic zero can track the change of the output pole to achieve stable operation of the low-dropout linear regulator over the full load range. In addition, the driving capability of the error amplifier output can be controlled by sensing the current to change with the load to increase the transient response of the low-dropout linear regulator.

[0075] However, the above solution has the following disadvantages: due to changes in temperature, process parameters, peripheral components, and mismatches during the production process, the pole frequency of the loop will change significantly. Therefore, it is difficult to ensure that the dynamic zero point and the output pole are fully matched in the full load range. As a result, this technology is difficult to implement loop compensation.

[0076] Based on this, the present application provides a low voltage drop linear regulator, which can introduce a zero point by adding a corresponding circuit structure, and compensate the first pole in the above formula ① through the zero point. At this time, the compensated zero point and the compensated first pole do not change with the load current, and the compensation effect is better and more stable.

[0077] Please refer to Figure 2 , Figure 2 This is a schematic diagram of the structure of a low voltage dropout linear regulator provided in an embodiment of the present application. Figure 2 As shown, the low dropout linear regulator 100 includes a first current branch 10 , an error amplifying branch 20 and a resistance branch 30 .

[0078] The first end of the error amplification branch 20 is connected to the first end of the first current branch 10, the second end of the first current branch 10 is connected to the first power supply VC1, the second end of the error amplification branch 20 is connected to the first reference voltage Vref1, the third end of the error amplification branch 20 is respectively connected to the third end of the first current branch 10 and the first end of the resistance branch 30, the second end of the resistance branch 30 is the output end VOUT, and the connection point between the third end of the error amplification branch 20, the third end of the first current branch 10 and the first end of the resistance branch 30 is the first connection point P1, and the output end VOUT is used to connect to the load 200. The first reference voltage Vref1 can be set according to the actual application situation, and the embodiment of the present application does not make specific restrictions on this.

[0079] Specifically, the error amplifier branch 20 is configured to obtain a sampled voltage based on the voltage of the first connection point P1, and amplify the difference between the sampled voltage and the first reference voltage Vref1 to output a first voltage signal. The first current branch 10 is configured to output a first current at a third end of the first current branch 10 in response to the first voltage signal. The resistance branch 30 is configured to generate a first voltage on the resistance branch 30 in response to the first current, wherein the first voltage acts on the first connection point P1 to introduce a zero point to compensate for the first pole, and the frequency of the first pole is determined by the equivalent output resistance at the first end of the error amplifier branch 20 and the equivalent capacitance at the first end of the first current branch 10.

[0080] In this embodiment, by setting a resistor branch 30 between the first connection point P1 and the output terminal VOUT, a zero point can be introduced, and the zero point is used to compensate the first pole. Specifically, the frequency of the zero point is near the frequency of the first pole, that is, the difference between the frequency of the zero point and the frequency of the first pole is within a preset difference range, such as the frequency of the zero point is equal to the frequency of the first pole, so that the zero point can compensate for the first pole. It can be understood that the smaller the difference between the frequency of the zero point and the frequency of the first pole, the better the compensation effect. Among them, the preset difference range can be set according to the actual application situation, and the embodiment of the present application does not impose specific restrictions on this.

[0081] At the same time, it can be seen from the above embodiments that in the related art, what is compensated is the output pole, that is, the pole corresponding to formula ② in the above embodiment. When the output pole is related to the load current, it is likely to change due to changes in the load current. The compensation process is difficult to implement and there is a risk of instability.

[0082] In the embodiment of the present application, the first pole to be compensated is determined only by the equivalent output resistance of the first end of the error amplifier branch 20 and the equivalent capacitance at the first end of the first current branch 10, which corresponds to the pole of the above-mentioned formula ①. The first pole does not change with the change of the load current, which helps to achieve stable compensation. In other words, no matter how the load current changes, the compensation implemented on the first pole is effective, so that the stability of the circuit in the low voltage difference linear regulator can be maintained.

[0083] In one embodiment, if Figure 3 As shown, the error amplifying branch 20 includes an operational amplifier U1 and a voltage dividing unit 21 .

[0084] The output end of the operational amplifier U1 is connected to the first end of the first current branch 10, the input power end of the operational amplifier U1 is connected to the second power supply VC2, the first input end of the operational amplifier U1 is connected to the first end of the voltage divider unit 21, the second input end of the operational amplifier U1 is connected to the first reference voltage Vref1, the ground end of the operational amplifier U1 and the second end of the voltage divider unit 21 are both grounded GND, and the third end of the voltage divider unit 21 is connected to the first connection point P1. The first power supply VC1 and the second power supply VC2 may be the same or different, and the embodiment of the present application does not impose any specific limitation on this.

[0085] In this embodiment, the voltage divider unit 21 is used to divide the voltage of the first connection point P1, and output the sampled voltage to the first input terminal of the operational amplifier U1. The output terminal of the operational amplifier U1 is the first terminal of the error amplification branch 20, the second input terminal of the operational amplifier U1 is the second terminal of the error amplification branch 20, and the third terminal of the voltage divider unit 21 is the third terminal of the error amplification branch 20. The first input terminal of the operational amplifier U1 can be a non-inverting input terminal, and the second input terminal can be an inverting input terminal.

[0086] Figure 3 A structure of the voltage dividing unit 21 is also exemplarily shown in FIG. Figure 3 As shown, the voltage dividing unit 21 includes a first resistor R1 and a second resistor R2.

[0087] The first end of the first resistor R1 is connected to the first connection point P1, the second end of the first resistor R1 is connected to the first input end of the operational amplifier U1 and the first end of the second resistor R2, and the second end of the second resistor R2 is grounded. The first end of the first resistor R1 is the third end of the error amplification branch 20.

[0088] Figure 3 A structure of the first current branch 10 is also exemplarily shown in FIG. Figure 3 As shown, the first current branch 10 includes a first transistor Q1.

[0089] The first end of the first transistor Q1 is connected to the first end of the error amplifying branch 20 , the second end of the first transistor Q1 is connected to the first power supply VC1 , and the third end of the first transistor Q1 is connected to the first connection point P1 .

[0090] It can be understood that in this embodiment, the first transistor Q1 is a PMOS transistor as an example. The gate of the PMOS transistor is the first end of the first transistor Q1, the source of the PMOS transistor is the second end of the first transistor Q1, and the drain of the PMOS transistor is the third end of the first transistor Q1.

[0091] Figure 3 A structure of the resistor branch 30 is also exemplarily shown in FIG. Figure 3 As shown, the resistor branch includes a third resistor R3.

[0092] The first end of the third resistor R3 is connected to the first connection point P1 , and the second end of the third resistor R3 is the output end VOUT.

[0093] Figure 3 A structure of the load 200 is also exemplarily shown in FIG. Figure 3 As shown, the load 200 is connected between the output terminal VOUT and the ground, and the load 200 includes an output capacitor CL and an output resistor RL connected in parallel, wherein the output capacitor CL plays a role in filtering the voltage of the output terminal VOUT, and the output resistor RL is the equivalent resistance of the load connected to the output terminal VOUT, and its resistance value changes with the change of the load current.

[0094] The following Figure 3 The principle of the structure shown is explained.

[0095] like Figure 3 As shown, by connecting the third resistor R3 in series between the first connection point P1 and the output terminal VOUT, a fixed frequency zero point can be added to compensate for the stability of the circuit of the low voltage difference linear regulator.

[0096] Specifically, the control amplifier U1 outputs the first voltage signal to the first end of the first transistor Q1. When the first transistor Q1 works in the amplification area, the source and drain of the first transistor Q1 are equivalent to a variable current source controlled by the first voltage signal, that is, the current between the source and drain of the first transistor Q1 changes with the change of the first voltage signal. Since the resistance values ​​of the first resistor R1 and the second resistor R2 can be set to be much larger than the resistance value of the third resistor R3, the first current can flow mainly through the branch where the third resistor R3 is located, and the first current flows through the third resistor R3 to generate the first voltage. The first current also flows through the load 200 to generate the first load voltage. The voltage of the first connection point P1 is the sum of the first voltage and the first load voltage. The voltage of the first connection point P1 is input to the in-phase input terminal of the amplifier U1 after the voltage is divided by the first resistor R1 and the second resistor R2. Thus, the transfer function from the output terminal of the amplifier U1 to its in-phase input terminal can be obtained as follows:

[0097]

[0098] Among them, V + is the voltage input to the non-inverting input terminal of the operational amplifier U1, Δv is the first voltage signal output by the operational amplifier U1, gm1 is the transconductance of the first transistor Q1, cL is the capacitance value of the output capacitor CL in the load 200, r11 is the resistance value of the first resistor R1, r12 is the resistance value of the second resistor R2, r1 is Figure 3 The resistance value of the third resistor R3 in the circuit shown.

[0099] From formula (1), we can see that the introduction of the third resistor R3 adds a zero point to the circuit, and by making formula (1) equal to zero, the frequency of the zero point can be obtained as The frequency of the first pole is Wherein, r2 is the equivalent output resistance of the first end of the error amplifier branch 20 (that is, Figure 3 c is the output resistance of the operational amplifier U1 in the middle), c2 is the equivalent capacitance at the first end of the first current branch 10. Then, the zero point f can be made z1 The frequency of is just near the frequency of the first pole to achieve stability compensation for the circuit.

[0100] For example, in some embodiments, in order to obtain the best compensation effect, the frequency of the zero point is also set to be equal to the frequency of the first pole, that is, f z1 =f p , we can get: cL×r1=c2×r2.

[0101] The advantage of this compensation method is that the circuit is simple and easy to implement, and the introduced zero point and the pole frequency it compensates do not change with the load current, so the compensation effect is better. Correspondingly, the resistance value of the third resistor required to complete this compensation method is

[0102] In one embodiment, if Figure 4 As shown, the low dropout linear regulator 100 further includes a second current branch 40 .

[0103] The first end of the second current branch 40 is connected to the first end of the first current branch 10 , the second end of the second current branch 40 is connected to the first power source VC1 , and the third end of the second current branch 40 is connected to the output end VOUT.

[0104] Specifically, the second current branch 40 is configured to output a second current at a third terminal of the second current branch 40 in response to the first voltage signal, so as to generate a second voltage at the output terminal VOUT based on the first current and the second current, wherein the sum of the first voltage and the second voltage acts on the first connection point to introduce a zero point that compensates the first pole. The second voltage is the total voltage generated by the sum of the first current and the second current acting on the load 200.

[0105] Figure 4 A structure of the second current branch 40 is also exemplarily shown in FIG. Figure 4 As shown, the second current branch 40 includes a second transistor Q2.

[0106] The first end of the second transistor Q2 is connected to the first end of the first current branch 10 (ie, the first end of the first transistor Q1 ), the second end of the second transistor Q2 is connected to the first power supply VC1 , and the third end of the second transistor Q2 is connected to the output end VOUT.

[0107] It can be understood that in this embodiment, the second transistor Q2 is a PMOS tube as an example. The gate of the PMOS tube is the first end of the second transistor Q2, the source of the PMOS tube is the second end of the second transistor Q2, and the drain of the PMOS tube is the third end of the second transistor Q2.

[0108] In this embodiment, the second transistor Q2 also works in the amplification region, and the source and drain of the second transistor Q2 are equivalent to a variable current source controlled by the first voltage signal, that is, the first transistor Q1 can generate a first current controlled by the first voltage signal, and the second transistor Q2 can generate a second current controlled by the first voltage signal. Among them, the first current flows through the third resistor to generate a first voltage, and then the first current flows into the load 200, and the first current and the second current together generate a second voltage at the output terminal VOUT. Then, the voltage of the first connection point P1 is the sum of the first voltage and the second voltage. At this time, the first voltage that can be obtained is:

[0109] V R3 =gm1×Δv×r3 (2)

[0110] Among them, r3 represents Figure 4 The resistance value of the third resistor R3 in the circuit shown in .

[0111] The voltage on the load, that is, the second voltage, can be obtained as:

[0112]

[0113] Wherein, gm1 is the transconductance of the first transistor Q1, and gm2 is the transconductance of the second transistor Q2.

[0114] The transfer function from the output of op amp U1 to its non-inverting input is:

[0115]

[0116] Combining formulas (2), (3), and (4), the transfer function from the output of op amp U1 to its non-inverting input terminal is obtained as follows:

[0117]

[0118] For ease of calculation, in one embodiment, the transconductance gm2 of the second current branch 40 can be set to N times the transconductance gm1 of the first current branch 10, that is, the transconductance of the second transistor Q1 is N times that of the first transistor Q1, N>1. Equation (5) can be simplified as:

[0119]

[0120] It can be seen from equation (6) that by adding the second transistor Q2, the frequency of the introduced zero point can be made: The first point is still Wherein, c2 is still the equivalent capacitance at the first end of the first current branch, but Figure 4 In the circuit shown, since the first end of the first current branch is connected to the first end of the second current branch, c2 includes the sum of the parasitic capacitance of the first end of the first transistor Q1 and the first end of the second transistor Q2. Figure 4 The total area of ​​the first transistor Q1 and the second transistor Q2 in the circuit shown is Figure 3 When the areas of the first transistors Q1 in the circuits shown are similar, the corresponding capacitance values ​​c2 in the two circuits are also similar. Similarly, the zero point f z2 The frequency of is just near the frequency fp of the first pole to achieve stability compensation for the circuit.

[0121] In some embodiments, in order to obtain the best compensation effect, the frequency of the zero point is also set to be equal to the frequency of the first pole, that is, f z2 =f p , we can get: cL×r3=c2×r2×(N+1). That is to say, the new resistance value of the third resistor R3 required to complete the compensation of the same frequency is but Figure 4 The resistance value of the third resistor R3 shown is relatively Figure 3 The resistance value of the third resistor R3 shown in FIG. 1 is increased by (N+1) times.

[0122] At the same time, it is understandable that if Figure 4 The resistance value of the third resistor R3 is set to Figure 3 The resistance value of the third resistor R3 shown is N+1 times, so the zero point f z1 With zero point f z2 The same compensation function can be achieved by keeping the frequency of the introduced zero point unchanged. Figure 4 The structure shown is relative to Figure 3 As for the results shown, although the resistance value of the third resistor R3 increases by N+1 times, the current flowing through the third resistor R3 decreases by N+1 times. Since the resistance area is proportional to the square of the current, in practical applications, when the chip is implemented, Figure 4 The chip area required for the third resistor R3 is Figure 3 The chip area required to be occupied by the third resistor R3 shown is one N+1th, which significantly reduces the area of ​​the third resistor R3, that is, it can reduce the area occupied by the third resistor R3 in the low-dropout linear regulator, which is beneficial to reducing the cost of the low-dropout linear regulator chip.

[0123] In one embodiment, a driving unit may be further provided in the error amplifying branch 20 to increase the driving capability of the error amplifying branch 20 , thereby increasing the response speed of the entire system.

[0124] like Figure 5 As shown, the error amplification branch 20 further includes a driving unit 22 .

[0125] Among them, the first end of the driving unit 22 is connected to the first power supply VC1, the second end of the driving unit 22 is connected to the first end of the first current branch 10 (that is, the first end of the first transistor Q1), the third end of the driving unit 22 is connected to the output end of the operational amplifier U1, and the fourth end of the driving unit 22 is grounded GND.

[0126] Specifically, the driving unit 22 is configured to output a first voltage signal in response to the second voltage signal output by the operational amplifier U1 , wherein the driving capability of the first voltage signal is stronger than that of the second voltage signal.

[0127] In this embodiment, by setting up the driving unit 22, it is possible to increase the current input to the first end of the first transistor Q1 and the first end of the second transistor Q2 on the basis of outputting the corresponding first voltage signal according to the second voltage signal, thereby being able to drive the first transistor Q1 and the second transistor Q2 to perform corresponding operations more quickly.

[0128] Figure 5 A structure of the drive unit 22 is also exemplarily shown in FIG. Figure 5 As shown, the driving unit 22 includes a current source I1 and a third transistor Q3 .

[0129] Among them, the negative electrode of the current source I1 is connected to the first power supply VC1, the positive electrode of the current source I1 is respectively connected to the second end of the third transistor Q3 and the first end of the first current branch 10, the first end of the third transistor Q3 is connected to the output end of the operational amplifier U1, and the third end of the third transistor Q3 is grounded GND.

[0130] It can be understood that in this embodiment, the third transistor Q3 is a PMOS tube as an example. The gate of the PMOS tube is the first end of the third transistor Q3, the source of the PMOS tube is the second end of the third transistor Q3, and the drain of the PMOS tube is the third end of the third transistor Q3.

[0131] In this embodiment, the third transistor Q3 also works in the amplification region, and the source and drain of the third transistor Q3 are equivalent to a variable current source controlled by the second voltage signal. The magnitude relationship between the current flowing through the third transistor Q3 and the current provided by the current source I1 determines the voltage of the drain of the third transistor Q3, that is, the first voltage signal is controlled by the second voltage signal. The current source I1 can provide a stable current to increase the driving capability, thereby increasing the response speed of the first transistor Q1 and the second transistor Q2.

[0132] It should be noted that Figure 5 The drive unit 22 shown can be applied to Figure 3 The structure shown can also achieve the effect of increasing the driving capability, and of course, can also be applied to other embodiments of the present application. In other words, the technical features in different embodiments of the present application can be combined arbitrarily.

[0133] In one embodiment, if Figure 6 As shown, the low dropout linear regulator 100 further includes a current mirror branch 50 .

[0134] Among them, the first end of the current mirror branch 50 is connected to the first end of the first current branch 10 (that is, the first end of the first transistor Q1), the second end of the current mirror branch 50 is connected to the first power supply VC1, the third end of the current mirror branch 50 is connected to the first connection point P1, and the fourth end of the current mirror branch 50 is grounded GND.

[0135] Specifically, the current mirror branch 50 is configured to generate a first DC current flowing out of the first connection point P1 , the first DC current being equal in magnitude to the DC current flowing through the first current branch 10 , so that the DC current flowing through the resistance branch 30 is zero.

[0136] In one embodiment, please continue to refer to Figure 6 The current mirror branch 50 includes a fourth transistor Q4, a fifth transistor Q5 and a sixth transistor Q6.

[0137] The fourth transistor Q4 is connected to the first current branch 10 and the fifth transistor Q5 respectively, and the sixth transistor Q6 is connected to the fifth transistor Q5 and the first connection point P1 respectively.

[0138] Specifically, the first end of the fourth transistor Q4 is connected to the first end of the first current branch 10, the second end of the fourth transistor Q4 is connected to the first power supply VC1, the third end of the fourth transistor Q4 is connected to the third end of the fifth transistor Q5, the first end of the fifth transistor Q5 and the first end of the sixth transistor Q6, the second end of the sixth transistor Q6 and the second end of the fifth transistor Q5 are both grounded, and the third end of the sixth transistor Q6 is connected to the first connection point P1.

[0139] Among them, the first end of the fourth transistor Q4 is the first end of the current mirror branch 50, the second end of the fourth transistor Q4 is the second end of the current mirror branch 50, the third end of the sixth transistor Q6 is the third end of the current mirror branch 50, and the second end of the sixth transistor Q6 is the fourth end of the current mirror branch 50.

[0140] In this embodiment, the first end of the fourth transistor Q4 is connected to the first end of the first transistor Q1, and the second end of the fourth transistor Q4 and the second end of the first transistor Q1 are both connected to the first power supply VC1. Therefore, by configuring the fourth transistor Q4 to be equal in size to the first transistor Q1, the current (i.e., the second direct current) flowing through the fourth transistor Q4 is equal to the direct current flowing through the first transistor Q1. In other words, the direct current flowing through the first transistor Q1 is mirrored to the fourth transistor Q4 in a 1:1 ratio, i.e., the second direct current is equal in size to the direct current flowing through the first current branch 10.

[0141] The second direct current flows through the fifth transistor Q5 at the same time, and similarly, the first end of the sixth transistor Q6 is connected to the first end of the fifth transistor Q5, and the second end of the sixth transistor Q6 is connected to the second end of the fifth transistor Q5. Therefore, by configuring the fifth transistor Q5 and the sixth transistor Q6 to be equal in size, the current flowing through the sixth transistor Q6 (i.e., the second direct current) is equal to the direct current flowing through the fifth transistor Q5. In other words, the direct current flowing through the fifth transistor Q5 is mirrored to the sixth transistor Q1 in a 1:1 ratio, that is, the sixth transistor Q6 generates a first direct current based on the second direct current, and the first direct current is equal to the second direct current, and both are equal to the direct current flowing through the first transistor Q1.

[0142] Optionally, the first direct current and the direct current flowing through the first transistor Q1 can be made equal by keeping the size ratio M1 of the second transistor Q2 and the fourth transistor Q4 and the size ratio M2 of the sixth transistor Q6 and the fifth transistor Q5 equal (i.e., M1=M2=M). In this case, the ratio of the second direct current to the first direct current is M.

[0143] At the same time, the first DC current flows out from the first connection point P1, and the first DC current is equal to the DC current flowing through the first transistor Q1. In this way, once the current flowing through the first transistor Q1 flows into the first connection point P1, it will flow into the branch where the sixth transistor Q6 is located as the first DC current. In this case, there is no DC current on the third resistor R3, that is, there is no DC voltage drop. Furthermore, the output terminal VOUT and the first connection point P1 are equivalent to a DC short circuit. It can be understood that Figure 3-5In the embodiment shown, due to the introduction of the third resistor R3, the output voltage is not equal to the voltage at the first connection point P1, which may cause an error in the voltage output by the low-voltage difference linear regulator when the output current changes. By setting a DC short circuit between the output terminal VOUT and the first connection point P1, the problem of output voltage error caused by the third resistor R3 is cleverly solved, which is conducive to maintaining a stable output voltage of the low-voltage difference linear regulator 100.

[0144] In one embodiment, if Figure 7 As shown, the low dropout linear regulator 100 further includes a filter branch 60 .

[0145] The first end of the filter branch 60 is connected to the first end of the fifth transistor Q5 , the second end of the filter branch 60 is connected to the first end of the sixth transistor Q6 , and the third end of the filter branch 60 is grounded GND.

[0146] Specifically, the filter branch 60 is configured to perform low-pass filtering on the AC signal in the current mirror branch 50 to keep the current in the current mirror branch 50 as a DC current, thereby preventing the added zero point from being affected by the addition of the current mirror branch 50, which is beneficial to maintaining the stability of the compensation for the first pole.

[0147] Figure 7 A structure of the filter branch 60 is also exemplarily shown in FIG. Figure 7 As shown, the filter branch 60 includes a fourth resistor R4 and a first capacitor C1.

[0148] A first end of the fourth transistor Q4 is connected to a first end of the first current branch 10, a second end of the fourth transistor Q4 is connected to a first power supply VC1, a third end of the fourth transistor Q4 is respectively connected to a third end of the fifth transistor Q5, a first end of the fourth resistor R4 and a first end of the fifth transistor Q5, a second end of the fourth resistor R4 is respectively connected to a first end of the sixth transistor Q6 and a first end of the first capacitor C1, a second end of the sixth transistor Q6, a second end of the fifth transistor Q5 and a second end of the first capacitor C1 are all grounded GND, and a third end of the sixth transistor Q6 is connected to a first connection point P1.

[0149] Among them, the first end of the fourth transistor Q4 is the first end of the current mirror branch 50, the second end of the fourth transistor Q4 is the second end of the current mirror branch 50, the third end of the sixth transistor Q6 is the third end of the current mirror branch 50, and the second end of the sixth transistor Q6 is the fourth end of the current mirror branch 50.

[0150] In this embodiment, the function of the filter branch 60 composed of the fourth resistor R4 and the first capacitor C1 is to perform low-pass filtering on the AC signal applied to the first end of the fifth transistor Q5 and the first end of the sixth transistor Q6, so that the entire current mirror branch 60 does not participate in the AC response of the circuit in the low voltage difference linear regulator. The parameters of the fourth resistor R4 and the first capacitor C1 are appropriately selected so that only the DC component of the current flowing through the first transistor Q1 is shunted to the sixth transistor Q6, while the AC component of the current flowing through the first transistor Q1 still flows to the output terminal VOUT and the load 200 through the third resistor R3. In this way, the transfer function of the original compensation circuit (such as formula (1) or formula (5)) remains unchanged. The addition of the filter branch 60 enables the current mirror branch 60 to completely maintain the compensation characteristics of the zero point brought by the third resistor R3 on the stability of the system while eliminating the output voltage error of the circuit in the original low voltage difference linear regulator.

[0151] It should be noted that, in this embodiment, although the connection relationship between the fourth transistor Q4, the fifth transistor Q5 and the sixth transistor Q6 is the same as Figure 6 The structures described above are different, but the functions and specific implementation processes of the fourth transistor Q4, the fifth transistor Q5 and the sixth transistor Q6 are the same. Figure 6 The structure shown is the same, and the details can be referred to above for Figure 6 The detailed description is not repeated here.

[0152] An embodiment of the present application also provides a control system, which includes a load and a low voltage dropout linear regulator as in any of the above embodiments, wherein the low voltage dropout linear regulator is connected to the load and is used to provide voltage and current to the load.

[0153] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of the present application, rather than to limit them. Under the concept of the present application, the technical features in the above embodiments or different embodiments can also be combined, the steps can be implemented in any order, and there are many other changes in different aspects of the present application as described above, which are not provided in detail for the sake of simplicity. Although the present application has been described in detail with reference to the aforementioned embodiments, a person of ordinary skill in the art should understand that the technical solutions described in the aforementioned embodiments can still be modified, or some of the technical features can be replaced by equivalents. These modifications or replacements do not deviate the essence of the corresponding technical solutions from the scope of the technical solutions of the embodiments of the present application.

Claims

1. A low voltage dropout linear regulator, characterized in that: include: An error amplifying branch, a first transistor, a second transistor and a resistance branch; The first end of the error amplifying branch is connected to the first end of the first transistor and the first end of the second transistor, the second end of the first transistor and the second end of the second transistor are both connected to a first power supply, the second end of the error amplifying branch is connected to a first reference voltage, the third end of the error amplifying branch is respectively connected to the third end of the first transistor and the first end of the resistance branch, the second end of the resistance branch is an output end, and a connection point between the third end of the error amplifying branch, the third end of the first transistor and the first end of the resistance branch is a first connection point, the third end of the second transistor is connected to the output end, and the output end is used to be connected to a load; The error amplification branch is configured to obtain a sampling voltage based on the voltage of the first connection point, and amplify the difference between the sampling voltage and the first reference voltage to output a first voltage signal; The first transistor is configured to output a first current at a third terminal of the first transistor in response to the first voltage signal; The resistance branch is configured to generate a first voltage across the resistance branch in response to the first current; The second transistor is configured to output a second current at a third terminal of the second transistor in response to the first voltage signal to generate a second voltage at the output terminal based on the first current and the second current, wherein the sum of the first voltage and the second voltage acts on the first connection point to introduce a zero point for compensating the first pole, and the difference between the frequency of the zero point and the frequency of the first pole is within a preset difference range, and the frequency of the first pole is determined by the equivalent output resistance of the first end of the error amplification branch and the equivalent capacitance at the first end of the first transistor.

2. The low voltage dropout linear regulator according to claim 1, characterized in that: The error amplification branch includes an operational amplifier and a voltage divider unit; The output terminal of the operational amplifier is connected to the first terminal of the first transistor, the input power terminal of the operational amplifier is connected to the second power supply, the first input terminal of the operational amplifier is connected to the first terminal of the voltage divider unit, the second input terminal of the operational amplifier is connected to the first reference voltage, the ground terminal of the operational amplifier and the second terminal of the voltage divider unit are both grounded, and the third terminal of the voltage divider unit is connected to the first connection point; The voltage dividing unit is used to divide the voltage of the first connection point and output the sampled voltage to the first input terminal of the operational amplifier; The output end of the operational amplifier is the first end of the error amplification branch, the second input end of the operational amplifier is the second end of the error amplification branch, and the third end of the voltage divider unit is the third end of the error amplification branch.

3. The low voltage dropout linear regulator according to claim 2, characterized in that: The voltage dividing unit includes a first resistor and a second resistor; The first end of the first resistor is connected to the first connection point, the second end of the first resistor is respectively connected to the first input end of the operational amplifier and the first end of the second resistor, and the second end of the second resistor is grounded; Wherein, the first end of the first resistor is the third end of the error amplification branch.

4. The low voltage dropout linear regulator according to claim 2, characterized in that: The error amplification branch also includes a driving unit; A first end of the driving unit is connected to the first power supply, a second end of the driving unit is connected to the first end of the first transistor, a third end of the driving unit is connected to the output end of the operational amplifier, and a fourth end of the driving unit is grounded; The driving unit is configured to output the first voltage signal in response to the second voltage signal output by the operational amplifier, wherein the driving capability of the first voltage signal is stronger than that of the second voltage signal; Wherein, the second end of the driving unit is the first end of the error amplification branch.

5. The low voltage dropout linear regulator according to claim 4, characterized in that: The driving unit includes a current source and a third transistor; The negative electrode of the current source is connected to the first power supply, the positive electrode of the current source is respectively connected to the second end of the third transistor and the first end of the first transistor, the first end of the third transistor is connected to the output end of the operational amplifier, and the third end of the third transistor is grounded.

6. The low voltage dropout linear regulator according to claim 1, characterized in that: The resistance branch includes a third resistor; A first end of the third resistor is connected to the first connection point, and a second end of the third resistor is the output end.

7. The low voltage dropout linear regulator according to claim 1, characterized in that: The transconductance of the second current branch is N times that of the first transistor, where N>1; The resistance value r3 of the resistance branch, the equivalent output resistance r2 of the first end of the error amplification branch, and the equivalent capacitance c2 at the first end of the first transistor satisfy the following relationship: r3=(N+1)*r2*c2 / cL; Wherein, cL is the output capacitance in the load.

8. The low voltage dropout linear regulator according to claim 1, characterized in that: The low voltage drop linear regulator also includes a current mirror branch; The first end of the current mirror branch is connected to the first end of the first transistor, the second end of the current mirror branch is connected to the first power supply, the third end of the current mirror branch is connected to the first connection point, and the fourth end of the current mirror branch is grounded; The current mirror branch is configured to generate a first direct current flowing out of the first connection point, wherein the first direct current is equal to the direct current flowing through the first transistor, so that the direct current flowing through the resistance branch is zero.

9. The low voltage dropout linear regulator according to claim 8, characterized in that: The current mirror branch includes a fourth transistor, a fifth transistor and a sixth transistor; The fourth transistor is connected to the first transistor and the fifth transistor respectively, and the fourth transistor is used to generate a second direct current flowing through the fifth transistor; The sixth transistor is connected to the fifth transistor and the first connection point respectively, and the sixth transistor is used to generate the first direct current based on the second direct current.

10. The low voltage dropout linear regulator according to claim 9, characterized in that: The first end of the fourth transistor is connected to the first end of the first transistor, the second end of the fourth transistor is connected to the first power supply, the third end of the fourth transistor is connected to the third end of the fifth transistor and the first end of the fifth transistor, the second end of the sixth transistor and the second end of the fifth transistor are both grounded, and the third end of the sixth transistor is connected to the first connection point; Among them, the first end of the fourth transistor is the first end of the current mirror branch, the second end of the fourth transistor is the second end of the current mirror branch, the third end of the sixth transistor is the third end of the current mirror branch, and the second end of the sixth transistor is the fourth end of the current mirror branch.

11. The low voltage dropout linear regulator according to claim 9, characterized in that: The low voltage drop linear regulator also includes a filter branch; The first end of the filter branch is connected to the first end of the fifth transistor, the second end of the filter branch is connected to the first end of the sixth transistor, and the third end of the filter branch is grounded; The filtering branch is configured to perform low-pass filtering on the AC signal in the current mirror branch to keep the current in the current mirror branch as a DC current.

12. The low voltage dropout linear regulator according to claim 11, characterized in that: The filtering branch includes a fourth resistor and a first capacitor; The first end of the fourth transistor is connected to the first end of the first transistor, the second end of the fourth transistor is connected to the first power supply, the third end of the fourth transistor is respectively connected to the third end of the fifth transistor, the first end of the fourth resistor and the first end of the fifth transistor, the second end of the fourth resistor is respectively connected to the first end of the sixth transistor and the first end of the first capacitor, the second end of the sixth transistor, the second end of the fifth transistor and the second end of the first capacitor are grounded, and the third end of the sixth transistor is connected to the first connection point; Among them, the first end of the fourth transistor is the first end of the current mirror branch, the second end of the fourth transistor is the second end of the current mirror branch, the third end of the sixth transistor is the third end of the current mirror branch, and the second end of the sixth transistor is the fourth end of the current mirror branch.

13. A control system, characterized in that: include: A load and a low voltage dropout linear regulator as claimed in any one of claims 1 to 12; The low voltage dropout linear regulator is connected to the load, and is used to provide voltage and current for the load.

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