A method for monitoring temperature of annealing chamber

Abstract

The present invention discloses a method for monitoring the temperature of an annealing chamber, and belongs to the field of semiconductor process manufacturing. In the method, after completing the high-temperature thermal annealing treatment of the wafer, the oxide layer on the surface of the wafer is removed and a Co metal layer and a TiN metal layer are deposited, and the amorphous silicon layer of the silicon atoms on the surface of the wafer is bonded with the Co metal layer to form a metal silicide sensitive to low temperature, which is used for temperature monitoring during low-temperature annealing, thereby realizing the secondary annealing and reuse of the wafer, meeting the monitoring of the temperature of the high-temperature and low-temperature annealing chambers, and greatly saving the production cost.

Description

Technical Field

[0001] The embodiments of the present invention relate to the field of semiconductor process manufacturing, and in particular to a method for monitoring the temperature of an annealing chamber. Background Art

[0002] In the process of semiconductor device manufacturing, rapid thermal annealing has become an indispensable process. For example, the diffusion of impurity atoms, the repair of lattice damage on the wafer surface after implantation, and the bonding between implanted impurity atoms and silicon atoms all require rapid thermal annealing technology at a specific temperature. Therefore, accurate monitoring of the temperature of the rapid thermal annealing machine is also particularly important.

[0003] Usually, the silicon wafer after ion implantation is subjected to rapid thermal annealing treatment, and the square resistance is tested to monitor the annealing temperature. However, after the annealing heat treatment, the implanted ions in the silicon wafer cannot be reused and can only be discarded, which greatly wastes economic costs. Summary of the invention

[0004] The embodiment of the present invention provides a method for monitoring the temperature of an annealing chamber, which can solve the problem of low utilization rate of silicon wafers after thermal annealing in the related art. The technical solution is as follows:

[0005] An embodiment of the present invention provides a method for monitoring the temperature of an annealing chamber, the method comprising:

[0006] Performing ion source implantation on the wafer, after which the ratio of oxygen and nitrogen in the wafer meets the requirements of high-temperature thermal annealing treatment, wherein an oxide layer for blocking ion overflow is formed on the surface of the wafer after a small amount of oxygen is introduced;

[0007] Performing the high temperature thermal annealing treatment on the wafer;

[0008] Monitoring the stability of the chamber temperature at high temperature by measuring the square resistance of the wafer;

[0009] Removing the oxide layer on the surface of the wafer and depositing a Co metal layer and a TiN metal layer, wherein the Co metal is bonded to the surface of the wafer to form a metal silicide;

[0010] performing a low temperature thermal annealing process on the wafer;

[0011] The stability of the cavity temperature at low temperatures is monitored by measuring the sheet resistance of the metal silicide.

[0012] Optionally, a high current ion implanter is used to implant a B source with an energy of 30 KeV, a dose of 1E15 and an angle of 7° into the wafer. After the implantation, the wafer contains 1-3% O 2 in a nitrogen atmosphere.

[0013] Optional, in a solution containing 1-3% O 2The high temperature thermal annealing treatment is performed on the wafer in a nitrogen atmosphere.

[0014] Optionally, during the high temperature thermal annealing treatment, the temperature of the wafer is between 950°C and 1150°C.

[0015] Optionally, washing away the oxide layer on the surface of the wafer to expose the interface layer after ion implantation;

[0016] A 300A Co metal layer and a 200A TiN metal layer were deposited by physical vapor deposition.

[0017] Optionally, the low temperature thermal annealing treatment is performed on the wafer in a pure nitrogen atmosphere.

[0018] Optionally, during the low-temperature thermal annealing treatment, the temperature of the wafer is no higher than 570°C.

[0019] Optionally, the high temperature thermal annealing treatment is performed for 20 seconds.

[0020] Optionally, the low-temperature thermal annealing treatment is performed for 30 seconds.

[0021] By adopting the annealing chamber temperature monitoring method provided in the embodiment of the present invention, after completing the high-temperature thermal annealing treatment of the wafer, the oxide layer on the surface of the wafer is removed and the Co metal layer and the TiN metal layer are deposited, and the amorphous silicon layer of the silicon atoms on the surface of the wafer is amorphized and bonded with the Co metal layer to form a metal silicide sensitive to low temperature, which is used for temperature monitoring during low-temperature annealing, thereby realizing the secondary annealing and reuse of the wafer, meeting the monitoring of the high-temperature and low-temperature annealing chamber temperatures, and greatly saving the production cost. BRIEF DESCRIPTION OF THE DRAWINGS

[0022] Figure 1 A flow chart of a method for monitoring the temperature of an annealing chamber according to an exemplary embodiment of the present invention is shown;

[0023] Figure 2 A schematic diagram of a process flow of a sequential startup method in the related art is shown;

[0024] Figure 3 A flow chart of a method for monitoring the temperature of an annealing chamber according to another exemplary embodiment of the present invention is shown;

[0025] Figure 4 High and low temperature Rs distribution diagrams are shown. DETAILED DESCRIPTION

[0026] In order to make the objectives, technical solutions and advantages of the present invention more clear, the embodiments of the present invention will be further described in detail below with reference to the accompanying drawings.

[0027] The term "multiple" as used herein refers to two or more than two. "And / or" describes the relationship between related objects, indicating that three relationships can exist. For example, A and / or B can mean: A exists alone, A and B exist at the same time, and B exists alone. The character " / " generally indicates that the related objects are in an "or" relationship.

[0028] Please refer to Figure 1 , which shows a flow chart of an annealing chamber temperature monitoring method according to an exemplary embodiment of the present invention. The method comprises:

[0029] Step 101, performing ion source implantation on the wafer.

[0030] Among them, the oxygen-nitrogen ratio of the wafer after injection meets the high-temperature thermal annealing treatment, and a small amount of oxygen is passed under the oxygen-nitrogen ratio. An oxide layer is formed on the surface of the wafer after the small amount of oxygen is passed to block ion overflow, thereby preventing the injected ions from overflowing. Ion overflow will cause uneven resistance value problems.

[0031] like Figure 2 As shown, it shows the ion implantation layer formed after the wafer is implanted with an ion source. In the embodiment of the present application, a clean bare wafer is used.

[0032] Step 102, performing high temperature thermal annealing on the wafer.

[0033] The wafer is subjected to high temperature thermal annealing treatment at a certain oxygen and nitrogen ratio.

[0034] Step 103 , monitoring the stability of the chamber temperature at high temperature by measuring the sheet resistance of the wafer.

[0035] Furthermore, the stability of the cavity temperature under high temperature can be reflected by measuring the resistance value of the square resistance of the wafer.

[0036] Step 104 , removing the oxide layer on the surface of the wafer and depositing a Co metal layer and a TiN metal layer.

[0037] In actual production, after the implanted wafer undergoes rapid thermal annealing, the ions have been activated and diffused evenly between the wafers, and the silicon atoms on the surface of the wafer begin to become amorphous.

[0038] In a possible implementation, the oxide layer on the surface of the wafer is removed and a Co metal layer and a TiN metal layer are deposited. Figure 2 As shown, the Co metal layer and the TiN metal layer are located on the surface of the wafer, and the Co metal layer is located below the TiN metal layer. Among them, the amorphous silicon layer of the silicon atoms on the surface of the wafer is bonded with the Co metal layer to form a metal silicide sensitive to low temperature, which is used to monitor the temperature during low-temperature annealing, thereby realizing the secondary annealing and reuse of the wafer, and the TiN metal layer is used as a metal protective layer.

[0039] Step 105 , performing low temperature thermal annealing on the wafer.

[0040] Step 106 , monitoring the stability of the cavity temperature at low temperature by measuring the sheet resistance of the metal silicide.

[0041] Among them, the metal silicide formed by bonding is sensitive to low temperature, so the stability of the cavity temperature at low temperature can be monitored by measuring the square resistance of the metal silicide. Regarding the formation of metal silicide, the temperature conditions during its formation are also very critical, that is, the formation of metal silicide depends on the temperature during the low-temperature thermal annealing process.

[0042] In summary, by using the annealing chamber temperature monitoring method provided in the embodiment of the present invention, after completing the high-temperature thermal annealing treatment of the wafer, the oxide layer on the surface of the wafer is removed and the Co metal layer and the TiN metal layer are deposited, and the amorphous silicon layer of the silicon atoms on the surface of the wafer is amorphized and bonded with the Co metal layer to form a metal silicide sensitive to low temperature, which is used for temperature monitoring during low-temperature annealing, thereby realizing the secondary annealing and reuse of the wafer, meeting the monitoring of the high-temperature and low-temperature annealing chamber temperatures, and greatly saving the production cost.

[0043] Please refer to Figure 3 , which shows a flow chart of a method for monitoring the temperature of an annealing chamber according to another exemplary embodiment of the present invention. The method comprises:

[0044] Step 301, using a high current ion implanter to implant a B source with an energy of 30 KeV, a dose of 1E15 and an angle of 7° into the wafer.

[0045] Among them, the wafer after injection contains 1-3% O 2 in a nitrogen atmosphere.

[0046] Step 302, in a mixture containing 1-3% O 2 The wafer is subjected to high temperature thermal annealing in a nitrogen atmosphere.

[0047] Among them, under high temperature thermal annealing treatment, the temperature of the wafer is between 950°C and 1150°C.

[0048] Optionally, high temperature thermal annealing is performed for 20 seconds.

[0049] Step 303 , monitoring the stability of the chamber temperature at high temperature by measuring the sheet resistance of the wafer.

[0050] This step refers to step 103 in the above embodiment, and will not be described again in detail in this embodiment of the present application.

[0051] Step 304 , washing away the oxide layer on the surface of the wafer to expose the interface layer after ion implantation.

[0052] Step 305: deposit a 300A Co metal layer and a 200A TiN metal layer by physical vapor deposition.

[0053] Furthermore, this step discloses the method and parameters for depositing the Co metal layer and the TiN metal layer.

[0054] Step 306 , performing low temperature thermal annealing on the wafer in a pure nitrogen atmosphere.

[0055] Among them, under the low-temperature thermal annealing treatment, the temperature of the wafer is no higher than 570°C.

[0056] Optionally, low temperature thermal annealing is performed for 30 seconds.

[0057] Step 307 , monitoring the stability of the cavity temperature at low temperature by measuring the sheet resistance of the metal silicide.

[0058] This step refers to step 106 in the above embodiment, and will not be described again in detail in this embodiment of the present application.

[0059] In the embodiments of the present application, the conditions for ion implantation, the method and parameters for depositing the Co metal layer and the TiN metal layer, and the temperature and time for thermal annealing are further disclosed, wherein the temperature of the wafer is not higher than 570°C, which is conducive to the formation of metal silicides that are sensitive to low temperatures.

[0060] like Figure 4 As shown, it shows the high temperature and low temperature Rs distribution diagrams. It can be obtained that both the high temperature and low temperature Rs present a relatively uniform map distribution, and have good resistance and uniformity, so as to illustrate that an annealing chamber temperature monitoring method provided by the present application ensures the stability and accuracy of monitoring while realizing the secondary annealing of the wafer.

[0061] The above descriptions are merely optional embodiments of the present invention and are not intended to limit the present invention. Any modifications, equivalent substitutions, improvements, etc. made within the spirit and principles of the present invention should be included in the protection scope of the present invention.

Claims

1. A method for monitoring the temperature of an annealing chamber, characterized in that: The method comprises: Performing ion source implantation on the wafer, after which the ratio of oxygen and nitrogen in the wafer meets the requirements of high-temperature thermal annealing treatment, wherein an oxide layer for blocking ion overflow is formed on the surface of the wafer after a small amount of oxygen is introduced; Performing the high temperature thermal annealing treatment on the wafer, wherein silicon atoms on the surface of the wafer begin to become amorphous after the high temperature thermal annealing treatment; Monitoring the stability of the chamber temperature at high temperature by measuring the square resistance of the wafer; Removing the oxide layer on the surface of the wafer and depositing a Co metal layer and a TiN metal layer, wherein the Co metal is bonded to the amorphous silicon on the surface of the wafer to form a metal silicide; performing a low temperature thermal annealing process on the wafer; The stability of the cavity temperature at low temperatures is monitored by measuring the sheet resistance of the metal silicide.

2. The method according to claim 1, characterized in that The step of implanting an ion source into a wafer comprises: A high current ion implanter is used to implant a B source with an energy of 30 KeV, a dosage of 1E15 and an angle of 7° into the wafer. After the implantation, the wafer is placed in a nitrogen atmosphere containing 1-3% O2.

3. The method according to claim 2, characterized in that The step of performing the high temperature thermal annealing treatment on the wafer comprises: The high temperature thermal annealing treatment is performed on the wafer in a nitrogen atmosphere containing 1-3% O2.

4. The method according to claim 2, characterized in that: During the high temperature thermal annealing treatment, the temperature of the wafer is between 950°C and 1150°C.

5. The method according to claim 1, characterized in that The step of removing the oxide layer on the surface of the wafer and depositing a Co metal layer and a TiN metal layer comprises: Washing away the oxide layer on the surface of the wafer to expose the interface layer after ion implantation; A 300A Co metal layer and a 200A TiN metal layer were deposited by physical vapor deposition.

6. The method according to claim 5, characterized in that The step of performing low temperature thermal annealing on the wafer comprises: The low temperature thermal annealing process is performed on the wafer in a pure nitrogen atmosphere.

7. The method according to claim 6, characterized in that Under the low temperature thermal annealing treatment, the temperature of the wafer is no higher than 570°C.

8. The method according to any one of claims 2 to 4, characterized in that: The high temperature thermal annealing treatment is performed for 20 seconds.

9. The method according to any one of claims 5 to 7, characterized in that: The low temperature thermal annealing treatment is performed for 30 seconds.

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