Circuit board integrated inductor and electronic device

Abstract

The application provides a circuit board integrated inductor and an electronic device. The circuit board integrated inductor comprises: a circuit board comprising a substrate and a coil embedded in the substrate, the coil comprising a main body part; and a magnetic layer carried on the circuit board and at least partially overlapping the coil; the distance w1 between the outer contour of the main body part in the surface projection of the substrate and the outer contour of the magnetic layer in the surface projection of the substrate ranges from 30 μm to 300 μm. The circuit board integrated inductor of the application integrates an inductor in a circuit board, is more super-thin and small, improves packaging efficiency, and has a higher inductance value when the size of the inductor part remains unchanged.

Description

TECHNICAL FIELD

[0001] The present application relates to the electronic field, and particularly relates to a circuit board integrated inductor and electronic equipment. BACKGROUND

[0002] With the development trend of miniaturization and high density of electronic hardware, the surface area of the circuit board is sharply reduced, but the electronic components required to be mounted on the board surface are increasing. The inductor is an indispensable component of electronic equipment. At present, the inductor is mostly prepared into an inductor first, and then mounted on the circuit board. This not only occupies the area of the circuit board, but also needs to be mounted separately, thereby reducing the packaging efficiency. SUMMARY

[0003] In view of the above problems, the present application provides a circuit board integrated inductor, which integrates the inductor in the circuit board, is more super-thin and small, improves the packaging efficiency, and has a higher inductance value when the size of the inductor part is unchanged.

[0004] The present application provides a circuit board integrated inductor, which comprises:

[0005] a circuit board, the circuit board comprising a substrate and a coil, the coil being embedded in the substrate, the coil comprising a main body part; and

[0006] a magnetic layer, the magnetic layer being carried on the circuit board and at least partially overlapping with the coil;

[0007] The distance w1 between the outer contour of the main body part in the surface projection of the substrate and the outer contour of the magnetic layer in the surface projection of the substrate is in the range of 30um <= w1 <= 300um.

[0008] The present application also provides a circuit board integrated inductor, which comprises:

[0009] a display screen; and

[0010] The circuit board integrated inductor provided by the present application comprises a processor, the processor is electrically connected with the coil and the display screen respectively, and the processor is used for controlling the size and direction of the current flowing through the coil.

[0011] The coil of the circuit board integrated inductor in this embodiment includes a circuit board and a magnetic layer. The circuit board includes a substrate and a coil, with the coil embedded in the substrate. The coil includes a main body, and the distance w1 between the outer contour of the orthographic projection of the main body on the surface of the substrate and the outer contour of the orthographic projection of the magnetic layer on the surface of the substrate ranges from 30μm to 300μm. Since the size of inductor devices is typically limited, this allows the range of w1 to be controlled to 30μm to 300μm when the inductor area and the number of coil layers are the same. This enables the circuit board integrated inductor to achieve a higher inductance value with the same magnetic layer area. Furthermore, the circuit board integrated inductor of this embodiment integrates the inductor onto the circuit board. When applied to electronic devices, this allows for miniaturization and thinning of the electronic devices. The inductor is manufactured together with the circuit board, eliminating the need for separate mounting and improving packaging efficiency. Moreover, by integrating the inductor into the circuit board, the corresponding space on the circuit board can be saved for mounting other components, saving area on the circuit board and enhancing the wiring and component placement capabilities of the circuit board. Attached Figure Description

[0012] To more clearly illustrate the technical solutions of the embodiments of this application, the drawings used in the embodiments will be briefly introduced below. Obviously, the drawings described below are only some embodiments of this application. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0013] Figure 1 This is a schematic diagram of the structure of the integrated inductor on the circuit board according to the first aspect of this application.

[0014] Figure 2 This is a partial exploded view of the integrated inductor on a circuit board according to the first aspect of this application.

[0015] Figure 3 The circuit board integrated inductor of the first aspect embodiment of this application Figure 1 A schematic diagram of the cross-sectional structure along the AA direction.

[0016] Figure 4 This is a schematic diagram of the structure of the coil according to the first aspect of this application.

[0017] Figure 5 This is a schematic diagram of a partially exploded structure of a coil according to the first aspect of this application.

[0018] Figure 6 This is a schematic diagram of the structure of a coil according to another embodiment of the first aspect of this application.

[0019] Figure 7Figure 1 is a schematic diagram of a partial exploded view of a circuit board integrated inductor according to an embodiment of the first aspect of the present application.

[0020] Figure 8 Figure 2 is a schematic diagram of a partial exploded view of a circuit board according to an embodiment of the first aspect of the present application.

[0021] Figure 9 Figure 3 is a circuit diagram of a circuit board integrated inductor according to an embodiment of the first aspect of the present application.

[0022] Figure 10 Figure 4 is a schematic diagram of a structure of a circuit board integrated inductor according to an embodiment of the first aspect of the present application.

[0023] Figure 11 Figure 5 is a schematic diagram of a structure of a circuit board integrated inductor according to an embodiment of the first aspect of the present application.

[0024] Figure 12 Figure 6 is a schematic diagram of a structure of a circuit board integrated inductor according to an embodiment of the first aspect of the present application.

[0025] Figure 13 Figure 7 is a top view of a circuit board integrated inductor according to an embodiment of the first aspect of the present application.

[0026] Figure 14 Figure 8 is a top view of a magnetic film layer according to an embodiment of the first aspect of the present application.

[0027] Figure 15 Figure 9 is a schematic diagram of a structure of a circuit board integrated inductor according to an embodiment of the first aspect of the present application.

[0028] Figure 16 Figure 10 is a schematic diagram of a structure of a circuit board integrated inductor according to an embodiment of the first aspect of the present application.

[0029] Figure 17 Figure 11 is a schematic diagram of a structure of a circuit board integrated inductor according to an embodiment of the second aspect of the present application.

[0030] Figure 18 Figure 12 is a schematic diagram of a partial exploded view of a circuit board integrated inductor according to an embodiment of the second aspect of the present application.

[0031] Figure 19 Figure 13 is a schematic diagram of a cross-sectional structure of a circuit board according to an embodiment of the second aspect of the present application along the direction of B-B. Figure 17

[0032] Figure 14 is a schematic diagram of a structure of a coil according to an embodiment of the second aspect of the present application. Figure 20

[0033] Figure 15 is a schematic diagram of a structure of a circuit board integrated inductor according to an embodiment of the second aspect of the present application. Figure 21

[0034] ​Figure 22 is a magnetic field intensity distribution diagram of a side surface of an inductance portion of a circuit board integrated inductance of Example 4 of the present application.

[0035] Figure 23 is a magnetic field intensity distribution diagram of a side surface of an inductance portion of a circuit board integrated inductance of Comparative Example 2 of the present application.

[0036] Figure 24 is a partial perspective structural schematic diagram of a circuit board integrated inductance of the third aspect of the present application.

[0037] Figure 25 is a partial perspective structural schematic diagram of a circuit board of the third aspect of the present application.

[0038] Figure 26 is a structural schematic diagram of a coil of the third aspect of the present application.

[0039] Figure 27 is a structural schematic diagram of a coil of the third aspect of the present application.

[0040] Figure 28 is a partial perspective view of a circuit board integrated inductance of Example 4 of the present application.

[0041] Figure 29 is a partial perspective view of a circuit board integrated inductance of Comparative Example 5 of the present application.

[0042] Figure 30 is a partial perspective view of a circuit board integrated inductance of Comparative Example 6 of the present application.

[0043] Figure 31 is a structural schematic diagram of an inductance of an embodiment of the fourth aspect of the present application.

[0044] Figure 32 is a structural schematic diagram of an inductance of a further embodiment of the fourth aspect of the present application.

[0045] Figure 33 is a structural schematic diagram of an inductance of a further embodiment of the fourth aspect of the present application.

[0046] Figure 34 is a structural schematic diagram of an inductance of a further embodiment of the fourth aspect of the present application.

[0047] Figure 35 is a structural schematic diagram of an electronic device of an embodiment of the present application.

[0048] Figure 36 is a circuit block diagram of an electronic device of an embodiment of the present application.

[0049] Explanation of Reference Numerals:

[0050] 100 - circuit board integrated inductor, 10 - circuit board, 11 - substrate, 111 - insulating layer, 113 - support layer, 13 - coil, 131 - main body part, 131a - first side, 131b - second side, 131c - third side, 131d - fourth side, 13a - sub-coil, 13a1 - first sub-coil, 13a2 - second sub-coil, 133 - first lead wire, 135 - second lead wire, 1311 - wire layer, 1301 - opening, 1303 - first end, 1305 - second end, 15 - processor, 17 - memory, 30 - magnetic layer, 31 - magnetic film layer, 311 - first magnetic film sub-layer, 313 - second magnetic film sub-layer, 315 - third magnetic film sub-layer, 3151 - magnetic film part, 33 - magnetic glue layer, 35 - dielectric layer, 200 - inductor, 210 - coil layer, 300 - electronic device, 310 - display screen. DETAILED DESCRIPTION

[0051] In order to better understand the technical scheme of the present application, the technical scheme in the embodiments of the present application will be clearly and completely described below in conjunction with the accompanying drawings in the embodiments of the present application. Obviously, the described embodiments are only part of the embodiments of the present application, rather than all the embodiments. Based on the embodiments in the present application, all other embodiments obtained by those skilled in the art without creative labor fall within the scope of protection of the present application.

[0052] The terms "first", "second", etc. in the specification and claims of the present application and the above-mentioned drawings are used to distinguish different objects, rather than to describe a specific order. In addition, the terms "include" and "have" and any variations thereof are intended to cover non-exclusive inclusion. For example, a process, method, system, product or device including a series of steps or units is not limited to the listed steps or units, but can optionally include steps or units not listed, or can optionally include other steps or units inherent to the process, method, product or device.

[0053] The technical scheme in the embodiments of the present application will be described below in conjunction with the accompanying drawings. It should be noted that, for the sake of brevity, in the embodiments of the present application, the same reference signs represent the same parts, and for the sake of brevity, detailed description of the same parts is omitted in different embodiments.

[0054] An inductor is composed of a coil and a magnetic piece. When an alternating current passes through the coil, an alternating magnetic flux is generated inside and around the coil, which has the function of storing and releasing energy. In electronic circuits, inductors have a limited current effect on alternating current. They can form high-pass filters or low-pass filters, phase-shifting circuits and resonance circuits with resistors or capacitors, and are therefore widely used in various instruments and equipment.

[0055] The inductor occupies a large area on the circuit board, for example, in a power module, the inductor occupies more than 40% of the surface area of the power board, which is not conducive to the miniaturization and high density of the product; and most inductors need to be separately mounted, which reduces the packaging efficiency.

[0056] In the design of the circuit board integrated inductor (PCB integrated inductor), the copper loss of the coil (wire) often accounts for a large part of the total loss of the inductor. With the development of high frequency of future power modules, the skin effect of the wire is more and more obvious, and with the increase of the working frequency, the total impedance increases. When the thickness of the wire is greater than twice the skin depth of the wire at its working frequency, the part of the wire close to the center has very small current conduction, so that the part of the wire close to the center is wasted. In addition, for the circuit board integrated inductor, the coil is formed by etching the conductive layer during the circuit board preparation process. The thicker the conductive layer, the longer the etching time and the more lateral etching. Therefore, the thicker the conductive layer, the larger the wire spacing of the formed coil, which means fewer turns of the coil in the same area, which is not conducive to the increase of the inductance value. Therefore, there is an upper limit to the increase of the wire thickness, and the process difficulty of preparing a larger thickness wire will increase.

[0057] The embodiment of the present application provides a circuit board integrated inductor which can be applied to electronic devices such as mobile phones and tablet computers. The electronic device of the present application takes a mobile phone as an example for illustration, which should not be understood as a limitation of the protection scope of the present application.

[0058] Please refer to Figures 1 to 3 The embodiment of the first aspect of the present application provides a circuit board integrated inductor 100, which comprises a circuit board 10 and a magnetic layer 30. The circuit board 10 comprises a substrate 11 and a coil 13, the coil 13 is embedded in the substrate 11, and the coil 13 comprises at least two layers of wire layers 1311 in parallel. The magnetic layer 30 is carried on the circuit board 10 and at least partially overlaps the coil 13.

[0059] Optionally, the circuit board 10 can be a flexible circuit board 10 (FPC), or a printed circuit board 10 (PCB), which is not limited in the present application.

[0060] The number of the coils 13 on the circuit board 10 can be one or multiple, for example, but not limited to, 1, 2, 3, etc. The specific number of the coils 13 can be set according to the actual application requirements, and the present application does not make specific limitations. Multiple refers to two or more than two or equal to two. It can be understood that each coil 13 can be, but not limited to, a part of a coil 13 (for example, a half-turn coil 13, a 0.3-turn coil 13, etc.), a one-turn coil 13, a two-turn coil 13, a three-turn coil 13, a four-turn coil 13, a five-turn coil 13, etc. The more the number of turns of the coil 13, the greater the inductance value under other conditions unchanged, therefore, the number of turns of the coil 13 can be designed according to the application scenario, the required inductance value, etc., and the present application does not make specific limitations.

[0061] The coil 13 is embedded in the substrate 11, which can be that part of the coil 13 is wrapped by the substrate 11 and part of the coil 13 is exposed to the substrate 11; it can also be that the coil 13 is wrapped in the substrate 11.

[0062] The magnetic layer 30 and the coil 13 at least partially overlap, it can be understood that the magnetic layer 30 and the coil 13 are at least partially arranged opposite to each other; it can also be understood that the orthographic projection of the magnetic layer 30 on the substrate 11 and the orthographic projection of the coil 13 on the substrate 11 at least partially overlap. The magnetic layer 30 and the coil 13 at least partially overlap, which can be that the orthographic projection of the magnetic layer 30 on the substrate 11 and the orthographic projection of the coil 13 on the substrate 11 partially overlap; it can also be that the orthographic projection of the magnetic layer 30 on the substrate 11 falls within the range of the orthographic projection of the coil 13 on the substrate 11; it can also be that the orthographic projection of the coil 13 on the substrate 11 falls within the range of the orthographic projection of the magnetic layer 30 on the substrate 11.

[0063] The circuit board integrated inductor 100 of the first aspect embodiment of the present application comprises a circuit board 10 and a magnetic layer 30; the circuit board 10 comprises a substrate 11 and a coil 13, the coil 13 is embedded in the substrate 11, and the coil 13 comprises at least two layers of parallel conductive layers 1311. In this way, under the condition that the total thickness or total cross-sectional area of the conductive wire forming the coil 13 (i.e. the total cross-sectional area of the conductive wire) is the same, the thickness of the single-layer conductive layer 1311 can be thinner, the utilization rate of the cross-sectional area of each layer of conductive layer 1311 can be improved, the alternating current resistance of the entire coil 13 can be reduced, the alternating current copper loss caused by the skin effect of the coil 13 at high frequency can be reduced, and the inductance efficiency of the circuit board integrated inductor 100 can be improved. In addition, the inductor of the circuit board integrated inductor 100 of the present embodiment is integrated on the circuit board 10, and when applied to an electronic device, the electronic device can be made more miniaturized and thinned, and the inductor is prepared together with the circuit board 10, without the need for independent mounting, thereby improving the packaging efficiency. In addition, the inductor is integrated in the circuit board 10, and the position corresponding to the inductor on the circuit board 10 can be saved for mounting other components, thereby saving the area on the circuit board 10 and enhancing the wiring and component arrangement capability of the circuit board 10.

[0064] Optionally, the size of the inductor part on the circuit board integrated inductor 100 can be a rectangular structure with a length ranging from 0.4 mm to 4 mm, a width ranging from 0.4 mm to 4 mm, and a height ranging from 0.1 mm to 1.5 mm. If the size of the inductor part is too large, it is not conducive to the miniaturization of the inductor part, and the application value of the integrated inductor is not high; if the size of the inductor part is too small, the existing process is difficult to realize.

[0065] Optionally, the coil 13 comprises at least one sub-coil 13a. As shown in Figure 3 When the coil 13 comprises at least two sub-coils 13a, the at least two sub-coils 13a are sequentially stacked and spaced apart, and each layer of the sub-coil 13a comprises at least two layers of parallel conductive layers 1311. As can be understood, each layer of the sub-coil 13a is formed by at least two layers of parallel conductive layers 1311, and any two adjacent sub-coils 13a are sequentially electrically connected. Each layer of the sub-coil 13a comprises at least two layers of parallel conductive layers 1311, which can better improve the utilization rate of the cross-sectional area of each layer of the conductive layer 1311, reduce the alternating current resistance of the coil 13, reduce the alternating current copper loss caused by the skin effect of the coil 13 at high frequency, and improve the inductance efficiency of the circuit board integrated inductor 100.

[0066] Optionally, the coil 13 can comprise but is not limited to one sub-coil 13a, two sub-coils 13a, three sub-coils 13a, four sub-coils 13a, five sub-coils 13a, six sub-coils 13a, seven sub-coils 13a, eight sub-coils 13a, etc.

[0067] Optionally, each layer of the sub-coil 13a can include, but is not limited to, two layers of wire layers 1311 in parallel, three layers of wire layers 1311 in parallel, four layers of wire layers 1311 in parallel, five layers of wire layers 1311 in parallel, six layers of wire layers 1311 in parallel, and the like.

[0068] Please refer to Figure 4 and Figure 5 In some embodiments, the coil 13 includes a main body portion 131, a first lead wire 133, and a second lead wire 135. The main body portion 131 includes the at least one layer of sub-coils 13a, when the main body portion 131 includes at least two layers of sub-coils 13a, the at least two layers of sub-coils 13a are arranged in sequence and are electrically connected in sequence; the first lead wire 133 and the second lead wire 135 are respectively electrically connected to two end portions of the main body portion 131, and the first lead wire 133 and the second lead wire 135 are located on the same side of the main body portion 131. In other embodiments of the present application, the first lead wire 133 and the second lead wire 135 can also be located on the opposite sides or adjacent sides of the main body portion 131. Compared with the first lead wire 133 and the second lead wire 135 located on the opposite sides or adjacent sides of the main body portion 131, when the first lead wire 133 and the second lead wire 135 are located on the same side of the main body portion 131, the coil 13 can have a greater length under the condition that the inductor area of the circuit board integrated inductor 100 and the number of layers of the coil 13 are the same, so that the inductance value of the circuit board integrated inductor 100 can be higher.

[0069] Specifically, when the main body portion 131 includes one layer of sub-coils 13a, the two end portions of the main body portion 131 are located on the same layer, and when the main body portion 131 includes at least two layers of sub-coils 13a arranged in sequence, one end portion of the main body portion 131 is located on the uppermost layer of sub-coils 13a, and the other end portion is located on the lowermost layer of sub-coils 13a.

[0070] In some embodiments, the main body 131 comprises at least two layers of sub-coils 13a, which are stacked in sequence and electrically connected in sequence. Each layer of the sub-coils 13a has an opening 1301, and the openings 1301 of the at least two layers of sub-coils 13a are staggered. In the stacking direction of the at least two layers of sub-coils 13a, the at least two layers of sub-coils 13a overlap except for the part of each layer of sub-coils 13a corresponding to the opening 1301. When the main body 131 comprises at least two layers of sub-coils 13a, if the at least two layers of sub-coils 13a are staggered, the magnetic field generated by one layer of sub-coils 13a in the adjacent two layers of sub-coils 13a can be partially offset by the magnetic field generated by the other layer of sub-coils 13a, which can weaken the magnetic field strength of the entire coil 13. When the at least two layers of sub-coils 13a overlap, the weakening effect between the adjacent layers of sub-coils 13a can be minimized, which can maximize the use of the inductance area and maximize the synergistic effect of the adjacent layers of sub-coils 13a.

[0071] It can be understood that the at least two layers of sub-coils 13a of the main body 131 are translated in the stacking direction, but the openings 1301 of each layer of sub-coils 13a are staggered.

[0072] In some embodiments, each layer of the sub-coils 13a comprises a first end 1303 and a second end 1305, which are oppositely arranged and define the opening 1301. The first end 1303 and the second end 1305 of each layer of sub-coils 13a are oppositely arranged, which makes there be no other part of the coil 13 between any two opposite parts of the sub-coil 13a in the same layer of sub-coils 13a. This can better avoid the existence of another part of the coil 13 between the two opposite parts of the sub-coil 13a in the same layer of sub-coils 13a, such as the e-shaped coil 13, which can better avoid the mutual offset between the magnetic fields generated by different parts of the sub-coil 13a when the coil 13 is energized, thereby making the circuit board integrated inductor 100 have a higher inductance value.

[0073] Optionally, the shape of the main body 131 can be a rectangular structure or a similar rectangular structure, such as a ring structure. In other words, the shape of the main body 131 is similar to a square structure. The "similar rectangular structure" means that the overall shape type is rectangular, and the four corners of the rectangle have chamfers, or a part of the rectangle has an opening 1301 structure, etc.

[0074] Please refer to Figure 6In a specific embodiment, the main body 131 comprises a first edge 131a, a second edge 131b, a third edge 131c and a fourth edge 131d, and the opening 1301, the first lead 133 and the second lead 135 are all located on the first edge 131a of the main body 131.

[0075] Optionally, the first lead 133 and the second lead 135 also each comprise at least two layers of conductive lines 1311 in parallel. Optionally, the two layers of conductive lines 1311 of the sub-coil 13a in the same layer as the first lead 133 (i.e., the sub-coil 13a electrically connected to the first lead 133) can be electrically connected through a lead-out via. The two layers of conductive lines 1311 of the sub-coil 13a in the same layer as the second lead 135 (i.e., the sub-coil 13a electrically connected to the second lead 135) can be electrically connected through a lead-out via.

[0076] In some embodiments, along the stacking direction of the at least two layers of conductive lines 1311, the thickness of each layer of the conductive lines 1311 is less than or equal to 2 times the skin depth of the conductive lines 1311 of the circuit board integrated inductor 100 at the working frequency. In other words, along the stacking direction of the circuit board 10 and the magnetic layer 30, the thickness of each layer of the conductive lines 1311 is less than or equal to 2 times the skin depth of the conductive lines 1311 of the circuit board integrated inductor 100 at the working frequency. In this way, the entire cross-sectional area of the conductive lines 1311 can effectively conduct current, improving the utilization of the conductive lines, the current distribution in the conductive lines 1311 is more uniform, the AC resistance of the coil 13 is reduced, the AC copper loss caused by the skin effect of the coil 13 at high frequency is reduced, and the inductance efficiency of the circuit board integrated inductor 100 is improved.

[0077] Optionally, the working frequency of the circuit board integrated inductor 100 of the present application can be 2MHz to 50MHz. Specifically, it can be, but is not limited to, 2MHz, 5MHz, 10MHz, 15MHz, 20MHz, 25MHz, 30MHz, 35MHz, 40MHz, 45MHz, 50MHz, etc. The higher the working frequency of the circuit board integrated inductor 100, the smaller the skin depth of the conductive lines 1311, and the more obvious the reduction of the AC copper loss caused by the skin effect by adopting the scheme of the present application.

[0078] In the embodiments of the present application, when a numerical range a to b is involved, unless otherwise specified, it means that the numerical value can be any numerical value between a and b, and includes the end point value a and includes the end point value b.

[0079] It should be noted that the circuit board integrated inductor 100 of the embodiment of the present application is also applicable to the case where the working frequency is less than 2 MHz. When the working frequency is less than 2 MHz, the skin depth of the wire layer 1311 of the circuit board integrated inductor 100 is larger, and the skin effect of the wire layer 1311 has little effect on the loss. In this case, the method for reducing the loss has limited effect, but it can still reduce the difficulty of depositing the single-layer conductive material (for example, copper), especially the difficulty of depositing the thick wire layer 1311 (for example, copper layer).

[0080] In some embodiments, the thickness d1 of each layer of the wire layer 1311 ranges from 5 μm to 94 μm along the stacking direction of the at least two layers of the wire layer 1311. Further, the thickness d1 of each layer of the wire layer 1311 ranges from 10 μm to 50 μm. Specifically, the thickness d1 of each layer of the wire layer 1311 can be, but is not limited to, 5 μm, 8 μm, 10 μm, 15 μm, 20 μm, 25 μm, 30 μm, 35 μm, 40 μm, 45 μm, 50 μm, 55 μm, 60 μm, 65 μm, 70 μm, 75 μm, 80 μm, 85 μm, 90 μm, 94 μm, etc. If the thickness of the wire layer 1311 is too thin to reach the required thickness of the sub-coil 13a, more layers of the wire layer 1311 are needed, which increases the process steps for manufacturing the sub-coil 13a and thus increases the manufacturing cost of the circuit board integrated inductor 100. If the thickness of the wire layer 1311 is too thick, it can exceed twice the skin depth of the wire layer 1311 at a high working frequency, so that the current is mainly distributed on the surface of the wire layer 1311, and the current distribution in the center of the wire layer 1311 is less, resulting in waste of the cross-sectional area of the wire layer 1311, increase of the total impedance, and increase of the difficulty of depositing the wire material.

[0081] Optionally, the material of the coil 13 can be, but is not limited to, at least one of conductive metals or alloys such as copper and silver. Each layer of the sub-coil 13a can be formed on both sides of the support layer through conventional PCB process steps such as exposure, development, etching, and film stripping. The at least two layers of the wire layer 1311 are connected in parallel through steps such as via and deposition of conductive material. The at least two layers of the sub-coil 13a are connected in series through steps such as via and deposition of conductive material. The via between the adjacent two layers of the sub-coil 13a should not be too large, because a large via can increase the impedance of the coil 13, and a small via is not conducive to the process.

[0082] In some embodiments, when the coil 13 is a copper coil 13, each of the conductive wire layers 1311 is a copper conductive wire layer 1311, and when the operating frequency of the circuit board integrated inductor 100 is 2 MHz to 50 MHz, the skin depth of the conductive wire layer 1311 is 9 μm to 47 μm, and at this time, the thickness of the conductive wire layer 1311 can be 18 μm to 94 μm. For example, when the operating frequency of the circuit board integrated inductor 100 is 2 MHz, the skin depth of the copper conductive wire layer 1311 is 47 μm, and at this time, the thickness of the conductive wire layer 1311 can be less than or equal to 94 μm. For another example, when the operating frequency of the circuit board integrated inductor 100 is 50 MHz, the skin depth of the copper conductive wire layer 1311 is 9 μm, and at this time, the thickness of the conductive wire layer 1311 can be less than or equal to 18 μm.

[0083] Please refer to Figure 7 In some embodiments, the distance w1 between the outer contour of the orthographic projection of the main body portion 131 on the surface of the substrate 11 and the outer contour of the orthographic projection of the magnetic layer 30 (i.e., the outer contour of the inductor portion corresponding to the circuit board integrated inductor) on the surface of the substrate 11 is in the range of 30 μm≤w1≤300 μm. Further, the distance w1 between the outer contour of the orthographic projection of the main body portion 131 on the surface of the substrate 11 and the outer contour of the orthographic projection of the magnetic layer 30 on the surface of the substrate 11 is in the range of 50 μm≤w1≤200 μm. Further, the distance w1 between the outer contour of the orthographic projection of the main body portion 131 on the surface of the substrate 11 and the outer contour of the orthographic projection of the magnetic layer 30 on the surface of the substrate 11 is in the range of 80 μm≤w1≤160 μm. Specifically, the distance w1 between the outer contour of the orthographic projection of the main body portion 131 on the surface of the substrate 11 and the outer contour of the orthographic projection of the magnetic layer 30 on the surface of the substrate 11 can be, but is not limited to, 30 μm, 50 μm, 80 μm, 100 μm, 120 μm, 150 μm, 180 μm, 200 μm, 230 μm, 250 μm, 280 μm, 300 μm, etc.

[0084] The distance w1 between the outer contour of the front projection of the main body part 131 on the surface of the substrate 11 and the outer contour of the front projection of the magnetic layer 30 on the surface of the substrate 11 is too large or too small, which will affect the inductance value of the circuit board integrated inductor 100. When the coil 13 passes through the current, the magnetic lines of force in the coil 13 main body part 131 ring and the magnetic lines of force outside the ring form a closed loop. The area inside the main body part 131 ring is proportional to the magnetic resistance of the coil 13, when the inductance size (the size of the magnetic layer 30) is fixed, the larger the coil 13, the larger the area inside the ring, the larger the magnetic resistance inside the ring, the smaller the area outside the ring and the smaller the magnetic resistance outside the ring; in addition, the size of the main body part 131 ring also affects the length of the magnetic circuit outside the ring, the larger the ring, the effective length side length of the coil 13, which can improve the inductance value of the inductance, but the center of the ring outside the area expands outward, the distance side length from the center of the ring inside to the center of the ring outside, the magnetic circuit outside the ring increases, the magnetic resistance outside the ring increases, therefore, the size of the coil 13 needs to be balanced between the two. When w1 is too small, the inductance value of the circuit board integrated inductor 100 will be reduced, when w1 is too large, the effective length of the coil 13 will be shortened, which will also reduce the inductance value of the circuit board integrated inductor 100. When 80μm≤w1≤160μm, the inductance value of the circuit board integrated inductor 100 can have a higher inductance value when the size of the magnetic layer 30 is fixed.

[0085] In the present embodiment, the surface of the substrate 11 refers to the surface of the substrate 11 for mounting related components such as processors, memories and the like.

[0086] Please refer to Figure 7 and Figure 8In an embodiment, the substrate 11 comprises an insulating layer 111, which is arranged between any two adjacent conductive layers 1311. The thickness d2 of each insulating layer 111 along the stacking direction of the at least two conductive layers 1311 is in the range of 50 μm ≤ d2 ≤ 500 μm. In other words, the distance between any two adjacent conductive layers 1311 of the coil 13 is in the range of 50 μm to 500 μm. Further, the thickness d2 of each insulating layer 111 along the stacking direction of the at least two conductive layers 1311 is in the range of 100 μm ≤ d2 ≤ 250 μm. Specifically, the thickness d2 of each insulating layer 111 can be, but is not limited to, 50 μm, 80 μm, 100 μm, 120 μm, 150 μm, 180 μm, 200 μm, 220 μm, 250 μm, 280 μm, 300 μm, 320 μm, 350 μm, 380 μm, 400 μm, 420 μm, 450 μm, 480 μm, 500 μm, etc. Although the coil 13 is formed by at least two conductive layers 1311 in parallel, the skin effect of each conductive layer 1311 is reduced, but the proximity effect between any two adjacent conductive layers 1311 can still cause a large AC impedance. Therefore, the thickness of the insulating layer 111 cannot be too thin. When the thickness of the insulating layer 111 is too thick, the thickness of the inductance in the circuit board integrated inductance 100 is increased, the space of the circuit board 10 is occupied, and the difficulty of the via hole of the insulating layer 111 (i.e. the difficulty of the opening) is increased.

[0087] It can be understood that any two adjacent conductive layers 1311 are insulated by the insulating layer 111. Alternatively, the two conductive layers 1311 on the opposite sides of the insulating layer 111 are electrically connected by punching a via hole on the insulating layer 111 and depositing a conductive metal (e.g. copper).

[0088] Alternatively, the insulating layer 111 can comprise, but is not limited to, at least one of a polyimide (PI) layer, a polypropylene (PP) layer, etc.

[0089] In some embodiments, the substrate 11 further comprises a support layer 113, which is insulating. The support layer 113 is used to support the coil 13. When the coil 13 comprises at least two sub-coils 13a, the support layer 113 is arranged between any two adjacent sub-coils 13a. Alternatively, the two sub-coils 13a on the opposite sides of the support layer 113 are electrically connected by punching a via hole on the support layer 113 and depositing a conductive metal (e.g. copper).

[0090] Optionally, the thickness of each support layer 113 is 10-60 μm; specifically, it can be, but is not limited to, 10 μm, 15 μm, 20 μm, 25 μm, 30 μm, 35 μm, 40 μm, 45 μm, 50 μm, 55 μm, 60 μm, etc. If the thickness of the support layer 113 is too small, e.g. less than 10 μm, the mechanical performance of the support layer 113 is limited, and it is difficult to effectively support the sub-coil 13a; since the magnetic permeability of the support layer 113 is very low, if the thickness of the support layer 113 is too large, e.g. more than 60 μm, the length of the magnetic circuit is increased, the magnetic resistance is increased, and this is not conducive to the performance of the inductance obtained.

[0091] Optionally, the support layer 113 can include, but is not limited to, at least one of a polyimide (PI) layer, a glass fiber / epoxy resin composite plate (Prepreg), etc.

[0092] Please refer to Figure 9 In some embodiments, the circuit board 10 further includes a processor 15 and a memory 17, both of which are carried on the surface of the substrate 11, and the processor 15 is electrically connected with the memory 17 and the coil 13, respectively. The processor 15 is used to control the size and direction of the current flowing through the coil 13, etc. The memory 17 is used to store the program code required for the operation of the processor 15.

[0093] Optionally, the processor 15 includes one or more general-purpose processors, wherein the general-purpose processor can be any type of device capable of processing electronic instructions, including a central processing unit (CPU), a microprocessor, a microcontroller, a main processor, a controller, and an ASIC, etc. The processor 15 is used to execute various types of digital storage instructions, such as software or firmware programs stored in the memory 17, which can enable the computing device to provide a wide variety of services.

[0094] Optionally, the memory 17 can include a volatile memory (Volatile Memory), such as a random access memory (Random Access Memory, RAM); the memory 17 can also include a non-volatile memory (Non-Volatile Memory, NVM), such as a read-only memory (Read-Only Memory, ROM), a flash memory (Flash Memory, FM), a hard disk (Hard Disk Drive, HDD) or a solid-state disk (Solid-State Drive, SSD). The memory 17 can also include a combination of the above types of memories.

[0095] Please refer to Figure 10In some embodiments, the magnetic layer 30 includes a magnetic film layer 31. The magnetic film layer 31 is disposed on one side of the substrate 11 and at least partially overlaps the coil 13. The "magnetic film" refers to a film layer of a magnetic material that is continuously deposited without interruption.

[0096] Optionally, the magnetic film layer 31 can be a soft magnetic layer. Soft magnetic materials have high permeability, low remanence, low coercivity, low magnetic resistance, low hysteresis loss, and are easy to magnetize.

[0097] Optionally, the magnetic film layer 31 can be, but is not limited to, at least one of a magnetic metal, a magnetic alloy, or the like. Optionally, the magnetic metal includes at least one of iron, cobalt, nickel, or the like. The magnetic alloy can include, but is not limited to, at least one of an iron-based crystalline alloy, an iron-based amorphous alloy, a cobalt-based amorphous alloy, or the like. The iron-based crystalline alloy includes at least one of a FeNi alloy, a FeCo alloy, a FeAl alloy, a FeSiAl alloy, a FeNiMo alloy, a FeC alloy, or the like. The iron-based amorphous alloy includes at least one of a FeSiB alloy, a FeB alloy, a FeNiPB alloy, a FeNiMoB alloy, or the like. The cobalt-based amorphous alloy includes at least one of a CoFeSiB alloy, a CoFeCrSiB alloy, a CoNiFeSiB alloy, or the like.

[0098] Compared to the iron-based crystalline alloy and the iron-based amorphous alloy, the cobalt-based amorphous alloy has higher permeability. Therefore, when the magnetic layer 30 requires higher permeability, the magnetic film layer 31 can use at least one of the cobalt-based amorphous alloy. Compared to the cobalt-based amorphous alloy, the iron-based crystalline alloy and the iron-based amorphous alloy have higher saturation magnetic properties. When the magnetic layer 30 requires higher saturation magnetic properties, the magnetic film layer 31 can use at least one of the iron-based crystalline alloy and the iron-based amorphous alloy, or the like. Compared to the iron-based crystalline alloy, the iron-based amorphous alloy and the cobalt-based amorphous alloy have lower coercivity. When the magnetic layer 30 requires lower coercivity, the magnetic film layer 31 can use the iron-based amorphous alloy and the cobalt-based amorphous alloy. Coercivity refers to the fact that when an external magnetic field is removed to zero after saturation magnetization, the magnetic induction intensity B does not return to zero, and only when a magnetic field of a certain size opposite to the original magnetization field is added, the magnetic induction intensity returns to zero. This magnetic field is called the coercive magnetic field, also known as coercivity.

[0099] Optionally, the thickness of the magnetic film layer 31 ranges from 0.1 μm to 30 μm along the stacking direction of the substrate 11 and the magnetic film layer 31. Specifically, the thickness of the magnetic film layer 31 can be, but is not limited to, 0.1 μm, 0.5 μm, 1 μm, 2 μm, 4 μm, 6 μm, 8 μm, 10 μm, 13 μm, 15 μm, 18 μm, 20 μm, 23 μm, 25 μm, 28 μm, 30 μm, etc. When the thickness of the magnetic film layer 31 is too small, the contribution of the magnetic film layer 31 is limited, affecting the effective permeability of the magnetic layer 30 and the inductance value and saturation current of the inductance; when the thickness of the magnetic film layer 31 is too large, the magnetic film layer 31 will cause large eddy current loss in the magnetic film, and the deposition difficulty will be increased.

[0100] Optionally, the magnetic film layer 31 can be formed by physical vapor deposition (PVD), electro-deposition or other methods. The appearance of the magnetic film layer 31 formed by physical vapor deposition is good, but it is easy to fall off; the magnetic film layer 31 formed by electro-deposition has good anti-peeling performance and is not easy to fall off, but the surface appearance is poor. Therefore, when the thickness of the magnetic film layer 31 is less than 1 μm, physical vapor deposition can be used for preparation; when the thickness of the magnetic film layer 31 is greater than or equal to 1 μm, electro-deposition can be used for preparation.

[0101] Please refer to Figure 11 In some other embodiments, the magnetic film layer 31 includes a first magnetic film sub-layer 311 and a second magnetic film sub-layer 313, and the first magnetic film sub-layer 311 and the second magnetic film sub-layer 313 are respectively arranged on the opposite sides of the coil 13. In other words, the first magnetic film sub-layer 311 and the second magnetic film sub-layer 313 are respectively arranged on the opposite sides of the circuit board 10 and at least partially face the coil 13. Compared with arranging the magnetic film layer 31 on one side of the coil 13, arranging the first magnetic film sub-layer 311 and the second magnetic film sub-layer 313 on the opposite sides of the coil 13 can better reduce the magnetic resistance and improve the inductance value of the circuit board integrated inductance 100.

[0102] Optionally, the first magnetic film sub-layer 311 can be, but is not limited to, at least one of a magnetic metal, a magnetic alloy, etc. The second magnetic film sub-layer 313 can be, but is not limited to, at least one of a magnetic metal, a magnetic alloy, etc. For detailed description of the magnetic metal and the magnetic alloy, please refer to the description of the corresponding part described above, which will not be repeated here.

[0103] Optionally, along the stacking direction of the first magnetic film sub-layer 311, the substrate 11 and the second magnetic film sub-layer 313, the thickness of the first magnetic film sub-layer 311 ranges from 0.1 μm to 30 μm. Specifically, the thickness of the first magnetic film sub-layer 311 can be, but is not limited to, 0.1 μm, 0.5 μm, 1 μm, 2 μm, 4 μm, 6 μm, 8 μm, 10 μm, 13 μm, 15 μm, 18 μm, 20 μm, 23 μm, 25 μm, 28 μm, 30 μm, etc. When the thickness of the first magnetic film sub-layer 311 is too small, the contribution of the first magnetic film sub-layer 311 is limited, affecting the effective permeability of the magnetic layer 30 and the inductance value and saturation current of the inductance. When the thickness of the first magnetic film sub-layer 311 is too large, the first magnetic film sub-layer 311 will cause large eddy current loss in the magnetic film, and the deposition difficulty will be increased.

[0104] Optionally, along the stacking direction of the first magnetic film sub-layer 311, the substrate 11 and the second magnetic film sub-layer 313, the thickness of the second magnetic film sub-layer 313 ranges from 0.1 μm to 30 μm. Specifically, the thickness of the second magnetic film sub-layer 313 can be, but is not limited to, 0.1 μm, 0.5 μm, 1 μm, 2 μm, 4 μm, 6 μm, 8 μm, 10 μm, 13 μm, 15 μm, 18 μm, 20 μm, 23 μm, 25 μm, 28 μm, 30 μm, etc. When the thickness of the second magnetic film sub-layer 313 is too small, the contribution of the second magnetic film sub-layer 313 is limited, affecting the effective permeability of the magnetic layer 30 and the inductance value and saturation current of the inductance. When the thickness of the second magnetic film sub-layer 313 is too large, the second magnetic film sub-layer 313 will cause large eddy current loss in the magnetic film, and the deposition difficulty will be increased.

[0105] Please refer to Figure 12 In other embodiments, the magnetic film layer 31 further comprises a third magnetic film sub-layer 315, which is arranged through the substrate 11 and located at the outer periphery of the coil 13, and the third magnetic film sub-layer 315 is connected with the first magnetic film sub-layer 311 and the second magnetic film sub-layer 313 respectively. The first magnetic film sub-layer 311 and the second magnetic film sub-layer 313 are arranged on the opposite sides of the circuit board 10 respectively, and are insulated by the substrate 11. The substrate 11 is insulating, and the magnetic permeability is generally 1, and the magnetic resistance is large. After the third magnetic film sub-layer 315 is arranged to communicate the first magnetic film sub-layer 311 and the second magnetic film sub-layer 313, a closed magnetic loop can be formed, the magnetic resistance of the magnetic film layer 31 is reduced, and the inductance value (i.e. inductance value) of the circuit board integrated inductance 100 is improved. In addition, the third magnetic film sub-layer 315 is arranged on the side surface of the coil 13, which can reduce the magnetic leakage phenomenon of the circuit board integrated inductance 100 and improve the electromagnetic interference (EMI) performance.

[0106] It can be understood that the third magnetic film sub-layer 315 is deposited in the holes punched in the positions corresponding to the outer periphery of the first magnetic film sub-layer 311 and the second magnetic film sub-layer 313 around the outer periphery of the coil 13 on the substrate 11, so as to connect the first magnetic film sub-layer 311 and the second magnetic film sub-layer 313.

[0107] It can be understood that the third magnetic film sub-layer 315 is deposited in the holes punched in the positions corresponding to the outer periphery of the first magnetic film sub-layer 311 and the second magnetic film sub-layer 313 around the outer periphery of the coil 13 on the substrate 11, so as to connect the first magnetic film sub-layer 311 and the second magnetic film sub-layer 313. Figure 13 Optionally, the third magnetic film sub-layer 315 can further include a plurality of magnetic film parts 3151 arranged at intervals around the outer periphery of the coil 13, each magnetic film part 3151 connecting the first magnetic film sub-layer 311 and the second magnetic film sub-layer 313, and the plurality of magnetic film parts 3151 being insulated by the substrate 11.

[0108] It can be understood that the third magnetic film sub-layer 315 is deposited in the holes punched in the positions corresponding to the outer periphery of the first magnetic film sub-layer 311 and the second magnetic film sub-layer 313 around the outer periphery of the coil 13 on the substrate 11, so as to connect the first magnetic film sub-layer 311 and the second magnetic film sub-layer 313. Figure 14 Optionally, the third magnetic film sub-layer 315 can be a continuous magnetic film part 3151 around the outer periphery of the coil 13; in other words, the third magnetic film sub-layer 315 is continuously arranged around the outer periphery of the coil 13.

[0109] Compared with the plurality of magnetic film parts 3151 arranged at intervals, when the third magnetic film sub-layer 315 is a continuous magnetic film part 3151, the magnetic resistance of the circuit board integrated inductor 100 is smaller, the inductance value is higher, and the leakage magnetic phenomenon can be better reduced. However, the support of the substrate 11 to the inductance part is weakened, and the mechanical properties of the entire circuit board integrated inductor 100 are reduced. When the third magnetic film sub-layer 315 is a plurality of magnetic film parts 3151 arranged at intervals, the coil 13 can be better supported, and the coil 13 can be effectively supported after the plurality of surfaces of the substrate 11 around the coil 13 are broken.

[0110] “Multiple” means greater than or equal to two.

[0111] In some embodiments, the ratio of the length L1 of the third magnetic film sub-layer 315 to the outer periphery length L2 of the magnetic film layer 31 is in the range of 1 / 20≤L1 / L2≤3 / 4. The length of the third magnetic film sub-layer 315 should not be too large or too small. When the length of the third magnetic film sub-layer 315 is too small, the length of the position where the first magnetic film sub-layer 311 and the second magnetic film sub-layer 313 are connected is too small, and the inductance value cannot be improved. When the length of the third magnetic film sub-layer 315 is too large, the length of the position where the substrate 11 corresponding to the outer periphery of the coil 13 is broken is too long, and the inductance cannot be well supported, affecting the mechanical properties of the entire circuit board integrated inductor 100.

[0112] It can be understood that when the third magnetic film sub-layer 315 is a continuous magnetic film part 3151, the length of the third magnetic film sub-layer 315 is the length of the magnetic film part 3151 around the coil 13. When the third magnetic film sub-layer 315 is a plurality of magnetic film parts 3151 arranged at intervals, the length of the third magnetic film sub-layer 315 refers to the sum of the lengths of each magnetic film part 3151 in the direction around the coil 13.

[0113] The length L1 of the third magnetic film sub-layer 315 refers to the length of the third magnetic film sub-layer 315 along the direction of the surrounding coil 13.

[0114] For example, as shown in the embodiment of Figure 14 , the first magnetic film sub-layer 311 overlaps the second magnetic film sub-layer 313, and the length L1 of the third magnetic film sub-layer 315 is the sum of the lengths L0 of the three magnetic film portions 3151 along the outer perimeter of the first magnetic film sub-layer, and the outer perimeter length L2 of the magnetic film layer 31 is the perimeter of the first magnetic film sub-layer 311. Figure 14 Specifically, the ratio of the length L1 of the third magnetic film sub-layer 315 to the outer perimeter length L2 of the magnetic film layer 31 can be, but is not limited to, 1 / 20, 1 / 18, 1 / 16, 1 / 14, 1 / 12, 1 / 10, 1 / 8, 1 / 6, 1 / 4, 1 / 2, 3 / 4, etc.

[0115] In some embodiments, the third magnetic film sub-layer 315 is located on the other perimeter sides of the main body portion 131 except the perimeter sides where the first lead wire 133 and the second lead wire 135 are provided, as shown in the embodiment of

[0116] The magnetic field strength at the positions of the first lead wire 133 and the second lead wire 135 of the coil 13 is larger, and if the third magnetic film sub-layer 315 is arranged too close to the positions of the first lead wire 133 and the second lead wire 135, the positions of the third magnetic film sub-layer 315 close to the first lead wire 133 and the second lead wire 135 are prone to magnetic saturation, which is not conducive to the improvement of the inductance value of the circuit board integrated inductor 100. Figure 12 In a specific embodiment, the main body portion 131 includes a first side 131a, a second side 131b, a third side 131c, and a fourth side 131d (as shown in the embodiment of

[0117] The first lead wire 133 and the second lead wire 135 are both located on the first side 131a of the main body portion 131. The third magnetic film sub-layer 315 is arranged on the perimeter side of at least one or at least two or all of the second side 131b, the third side 131c, and the fourth side 131d. Figure 6

[0118] ​In some embodiments, the shortest distance s1 between the first lead wire 133 and the third magnetic film sub-layer 315 is greater than or equal to 0.5 mm, and the shortest distance s2 between the second lead wire 135 and the third magnetic film sub-layer 315 is greater than or equal to 0.5 mm. The magnetic field strength at the positions of the first lead wire 133 and the second lead wire 135 of the coil 13 is large. If the third magnetic film sub-layer 315 is arranged too close to the positions of the first lead wire 133 and the second lead wire 135, the positions of the third magnetic film sub-layer 315 close to the first lead wire 133 and the second lead wire 135 are prone to magnetic saturation, which is not conducive to the improvement of the inductance value of the circuit board integrated inductor 100. When the shortest distances between the third magnetic film sub-layer 315 and the first lead wire 133 and the second lead wire 135 are both greater than or equal to 0.5 mm, the third magnetic film sub-layer 315 can better avoid the magnetic saturation phenomenon.

[0119] Further, the shortest distance s1 between the first lead wire 133 and the third magnetic film sub-layer 315 ranges from 0.5 mm to 1.5 mm. Specifically, the shortest distance s1 between the first lead wire 133 and the third magnetic film sub-layer 315 can be, but is not limited to, 0.5 mm, 0.6 mm, 0.7 mm, 0.8 mm, 0.9 mm, 1.0 mm, 1.1 mm, 1.2 mm, 1.3 mm, 1.4 mm, 1.5 mm, etc. If the third magnetic film sub-layer 315 is arranged too close to the positions of the first lead wire 133 and the second lead wire 135, the positions of the third magnetic film sub-layer 315 close to the first lead wire 133 and the second lead wire 135 are prone to magnetic saturation, which is not conducive to the improvement of the inductance value of the circuit board integrated inductor 100. If the shortest distances between the third magnetic film sub-layer 315 and the first lead wire 133 and the second lead wire 135 are too far, the length of the third magnetic film sub-layer 315 will decrease, which is limited for the improvement of the inductance value, and even cannot play a role in improving the inductance value.

[0120] Further, the shortest distance s2 between the second lead wire 135 and the third magnetic film sub-layer 315 ranges from 0.5 mm to 1.5 mm. Specifically, the shortest distance s2 between the second lead wire 135 and the third magnetic film sub-layer 315 can be, but is not limited to, 0.5 mm, 0.6 mm, 0.7 mm, 0.8 mm, 0.9 mm, 1.0 mm, 1.1 mm, 1.2 mm, 1.3 mm, 1.4 mm, 1.5 mm, etc. If the third magnetic film sub-layer 315 is arranged too close to the positions of the first lead wire 133 and the second lead wire 135, the positions of the third magnetic film sub-layer 315 close to the first lead wire 133 and the second lead wire 135 are prone to magnetic saturation, which is not conducive to the improvement of the inductance value of the circuit board integrated inductor 100. If the shortest distances between the third magnetic film sub-layer 315 and the first lead wire 133 and the second lead wire 135 are too far, the length of the third magnetic film sub-layer 315 will decrease, which is limited for the improvement of the inductance value, and even cannot play a role in improving the inductance value.

[0121] Optionally, the third magnetic film sub-layer 315 can be, but is not limited to, at least one of a magnetic metal, a magnetic alloy, etc. For detailed description of the magnetic metal and the magnetic alloy, please refer to the description of the corresponding part described above, which will not be repeated here.

[0122] Please refer to Figure 15 In some embodiments, the magnetic layer 30 further comprises a magnetic glue layer 33, which is arranged between the coil 13 and the magnetic film layer 31. Arranging the magnetic glue layer 33 between the coil 13 and the magnetic film layer 31 can not only improve the magnetic permeability and inductance value of the inductor in the circuit board integrated inductor 100, but also insulate the coil 13 and the magnetic film layer 31.

[0123] It should be noted that when the magnetic film layer 31 comprises the first magnetic film sub-layer 311 and the second magnetic film sub-layer 313, the magnetic glue layer 33 is arranged between the coil 13 and the first magnetic film sub-layer 311, and between the coil 13 and the second magnetic film sub-layer 313. When the magnetic film layer 31 further comprises the third magnetic film sub-layer 315, no magnetic glue layer 33 is arranged between the third magnetic film sub-layer 315 and the coil 13.

[0124] In some embodiments, when the coil 13 comprises at least two sub-coils 13a, a hole can be punched in at least one of the insulating layer 111 and the supporting layer 113, so that the magnetic glue penetrates into the coil 13 and between the two adjacent sub-coils 13a.

[0125] Optionally, the magnetic glue layer 33 comprises resin and magnetic particles (not shown in the figure), and the magnetic particles are dispersed in the resin. The magnetic glue layer 33 can be formed by dispersing the magnetic particles in the liquid resin to form a magnetic slurry, and then coating or printing it on the surface of the circuit board 10, and then curing (such as ultraviolet light curing). The magnetic glue layer 33 refers to a film layer in which the magnetic material is discontinuously distributed and disconnected between the magnetic materials.

[0126] Optionally, in the magnetic glue layer 33, the weight fraction of the magnetic particles ranges from 30% to 90%; specifically, it can be, but is not limited to, 30%, 35%, 40%, 45%, 50%, 55%, 60%, 65%, 70%, 75%, 80%, 85%, 90%, etc. When the weight fraction of the magnetic particles in the magnetic glue layer 33 is less than 30%, it is difficult to achieve the effect of improving the magnetic permeability of the inductor in the circuit board integrated inductor 100, and the cost of the circuit board integrated inductor 100 will increase. When the weight fraction of the magnetic particles in the magnetic glue layer 33 is greater than 90%, the magnetic particles in the magnetic slurry are difficult to disperse and have insufficient flowability, making it difficult to fill the gap of the coil 13 on the surface of the circuit board 10 when coating or printing, resulting in too much air gap between the magnetic glue layer 33 and the coil 13, and the magnetic resistance becomes large, thereby reducing the magnetic permeability.

[0127] Optionally, the average particle size D of the magnetic particles ranges from 5 μm to 50 μm; specifically, but not limited to, 5 μm, 10 μm, 15 μm, 20 μm, 25 μm, 30 μm, 35 μm, 40 μm, 45 μm, 50 μm, etc. When the magnetic particles are small, the eddy current is limited in a small range, and as the magnetic particles increase, the area available for current flow becomes larger, thereby increasing the eddy current loss. When the average particle size of the magnetic particles is less than 5 μm, not only does the cost of the magnetic particles increase, but the magnetic permeability of the magnetic adhesive layer 33 also decreases, losing the significance of improving the magnetic permeability through the magnetic adhesive layer 33. When the average particle size of the magnetic particles is greater than 50 μm, the eddy current loss is too large, which is also not conducive to the performance of the circuit board integrated inductor 100.

[0128] Optionally, the magnetic particles are soft magnetic particles. Soft magnetic particles have high magnetic permeability, low remanence, low coercivity, low magnetic resistance, small hysteresis loss, and are easy to magnetize. Optionally, the magnetic particles include at least one of ferrite particles, magnetic metal particles, and magnetic alloy particles. Ferrite particles have better electrical insulation and lower loss, and magnetic metal particles or magnetic alloy particles have higher magnetic permeability and magnetic saturation inductance. Therefore, when the magnetic adhesive layer 33 is required to have better electrical insulation and lower loss, ferrite particles can be selected as the magnetic particles, and when the magnetic adhesive layer 33 is required to have higher magnetic permeability and magnetic saturation inductance, magnetic metal particles or magnetic alloy particles can be selected as the magnetic particles. Optionally, the ferrite particles include at least one of MnZn ferrite, NiZn ferrite, etc. Optionally, the magnetic metal particles include at least one of iron, cobalt, and nickel. Optionally, the magnetic alloy particles include at least one of iron-based crystalline alloy, iron-based amorphous alloy, cobalt-based amorphous alloy, etc. The iron-based crystalline alloy includes at least one of FeNi alloy, FeCo alloy, FeAl alloy, FeSiAl alloy, FeNiMo alloy, FeC alloy, etc. The iron-based amorphous alloy includes at least one of FeSiB alloy, FeB alloy, FeNiPB alloy, FeNiMoB alloy, etc. The cobalt-based amorphous alloy includes at least one of CoFeSiB alloy, CoFeCrSiB alloy, CoNiFeSiB alloy, etc.

[0129] Compared with the iron-based crystalline alloy and the iron-based amorphous alloy, the cobalt-based amorphous alloy has higher magnetic permeability. Therefore, when the magnetic adhesive layer 33 requires higher magnetic permeability, the magnetic particles can be at least one of the cobalt-based amorphous alloy. Compared with the cobalt-based amorphous alloy, the iron-based crystalline alloy and the iron-based amorphous alloy have higher saturation magnetic properties. When the magnetic adhesive layer 33 requires higher saturation magnetic properties, the magnetic particles can be at least one of the iron-based crystalline alloy and the iron-based amorphous alloy. Compared with the iron-based crystalline alloy, the iron-based amorphous alloy and the cobalt-based amorphous alloy have lower coercivity. When the magnetic adhesive layer 33 requires lower coercivity, the magnetic particles can be the iron-based amorphous alloy and the cobalt-based amorphous alloy.

[0130] When the magnetic particles are magnetic alloy particles, the surface of the magnetic alloy particles has a passivation layer, and the passivation layer is the insulating layer 111, that is, the passivation layer is insulating. In some embodiments, a layer of organic resin can be wrapped on the surface of the magnetic alloy particles to make the magnetic alloy particles have insulating properties. In other embodiments, the magnetic alloy particles can be passivated by phosphoric acid to form a non-conductive passivation layer on the surface of the magnetic alloy particles.

[0131] Optionally, the resin includes at least one of epoxy resin, polyurethane, and acrylic ester. In a specific embodiment, when the insulating layer 111 of the circuit board 10 is a glass / epoxy composite board, the resin of the magnetic adhesive layer 33 can be epoxy resin, so that the magnetic adhesive layer 33 has better bonding performance with the circuit board 10 and can be better attached to the circuit board 10.

[0132] Optionally, the magnetic adhesive layer 33 can be formed by the following steps: first dispersing the magnetic particles in the liquid resin to form a magnetic slurry, then forming a magnetic slurry layer on the surface of the circuit board 10 by coating, printing or the like, and then placing it under ultraviolet light such as LED lamp or mercury lamp to make the liquid resin undergo photocuring to form a solid resin, thereby obtaining the magnetic adhesive layer 33. In other embodiments, the magnetic slurry layer can also be cured by thermal curing, which is not limited in the present application.

[0133] Please refer to Figure 16 In some embodiments, the circuit board integrated inductor 100 of the embodiments of the present application further includes a dielectric layer 35 located between the coil 13 and the magnetic film layer 31 for insulating the coil 13 and the magnetic film layer 31. While ensuring the insulation performance, the higher the magnetic permeability of the dielectric layer 35 is, the better. The higher the magnetic permeability of the dielectric layer 35 is, the higher the inductance value of the prepared circuit board integrated inductor 100 has.

[0134] In some embodiments, the dielectric layer 35 is at least one of a glass fiber / epoxy composite board, polyimide, polypropylene, polytetrafluoroethylene, etc. Optionally, during preparation, the dielectric layer 35 can be laminated to at least one of the two surfaces opposite to the substrate 11 and then pressed to adhere the dielectric layer 35 to the substrate 11 and cover at least the coil 13.

[0135] Optionally, the thickness of the dielectric layer 35 ranges from 5 μm to 200 μm along the stacking direction of the substrate 11, the dielectric layer 35 and the magnetic film layer 31 (or along the stacking direction of the first magnetic film sub-layer 311, the dielectric layer 35, the substrate 11, the dielectric layer 35 and the second magnetic film sub-layer 313). Specifically, the thickness can be, but is not limited to, 5 μm, 10 μm, 30 μm, 50 μm, 80 μm, 100 μm, 120 μm, 140 μm, 160 μm, 180 μm, 200 μm, etc. During preparation of the dielectric layer 35, a ready-made film is usually laminated to the surface of the circuit board 10. Currently, the dielectric layer 35 with a thickness less than 5 μm is rare and expensive. When the thickness of the dielectric layer 35 is too large, the magnetic resistance of the dielectric layer 35 is too large, which reduces the inductance value of the prepared circuit board integrated inductor 100.

[0136] The circuit board integrated inductor 100 of the first aspect of the present application is further described below through specific embodiments.

[0137] Embodiment 1

[0138] The circuit board integrated inductor 100 of the present embodiment comprises a circuit board 10 and a magnetic layer 30. The circuit board 10 comprises a substrate 11 and a coil 13. The coil 13 is embedded in the substrate 11. The coil 13 comprises two layers of sub-coils 13a electrically connected. A support layer 113 is arranged between the two layers of adjacent sub-coils 13a. The thickness of the support layer 113 is 12.5 μm. Each layer of the sub-coil 13a comprises two layers of wire layers 1311 in parallel. The two layers of wire layers 1311 are spaced apart by an insulating layer 111. The thickness of each layer of the wire layer 1311 is 35 μm. The thickness of the intermediate insulating layer 111 is 250 μm. The coil 13 is a copper coil 13. The line width of the copper coil 13 is 440 μm. The line spacing is 880 μm. The magnetic layer 30 is a magnetic adhesive layer 33. The magnetic adhesive layer 33 covers the two opposite surfaces of the circuit board 10 facing the coil 13. The length of the magnetic adhesive layer 33 on each surface of the circuit board 10 is 2.5 mm. The width is 1.6 mm. The thickness is 50 μm. The relative permeability of the magnetic adhesive layer 33 is 12.

[0139] Comparative Example 1

[0140] The circuit board integrated inductor 100 of the present comparative example comprises a circuit board 10 and a magnetic layer 30, the circuit board 10 comprises a substrate 11 and a coil 13, the coil 13 is embedded in the substrate 11, the coil 13 comprises two layers of sub-coils 13a connected in parallel, a support layer 113 is arranged between the two layers of sub-coils 13a, the thickness of the support layer 113 is 12.5 μm, each layer of the sub-coil 13a comprises a layer of wire layer 1311, the thickness of each layer of wire layer 1311 is 70 μm, the coil 13 is a copper coil 13, the line width of the copper coil 13 is 440 μm, and the line spacing is 880 μm; the magnetic layer 30 is a magnetic adhesive layer 33, the magnetic adhesive layer 33 covers the opposite two surfaces of the coil 13 of the circuit board 10, the length of the magnetic adhesive layer 33 on each surface of the circuit board 10 is 2.5 mm, the width is 1.6 mm, and the thickness is 50 μm, and the relative permeability of the magnetic adhesive layer 33 is 12.

[0141] According to the standard GB / T 8554-1998, the inductance value and the AC resistance of the circuit board integrated inductor 100 of Example 1 and Comparative Example 1 at a working frequency of 25 MHz were simulated and calculated, and the test results are shown in Table 1.

[0142] Table 1 Simulation test data of the circuit board integrated inductor 100 of Example 1 and Comparative Example 1

[0143] Example Example 1 Comparative Example 1 Operating frequency (MHz) 25 25 Inductance value (nH) 10.2 10.2 AC resistance (mΩ) 11.4 14.4

[0144] From the simulation calculation results in Table 1, it can be seen that when the total thickness of the sub-coil 13a is the same, the inductance value is equal when each layer of sub-coil 13a comprises a single layer of wire layer 1311 and when each layer of sub-coil 13a comprises two layers of wire layers 1311 connected in parallel, but compared to each layer of sub-coil 13a having only one layer of wire layer 1311, the AC resistance is significantly reduced when each layer of sub-coil 13a comprises two layers of wire layers 1311 connected in parallel.

[0145] According to the standard GB / T 8554-1998, the inductance value and the AC resistance of the circuit board integrated inductor 100 of Example 1 and Comparative Example 1 at different working frequencies were simulated and calculated, and the test results are shown in Table 2.

[0146] Table 2 Simulation test data of the circuit board integrated inductor 100 of Example 1 and Comparative Example 1 at different working frequencies

[0147]

[0148]

[0149] As can be seen from the test data in Table 2, the greater the working frequency of the circuit board integrated inductor 100, the more obvious the reduction of the AC resistance when each layer of the sub-coil 13a includes two layers of conductive layers 1311 in parallel compared with each layer of the sub-coil 13a including only one layer of conductive layers 1311.

[0150] Example 2

[0151] The circuit board integrated inductor 100 of the present embodiment includes a circuit board 10 and a magnetic layer 30, the circuit board 10 includes a substrate 11 and a coil 13, the coil 13 is embedded in the substrate 11, the coil 13 includes two layers of sub-coils 13a electrically connected, a support layer 113 is arranged between the two adjacent layers of sub-coils 13a, the thickness of the support layer 113 is 12.5 μm, each layer of the sub-coil 13a includes two layers of conductive layers 1311 in parallel, the two layers of conductive layers 1311 are spaced apart by an insulating layer 111, the thickness of each layer of the conductive layer 1311 is 35 μm, the thickness of the intermediate insulating layer 111 is 100 μm, the coil 13 is a copper coil 13, the line width of the copper coil 13 is 440 μm, and the line spacing is 880 μm; the magnetic layer 30 is a magnetic adhesive layer 33, the magnetic adhesive layer 33 covers the opposite two surfaces of the circuit board 10 facing the coil 13, the length of the magnetic adhesive layer 33 on each surface of the circuit board 10 is 2.5 mm, the width is 1.6 mm, and the thickness is 50 μm, and the relative permeability of the magnetic adhesive layer 33 is 12.

[0152] Example 3

[0153] The circuit board integrated inductor 100 of the present embodiment includes a circuit board 10 and a magnetic layer 30, the circuit board 10 includes a substrate 11 and a coil 13, the coil 13 is embedded in the substrate 11, the coil 13 includes two layers of sub-coils 13a electrically connected, a support layer 113 is arranged between the two adjacent layers of sub-coils 13a, the thickness of the support layer 113 is 12.5 μm, each layer of the sub-coil 13a includes two layers of conductive layers 1311 in parallel, the two layers of conductive layers 1311 are spaced apart by an insulating layer 111, the thickness of each layer of the conductive layer 1311 is 35 μm, the thickness of the intermediate insulating layer 111 is 400 μm, the coil 13 is a copper coil 13, the line width of the copper coil 13 is 440 μm, and the line spacing is 880 μm; the magnetic layer 30 is a magnetic adhesive layer 33, the magnetic adhesive layer 33 covers the opposite two surfaces of the circuit board 10 facing the coil 13, the length of the magnetic adhesive layer 33 on each surface of the circuit board 10 is 2.5 mm, the width is 1.6 mm, and the thickness is 50 μm, and the relative permeability of the magnetic adhesive layer 33 is 12.

[0154] According to the standard GB / T 8554-1998, the inductance value and AC resistance of the circuit board integrated inductor 100 of Examples 1 to 3 at a working frequency of 25 MHz are simulated and calculated, and the test results are shown in Table 3.

[0155] Table 3 Simulation test data of the circuit board integrated inductor 100 of Examples 1 to 3

[0156] Example Example 2 Example 1 Example 3 Operating frequency (MHz) 25 25 25 Thickness of insulating layer (μm) 100 250 400 AC resistance (mΩ) 16.9 11.4 9.5

[0157] As can be seen from the test results of Table 3, at the same frequency, the AC resistance of the circuit board integrated inductor 100 gradually decreases with the increase of the thickness of the insulating layer 111. Therefore, the thickness of the insulating layer 111 cannot be too small, otherwise the AC resistance of the circuit board integrated inductor 100 will still be very large due to the existence of proximity effect.

[0158] When the circuit board and the inductor are integrated, the coil is embedded in the substrate, the magnetic film layer covers the two opposite surfaces of the coil, the magnetic film layers on the two opposite surfaces of the coil are separated by the support layer or the insulating layer of the circuit board, the magnetic permeability of the support layer or the insulating layer is close to 1, and the magnetic film layers on the two opposite surfaces of the coil are connected in series as a large magnetic resistance into the whole magnetic circuit, so that the total magnetic resistance of the magnetic circuit is increased, resulting in a lower inductance.

[0159] Please refer to Figures 17 to 19 The embodiment of the second aspect of the present application provides a circuit board integrated inductor 100, which comprises a circuit board 10 and a magnetic film layer 31, the circuit board 10 comprises a substrate 11 and a coil 13, the coil 13 is embedded in the substrate 11; the magnetic film layer 31 is carried on the substrate 11, the magnetic film layer 31 comprises a first magnetic film sublayer 311, a second magnetic film sublayer 313 and a third magnetic film sublayer 315, the first magnetic film sublayer 311 and the second magnetic film sublayer 313 are respectively arranged on the two opposite sides of the coil 13, the third magnetic film sublayer 315 is arranged through the substrate 11 and located at the outer periphery of the coil 13, and the third magnetic film sublayer 315 is connected with the first magnetic film sublayer 311 and the second magnetic film sublayer 313 respectively.

[0160] It can be understood that the position corresponding to the outer periphery of the first magnetic film sublayer 311 and the second magnetic film sublayer 313 is punched on the substrate 11 around the outer periphery of the coil 13, and the third magnetic film sublayer 315 is deposited in the hole to connect the first magnetic film sublayer 311 and the second magnetic film sublayer 313.

[0161] The circuit board integrated inductor 100 of the second aspect embodiment of the present application comprises a circuit board 10 and a magnetic film layer 31, the circuit board 10 comprises a substrate 11 and a coil 13, the coil 13 is embedded in the substrate 11; the magnetic film layer 31 is carried on the substrate 11, the magnetic film layer 31 comprises a first magnetic film sub-layer 311, a second magnetic film sub-layer 313 and a third magnetic film sub-layer 315, the first magnetic film sub-layer 311 and the second magnetic film sub-layer 313 are respectively arranged on the opposite sides of the coil 13, the third magnetic film sub-layer 315 is arranged through the substrate 11 and located at the outer periphery of the coil 13, and the third magnetic film sub-layer 315 is connected with the first magnetic film sub-layer 311 and the second magnetic film sub-layer 313 respectively. The first magnetic film sub-layer 311 and the second magnetic film sub-layer 313 are respectively arranged on the opposite sides of the circuit board 10, and are insulated by the substrate 11 in the middle, the substrate 11 is insulating, the magnetic permeability is generally 1, and the magnetic resistance is large. After the third magnetic film sub-layer 315 is arranged to communicate the first magnetic film sub-layer 311 and the second magnetic film sub-layer 313, a closed magnetic loop can be formed, the magnetic resistance of the magnetic film layer 31 is reduced, and the inductance value (i.e. the inductance) of the circuit board integrated inductor 100 is improved. In addition, the side of the coil 13 is provided with the third magnetic film sub-layer 315, which can reduce the magnetic leakage phenomenon of the circuit board integrated inductor 100 and improve the electromagnetic interference (EMI) performance.

[0162] Please refer to Figure 20 In some embodiments, the coil 13 comprises a main body part 131, a first lead wire 133 and a second lead wire 135, the first lead wire 133 and the second lead wire 135 are respectively electrically connected with the two end parts of the main body part 131, and the first lead wire 133 and the second lead wire 135 are located on the same side of the main body part 131. In other embodiments of the present application, the first lead wire 133 and the second lead wire 135 can also be located on the opposite sides or adjacent sides of the main body part 131. Compared with the case that the first lead wire 133 and the second lead wire 135 are located on the opposite sides or adjacent sides of the main body part 131, when the first lead wire 133 and the second lead wire 135 are located on the same side of the main body part 131, the coil 13 can have a larger length under the condition of the same area and the same number of layers of the coil 13, so that the inductance value of the circuit board integrated inductor 100 can be higher.

[0163] In some embodiments, the main body part 131 comprises at least one layer of sub-coil 13a, when the main body part 131 comprises at least two layers of sub-coil 13a, the at least two layers of sub-coil 13a are arranged in sequence and are electrically connected in sequence.

[0164] Please refer to Figure 4 and Figure 5Optionally, each of the sub-coils 13a comprises at least two parallel layers of wire layers 1311. In this way, the thickness of each of the wire layers 1311 can be made thinner, the cross-sectional area of each of the wire layers 1311 can be made larger, the AC resistance of the coil 13 can be reduced, the AC copper loss of the coil 13 due to the skin effect at high frequencies can be reduced, and the inductance efficiency of the circuit board integrated inductor 100 can be improved.

[0165] In some embodiments, along the stacking direction of the at least two wire layers 1311, the thickness of each of the wire layers 1311 is less than or equal to 2 times the skin depth of the wire layer 1311 at the operating frequency of the circuit board integrated inductor 100. In other words, along the stacking direction of the circuit board 10 and the magnetic layer 30, the thickness of each of the wire layers 1311 is less than or equal to 2 times the skin depth of the wire layer 1311 at the operating frequency of the circuit board integrated inductor 100. In this way, the entire cross-sectional area of the wire layer 1311 can be effectively used for current conduction, the utilization of the wire layer 1311 can be improved, the current distribution in the wire layer 1311 can be more uniform, the AC resistance of the coil 13 can be reduced, the AC copper loss of the coil 13 due to the skin effect at high frequencies can be reduced, and the inductance efficiency of the circuit board integrated inductor 100 can be improved.

[0166] In some embodiments, along the stacking direction of the at least two wire layers 1311, the thickness d1 of each of the wire layers 1311 is in the range of 5 μm ≤ d1 ≤ 94 μm.

[0167] Referring again to Figure 7 and Figure 8 In some embodiments, the substrate 11 comprises an insulating layer 111 disposed between any two adjacent wire layers 1311, and along the stacking direction of the at least two wire layers 1311, the thickness d2 of each of the insulating layers 111 is in the range of 50 μm ≤ d2 ≤ 500 μm. Although the at least two parallel wire layers 1311 are used to form the coil 13, the skin effect of each of the wire layers 1311 is reduced, but the proximity effect between the two adjacent wire layers 1311 can still cause a large AC impedance. Therefore, the thickness of the insulating layer 111 cannot be too thin. When the thickness of the insulating layer 111 is too thick, the thickness of the inductor in the circuit board integrated inductor 100 can be increased, the space of the circuit board 10 can be occupied, and the difficulty of forming a via hole (i.e., the difficulty of opening a hole) in the insulating layer 111 can be increased.

[0168] In some embodiments, the substrate 11 further comprises a support layer 113, which is insulating, and the support layer 113 is used to support the coil 13, and when the coil 13 comprises at least two layers of sub-coils 13a, the support layer 113 is arranged between any two adjacent layers of sub-coils 13a. Optionally, the two layers of sub-coils 13a on opposite sides of the support layer 113 are electrically connected by punching holes on the support layer 113 and depositing conductive metal (such as copper) on the support layer 113.

[0169] Optionally, the thickness of each support layer 113 is 10-60 μm; specifically, it can be, but is not limited to, 10 μm, 15 μm, 20 μm, 25 μm, 30 μm, 35 μm, 40 μm, 45 μm, 50 μm, 55 μm, 60 μm, etc. If the thickness of the support layer 113 is too small, such as less than 10 μm, the mechanical properties of the support layer 113 are limited, and it is difficult to effectively support the sub-coil 13a; since the magnetic permeability of the support layer 113 is very low, if the thickness of the support layer 113 is too large, such as greater than 60 μm, it will increase the length of the magnetic circuit, and increase the magnetic resistance, which is not conducive to the performance of the inductance obtained.

[0170] Please refer again to Figure 9 In some embodiments, the circuit board 10 further comprises a processor 15 and a memory 17, and the processor 15 and the memory 17 are carried on the surface of the substrate 11, and the processor 15 is electrically connected with the memory 17 and the coil 13, respectively. The processor 15 is used to control the size and direction of the current flowing through the coil 13, etc. The memory 17 is used to store the program code required for the operation of the processor 15.

[0171] Optionally, the processor 15 comprises one or more general-purpose processors, wherein the general-purpose processor can be any type of device capable of processing electronic instructions, including a central processing unit (CPU), a microprocessor, a microcontroller, a main processor, a controller, and an ASIC, etc. The processor 15 is used to execute various types of digital storage instructions, such as software or firmware programs stored in the memory 17, which can enable the computing device to provide a wide variety of services.

[0172] Optionally, the memory 17 can comprise a volatile memory (Volatile Memory), such as a Random Access Memory (RAM); the memory 17 can also comprise a non-volatile memory (Non-Volatile Memory, NVM), such as a Read-Only Memory (ROM), a Flash Memory (FM), a Hard Disk Drive (HDD) or a Solid-State Drive (SSD). The memory 17 can also comprise a combination of memories of the above-mentioned types.

[0173] In some embodiments, the distance w1 between the outer contour of the orthographic projection of the main body portion 131 on the surface of the substrate 11 and the outer contour of the orthographic projection of the magnetic film layer 31 on the surface of the substrate 11 is in the range of 30 μm≤w1≤300 μm. If the distance w1 between the outer contour of the orthographic projection of the main body portion 131 on the surface of the substrate 11 and the outer contour of the orthographic projection of the magnetic layer 30 on the surface of the substrate 11 is too large or too small, the inductance value of the circuit board integrated inductor 100 will be affected. If the distance w1 is too small, the inductance value of the circuit board integrated inductor 100 will be reduced. If the distance w1 is too large, the effective length of the coil 13 will be shortened, and the inductance value of the circuit board integrated inductor 100 will also be reduced.

[0174] It should be noted that each layer of the coil 13 of the circuit board integrated inductor 100 of the second aspect embodiment of the present application can include at least two layers of conductive wire layers 1311 in parallel, or can only include a single layer of conductive wire layer 1311. For other aspects of the substrate 11 and the coil 13, please refer to the description of the corresponding part of the first aspect embodiment described above, which will not be described here.

[0175] Please refer again to Figure 13 Optionally, the third magnetic film sub-layer 315 can further include a plurality of magnetic film portions 3151 arranged at intervals around the outer periphery of the coil 13, each magnetic film portion 3151 being connected to the first magnetic film sub-layer 311 and the second magnetic film sub-layer 313, respectively, and the plurality of magnetic film portions 3151 being insulated by the substrate 11.

[0176] Please refer again to Figure 14 Optionally, the third magnetic film sub-layer 315 can be a continuous magnetic film portion 3151 surrounding the outer periphery of the coil 13.

[0177] Compared to multiple spaced magnetic film portions 3151, when the third magnetic film sublayer 315 is a continuous magnetic film portion 3151, the magnetic reluctance of the integrated inductor 100 on the circuit board is lower and the inductance value is higher, which can better reduce magnetic leakage. However, the support of the substrate 11 for the inductor portion is weakened, reducing the overall mechanical performance of the integrated inductor 100 on the circuit board. When the third magnetic film sublayer 315 is a multiple spaced magnetic film portions 3151, the coil 13 can be better supported, preventing the coil 13 from being unable to be effectively supported after the multiple sides of the substrate 11 surrounding the coil 13 are broken.

[0178] In some embodiments, the ratio of the length L1 of the third magnetic sublayer 315 to the outer perimeter length L2 of the magnetic sublayer 31 is in the range of 1 / 20 ≤ L1 / L2 ≤ 3 / 4. Specifically, the ratio of the length L1 of the third magnetic sublayer 315 to the outer perimeter length L2 of the magnetic sublayer 31 can be, but is not limited to, 1 / 20, 1 / 18, 1 / 16, 1 / 14, 1 / 12, 1 / 10, 1 / 8, 1 / 6, 1 / 4, 1 / 2, 3 / 4, etc. The length of the third magnetic film sublayer 315 should not be too large or too small. When the length of the third magnetic film sublayer 315 is too small, the length of the connection between the first magnetic film sublayer 311 and the second magnetic film sublayer 313 is too small, which cannot play a role in improving the inductance value. When the length of the third magnetic film sublayer 315 is too large, the length of the break on the outer periphery of the corresponding coil 13 on the substrate 11 is too long, which cannot play a good supporting role for the inductor and affects the mechanical performance of the integrated inductor 100 of the entire circuit board.

[0179] Understandably, when the third magnetic film sublayer 315 is a continuous magnetic film portion 3151, the length of the third magnetic film sublayer 315 is the length of the magnetic film portion 3151 surrounding the coil 13. When the third magnetic film sublayer 315 is a plurality of magnetic film portions 3151 arranged at intervals, the length of the third magnetic film sublayer 315 refers to the sum of the lengths of each magnetic film portion 3151 in the direction surrounding the coil 13.

[0180] "The length L1 of the third magnetic sublayer 315" refers to the length of the third magnetic sublayer 315 along the direction surrounding the coil 13.

[0181] For example, such as Figure 14 As shown, in Figure 14 In the embodiment, the first magnetic film sublayer 311 overlaps with the second magnetic film sublayer 313, the length L1 of the third magnetic film sublayer 315 is the sum of the lengths L0 of the three magnetic film portions 3151 along the outer perimeter of the first magnetic film sublayer, and the outer perimeter length L2 of the magnetic film layer 31 is the perimeter of the first magnetic film sublayer 311.

[0182] Specifically, the ratio of the length L1 of the third magnetic film sub-layer 315 to the outer circumferential length L2 of the magnetic film layer 31 can be, but is not limited to, 1 / 20, 1 / 18, 1 / 16, 1 / 14, 1 / 12, 1 / 10, 1 / 8, 1 / 6, 1 / 4, 1 / 2, 3 / 4, etc.

[0183] In some embodiments, the third magnetic film sub-layer 315 is located on the other circumferential side of the main body 131 except the circumferential side provided with the first lead line 133 and the second lead line 135. The magnetic field intensity at the positions of the first lead line 133 and the second lead line 135 of the coil 13 is relatively large. If the third magnetic film sub-layer 315 is arranged too close to the positions of the first lead line 133 and the second lead line 135, the third magnetic film sub-layer 315 close to the positions of the first lead line 133 and the second lead line 135 is prone to magnetic saturation, which is not conducive to the improvement of the inductance value of the circuit board integrated inductor 100.

[0184] In some embodiments, the shortest distance s1 between the first lead line 133 and the third magnetic film sub-layer 315 is greater than or equal to 0.5 mm, and the shortest distance s2 between the second lead line 135 and the third magnetic film sub-layer 315 is greater than or equal to 0.5 mm. The magnetic field intensity at the positions of the first lead line 133 and the second lead line 135 of the coil 13 is relatively large. If the third magnetic film sub-layer 315 is arranged too close to the positions of the first lead line 133 and the second lead line 135, the third magnetic film sub-layer 315 close to the positions of the first lead line 133 and the second lead line 135 is prone to magnetic saturation, which is not conducive to the improvement of the inductance value of the circuit board integrated inductor 100. When the shortest distances between the third magnetic film sub-layer 315 and the first lead line 133 and the second lead line 135 are all greater than or equal to 0.5 mm, the third magnetic film sub-layer 315 can be better prevented from magnetic saturation.

[0185] Further, the shortest distance s1 between the first lead line 133 and the third magnetic film sub-layer 315 ranges from 0.5 mm to 1.5 mm, and further, the shortest distance s2 between the second lead line 135 and the third magnetic film sub-layer 315 ranges from 0.5 mm to 1.5 mm.

[0186] For the materials, thicknesses, and other same parts of the magnetic film layer 31, the first magnetic film sub-layer 311, the second magnetic film sub-layer 313, and the third magnetic film sub-layer 315 as described in the first aspect of the application, please refer to the description of the first aspect of the application, which will not be repeated here.

[0187] Please refer again to Figure 18 In some embodiments, the circuit board integrated inductor 100 of the embodiments of the present application further comprises a magnetic adhesive layer 33 arranged between the coil 13 and the first magnetic film sub-layer 311 and between the coil 13 and the second magnetic film sub-layer 313.

[0188] It can be understood that the third magnetic film sub-layer 315 is not provided with the magnetic adhesive layer 33 between the coil 13. For the detailed description of other same parts of the magnetic adhesive layer 33 as the first aspect embodiment, please refer to the description of the first aspect embodiment of the present application, which will not be repeated here.

[0189] For the detailed description of other same parts of the magnetic adhesive layer 33 as the first aspect embodiment, please refer to the description of the first aspect embodiment of the present application, which will not be repeated here.

[0190] Please refer to Figure 21 In some embodiments, in some embodiments, the circuit board integrated inductor 100 of the embodiment of the present application further comprises a dielectric layer 35, which is located between the coil 13 and the magnetic film layer 31, and is used to insulate the coil 13 and the magnetic film layer 31. While ensuring the insulation performance, the higher the magnetic permeability of the dielectric layer 35 is, the higher the inductance value of the circuit board integrated inductor 100 prepared will have. For the detailed description of other same parts of the dielectric layer 35 as the first aspect embodiment, please refer to the description of the first aspect embodiment of the present application, which will not be repeated here.

[0191] For the detailed description of other same parts of the dielectric layer 35 as the first aspect embodiment, please refer to the description of the first aspect embodiment of the present application, which will not be repeated here.

[0192] The same feature parts of the second aspect of the present application as the first aspect embodiment are described in the first aspect embodiment, which will not be repeated here.

[0193] The circuit board integrated inductor 100 of the second aspect of the present application is further described below through specific embodiments.

[0194] Embodiment 4

[0195] The circuit board integrated inductor 100 of the embodiment comprises a circuit board 10 and a magnetic film layer 31, the circuit board 10 comprises a substrate 11 and a coil 13, the coil 13 is embedded in the substrate 11, the coil 13 comprises two layers of sub-coils 13a connected electrically, and a support layer 113 is arranged between the two layers of sub-coils 13a; the magnetic film layer 31 is carried on the substrate 11, the magnetic film layer 31 comprises a first magnetic film sub-layer 311, a second magnetic film sub-layer 313 and a third magnetic film sub-layer 315, the first magnetic film sub-layer 311 and the second magnetic film sub-layer 313 are arranged on the opposite sides of the coil 13 respectively, the third magnetic film sub-layer 315 is arranged through the substrate 11 and located at the outer periphery of the coil 13, and the third magnetic film sub-layer 315 is connected with the first magnetic film sub-layer 311 and the second magnetic film sub-layer 313 respectively; a dielectric layer 35 is further arranged between the coil 13 and the first magnetic film sub-layer 311 and between the coil 13 and the second magnetic film sub-layer 313; the length, width and height of the inductor part on the circuit board integrated inductor 100 are 2.0 mm, 1.2 mm and 0.25 mm respectively; the thickness of the support layer 113 is 50 μm; the coil 13 is a copper coil 13, the line width, line thickness and line spacing of the coil 13 are 260 μm, 70 μm and 140 μm respectively; the dielectric layer 35 is a glass fiber / epoxy resin composite board, and the thickness of the dielectric layer 35 is 30 μm; the materials of the first magnetic film sub-layer 311, the second magnetic film sub-layer 313 and the third magnetic film sub-layer 315 are FeNi alloy, the relative magnetic permeability is 1000, the electrical conductivity is 40 KS / m, and the thicknesses of the first magnetic film sub-layer 311 and the second magnetic film sub-layer 313 are both 20 μm.

[0196] Comparative Example 2

[0197] The circuit board integrated inductor 100 of this embodiment includes a circuit board 10 and a magnetic film layer 31. The circuit board 10 includes a substrate 11 and a coil 13. The coil 13 is embedded in the substrate 11 and includes two electrically connected sub-coils 13a, with a support layer 113 between the two sub-coils 13a. The magnetic film layer 31 is supported on the substrate 11 and includes a first magnetic film sub-layer 311 and a second magnetic film sub-layer 313. The first magnetic film sub-layer 311 and the second magnetic film sub-layer 313 are respectively disposed on opposite sides of the coil 13. The coil 13 and the first magnetic film sub-layer 311, and the coil 13 and the second magnetic film sub-layer 313 are connected. A dielectric layer 35 is also provided between 3; the inductor portion of the integrated inductor 100 on the circuit board has a length of 2.0 mm, a width of 1.2 mm, and a height of 0.25 mm; the support layer 113 has a thickness of 50 μm; the coil 13 is a copper coil 13 with a line width of 260 μm, a line thickness of 70 μm, and a line spacing of 140 μm; the dielectric layer 35 is a glass fiber / epoxy resin composite board with a thickness of 30 μm; the first magnetic film sublayer 311 and the second magnetic film sublayer 313 are made of FeNi alloy with a relative permeability of 1000 and an electrical conductivity of 40 KS / m, and the thickness of both the first magnetic film sublayer 311 and the second magnetic film sublayer 313 is 20 μm.

[0198] According to standard GB / T 8554-1998, simulation calculations were performed to test the inductance value of the integrated inductor 100 on the circuit board of Example 4 and Comparative Example 2 at an operating frequency of 1MHz. The eddy current field simulation of ANSYS Maxwell was used to calculate the side magnetic induction intensity distribution of the corresponding inductor part of the integrated inductor 100 on the circuit board. The test results are shown in Table 4 below. Figure 22 and Figure 23 As shown.

[0199] Table 4. Simulation test data of the integrated inductor 100 on the circuit board of Example 4 and Comparative Example 2.

[0200] Example Example 4 Comparative Example 2 Third magnetic film sub-layer 315 Yes No Inductance value (nH) 7.1 6.2

[0201] As shown in Table 4, compared to the case where only the first magnetic film sublayer 311 and the second magnetic film sublayer 313 are provided on opposite sides of the coil 13 (Comparative Example 2), the use of a third magnetic film sublayer 315 to connect the first magnetic film sublayer 311 and the second magnetic film sublayer 313 (Example 4) can increase the inductance value of the inductor in the integrated inductor 100 of the circuit board under the same conditions. Compared with Comparative Example 2, the inductance value of Example 4 is increased from 6.2nH to 7.1nH, which is an increase of nearly 15%.

[0202] Depend on Figure 22 This is a magnetic flux density distribution diagram of the side surface of the integrated inductor 100 on the circuit board in Example 4. Figure 23The magnetic induction intensity distribution diagram of the side surface of the circuit board integrated inductor 100 of Comparative Example 2 is shown in FIG. 6. It can be seen from FIG. 6 that the side surface of the circuit board integrated inductor 100 of Comparative Example 2 has a magnetic leakage phenomenon. Figure 22 and Figure 23 It can be seen that the side surface of the circuit board integrated inductor 100 of Example 4 has substantially no magnetic leakage phenomenon, and the side surface of the circuit board integrated inductor 100 of Comparative Example 2 has a magnetic leakage phenomenon.

[0203] The size of the inductive part of the circuit board integrated inductor is limited, and the position, size, shape, etc. of the coil have a great influence on the performance of the inductor. Therefore, the present application provides a scheme for further improving the inductor of limited size under the condition that the size of the inductor is unchanged.

[0204] Please refer to Figures 24 to 26 The third aspect of the present application provides a circuit board integrated inductor 100, which comprises a circuit board 10 and a magnetic layer 30. The circuit board 10 comprises a substrate 11 and a coil 13, the coil 13 is embedded in the substrate 11, and the coil 13 comprises a main body part 131; the magnetic layer 30 is carried on the circuit board 10 and at least partially overlaps with the coil 13; the distance w1 between the outer contour of the orthographic projection of the main body part 131 on the surface of the substrate 11 and the outer contour of the orthographic projection of the magnetic layer 30 on the surface of the substrate 11 is in the range of 30 μm≤w1≤300 μm.

[0205] In the present embodiment, the surface of the substrate 11 refers to the surface of the substrate 11 for mounting related components such as the processor 15 and the memory 17.

[0206] Further, the distance w1 between the outer contour of the orthographic projection of the main body part 131 on the surface of the substrate 11 and the outer contour of the orthographic projection of the magnetic layer 30 on the surface of the substrate 11 is in the range of 50 μm≤w1≤200 μm. Still further, the distance w1 between the outer contour of the orthographic projection of the main body part 131 on the surface of the substrate 11 and the outer contour of the orthographic projection of the magnetic layer 30 on the surface of the substrate 11 is in the range of 80 μm≤w1≤160 μm. Specifically, the distance w1 between the outer contour of the orthographic projection of the main body part 131 on the surface of the substrate 11 and the outer contour of the orthographic projection of the magnetic layer 30 on the surface of the substrate 11 can be, but is not limited to, 30 μm, 50 μm, 80 μm, 100 μm, 120 μm, 150 μm, 180 μm, 200 μm, 230 μm, 250 μm, 280 μm, 300 μm, etc.

[0207] The distance w1 between the outer contour of the projection of the main body 131 on the surface of the substrate 11 and the outer contour of the projection of the magnetic layer 30 on the surface of the substrate 11 is too large or too small, which will affect the inductance value of the circuit board integrated inductor 100. When the coil 13 passes through the current, the magnetic lines of force inside the main body 131 ring of the coil 13 and the magnetic lines of force outside the ring form a closed loop. The area inside the main body 131 ring is proportional to the magnetic resistance of the coil 13. When the inductance size (the size of the magnetic layer 30) is fixed, the larger the coil 13, the larger the area inside the ring, the larger the magnetic resistance inside the ring, the smaller the area outside the ring, and the smaller the magnetic resistance outside the ring. In addition, the size of the main body 131 ring also affects the length of the magnetic circuit outside the ring. The larger the ring, the longer the effective length of the coil 13, which can improve the inductance value of the inductance. However, the farther the center of the ring outside the ring region expands, the longer the distance between the center of the ring inside and the center of the ring outside, and the larger the magnetic circuit outside the ring, the larger the magnetic resistance outside the ring. Therefore, the size of the coil 13 needs to be balanced between the magnetic resistance inside the ring and the magnetic resistance outside the ring. When w1 is too small, the inductance value of the circuit board integrated inductor 100 is reduced. When w1 is too large, the effective length of the coil 13 is shortened, which also reduces the inductance value of the circuit board integrated inductor 100. When 80 μm≤w1≤160 μm, the inductance value of the circuit board integrated inductor 100 can have a higher inductance value when the size of the magnetic layer 30 is fixed.

[0208] The coil 13 of the circuit board integrated inductor 100 of the third aspect embodiment of the present application includes a circuit board 10 and a magnetic layer 30. The circuit board 10 includes a substrate 11 and a coil 13. The coil 13 is embedded in the substrate 11. The coil 13 includes a main body 131. The distance w1 between the outer contour of the projection of the main body 131 on the surface of the substrate 11 and the outer contour of the projection of the magnetic layer 30 on the surface of the substrate 11 is in the range of 30 μm≤w1≤300 μm. The size of the inductor device is usually limited, so that when the inductor device area of the circuit board integrated inductor 100 is the same and the number of layers of the coil 13 is the same, the range of w1 is controlled to be 30 μm≤w1≤300 μm, so that the circuit board integrated inductor 100 can obtain a higher inductance value under the same area of the magnetic layer 30. In addition, the circuit board integrated inductor 100 of the present embodiment integrates the inductance on the circuit board 10, which can make the electronic equipment more miniaturized and thinned when applied to electronic equipment. The inductance is prepared together with the circuit board 10, without the need for independent mounting, which improves the packaging efficiency. Furthermore, the inductance is integrated in the circuit board 10, and the position corresponding to the inductance on the circuit board 10 can be saved for mounting other components, saving the area on the circuit board 10 and enhancing the wiring and component layout capability of the circuit board 10.

[0209] Please see Figure 27In some embodiments, the main body 131 comprises at least one sub-coil 13a, when the main body 131 comprises at least two sub-coils 13a, the at least two sub-coils 13a are stacked in sequence and electrically connected in sequence, each sub-coil 13a has an opening 1301, the openings 1301 of the at least two sub-coils 13a are staggered, and along the stacking direction of the at least two sub-coils 13a, the at least two sub-coils 13a overlap except for the part corresponding to the opening 1301 of each sub-coil 13a. When the main body 131 comprises at least two sub-coils 13a, if the at least two sub-coils 13a are staggered, the magnetic field generated by one of the two adjacent sub-coils 13a may be partially canceled by the magnetic field generated by the other sub-coil 13a, which will weaken the magnetic field strength of the entire coil 13. When the at least two sub-coils 13a overlap, this can weaken the weakening effect between adjacent sub-coil 13a layers as much as possible, so as to maximize the use of the area of the inductor and maximize the synergistic effect of adjacent sub-coils 13a.

[0210] It can be understood that the at least two sub-coils 13a of the main body 131 are translated in the stacking direction, but the openings 1301 of each sub-coil 13a are staggered.

[0211] In some embodiments, each sub-coil 13a comprises a first end 1303 and a second end 1305, the first end 1303 and the second end 1305 are oppositely arranged, and the first end 1303 and the second end 1305 define the opening 1301; the coil 13 further comprises a first lead 133 and a second lead 135, the first lead 133 and the second lead 135 are electrically connected to the two ends of the main body 131 respectively, and the first lead 133 and the second lead 135 are located on the same side of the main body 131. The first end 1303 and the second end 1305 of each sub-coil 13a are oppositely arranged, which makes it possible that there is no other part of the coil 13 between any two opposite parts of the sub-coil 13a in the same layer of the sub-coil 13a. This can better avoid the existence of another part of the coil 13 between the two opposite parts of the sub-coil 13a in the same layer of the sub-coil 13a, for example, the coil 13 in e-shaped structure, so as to better avoid the mutual cancellation of the magnetic fields generated by different parts of the sub-coil 13a after the coil 13 is energized, thereby making the circuit board integrated inductor 100 have a higher inductance value.

[0212] In some embodiments, the gap w2 between the first end 1303 and the second end 1305 of each layer of the sub-coil 13a ranges from 50 μm to 200 μm. Specifically, the gap w2 between the first end 1303 and the second end 1305 of each layer of the sub-coil 13a can be, but is not limited to, 50 μm, 60 μm, 70 μm, 80 μm, 90 μm, 100 μm, 110 μm, 120 μm, 130 μm, 140 μm, 150 μm, 160 μm, 170 μm, 180 μm, 190 μm, 200 μm, or the like. If w2 is too small, the existing etching process is difficult to implement, and if w2 is too large, the effective length of the coil 13 will be reduced, thereby reducing the inductance value of the circuit board integrated inductor 100.

[0213] In some embodiments, the at least two layers of sub-coils 13a include adjacent first and second sub-coils 13a1 and 13a2, and the first end 1303 of the first sub-coil 13a1 is electrically connected to the second end 1305 of the second sub-coil 13a2. Along the arrangement direction of the first end 1303 and the second end 1305 of the first sub-coil 13a1, the overlapping length w3 of the first end 1303 of the first sub-coil 13a1 and the second end 1305 of the second sub-coil 13a2 ranges from 100 μm to 500 μm. Specifically, w3 can be, but is not limited to, 100 μm, 150 μm, 200 μm, 250 μm, 300 μm, 350 μm, 400 μm, 450 μm, 500 μm, or the like. If w3 is too small, the hole diameter of the punched hole in the overlapping area will be small, which is not conducive to the process implementation.

[0214] In some embodiments, each layer of the sub-coil 13a, the first lead 133, and the second lead 135 includes at least two layers of wire layers 1311 connected in parallel. In this way, under the condition that the total thickness or total cross-sectional area (i.e., the total cross-sectional area of the wire) of each layer of the sub-coil 13a is the same, the thickness of each single wire layer 1311 can be thinner, the utilization rate of the cross-sectional area of each wire layer 1311 can be improved, the alternating current resistance of the entire coil 13 can be reduced, the alternating current copper loss of the coil 13 due to the skin effect at high frequency can be reduced, and the inductance efficiency of the circuit board integrated inductor 100 can be improved.

[0215] In some embodiments, the thickness of each of the conductive wire layers 1311 along the stacking direction of the at least two conductive wire layers 1311 is less than or equal to 2 times the skin depth of the conductive wire layers 1311 at the working frequency of the circuit board integrated inductor 100. In other words, the thickness of each of the conductive wire layers 1311 along the stacking direction of the circuit board 10 and the magnetic layer 30 is less than or equal to 2 times the skin depth of the conductive wire layers 1311 at the working frequency of the circuit board integrated inductor 100. This allows the entire cross-sectional area of the conductive wire layers 1311 to effectively conduct current, improves the utilization of the conductive wire, and makes the distribution of current in the conductive wire layers 1311 more uniform, thereby reducing the AC resistance of the coil 13, reducing the AC copper loss due to the skin effect of the coil 13 at high frequencies, and improving the inductance efficiency of the circuit board integrated inductor 100.

[0216] Optionally, the working frequency of the circuit board integrated inductor 100 of the present application can be 2 MHz to 50 MHz. Specifically, it can be, but is not limited to, 2 MHz, 5 MHz, 10 MHz, 15 MHz, 20 MHz, 25 MHz, 30 MHz, 35 MHz, 40 MHz, 45 MHz, 50 MHz, etc. The higher the working frequency of the circuit board integrated inductor 100, the smaller the skin depth of the conductive wire layers 1311, and the more obvious the reduction of the AC copper loss caused by the skin effect by using the scheme of the embodiments of the present application.

[0217] For detailed descriptions of other aspects of the conductive wire layers 1311, please refer to the descriptions of the corresponding parts of the above embodiments, which will not be repeated here.

[0218] Please refer again to Figure 7 and Figure 8In some embodiments, the substrate 11 comprises an insulating layer 111, which is arranged between any two adjacent conductive layers 1311. The thickness d2 of each insulating layer 111 along the stacking direction of the at least two conductive layers 1311 ranges from 50 μm to 500 μm. In other words, the distance between any two adjacent conductive layers 1311 of the coil 13 ranges from 50 μm to 500 μm. Further, the thickness d2 of each insulating layer 111 along the stacking direction of the at least two conductive layers 1311 ranges from 100 μm to 250 μm. Specifically, the thickness d2 of each insulating layer 111 can be, but is not limited to, 50 μm, 80 μm, 100 μm, 120 μm, 150 μm, 180 μm, 200 μm, 220 μm, 250 μm, 280 μm, 300 μm, 320 μm, 350 μm, 380 μm, 400 μm, 420 μm, 450 μm, 480 μm, 500 μm, etc. Although the coil 13 is formed by at least two conductive layers 1311 in parallel, the skin effect of each conductive layer 1311 is reduced, but the proximity effect between any two adjacent conductive layers 1311 can still cause a large AC impedance. Therefore, the thickness of the insulating layer 111 cannot be too thin. When the thickness of the insulating layer 111 is too thick, the thickness of the inductor in the circuit board integrated inductor 100 is increased, the space of the circuit board 10 is occupied, and the difficulty of the via hole of the insulating layer 111 (i.e. the difficulty of the opening) is increased.

[0219] In some embodiments, the substrate 11 further comprises a support layer 113, which is insulating. The support layer 113 is used to support the coil 13. When the coil 13 comprises at least two sub-coils 13a, the support layer 113 is arranged between any two adjacent sub-coils 13a. Optionally, the two sub-coils 13a on the opposite sides of the support layer 113 are electrically connected by punching a via hole on the support layer 113 and depositing a conductive metal (e.g. copper) in the via hole.

[0220] Please refer again to Figure 9 The circuit board 10 of the third aspect embodiment further comprises a processor 15 and a memory 17, which are both carried on the surface of the substrate 11. The processor 15 is electrically connected to the memory 17 and the coil 13, respectively. The processor 15 is used to control the size and direction of the current flowing through the coil 13, etc. The memory 17 is used to store the program code required for the operation of the processor 15.

[0221] Optionally, the processor 15 includes one or more general processors that, can be any type of devices capable of processing electronic instructions including CPUs, microprocessors, microcontrollers, host processors, controllers, ASICs, and so forth. The processor 15 is generally arranged to execute a variety of functions as taught herein including the execution of software or firmware instructions stored in the memory 17.

[0222] Optionally, the memory 17 can include volatile memory (e.g., Random Access Memory (RAM)) and / or non-volatile memory (e.g., Read-Only Memory (ROM), Flash memory, Hard Disk Drive (HDD), or Solid-State Drive (SSD)). The memory 17 can also include a combination of volatile and non-volatile memory.

[0223] Referring again to Figures 12 to 14 In some embodiments, the magnetic layer 30 includes a magnetic film layer 31, the magnetic film layer 31 includes a first magnetic film sub-layer 311, a second magnetic film sub-layer 313, and a third magnetic film sub-layer 315, the first magnetic film sub-layer 311 and the second magnetic film sub-layer 313 are respectively arranged on the opposite sides of the coil 13, the third magnetic film sub-layer 315 is arranged through the substrate 11 and located at the outer periphery of the coil 13, and the third magnetic film sub-layer 315 is connected with the first magnetic film sub-layer 311 and the second magnetic film sub-layer 313 respectively. The first magnetic film sub-layer 311 and the second magnetic film sub-layer 313 are respectively arranged on the opposite sides of the circuit board 10, and are insulated by the substrate 11 in the middle. The substrate 11 is insulating, and the magnetic permeability is generally 1 and the magnetic resistance is large. After the third magnetic film sub-layer 315 is arranged to communicate the first magnetic film sub-layer 311 and the second magnetic film sub-layer 313, a closed magnetic loop can be formed, the magnetic resistance of the magnetic film layer 31 is reduced, and the inductance value (i.e., inductance value) of the circuit board integrated inductor 100 is improved. In addition, the third magnetic film sub-layer 315 is arranged on the side of the coil 13, which can reduce the magnetic leakage phenomenon of the circuit board integrated inductor 100 and improve the performance of electromagnetic interference (EMI). In other embodiments of the present application, the magnetic film layer 31 can include only the first magnetic film sub-layer 311 or the second magnetic film sub-layer 313, or include both the first magnetic film sub-layer 311 and the second magnetic film sub-layer 313. The present application is not limited in this regard.

[0224] Referring again to Figure 14Optionally, the third magnetic film sub-layer 315 can be a continuous magnetic film part 3151 surrounding the outer periphery of the coil 13.

[0225] Compared with the multiple magnetic film parts 3151 being spaced apart, when the third magnetic film sub-layer 315 is a continuous magnetic film part 3151, the magnetic reluctance of the circuit board integrated inductor 100 is smaller, the inductance value is higher, and the leakage magnetic phenomenon can be better reduced. However, the support of the substrate 11 to the inductor part is weakened, and the mechanical performance of the entire circuit board integrated inductor 100 is reduced. When the third magnetic film sub-layer 315 is multiple magnetic film parts 3151 spaced apart, the coil 13 can be better supported, and the coil 13 can be effectively supported after the multiple surfaces of the substrate 11 surrounding the coil 13 are not broken.

[0226] “Multiple” means greater than or equal to two.

[0227] In some embodiments, the ratio of the length L1 of the third magnetic film sub-layer 315 to the outer periphery length L2 of the magnetic film layer 31 is in the range of 1 / 20≤L1 / L2≤3 / 4. Specifically, the ratio of the length L1 of the third magnetic film sub-layer 315 to the outer periphery length L2 of the magnetic film layer 31 can be, but is not limited to, 1 / 20, 1 / 18, 1 / 16, 1 / 14, 1 / 12, 1 / 10, 1 / 8, 1 / 6, 1 / 4, 1 / 2, 3 / 4, etc. The length of the third magnetic film sub-layer 315 should not be too large or too small. When the length of the third magnetic film sub-layer 315 is too small, the length of the position where the first magnetic film sub-layer 311 and the second magnetic film sub-layer 313 are connected is too small, and the inductance value cannot be improved. When the length of the third magnetic film sub-layer 315 is too large, the length of the outer periphery of the substrate 11 corresponding to the coil 13 is too long, and the inductor cannot be well supported, affecting the mechanical performance of the entire circuit board integrated inductor 100.

[0228] Understandably, when the third magnetic film sub-layer 315 is a continuous magnetic film part 3151, the length of the third magnetic film sub-layer 315 is the length of the magnetic film part 3151 surrounding the coil 13. When the third magnetic film sub-layer 315 is multiple magnetic film parts 3151 spaced apart, the length of the third magnetic film sub-layer 315 refers to the sum of the lengths of each magnetic film part 3151 in the direction surrounding the coil 13.

[0229] The “length L1 of the third magnetic film sub-layer 315” refers to the length of the third magnetic film sub-layer 315 in the direction surrounding the coil 13.

[0230] For example, as shown in FIG. 6, the length L1 of the third magnetic film sub-layer 315 is the length of the magnetic film part 3151 surrounding the coil 13. Figure 14 Figure 14 ​In the embodiment, the first magnetic film sub-layer 311 overlaps the second magnetic film sub-layer 313, the length L1 of the third magnetic film sub-layer 315 is the sum of the lengths of the three magnetic film portions 3151 along the length L0 of the outer circumference of the first magnetic film sub-layer, and the outer circumferential length L2 of the magnetic film layer 31 is the circumference of the first magnetic film sub-layer 311.

[0231] In some embodiments, the coil 13 further comprises a first lead wire 133 and a second lead wire 135, the first lead wire 133 and the second lead wire 135 are respectively electrically connected to two end portions of the main body portion 131, the first lead wire 133 and the second lead wire 135 are located on the same side of the main body portion 131; the third magnetic film sub-layer 315 is located on the other side of the main body portion 131 except the side provided with the first lead wire 133 and the second lead wire 135. The magnetic field strength at the positions of the first lead wire 133 and the second lead wire 135 of the coil 13 is large, if the third magnetic film sub-layer 315 is arranged too close to the positions of the first lead wire 133 and the second lead wire 135, the third magnetic film sub-layer 315 is prone to magnetic saturation at the positions close to the first lead wire 133 and the second lead wire 135, which is not conducive to the improvement of the inductance value of the circuit board integrated inductor 100.

[0232] In some embodiments, the shortest distance s1 between the first lead wire 133 and the third magnetic film sub-layer 315 is greater than or equal to 0.5 mm, and the shortest distance s2 between the second lead wire 135 and the third magnetic film sub-layer 315 is greater than or equal to 0.5 mm. The magnetic field strength at the positions of the first lead wire 133 and the second lead wire 135 of the coil 13 is large, if the third magnetic film sub-layer 315 is arranged too close to the positions of the first lead wire 133 and the second lead wire 135, the third magnetic film sub-layer 315 is prone to magnetic saturation at the positions close to the first lead wire 133 and the second lead wire 135, which is not conducive to the improvement of the inductance value of the circuit board integrated inductor 100. When the shortest distances between the third magnetic film sub-layer 315 and the first lead wire 133 and the second lead wire 135 are all greater than or equal to 0.5 mm, this can better avoid the magnetic saturation of the third magnetic film sub-layer 315.

[0233] Please refer again to Figure 18 In some embodiments, the circuit board integrated inductor 100 of the embodiments of the present application further comprises a magnetic adhesive layer 33, which is arranged between the coil 13 and the first magnetic film sub-layer 311, and between the coil 13 and the second magnetic film sub-layer 313.

[0234] It can be understood that the third magnetic film sub-layer 315 is not provided with a magnetic adhesive layer 33 between the coil 13. For the detailed description of the same parts of the magnetic adhesive layer 33 as the above-mentioned first aspect embodiments, please refer to the description of the first aspect embodiments of the present application, which will not be described here.

[0235] For details of other parts of the magnetic adhesive layer 33 that are the same as the first and second embodiments described above, please refer to the description of the first and second embodiments of the present application, which will not be repeated here.

[0236] Please refer again to Figure 21 In some embodiments, the circuit board integrated inductor 100 of the embodiments of the present application further comprises a dielectric layer 35, which is located between the coil 13 and the magnetic film layer 31, and is used to insulate the coil 13 and the magnetic film layer 31. While ensuring the insulation performance, the higher the magnetic permeability of the dielectric layer 35 is, the higher the inductance value of the circuit board integrated inductor 100 prepared will be. For details of other parts of the dielectric layer 35 that are the same as the first embodiment described above, please refer to the description of the first embodiment of the present application, which will not be repeated here.

[0237] For details of other parts of the dielectric layer 35 that are the same as the first and second embodiments described above, please refer to the description of the first and second embodiments of the present application, which will not be repeated here.

[0238] The features of the third aspect of the present application that are the same as the first and second embodiments described above will not be repeated here, please refer to the corresponding part of the description of the first and second embodiments.

[0239] The circuit board integrated inductor 100 of the second aspect of the present application will be further described below through specific embodiments.

[0240] Embodiments 5 to 11, Comparative Example 3 and Comparative Example 4

[0241] The circuit board integrated inductor 100 of each embodiment and comparative example comprises a circuit board 10 and a magnetic layer 30, the circuit board 10 comprises a substrate 11 and a coil 13, the coil 13 is embedded in the substrate 11, the main body part 131 of the coil 13 comprises two layers of sub-coils 13a connected by electricity, a support layer 113 is arranged between the two layers of sub-coils 13a, the support layer 113 is a polyimide layer, the thickness of the support layer 113 is 12.5 μm, both of the two layers of sub-coils 13a are mouth-shaped structures with openings 1301, the coil 13 is a copper coil 13, the line width of the copper coil 13 is 260 μm, and the line thickness is 70 μm; the magnetic layer 30 is a magnetic adhesive layer 33, the magnetic adhesive layer 33 covers the opposite two surfaces of the circuit board 10 facing the coil 13, the length of the magnetic adhesive layer 33 is 2.5 mm, the width is 2.0 mm, the thickness is 0.3 mm, and the relative magnetic permeability of the magnetic adhesive layer 33 is 20. The distance w1 between the outer contour of the orthographic projection of the main body part 131 on the surface of the substrate 11 and the outer contour of the orthographic projection of the magnetic layer 30 on the surface of the substrate 11 is shown in the following Table 5.

[0242] The inductance values of the circuit board integrated inductors 100 of Examples 5 to 11, Comparative Example 3 and Comparative Example 4 at a working frequency of 1 MHz were tested according to simulation calculation according to standard GB / T 8554-1998, and the test results are shown in Table 5 below.

[0243] Table 5 Simulation test data of the circuit board integrated inductors 100 of Examples 5 to 11, Comparative Example 3 and Comparative Example 4

[0244] Example w1 (μm) Inductance value (nH) Comparative Example 3 10 44.5 Example 5 30 50.8 Example 6 50 54.4 Example 7 100 58.3 Example 8 150 58.2 Example 9 200 56.6 Example 10 250 53.7 Example 11 300 50.4 Comparative Example 4 350 46.8

[0245] As can be seen from Table 5, as the distance w1 between the outer contour of the orthographic projection of the main body part 131 on the surface of the substrate 11 and the outer contour of the orthographic projection of the magnetic layer 30 on the surface of the substrate 11 gradually increases, the inductance value of the circuit board integrated inductor 100 gradually increases, when w1 is 100 μm, the inductance value of the circuit board integrated inductor 100 reaches a peak value, and when w1 continues to increase, the inductance value of the circuit board integrated inductor 100 gradually decreases again. Therefore, when the distance w1 between the outer contour of the orthographic projection of the main body part 131 on the surface of the substrate 11 and the outer contour of the orthographic projection of the magnetic layer 30 on the surface of the substrate 11 satisfies 80 μm≤w1≤160 μm, the inductance value of the circuit board integrated inductor 100 can have a higher inductance value under the condition that the size of the magnetic layer 30 is constant.

[0246] Example 12

[0247] The circuit board integrated inductor 100 of the present example comprises a circuit board 10 and a magnetic layer 30, the circuit board 10 comprises a substrate 11 and a coil 13, the coil 13 is embedded in the substrate 11, the main body part 131 of the coil 13 comprises one layer of electrically connected sub-coils 13a, the sub-coil 13a is a mouth-shaped structure with an opening 1301, the coil 13 is a copper coil 13, the line width of the copper coil 13 is 260 μm, and the line thickness is 70 μm; the magnetic layer 30 is a magnetic adhesive layer 33, the magnetic adhesive layer 33 covers the opposite two surfaces of the circuit board 10 facing the coil 13, the length of the magnetic adhesive layer 33 is 2.5 mm, the width is 2.0 mm, and the thickness is 0.3 mm, the relative permeability of the magnetic adhesive layer 33 is 20, and the structure of the coil 13 of the present example is as shown in Figure 28 .

[0248] Comparative Example 5 and Comparative Example 6

[0249] The circuit board integrated inductor 100 of the present comparative example includes a circuit board 10 and a magnetic layer 30. The circuit board 10 includes a substrate 11 and a coil 13. The coil 13 is embedded in the substrate 11. The main body part 131 of the coil 13 includes one layer of sub-coils 13a electrically connected. The sub-coil 13a has an irregular L-shaped structure or an incomplete L-shaped structure with an opening 1301. The coil 13 is a copper coil 13. The line width of the copper coil 13 is 260 μm, and the line thickness is 70 μm. The magnetic layer 30 is a magnetic adhesive layer 33. The magnetic adhesive layer 33 covers the opposite two surfaces of the circuit board 10 facing the coil 13. The length of the magnetic adhesive layer 33 is 2.5 mm, the width is 2.0 mm, and the thickness is 0.3 mm. The relative permeability of the magnetic adhesive layer 33 is 20. The structure of the coil 13 of Comparative Example 5 is shown in Figure 29 , and the structure of the coil 13 of Comparative Example 6 is shown in Figure 30 .

[0250] According to the standard GB / T 8554-1998, the inductance values of the circuit board integrated inductors 100 of Example 12, Comparative Example 5 and Comparative Example 6 at a working frequency of 1 MHz were simulated and calculated. The test results are shown in Table 6.

[0251] Table 6: Simulation test data of the circuit board integrated inductors 100 of Example 12, Comparative Example 5 and Comparative Example 6

[0252] Example Coil 13 structure Inductance value (nH) Example 12 Huangzi type 14.9 Comparative Example 5 Irregular Huangzi type 14.0 Comparative Example 6 Incomplete Huangzi type 12.4

[0253] From the results in Table 6, it can be seen that, under the condition that the size of the inductance part of the circuit board integrated inductor 100 remains unchanged, the regular L-shaped structure has a higher inductance value than the irregular L-shaped structure and the incomplete L-shaped structure.

[0254] Please refer to Figure 31 and Figure 4 , the fourth aspect of the present application also provides an inductor 200, which includes a coil layer 210 and a magnetic layer 30. The coil layer 210 includes a coil 13, and the coil 13 includes at least two layers of wire layers 1311 in parallel. The magnetic layer 30 is arranged on one side of the coil layer 210.

[0255] For detailed description of the coil 13 and the magnetic layer 30, please refer to the corresponding part of the first aspect of the present application. Here, it will not be repeated.

[0256] The coil 13 of the inductor 200 in the fourth aspect of the present application comprises at least two layers of wire layers 1311 in parallel, so that the thickness of each layer of wire layers 1311 can be thinner under the condition that the total thickness or total cross-sectional area of the wire forming the coil 13 (i.e. the total cross-sectional area of the wire) is the same, the utilization rate of the cross-sectional area of each layer of wire layers 1311 can be improved, the alternating current resistance of the entire coil 13 can be reduced, the alternating current copper loss caused by the skin effect of the coil 13 at high frequency can be reduced, and the efficiency of the inductor 200 can be improved.

[0257] In some embodiments, the thickness of each layer of wire layers 1311 along the stacking direction of the at least two layers of wire layers 1311 is less than or equal to 2 times the skin depth of the wire layer 1311 of the inductor 200 at the working frequency. For details, please refer to the corresponding part of the first aspect of the present application, which will not be repeated here.

[0258] In some embodiments, the thickness d1 of each layer of wire layers 1311 along the stacking direction of the at least two layers of wire layers 1311 ranges from 5 μm to 94 μm. For details, please refer to the corresponding part of the first aspect of the present application, which will not be repeated here.

[0259] Optionally, the coil 13 comprises at least one layer of sub-coil 13a. As shown in Figure 3 When the coil 13 comprises at least two layers of sub-coils 13a, the at least two layers of sub-coils 13a are sequentially stacked and spaced apart, and each layer of sub-coils 13a comprises at least two layers of wire layers 1311 in parallel. As can be understood, each layer of sub-coil 13a is formed by at least two layers of wire layers 1311 in parallel, and any two adjacent layers of sub-coils 13a are sequentially electrically connected. Each layer of sub-coil 13a comprises at least two layers of wire layers 1311 in parallel, so that the utilization rate of the cross-sectional area of each layer of wire layers 1311 can be better improved, the alternating current resistance of the coil 13 can be reduced, the alternating current copper loss caused by the skin effect of the coil 13 at high frequency can be reduced, and the efficiency of the inductor 200 can be improved.

[0260] Please refer again to Figure 4 and Figure 5In some embodiments, the coil 13 comprises a main body portion 131, a first lead wire 133 and a second lead wire 135, the main body portion 131 comprises the at least one layer of sub-coils 13a, when the main body portion 131 comprises at least two layers of sub-coils 13a, the at least two layers of sub-coils 13a are sequentially and spacedly arranged and sequentially electrically connected; each layer of the sub-coils 13a comprises the at least two layers of conductive wire layers 1311 in parallel; the first lead wire 133 and the second lead wire 135 are electrically connected with two end portions of the main body portion 131 respectively, the first lead wire 133 and the second lead wire 135 are spacedly located on the same side of the main body portion 131; the third magnetic film sub-layer 315 is located on the other circumferential side of the main body portion 131 except the circumferential side provided with the first lead wire 133 and the second lead wire 135. For details, please refer to the corresponding part of the first aspect to the third aspect of the embodiments of the present application, which will not be repeated here.

[0261] Please refer again to Figure 7 In some embodiments, the distance w1 between the outer contour of the surface of the substrate 11 and the outer contour of the surface of the substrate 11 of the main body portion 131 is in the range of 30 μm≤w1≤300 μm. For details, please refer to the corresponding part of the first aspect to the third aspect of the embodiments of the present application, which will not be repeated here.

[0262] For the detailed description of other aspects of the coil 13, please refer to the description of the corresponding part of the first aspect of the embodiments of the present application, which will not be repeated here.

[0263] In some embodiments, the coil layer 210 further comprises an insulating layer 111, the insulating layer 111 is arranged between any two adjacent layers of conductive wire layers 1311; along the stacking direction of the at least two layers of conductive wire layers 1311, the thickness d2 of each layer of the insulating layer 111 is in the range of 50 μm≤d2≤500 μm. In other words, the spacing d2 between the at least two layers of conductive wire layers 1311 in parallel is in the range of 50 μm≤d2≤500 μm. For details, please refer to the corresponding part of the first aspect of the embodiments of the present application, which will not be repeated here.

[0264] In some embodiments, the coil layer 210 further comprises a support layer 113, the support layer 113 is insulating, and the support layer 113 is used for supporting the coil 13, when the coil 13 comprises at least two layers of sub-coils 13a, the support layer 113 is arranged between any two adjacent layers of sub-coils 13a. Optionally, the two layers of sub-coils 13a on the opposite sides of the support layer 113 are electrically connected by punching holes on the support layer 113 and depositing conductive metal (such as copper).

[0265] Please refer to Figure 32In some embodiments, the magnetic layer 30 includes a magnetic film layer 31, which includes a first magnetic film sublayer 311 and a second magnetic film sublayer 313, respectively disposed on opposite sides of the coil layer 210. For details, please refer to the corresponding portions of the embodiments of the first to third aspects of this application, which will not be repeated here.

[0266] Please see Figure 33 In some embodiments, the magnetic film layer 31 further includes a third magnetic film sub-layer 315, which is disposed on the outer periphery of the coil 13 and connected to the first magnetic film sub-layer 311 and the second magnetic film sub-layer 313, respectively. For details, please refer to the corresponding portions of the embodiments of the first to third aspects of this application, which will not be repeated here.

[0267] For a detailed description of other parts of the magnetic film layer 31 that are the same as those in the first aspect embodiment described above, please refer to the description of the first aspect embodiment of this application, which will not be repeated here.

[0268] In some embodiments, the magnetic layer 30 further includes a magnetic adhesive layer 33, which is disposed between the coil 13 and the magnetic film layer 31. Disposing of the magnetic adhesive layer 33 between the coil 13 and the magnetic film layer 31 can improve the permeability and inductance of the inductor 200, and also insulate the coil 13 from the magnetic film layer 31.

[0269] For a detailed description of other parts of the magnetic adhesive layer 33 that are the same as those in the first aspect embodiment described above, please refer to the description of the first aspect embodiment of this application, which will not be repeated here.

[0270] Please see Figure 34 In some embodiments, the inductor 200 of this application further includes a dielectric layer 35, which is located between the coil 13 and the magnetic film layer 31, and is used to insulate the coil 13 from the magnetic film layer 31. While ensuring insulation performance, the higher the permeability of the dielectric layer 35, the better. The higher the permeability of the dielectric layer 35, the higher the inductance value of the inductor 200.

[0271] For a detailed description of other parts of the dielectric layer 35 that are the same as those in the first aspect embodiment described above, please refer to the description of the first aspect embodiment of this application, which will not be repeated here.

[0272] For the features that are the same in the fourth aspect of this application as in the first aspect embodiment described above, please refer to the description of the corresponding part in the first aspect embodiment, which will not be repeated here.

[0273] Please see Figure 35 and Figure 36The fifth aspect of the present application also provides an electronic device 300, which comprises a display screen 310 and the circuit board integrated inductor 100 of any one of the first aspect to the third aspect of the present application. The processor 15 of the circuit board integrated inductor 100 is electrically connected with the coil 13 and the display screen 310 respectively, and the processor 15 is configured to control the display of the display screen 310 and control the size and direction of the current flowing through the coil 13.

[0274] The electronic device 300 of the present application can be, but is not limited to, a mobile phone, a tablet computer, a notebook computer, a desktop computer, a smart bracelet, a smart watch, an electronic reader, a game console and the like. In the embodiments of the present application, the electronic device 300 is taken as an example of a mobile phone, which should not be understood as a limitation on the protection scope of the present application.

[0275] For detailed description of the circuit board integrated inductor 100, please refer to the description of the corresponding part of the above embodiments, which will not be repeated here.

[0276] Optionally, the display screen 310 can be, but is not limited to, one or more of a liquid crystal display screen, a light-emitting diode display screen (LED display screen), a micro light-emitting diode display screen (Micro LED display screen), a sub-millimeter light-emitting diode display screen (Mini LED display screen), an organic light-emitting diode display screen (OLED display screen) and the like.

[0277] The sixth aspect of the present application also provides an electronic device 300, which comprises a display screen 310, a processor 15 and the inductor 200 of the fourth aspect of the present application. The processor 15 is electrically connected with the display screen 310 and the coil 13 of the inductor 200 respectively, and the processor 15 is configured to control the display of the display screen 310 and control the size and direction of the current flowing through the coil 13.

[0278] For detailed description of the display screen 310, the inductor 200 and the processor 15, please refer to the description of the corresponding part of the above embodiments, which will not be repeated here.

[0279] It can be understood that the electronic device 300 in the present embodiment is only one form of the electronic device 300 to which the circuit board integrated inductor 100 or the inductor 200 is applied, and should not be understood as a limitation on the electronic device 300 provided by the present application, nor should it be understood as a limitation on the circuit board integrated inductor 100 or the inductor 200 provided by the various embodiments of the present application.

[0280] In this application, the phrase "embodiment" or "implementation" means that a particular feature, structure, or characteristic described in connection with the embodiment can be included in at least one embodiment of the application. The appearances of the phrase in various places in the specification are not necessarily all referring to the same embodiment, nor are they necessarily mutually exclusive or alternative embodiments. It is explicitly and implicitly understood that the application described herein can be combined with other applications, even though the description of the application is not inclusive of all possible combinations. Furthermore, it should be understood that the features, structures, or characteristics described in connection with one embodiment can be included in another embodiment without departing from the spirit and scope of the application.

[0281] Finally, it should be noted that the above-mentioned embodiments are merely used to illustrate the technical solutions of the present application, but not to limit the present application. Although the present application has been described in detail with reference to the above preferred embodiments, those skilled in the art should understand that the technical solutions of the present application can be modified or equivalent replaced without departing from the spirit and scope of the present application.

Claims

1. A circuit board integrated inductor, characterized in that, The circuit board comprises a substrate and a coil embedded in the substrate, the coil comprising a main body portion; and a magnetic layer carried on the circuit board and at least partially overlapping the coil; a distance w1 between an outer contour of a projection of the main body portion on a surface of the substrate and an outer contour of a projection of the magnetic layer on the surface of the substrate ranges from 150 μm to 300 μm. The main body portion comprises at least one sub-coil, when the main body portion comprises at least two sub-coils, the at least two sub-coils are sequentially stacked and electrically connected, each sub-coil comprises a first end and a second end, the first end and the second end are oppositely arranged; the first end and the second end define an opening, the openings of the at least two sub-coils are arranged staggered, and the at least two sub-coils overlap except for the opening part of each sub-coil in the stacking direction of the at least two sub-coils.

2. The circuit board integrated inductor of claim 1, wherein, The coil further comprises a first lead and a second lead, the first lead and the second lead are electrically connected to two end portions of the main body portion, the first lead and the second lead are located on the same side of the main body portion.

3. The circuit board integrated inductor of claim 2, wherein, And / or, a gap w2 between the first end and the second end of each sub-coil ranges from 50 μm to 200 μm. Each sub-coil, first lead and second lead comprises at least two layers of conductive wires in parallel.

4. The circuit board integrated inductor of claim 2, wherein, In the stacking direction of the at least two layers of conductive wires, the thickness of each layer of conductive wires is less than or equal to 2 times the skin depth of the conductive wires at the working frequency of the circuit board integrated inductor.

5. The circuit board integrated inductor of claim 4, wherein, The substrate comprises an insulating layer arranged between any two adjacent layers of conductive wires; in the stacking direction of the at least two layers of conductive wires, the thickness d2 of each layer of insulating layer ranges from 50 μm to 500 μm.

6. The circuit board integrated inductor of claim 4, wherein, The magnetic layer comprises a magnetic film layer, the magnetic film layer comprises a first magnetic film sub-layer, a second magnetic film sub-layer and a third magnetic film sub-layer, the first magnetic film sub-layer and the second magnetic film sub-layer are arranged on opposite sides of the coil respectively, the third magnetic film sub-layer is arranged through the substrate and located at the outer periphery of the coil, and the third magnetic film sub-layer is connected with the first magnetic film sub-layer and the second magnetic film sub-layer respectively.

7. The circuit board integrated inductor of claim 1, wherein, The ratio of the length L1 of the third magnetic film sub-layer to the outer periphery length L2 of the magnetic film layer ranges from 1 / 20 to 3 / 4.

8. The circuit board integrated inductor of claim 7, wherein, The coil further comprises a first lead and a second lead, the first lead and the second lead are electrically connected to two end portions of the main body portion, the first lead and the second lead are located on the same side of the main body portion; the third magnetic film sub-layer is located on the other side of the main body portion except the side where the first lead and the second lead are arranged.

9. The circuit board integrated inductor of claim 7, wherein, The display screen; and 10. An electronic device, comprising: The circuit board integrated inductor of any one of claims 1-9, the circuit board integrated inductor comprises a processor electrically connected to the coil and the display screen respectively, the processor is used for controlling the size and direction of the current flowing through the coil. ​ ​ ​

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