Current detection circuit, circuit arrangement and solenoid control device

Abstract

Current detection circuit, circuit device, and solenoid control device. The current detection circuit includes an operational amplifier, a current sense amplifier including a first resistor and a second resistor, and a level shifter. The first resistor is provided between one end of a shunt resistor and a first input node of the operational amplifier. The second resistor is provided between the other end of the shunt resistor and a second input node of the operational amplifier. The level shifter controls the current supplied to the first and second input nodes in accordance with the voltage of the one end of the shunt resistor, thereby controlling the voltages of the first and second input nodes.

Description

Technical Field

[0001] The present invention relates to a current detection circuit, a circuit device, a solenoid control device, and the like. Background Art

[0002] Patent Document 1 discloses a current sense amplifier that detects the current flowing through a shunt resistor by detecting the potential difference across the resistor. The current sense amplifier disclosed in Patent Document 1 has the function of level-shifting the voltage at its input terminal. It has two modes: one in which the voltage at the input terminal is level-shifted by flowing current from the input terminal to the outside of the amplifier, and another in which the voltage at the input terminal is level-shifted by flowing current from the outside of the amplifier to the input terminal.

[0003] Patent Document 1: U.S. Patent Application Publication No. 2013 / 0135047

[0004] The signal input from the shunt resistor to the current sense amplifier includes the potential difference across the shunt resistor and the common-mode voltage. The voltage at the input terminal of the current sense amplifier fluctuates according to this common-mode voltage. The current sense amplifier of Patent Document 1 reduces the range of voltage fluctuation at the input terminal by level-shifting the voltage at the input terminal. However, the current sense amplifier circuit of Patent Document 1 uses a current mirror to perform level shifting using a constant current, so the level shift amount is constant. The common-mode voltage in the shunt resistor may fluctuate due to, for example, fluctuations in the power supply voltage. Therefore, when the level shift amount is constant, there is the issue of the voltage at the input terminal of the current sense amplifier circuit fluctuating due to fluctuations in the common-mode voltage. Summary of the Invention

[0005] One embodiment of the present disclosure relates to a current detection circuit, comprising: a current sense amplifier circuit that detects a current flowing through a shunt resistor among a switching element, a shunt resistor, and an inductor connected in series between a first power supply node and a second power supply node; and a level shift circuit, the current sense amplifier circuit comprising: an operational amplifier; a first resistor disposed between a first resistance node at one end of the shunt resistor and a first input node of the operational amplifier; and a second resistor disposed between a second resistance node at the other end of the shunt resistor and a second input node of the operational amplifier, the level shift circuit supplying a first current to the first input node of the operational amplifier and a second current to the second input node of the operational amplifier, the level shift circuit variably controlling the first and second currents according to a voltage at the first resistance node, thereby level-shifting the voltages at the first and second input nodes of the operational amplifier by a variable level shift amount according to the voltage at the first resistance node.

[0006] Further, another aspect of the present disclosure relates to a circuit device including the current detection circuit described above.

[0007] Further, still another aspect of the present disclosure relates to a solenoid control device including: the current detection circuit described above; the switching element; the shunt resistor; and a solenoid as the inductor, which controls the solenoid based on a current detection result output by the current sense amplifier circuit. BRIEF DESCRIPTION OF DRAWINGS

[0008] Figure 1 is a configuration example of a solenoid control device and a circuit device.

[0009] Figure 2 is a first detailed configuration example of a current detection circuit.

[0010] Figure 3 is a diagram illustrating a switching operation of PWM driving.

[0011] Figure 4 is a signal waveform diagram in a case where a level shift circuit is not provided.

[0012] Figure 5 is a signal waveform diagram in a case where a level shift circuit is provided.

[0013] Figure 6 is a second detailed configuration example of a current detection circuit.

[0014] Figure 7 is a third detailed configuration example of a current detection circuit.

[0015] REFERENCE NUMERALS

[0016] 10: Solenoid control device; 11: Inductor; 12: Shunt resistor; 100: Circuit device; 110: Current detection circuit; 120: Current sense amplifier circuit; 130: Level shift circuit; 131: Current source; 132: Variable current sink; 133: Variable current source; 134: Current sink; 140: A / D converter circuit; 150: Control circuit; 160: Drive circuit; 170: Register; 180: Switch element; ERAM: Error amplifier circuit; ERQ: Current control signal; IC1a, IC1b: First constant current; IC2 a, IC2b: second constant current; ILS: current; IN: second current; IP: first current; IV1a, IV1b: first variable current; IV2a, IV2b: second variable current; MONN, MONP: voltage; NIN: second input node; NIP: first input node; NMONN: second resistor node; NMONP: first resistor node; NVDD: power supply node; OPA: operational amplifier; RIN: second resistor; RIP: first resistor; RLSM: third resistor; VDD: power supply voltage; VREFM: reference voltage. DETAILED DESCRIPTION

[0017] Hereinafter, preferred embodiments of the present disclosure will be described in detail. Note that the embodiments described below do not unduly limit the contents described in the claims, and not all of the structures described in the embodiments are necessarily essential components.

[0018] 1. Solenoid control device, circuit device

[0019] Figure 1 This is a configuration example of a solenoid control device 10 and a circuit device 100 including the current detection circuit of this embodiment. While the current detection circuit of this embodiment is described below as being used for solenoid control, the current detection circuit of this embodiment can be applied to various devices that detect current through switch control.

[0020] The solenoid control device 10 includes a shunt resistor 12 , an inductor 11 , a resistor RA, a capacitor CA, a diode DA, and a circuit device 100 .

[0021] Inductor 11 is the coil of a solenoid. A solenoid consists of a coil and a plunger that moves axially relative to the coil. The plunger is also called a movable iron core. The displacement of the plunger relative to the coil is controlled by the current flowing through the coil.

[0022] Shunt resistor 12, resistor RA, and inductor 11 are connected in series between node NVLS and ground. Specifically, one end of shunt resistor 12 is connected to node NVLS, and the other end is connected to one end of resistor RA. The other end of resistor RA is connected to one end of inductor 11. The other end of inductor 11 is connected to ground.

[0023] Diode DA is disposed between node NVLS and the ground node, with the forward direction being from the ground node toward resistor node NVLS. Specifically, the anode of diode DA is connected to the ground node, and the cathode is connected to node NVLS. Capacitor CA is disposed in parallel with resistor RA and inductor 11. Specifically, one end of capacitor CA is connected to one end of resistor RA, and the other end is connected to the ground node.

[0024] Circuit device 100 detects the current flowing through inductor 11 and controls the current flowing through inductor 11 based on the detection result. Circuit device 100 includes a current detection circuit 110, an A / D converter circuit 140, a control circuit 150, a drive circuit 160, a register 170, a switch element 180, and terminals TVDD, TVLS, TMONP, and TMONN. Circuit device 100 is, for example, an integrated circuit device in which multiple circuit elements are integrated on a semiconductor substrate. Each terminal may be, for example, a pad of the integrated circuit device or a terminal of a package housing the integrated circuit device. Alternatively, switch element 180 may be provided external to circuit device 100.

[0025] Switching element 180 is provided between power supply node NVDD and node NVLS. Specifically, switching element 180 is a P-type transistor. The source of the P-type transistor is connected to terminal TVDD, and the drain is connected to terminal TVLS. Power supply node NVDD is connected to terminal TVDD, and power supply voltage VDD is supplied from outside circuit device 100. Terminal TVLS is connected to node NVLS, which is one end of shunt resistor 12.

[0026] The current detection circuit 110 detects the current flowing through the inductor 11 by detecting the current flowing through the shunt resistor 12. The current detection circuit 110 includes a current sense amplifier circuit 120 and a level shift circuit 130.

[0027] The voltage MONP of one end of the shunt resistor 12 is input to the current sense amplification circuit 120 via the terminal TMONP from the first resistance node NMONP. The voltage MONN of the other end of the shunt resistor 12 is input to the current sense amplification circuit 120 via the terminal TMONN from the second resistance node NMONN. The first resistance node NMONP is a node connected to one end of the shunt resistor 12. The second resistance node NMONN is a node connected to the other end of the shunt resistor 12. The current sense amplification circuit 120 detects the potential difference across the shunt resistor 12 based on the voltage MONP and the voltage MONN, thereby detecting the current flowing in the shunt resistor 12, and outputs a detection voltage VQ as a result thereof. Further, two terminals TVLS and TMONP are connected to one end of the shunt resistor 12. The node connected to the terminal TVLS is set as a node NTVLS, and the node connected to the terminal TMONP is set as the resistance node NMONP. The voltage VLS and the voltage MONP are both voltages of one end of the shunt resistor 12.

[0028] The level shift circuit 130 performs level shifting of the voltage of the input node of the operational amplifier included in the current sense amplification circuit 120 by supplying a current to the input node of the operational amplifier. The level shift circuit 130 variably controls the current supplied to the input node of the operational amplifier based on the voltage VLS of one end of the shunt resistor 12, thereby keeping the voltage of the input node of the operational amplifier constant. Further, details of the current sense amplification circuit 120 and the level shift circuit 130 will be described later.

[0029] The A / D conversion circuit 140 A / D-converts the detection voltage VQ into detection data ADQ. Specifically, the A / D conversion circuit 140 performs A / D conversion at a sampling frequency higher than the switching frequency of the switching element 180, and acquires both the detection data ADQ at the time when the switching element 180 is on and the detection data ADQ at the time when the switching element 180 is off.

[0030] The control circuit 150 outputs a PWM signal SPWM for PWM-controlling the switching element 180 based on the detection data ADQ. Specifically, the register 170 stores a current set value of the current flowing through the inductor 11. The control circuit 150 performs a smoothing process on the detection data ADQ to find a time average value, and controls the on-duty ratio of the switching element 180 so that the average value coincides with the current set value.

[0031] The drive circuit 160 outputs a PWM drive signal DPWM by buffering the PWM signal SPWM. The PWM drive signal DPWM is input to the gate of the P-type transistor as the switching element 180. The current flowing through the inductor 11 is controlled by the on-duty ratio of the switching element 180.

[0032] 2. First Detailed Configuration Example of Current Detection Circuit

[0033] Figure 2 This is a first detailed configuration example of the current detection circuit 110. Figure 2 , an example is shown in which the circuit device 100 includes a terminal TVREFM and the reference voltage VREFM is input to the terminal TVREFM from outside the circuit device 100 . However, the present invention is not limited thereto, and a voltage generating circuit provided in the circuit device 100 may generate the reference voltage VREFM.

[0034] The current sensing amplifier circuit 120 includes a first resistor RIP, a second resistor RIN, resistors RFP and RFN, and an operational amplifier OPA.

[0035] One end of the first resistor RIP is connected to the terminal TMONP, and the other end is connected to the first input node NIP. One end of the resistor RFP is connected to the first input node NIP, and the other end is input with an analog ground voltage VRA. The analog ground voltage VRA is input to the other end of the resistor RFP from a voltage generating circuit (not shown). One end of the second resistor RIN is connected to the terminal TMONN, and the other end is connected to the second input node NIN. One end of the resistor RFN is connected to the second input node NIN, and the other end is connected to the output node NQ of the operational amplifier OPA. The first input node NIP is the non-inverting input node of the operational amplifier OPA, and the second input node NIN is the inverting input node of the operational amplifier OPA. The first resistor RIP and the second resistor RIN have the same resistance value, and the resistor RFP and the resistor RFN have the same resistance value. The gain of the current sense amplifier circuit 120 is, for example, several times to several dozen times, but is not limited to this.

[0036] Let ILS be the current flowing through the shunt resistor 12 and Rsh be the resistance value of the shunt resistor 12. At this time, the potential difference Vsh across the shunt resistor 12 is expressed by the following equation (1), and the detection voltage VQ of the current sense amplifier circuit 120 is expressed by the following equation (2).

[0037] Vsh=MONP-MONN=Rsh×ILS···(1)

[0038] VQ=(RFP / RIP)×Vsh···(2)

[0039] The level shift circuit 130 allows the first current IP to flow through the first resistor RIP and allows the second current IN to flow through the second resistor. Figure 2When the arrows of IP and IN are in the forward direction of current, the level shifts ΔVIP and ΔVIN of voltage VIP and VIN are expressed as follows: VIP' and VIN' are the voltages of the input nodes of the operational amplifier OPA when no currents IP and IN flow.

[0040] ΔVIP=VIP-VIP'=RIP×IP, ΔVIN=VIN-VIN'=RIN×IN···(3)

[0041] Due to the virtual short circuit, VIP′=VIN′, VIP=VIN, and therefore ΔVIP=ΔVIN. Since RIP=RIN, the level shift circuit 130 outputs a current IP=IN.

[0042] The level shift circuit 130 outputs variable currents IP and IN according to the voltage VLS=MONP as shown in the following equation (4).

[0043] IP=IN=(VREFM-VLS) / RIP···(4)

[0044] According to the above equations (3) and (4), the level shift amounts ΔVIP and ΔVIN are expressed by the following equation (5), and the voltages VIP and VIN at the input nodes of the operational amplifier OPA are expressed by the following equation (6).

[0045] ΔVIP=ΔVIN=VREFM-VLS···(5)

[0046] VIP=VIN=VIP'+ΔVIP=VIP'-VLS+VREFM···(6)

[0047] When the gain of the current sensing amplifier circuit 120 is high enough, the voltage VIP′ is substantially the same as the voltage VLS. Therefore, the voltages VIP and VIN at the input nodes of the operational amplifier OPA are substantially the same as the reference voltage VREFM.

[0048] Hereinafter, a case where the level shift circuit 130 of the present embodiment is not provided will be compared with a case where the level shift circuit 130 of the present embodiment is provided. First, the case where the level shift circuit 130 is not provided will be described.

[0049] Figure 3 This is a diagram illustrating the switching action of PWM drive. Figure 4 1 is a signal waveform diagram when the level shift circuit 130 is not provided.

[0050] like Figure 3 As shown in the upper section, when the switch element 180 is turned on, the current ILS flows from the power supply node NVDD to the ground node via the switch element 180, the shunt resistor 12, and the inductor 11. Figure 4 As shown, the current ILS flowing through the inductor 11 gradually increases. At this time, the voltage at one end of the shunt resistor 12 is VLS=VDD. The current detection at this time is called high-side detection.

[0051] like Figure 3 As shown in the lower section, when the switch element 180 is turned off, the current ILS flows from the ground node to the ground node via the diode DA, the shunt resistor 12 and the inductor 11. Figure 4 As shown, the current ILS flowing through the inductor 11 gradually decreases. At this time, the voltage at one end of the shunt resistor 12 is VLS = -Vf. This current detection is called low-side detection. In addition, Vf is the forward voltage of the diode DA.

[0052] like Figure 4 As shown, without level shift circuit 130, during high-side detection, voltage VIP' at the first input node NIP of the operational amplifier OPA is near the power supply voltage VDD. During low-side detection, voltage VIP' is a negative voltage near ground. This voltage VIP' is the voltage between voltage MONP = VLS at one end of shunt resistor 12 and analog ground voltage VRA, divided by first resistor RIP and resistor RFP. Voltage VIN' at the second input node NIN of the operational amplifier OPA is the same voltage as voltage VIP' due to a virtual short circuit.

[0053] As described above, without level shift circuit 130, a voltage near the power supply voltage VDD and a negative voltage near ground are input to the operational amplifier's input terminals. Consequently, two current sense amplifiers, one for high-side detection and one for low-side detection, are required. Alternatively, if only one current sense amplifier is used, an operational amplifier with a very wide input voltage range is required. Furthermore, when the power supply voltage VDD is high, the operational amplifier must be constructed using circuit components manufactured using a high-voltage withstand process, increasing the layout area of ​​the operational amplifier. Furthermore, when a negative voltage is input to the operational amplifier, there is a risk of causing parasitic diodes within the operational amplifier to conduct. To prevent this, a negative power supply is required.

[0054] Figure 5 1 is a signal waveform diagram when the level shift circuit 130 of this embodiment is provided. Figure 3 as well as Figure 4 same.

[0055] When the level shift circuit 130 outputs current to the first resistor RIP and the second resistor RIN, the current is called a source current. When the level shift circuit 130 draws current from the first resistor RIP and the second resistor RIN, the current is called a sink current.

[0056] like Figure 5 As shown, in high-side detection, VLS=VDD>VREFM, so IP=IN=-IK flows as a sink current in the level shift circuit 130. Based on the above equation (4), the sink current is expressed by the following equation (7).

[0057] IK=(VDD-VREFM) / RIP···(7)

[0058] Furthermore, from the above equation (5), the level shift amount is expressed by the following equation (8): Since ΔVIP<0, the voltages VIP and VIN at the input nodes of the operational amplifier OPA are lowered in level during high-side detection.

[0059] ΔVIP=ΔVIN=VREFM-VDD···(8)

[0060] In low-side detection, VLS=-Vf<VREFM, so IP=IN=IS flows as a source current in the level shift circuit 130. Based on the above equation (4), the sink current and the source current are expressed as the following equation (9).

[0061] IS=(VREFM+Vf) / RIP···(9)

[0062] Furthermore, from the above equation (5), the level shift amount is expressed by the following equation (10): Since ΔVIP>0, the voltages VIP and VIN at the input nodes of the operational amplifier OPA are raised in level during low-side detection.

[0063] ΔVIP=ΔVIN=VREFM+Vf···(10)

[0064] By the fill current of the above formula (7) and the pull current of the above formula (9), the voltage VIP, VIN of the input node of the operational amplifier OPA is substantially the same as the reference voltage VREFM in either one of the high-side detection and the low-side detection. That is, in the high-side detection, the voltage VIP, VIN of the input node is lowered in level from the power supply voltage VDD to substantially the reference voltage VREFM, and in the low-side detection, the voltage VIP, VIN of the input node is raised in level from the negative voltage -Vf to substantially the reference voltage VREFM. Thus, the high-side detection and the low-side detection can be performed by one current sense amplifier circuit, and the input voltage range of the operational amplifier of the current sense amplifier circuit can be a narrow range around the reference voltage VREFM. Further, by setting the reference voltage VREFM to a voltage lower than the withstand voltage of the low withstand voltage process, the operational amplifier can be constituted by the circuit elements of the low withstand voltage process.

[0065] Further, the fill current IK of the above formula (7) is variably controlled in accordance with the power supply voltage VDD, and thus, even in the case where the power supply voltage VDD is varied, the voltage VIP, VIN of the input node of the operational amplifier OPA is controlled to be substantially the same as the reference voltage VREFM. Thus, various power supplies different in power supply voltage can be used, and the voltage VIP, VIN of the input node of the operational amplifier OPA is kept constant with respect to the various power supply voltages. Further, in the case where a battery is used as the power supply, the power supply voltage decreases as the battery level decreases, but the voltage VIP, VIN of the input node of the operational amplifier OPA is kept constant even if the power supply voltage decreases.

[0066] In the above embodiment, the switching element 180, the shunt resistor 12, and the inductor 11 are connected in series between the first power supply node and the second power supply node. The current detection circuit 110 includes a current sense amplifier circuit 120 for detecting the current ILS flowing through the shunt resistor 12, and a level shift circuit 130. The current sense amplifier circuit 120 includes an operational amplifier OPA, a first resistor RIP, and a second resistor RIN. The first resistor RIP is provided between a first resistance node NMONP at one end of the shunt resistor 12 and a first input node NIP of the operational amplifier OPA. The second resistor RIN is provided between a second resistance node NMONN at the other end of the shunt resistor 12 and a second input node NIN of the operational amplifier OPA. The level shift circuit 130 supplies the first current IP to the first input node NIP of the operational amplifier OPA and supplies the second current IN to the second input node NIN of the operational amplifier OPA. The level shift circuit 130 variably controls the first current IP and the second current IN according to the voltage VLS at the first resistance node NMONP, thereby level-shifting the voltages VIP and VIN at the first input node NIP and the second input node NIN of the operational amplifier OPA by a variable level shift amount ΔVIP according to the voltage VLS at the first resistance node NMONP.

[0067] According to this embodiment, the level shift amount ΔVIP of the first input node NIP and the second input node NIN of the operational amplifier OPA can be variably controlled based on the voltage VLS at the first resistance node NMONP. Since the voltage VLS at the first resistance node NMONP is linked to the common-mode voltage, the level shift amount ΔVIP can be variably controlled based on the common-mode voltage. Consequently, even if the common-mode voltage fluctuates due to fluctuations in the power supply voltage VDD, for example, fluctuations in the input voltages VIP and VIN of the operational amplifier OPA can be reduced compared to a case where the level shift amount is constant.

[0068] Furthermore, in this embodiment, when the switch element 180 is turned on, the level shift circuit 130 causes a first current IP=-IK to flow from the first resistance node NMONP via the first resistor RIP to the first input node NIP of the operational amplifier OPA, and causes a second current IN=-IK to flow from the second resistance node NMONN via the second resistor RIN to the second input node NIN of the operational amplifier OPA. When the switch element 180 is turned off, the level shift circuit 130 causes a first current IP=IS to flow from the first input node NIP of the operational amplifier via the first resistor RIP to the first resistance node NMONP, and causes a second current IN=IS to flow from the second input node NIN of the operational amplifier OPA via the second resistor RIN to the second resistance node NMONN.

[0069] When the switch element 180 is turned on, the voltage MONP at the first resistance node NMONP becomes the power supply voltage VDD. During high-side detection, current flows from the shunt resistor 12 side through the first resistor RIP and the second resistor RIN to the operational amplifier OPA side, thereby reducing the level of the first input node NIP and the second input node NIN of the operational amplifier OPA. When the switch element 180 is turned off, the voltage MONP at the first resistance node NMONP is -Vf. Vf is the forward voltage of the diode. During low-side detection, current flows from the operational amplifier OPA side through the first resistor RIP and the second resistor RIN to the shunt resistor 12 side, thereby increasing the level of the first input node NIP and the second input node NIN of the operational amplifier OPA. By reducing and increasing the level in the above manner, the difference between the input voltages VIP and VIN of the operational amplifier OPA during high-side detection and the input voltages VIP and VIN of the operational amplifier OPA during low-side detection can be reduced.

[0070] In the present embodiment, the level shift amount is the difference between the reference voltage VREFM and the voltage VLS at the first resistance node NMONP.

[0071] According to this embodiment, the input voltages VIP and VIN of the operational amplifier OPA are level-shifted by a variable level-shift amount corresponding to the voltage VLS. Furthermore, according to this embodiment, the input voltages VIP and VIN of the operational amplifier OPA can be level-shifted to approximately the reference voltage VREFM. Consequently, even when the common-mode voltage fluctuates due to fluctuations in the power supply voltage VDD, for example, the input voltages VIP and VIN of the operational amplifier OPA can be maintained approximately at the reference voltage VREFM.

[0072] 3. Second and Third Detailed Configuration Examples of Current Detection Circuit

[0073] Figure 6 This is a second detailed configuration example of the current detection circuit 110. The current detection circuit 110 includes a current sense amplifier circuit 120, a current source 131, and a variable current sink 132. The current source 131 and the variable current sink 132 correspond to the level shift circuit 130. The configuration of the current sense amplifier circuit 120 is similar to that of the Figure 2 The same, so the description is omitted.

[0074] The current source 131 includes PNP bipolar transistors BPA1 - BPA4 and a current source IBA.

[0075] The emitters of bipolar transistors BPA1-BPA4 are connected to a node for power supply voltage VDA. Power supply voltage VDA is supplied, for example, from a power supply circuit within circuit device 100. The collector of bipolar transistor BPA1 is connected to the first input node NIP of operational amplifier OPA, the collector of bipolar transistor BPA2 is connected to the second input node NIN of operational amplifier OPA, and the collector of bipolar transistor BPA3 is connected to node NLSM. The bases of bipolar transistors BPA1-BPA3 are connected to the base and collector of bipolar transistor BPA4. The current flowing through current source IBA becomes the collector current of bipolar transistor BPA4. Bipolar transistors BPA1-BPA3 mirror this collector current, outputting constant currents IC1a-IC3a from these collectors. Constant currents IC1a-IC3a are source currents, with IC1a = IC2a ​​= IC3a.

[0076] The variable current sink 132 includes a third resistor RLSM, an error amplifier circuit ERAM, NPN bipolar transistors BPB1 - BPB3 , and a capacitor CB.

[0077] The third resistor RLSM is provided between the node NVLS and the node NLSM. Specifically, one end of the third resistor RLSM is connected to the terminal TVLS, and the other end is connected to the node NLSM. RIP=RIN=RLSM.

[0078] The capacitor CB is provided between the output node of the error amplifier circuit ERAM and the node NLSM. Specifically, one end of the capacitor CB is connected to the output node of the error amplifier circuit ERAM, and the other end is connected to the node NLSM.

[0079] The emitters of bipolar transistors BPB1 to BPB3 are connected to the ground node. The collector of bipolar transistor BPB1 is connected to the first input node NIP of operational amplifier OPA, the collector of bipolar transistor BPB2 is connected to the second input node NIN of operational amplifier OPA, and the collector of bipolar transistor BPB3 is connected to node NLSM.

[0080] The reference voltage VREFM is input from the terminal TVREFM to the inverting input node of the error amplifier circuit ERAM, and the voltage VLSM of the node NVLS is input to the non-inverting input node. The error amplifier circuit ERAM outputs a current control signal ERQ to the base of the bipolar transistor BPB3. When the collector current of the bipolar transistor BPB3 is set to the variable current IV3a, the error amplifier circuit ERAM performs feedback control on the variable current IV3a so that VLSM = VREFM. At this time, the current ILSM flowing through the third resistor RLSM of the level shift circuit 130 is expressed as follows (11). ILSM = IC3a - IV3a = (VREFM - VLS) / RLSM (11)

[0081] The current ILSM becomes a current corresponding to the voltage VLS at one end of the shunt resistor 12. Since IC3a is a constant current, the variable current IV3a is variably controlled according to the voltage VLS.

[0082] The collector currents of bipolar transistors BPB1 and BPB2 are variable currents IV1a and IV2a. Current control signal ERQ is input from error amplifier circuit ERAM to the bases of bipolar transistors BPB1 and BPB2, so IV1a = IV2a = IV3a. In other words, variable currents IV1a and IV2a, like variable current IV3a, are variably controlled according to voltage VLS. Variable currents IV1a to IV3a are sink currents.

[0083] The current IP flowing through the first resistor RIP of the level shift circuit 130 and the current IN flowing through the second resistor RIN of the level shift circuit 130 are expressed by the following equation (12).

[0084] IP=IC1a-IV1a, IN=IC2a-IV2a···(12)

[0085] According to IC1a=IC2a=IC3a, IV1a=IV2a=IV3a and the above formula (12), the currents IP and IN satisfy the following formula (13).

[0086] IP=IN=ILSM···(13)

[0087] According to RIP=RIN=RLSM and the above formula (13), the level shift amounts ΔVIP and ΔVIN are expressed by the following formula (14).

[0088] ΔVIP=ΔVIN=RIP×IP=RLSM×ILSM···(14)

[0089] In the above embodiment, the level shift circuit 130 includes a first constant current source, a second constant current source, a first variable current source, a second variable current source, and a current control circuit. The first constant current source supplies a first constant current IC1a as a source current to the first input node NIP of the operational amplifier OPA. The second constant current source supplies a second constant current IC2a ​​as a source current to the second input node NIN of the operational amplifier OPA. The first variable current source supplies a first variable current IV1a as a sink current to the first input node NIP of the operational amplifier OPA. The second variable current source supplies a second variable current IV2a as a sink current to the second input node NIN of the operational amplifier OPA. The current control circuit variably controls the first variable current IV1a and the second variable current IV2a based on the voltage VLS at the first resistor node NMONP.

[0090] In addition, Figure 6 In the circuit, bipolar transistor BPA1 corresponds to the first constant current source, and bipolar transistor BPA2 corresponds to the second constant current source. Bipolar transistor BPB1 corresponds to the first variable current source, and bipolar transistor BPB2 corresponds to the second variable current source. Error amplifier circuit ERAM, third resistor RLSM, and bipolar transistors BPA3 and BPB3 correspond to the current control circuit.

[0091] According to this embodiment, a first current IP is supplied to the first input node NIP of the operational amplifier OPA via a first constant current IC1a serving as a source current and a first variable current IV1a serving as a sink current. The first variable current IV1a is variably controlled based on the voltage VLS at the first resistance node NMONP, thereby variably controlling the first current IP based on the voltage VLS at the first resistance node NMONP. Furthermore, a second current IN is supplied to the second input node NIN of the operational amplifier OPA via a second constant current IC2a ​​serving as a source current and a second variable current IV2a serving as a sink current. The second variable current IV2a is variably controlled based on the voltage VLS at the first resistance node NMONP, thereby variably controlling the second current IN based on the voltage VLS at the first resistance node NMONP. Furthermore, during high-side detection, IC1a < IV1a and IC2a ​​< IV2a, resulting in the first current IP and the second current IN serving as sink currents. In low-side detection, IC1a>IV1a, IC2a>IV2a, and the first current IP and the second current IN become source currents.

[0092] Furthermore, in this embodiment, the current control circuit includes a third resistor RLSM, one end of which is connected to the first resistor node NMONP, and an error amplifier circuit ERAM. A first input node of the error amplifier circuit ERAM is connected to the other end of the third resistor RLSM. A reference voltage VREFM is input to a second input node of the error amplifier circuit ERAM. The error amplifier circuit ERAM outputs a current control signal ERQ to the first and second variable current sources for controlling the first and second variable currents IV1a and IV2a.

[0093] According to this embodiment, through feedback control by the error amplifier circuit ERAM, the other end of the third resistor RLSM becomes the reference voltage VREFM, and a current ILSM corresponding to the difference between the voltage VLS at the first resistance node NMONP and the reference voltage VREFM flows through the third resistor RLSM. Furthermore, the error amplifier circuit ERAM outputs a current control signal ERQ to the first and second variable current sources, thereby controlling the first and second variable currents IV1a and IV2a to correspond to the difference between the voltage VLS at the first resistance node NMONP and the reference voltage VREFM. Consequently, the level shift amount ΔVIP corresponds to the difference between the voltage VLS at the first resistance node NMONP and the reference voltage VREFM.

[0094] Figure 7 This is a third detailed configuration example of the current detection circuit 110. The current detection circuit 110 includes a current sense amplifier circuit 120, a variable current source 133, and a current sink 134. The variable current source 133 and the current sink 134 correspond to the level shift circuit 130. The configuration of the current sense amplifier circuit 120 is similar to that of the Figure 2 The same, so the description is omitted.

[0095] The current sink 134 includes NPN bipolar transistors BPD1 - BPD4 and a current source IBC.

[0096] The emitters of bipolar transistors BPD1 through BPD4 are connected to the ground node. The collector of bipolar transistor BPD1 is connected to the first input node NIP of the operational amplifier OPA, the collector of bipolar transistor BPD2 is connected to the second input node NIN of the operational amplifier OPA, and the collector of bipolar transistor BPD3 is connected to node NLSM. The bases of bipolar transistors BPD1 through BPD3 are connected to the base and collector of bipolar transistor BPD4. The current flowing through current source IBC becomes the collector current of bipolar transistor BPD4, and bipolar transistors BPD1 through BPD3 mirror this collector current, causing constant currents IC1b through IC3b to flow through these collectors. Constant currents IC1b through IC3b are sink currents, with IC1b = IC2b = IC3b.

[0097] The variable current source 133 includes a third resistor RLSM, an error amplifier circuit ERAM, PNP bipolar transistors BPC1 to BPC3 , and a capacitor CD.

[0098] The third resistor RLSM is provided between the node NVLS and the node NLSM. Specifically, one end of the third resistor RLSM is connected to the terminal TVLS, and the other end is connected to the node NLSM. RIP=RIN=RLSM.

[0099] The capacitor CD is provided between the output node of the error amplifier circuit ERAM and the node NLSM. Specifically, one end of the capacitor CD is connected to the output node of the error amplifier circuit ERAM, and the other end is connected to the node NLSM.

[0100] The emitters of bipolar transistors BPC1 to BPC3 are connected to a node of power supply voltage VDA. The collector of bipolar transistor BPC1 is connected to a first input node NIP of operational amplifier OPA, the collector of bipolar transistor BPC2 is connected to a second input node NIN of operational amplifier OPA, and the collector of bipolar transistor BPC3 is connected to node NLSM.

[0101] The error amplifier circuit ERAM receives a reference voltage VREFM from the terminal TVREFM at its inverting input node and a voltage VLSM at the node NVLS at its non-inverting input node. The error amplifier circuit ERAM outputs a current control signal ERQ to the base of the bipolar transistor BPC3. When the collector current of the bipolar transistor BPC3 is set to a variable current IV3b, the error amplifier circuit ERAM performs feedback control on the variable current IV3b such that VLSM = VREFM. At this point, the current ILSM flowing through the third resistor RLSM in the level shift circuit 130 is expressed by the following equation (15).

[0102] ILSM=IV3b-IC3b=(VREFM-VLS) / RLSM···(15)

[0103] The current ILSM becomes a current corresponding to the voltage VLS at one end of the shunt resistor 12. Since IC3b is a constant current, the variable current IV3b is variably controlled according to the voltage VLS.

[0104] The collector currents of bipolar transistors BPC1 and BPC2 are variable currents IV1b and IV2b. Current control signal ERQ is input from error amplifier circuit ERAM to the bases of bipolar transistors BPC1 and BPC2, so IV1b = IV2b = IV3b. In other words, variable currents IV1b and IV2b, like variable current IV3b, are variably controlled according to voltage VLS. Variable currents IV1b to IV3b are source currents.

[0105] The current IP flowing through the first resistor RIP of the level shift circuit 130 and the current IN flowing through the second resistor RIN of the level shift circuit 130 are expressed by the following equation (16).

[0106] IP=IV1b-IC1b, IN=IV2b-IC2b···(16)

[0107] According to IC1b=IC2b=IC3b, IV1b=IV2b=IV3b and the above formula (16), the currents IP and IN satisfy the following formula (17).

[0108] IP=IN=ILSM···(17)

[0109] According to RIP=RIN=RLSM and the above formula (17), the level shift amounts ΔVIP and ΔVIN are expressed by the following formula (18).

[0110] ΔVIP=ΔVIN=RIP×IP=RLSM×ILSM···(18)

[0111] In the above embodiment, the level shift circuit 130 includes a first variable current source, a second variable current source, a first constant current source, a second constant current source, and a current control circuit. The first variable current source supplies a first variable current IV1b as a source current to the first input node NIP of the operational amplifier OPA. The second variable current source supplies a second variable current IV2b as a source current to the second input node NIN of the operational amplifier OPA. The first constant current source supplies a first constant current IC1b as a sink current to the first input node NIP of the operational amplifier OPA. The second constant current source supplies a second constant current IC2b as a sink current to the second input node NIN of the operational amplifier OPA. The current control circuit variably controls the first variable current IV1b and the second variable current IV2b based on the voltage VLS at the first resistor node NMONP.

[0112] In addition, Figure 7In the figure, bipolar transistor BPC1 corresponds to the first variable current source, and bipolar transistor BPC2 corresponds to the second variable current source. Bipolar transistor BPD1 corresponds to the first constant current source, and bipolar transistor BPD2 corresponds to the second constant current source. The error amplifier circuit ERAM, the third resistor RLSM, and bipolar transistors BPC3 and BPD3 correspond to the current control circuit.

[0113] According to this embodiment, a first current IP is supplied to the first input node NIP of the operational amplifier OPA via a first variable current IV1b serving as a source current and a first constant current IC1b serving as a sink current. The first variable current IV1b is variably controlled based on the voltage VLS at the first resistance node NMONP, thereby variably controlling the first current IP based on the voltage VLS at the first resistance node NMONP. Furthermore, a second current IN is supplied to the second input node NIN of the operational amplifier OPA via a second variable current IV2b serving as a source current and a second constant current IC2b serving as a sink current. The second variable current IV2b is variably controlled based on the voltage VLS at the first resistance node NMONP, thereby variably controlling the second current IN based on the voltage VLS at the first resistance node NMONP. Furthermore, during high-side detection, IV1b < IC1b and IV2b < IC2b, resulting in the first current IP and the second current IN serving as sink currents. In the low-side detection, IV1b>IC1b and IV2b>IC2b are established, and the first current IP and the second current IN become source currents.

[0114] The current detection circuit of the present embodiment described above includes a current sensing amplifier circuit and a level shift circuit. A switching element, a shunt resistor, and an inductor are connected in series between a first power supply node and a second power supply node. The current sensing amplifier circuit detects the current flowing through the shunt resistor. The current sensing amplifier circuit includes an operational amplifier, a first resistor, and a second resistor. The first resistor is disposed between a first resistance node at one end of the shunt resistor and a first input node of the operational amplifier. The second resistor is disposed between a second resistance node at the other end of the shunt resistor and a second input node of the operational amplifier. The level shift circuit supplies a first current to the first input node of the operational amplifier and a second current to the second input node of the operational amplifier. The level shift circuit variably controls the first and second currents based on the voltage at the first resistance node, thereby level-shifting the voltages at the first and second input nodes of the operational amplifier by a variable level shift amount based on the voltage at the first resistance node.

[0115] According to this embodiment, the level shift amounts of the first and second input nodes of the operational amplifier can be variably controlled based on the voltage at the first resistor node. Because the voltage at the first resistor node is linked to the common-mode voltage, the level shift amount can be variably controlled based on the common-mode voltage. Consequently, even if the common-mode voltage fluctuates due to fluctuations in the power supply voltage, for example, the fluctuation in the input voltage of the operational amplifier can be reduced compared to a case where the level shift amount is constant.

[0116] Furthermore, in this embodiment, the level shift circuit may cause a first current to flow from the first resistance node via the first resistor to the first input node of the operational amplifier, and a second current to flow from the second resistance node via the second resistor to the second input node of the operational amplifier, when the switch element is turned on. The level shift circuit may cause the first current to flow from the first input node of the operational amplifier via the first resistor to the first resistance node, and the second current to flow from the second input node of the operational amplifier via the second resistor to the second resistance node, when the switch element is turned off.

[0117] During high-side detection when the switch is on, current flows from the shunt resistor to the operational amplifier via the first and second resistors, causing the first and second input nodes of the operational amplifier to drop in level. During low-side detection when the switch is off, current flows from the operational amplifier to the shunt resistor via the first and second resistors, causing the first and second input nodes of the operational amplifier to rise in level. This level drop and level rise reduces the difference between the input voltages of the operational amplifier during high-side detection and low-side detection.

[0118] In addition, in this embodiment, the level shift amount may be the difference between the reference voltage and the voltage at the first resistance node.

[0119] According to this embodiment, the input voltage of the operational amplifier is level-shifted by a variable level-shift amount corresponding to the voltage at one end of the shunt resistor. Furthermore, according to this embodiment, the input voltage of the operational amplifier can be level-shifted to approximately the reference voltage. Consequently, even when the common-mode voltage fluctuates due to fluctuations in the power supply voltage, the input voltage of the operational amplifier can be maintained approximately at the reference voltage.

[0120] In addition, in this embodiment, the level shift circuit may also include a first constant current source, a second constant current source, a first variable current source, a second variable current source, and a current control circuit. The first constant current source may also supply a first constant current as a source current to the first input node of the operational amplifier. The second constant current source may also supply a second constant current as a source current to the second input node of the operational amplifier. The first variable current source may also supply a first variable current as a sink current to the first input node of the operational amplifier. The second variable current source may also supply a second variable current as a sink current to the second input node of the operational amplifier. The current control circuit may also variably control the first variable current and the second variable current based on the voltage at the first resistor node.

[0121] According to this embodiment, a first current is supplied to a first input node of an operational amplifier using a first constant current serving as a source current and a first variable current serving as a sink current. The first variable current is variably controlled based on the voltage at a first resistor node, thereby variably controlling the first current based on the voltage at the first resistor node. Furthermore, a second current is supplied to a second input node of the operational amplifier using a second constant current serving as a source current and a second variable current serving as a sink current. The second variable current is variably controlled based on the voltage at the first resistor node, thereby variably controlling the second current based on the voltage at the first resistor node.

[0122] In addition, in this embodiment, the level shift circuit may also include a first variable current source, a second variable current source, a first constant current source, a second constant current source, and a current control circuit. The first variable current source may also supply a first variable current as a source current to the first input node of the operational amplifier. The second variable current source may also supply a second variable current as a source current to the second input node of the operational amplifier. The first constant current source may also supply a first constant current as a sink current to the first input node of the operational amplifier. The second constant current source may also supply a second constant current as a sink current to the second input node of the operational amplifier. The current control circuit may also variably control the first variable current and the second variable current based on the voltage at the first resistor node.

[0123] According to this embodiment, a first current is supplied to a first input node of an operational amplifier using a first variable current serving as a source current and a first constant current serving as a sink current. By variably controlling the first variable current based on the voltage at a first resistor node, the first current is variably controlled based on the voltage at the first resistor node. Furthermore, a second current is supplied to a second input node of the operational amplifier using a second variable current serving as a source current and a second constant current serving as a sink current. By variably controlling the second variable current based on the voltage at the first resistor node, the second current is variably controlled based on the voltage at the first resistor node.

[0124] Furthermore, in this embodiment, the current control circuit may include: a third resistor having one end connected to the first resistor node; and an error amplifier circuit. The first input node of the error amplifier circuit may be connected to the other end of the third resistor, and a reference voltage may be input to the second input node of the error amplifier circuit. The error amplifier circuit may output current control signals to the first and second variable current sources for controlling the first and second variable currents.

[0125] According to this embodiment, through feedback control by the error amplifier circuit, the other end of the third resistor becomes a reference voltage, and a current corresponding to the difference between the voltage at the first resistor node and the reference voltage flows through the third resistor. Furthermore, the error amplifier circuit outputs current control signals to the first and second variable current sources, thereby enabling the first and second variable currents to become currents corresponding to the difference between the voltage at the first resistor node and the reference voltage. Consequently, the amount of level shift becomes the difference between the voltage at the first resistor node and the reference voltage.

[0126] Furthermore, the circuit device of this embodiment includes any one of the above-described current detection circuits.

[0127] Furthermore, the circuit device of this embodiment may include: any one of the above-described current detection circuits; and a terminal for inputting a reference voltage.

[0128] The solenoid control device of this embodiment includes: the current detection circuit described above; a switching element; a shunt resistor; and a solenoid serving as an inductor. The solenoid control device controls the solenoid based on the current detection result output by the current sense amplifier circuit.

[0129] In addition, although the present embodiment has been described in detail as described above, it will be readily understood by those skilled in the art that various modifications can be made without substantially departing from the novelties and effects of the present disclosure. Therefore, all such modifications are included within the scope of the present disclosure. For example, in the specification or the drawings, a term that is described at least once with a different term in a broader sense or with the same meaning can be replaced with the different term at any position in the specification or the drawings. In addition, all combinations of the present embodiment and its modifications are also included within the scope of the present disclosure. In addition, the structure and operation of the current sensing amplifier circuit, level shift circuit, current detection circuit, inductor, circuit device, solenoid control device, etc. are not limited to those described in the present embodiment, and various modifications can be implemented.

Claims

1. A current detection circuit, characterized in that: The current detection circuit includes: a current sensing amplifier circuit for detecting a current flowing through the shunt resistor of a switching element, a shunt resistor, and an inductor connected in series between a first power supply node and a second power supply node; as well as Level shift circuit, The current sensing amplifier circuit includes: Operational amplifiers; a first resistor disposed between a first resistance node at one end of the shunt resistor and a first input node of the operational amplifier; and a second resistor disposed between a second resistance node at the other end of the shunt resistor and a second input node of the operational amplifier; The level shift circuit supplies a first current to the first input node of the operational amplifier and supplies a second current to the second input node of the operational amplifier. The level shift circuit variably controls the first current and the second current according to the voltage of the first resistance node, thereby level-shifting the voltages of the first input node and the second input node of the operational amplifier by a variable level shift amount according to the voltage of the first resistance node.

2. The current detection circuit according to claim 1, wherein: When the switch element is turned on, the level shift circuit causes the first current to flow from the first resistance node via the first resistor to the first input node of the operational amplifier, and causes the second current to flow from the second resistance node via the second resistor to the second input node of the operational amplifier. When the switch element is turned off, the level shift circuit allows the first current to flow from the first input node of the operational amplifier to the first resistance node via the first resistor, and allows the second current to flow from the second input node of the operational amplifier to the second resistance node via the second resistor.

3. The current detection circuit according to claim 1 or 2, characterized in that: The level shift amount is a difference between a reference voltage and a voltage at the first resistance node.

4. The current detection circuit according to claim 1 or 2, characterized in that: The level shift circuit comprises: a first constant current source for supplying a first constant current as a source current to the first input node of the operational amplifier; a second constant current source for supplying a second constant current as a source current to the second input node of the operational amplifier; a first variable current source configured to supply a first variable current as a sink current to the first input node of the operational amplifier; a second variable current source configured to supply a second variable current as a sink current to the second input node of the operational amplifier; as well as A current control circuit variably controls the first variable current and the second variable current according to a voltage at the first resistance node.

5. The current detection circuit according to claim 1 or 2, characterized in that: The level shift circuit comprises: a first variable current source configured to supply a first variable current as a source current to the first input node of the operational amplifier; a second variable current source configured to supply a second variable current as a source current to the second input node of the operational amplifier; a first constant current source configured to supply a first constant current as a sink current to the first input node of the operational amplifier; a second constant current source configured to supply a second constant current as a sink current to the second input node of the operational amplifier; as well as A current control circuit variably controls the first variable current and the second variable current according to a voltage at the first resistance node.

6. The current detection circuit according to claim 4, characterized in that: The current control circuit comprises: a third resistor, one end of which is connected to the first resistor node; and Error amplifier circuit, The first input node of the error amplifier circuit is connected to the other end of the third resistor, and a reference voltage is input to the second input node of the error amplifier circuit. The error amplifier circuit outputs a current control signal for controlling the first variable current and the second variable current to the first variable current source and the second variable current source.

7. A circuit device, characterized in that: The circuit arrangement comprises the current detection circuit according to any one of claims 1 to 6.

8. A circuit device, characterized in that: The circuit arrangement comprises: The current detection circuit according to claim 3 or 6; and A terminal for inputting the reference voltage.

9. A solenoid control device, characterized in that: The solenoid control device comprises: The current detection circuit according to any one of claims 1 to 6; the switching element; the shunt resistor; and The solenoid acts as the inductor, The solenoid is controlled based on the current detection result output by the current sensing amplifier circuit.

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