Stepper motor drive circuit with power supply protection function and stepper motor circuit system

By introducing a leakage circuit into the stepper motor drive circuit, the problem of excessive voltage at the motor input terminal when the GPIO power supply is stopped is solved, and normal motor drive and power protection are achieved, with high process portability and small footprint.

CN115173759BActive Publication Date: 2025-09-16ZHEJIANG XINMAI SILICON CO LTD
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Patent Information

Application Number
CN202210162667.6
Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
Filing Date
2022-02-22
Publication Date
2025-09-16
Estimated Expiration
2042-02-22

AI Technical Summary

Technical Problem

When the GPIO power supply of the stepper motor drive circuit stops working, a large voltage is generated at the input end of the stepper motor, causing damage to the system GPIO power supply.

Method used

A stepper motor drive circuit with power supply protection function is designed, which includes an enable signal output circuit, a main drive circuit, first and second drive enhancement circuits, and a bleeder circuit. When the GPIO power supply stops working, the bleeder circuit discharges the induced current generated by the inductor to protect the GPIO power supply.

Benefits of technology

It effectively prevents reverse charging of the GPIO power supply, protects the system power supply, and realizes normal driving of the motor. It also has high process portability and occupies a small area.

✦ Generated by Eureka AI based on patent content.

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Abstract

The present application relates to a stepper motor drive circuit and a stepper motor circuit system with a power supply protection function. By setting an additional leakage circuit and connecting it to the main drive circuit, the first motor circuit and the second motor circuit respectively, when the GPIO power supply circuit stops working and most of the tubes in the main drive circuit are turned off, the induced current generated by the inductance in the second motor circuit can be discharged from the leakage circuit, thereby achieving the purpose of protecting the GPIO power supply circuit.
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Description

Technical Field

[0001] The present application relates to the technical field of drive circuits, and in particular to a stepper motor drive circuit and a stepper motor circuit system with a power supply protection function. Background Art

[0002] When the stepper motor driver circuit receives a pulse signal, it is driven by the pulse signal to rotate the stepper motor in a set direction and a fixed angle. In a stepper motor driver circuit powered by the system GPIO power supply, the stepper motor driver circuit is connected to the stepper motor, specifically, to the stepper motor's input terminal. When the system GPIO power supply stops functioning, the subsequent circuit of the stepper motor is equivalent to an inductor and a resistor. Due to the characteristics of the inductor in the stepper motor, a large voltage is generated at the stepper motor's input terminal. This voltage affects the system GPIO power supply, causing reverse charging and damage to the system GPIO power supply. Summary of the Invention

[0003] Based on this, it is necessary to provide a stepper motor drive circuit and a stepper motor circuit system with power supply protection function to address the problem that when the GPIO power supply stops working, a large voltage will be generated at the input end of the stepper motor, which will damage the GPIO power supply.

[0004] The present application provides a stepper motor drive circuit with a power supply protection function.

[0005] include:

[0006] Enable signal output circuit;

[0007] A main drive circuit, the main drive circuit being electrically connected to the GPIO power supply circuit;

[0008] a first driving enhancement circuit, electrically connected to the main driving circuit;

[0009] a second driving enhancement circuit, electrically connected to the main driving circuit;

[0010] a bleeder circuit, the bleeder circuit being electrically connected to the enable signal output circuit; the bleeder circuit being electrically connected to the main drive circuit; and the bleeder circuit being electrically connected to the first motor circuit;

[0011] The main drive circuit is also electrically connected to a second motor circuit, which includes a first resistor and an inductor connected in series; the leakage circuit is also electrically connected to the second motor circuit.

[0012] Furthermore, the main driving circuit includes:

[0013] a first PMOS transistor, wherein a source of the first PMOS transistor is electrically connected to the GPIO power supply circuit, and a gate of the first PMOS transistor is electrically connected to the first drive enhancement circuit;

[0014] a second PMOS transistor, wherein a source of the second PMOS transistor is electrically connected to a drain of the first PMOS transistor;

[0015] a third PMOS transistor, wherein the source of the third PMOS transistor is electrically connected to the gate of the second PMOS transistor, and the gate of the third PMOS transistor is electrically connected to the enable signal output circuit;

[0016] a first NMOS transistor, wherein a gate of the first NMOS transistor is electrically connected to the second driving enhancement circuit, and a source of the first NMOS transistor is grounded;

[0017] a second NMOS transistor, wherein the gate of the second NMOS transistor is electrically connected to the enable signal output circuit, the source of the second NMOS transistor is grounded, the drain of the second NMOS transistor is electrically connected to the drain of the second PMOS transistor, and the drain of the second NMOS transistor is also electrically connected to the drain of the third PMOS transistor;

[0018] The drain of the third PMOS transistor, the drain of the second PMOS transistor, the drain of the first NMOS transistor and the second motor circuit are connected to one point.

[0019] Furthermore, the first driving enhancement circuit includes a plurality of first inverter circuits connected in series; each first inverter circuit includes a first inverter and a first inverter power supply.

[0020] Furthermore, the second driving enhancement circuit includes a plurality of second inverter circuits connected in series; each second inverter circuit includes a second inverter and a second inverter power supply.

[0021] Further, the number of the first inverter circuits is an even number, and the number of the second inverter circuits is an even number.

[0022] Furthermore, the leakage circuit includes:

[0023] An AND gate comprising a first input terminal, a second input terminal and an output terminal; the first input terminal is electrically connected to the enable signal output circuit;

[0024] a third NMOS transistor, wherein the gate of the third NMOS transistor is electrically connected to the output end of the AND gate, and the source of the third MOS transistor is grounded;

[0025] a bleeder diode, wherein a cathode of the bleeder diode is electrically connected to the first motor circuit;

[0026] The anode of the bleeder diode, the drain of the first NMOS transistor, the drain of the third PMOS transistor and the drain of the second PMOS transistor are electrically connected to one point;

[0027] The anode of the leakage diode, the drain of the third NMOS tube, the drain of the third PMOS tube and the second motor circuit are electrically connected at one point.

[0028] The present application also provides a stepper motor circuit system.

[0029] The stepper motor circuit system includes:

[0030] GPIO power circuit;

[0031] The stepper motor drive circuit with power protection function mentioned above is electrically connected to the GPIO power circuit;

[0032] a first motor circuit, electrically connected to the stepping motor drive circuit with a power protection function;

[0033] The second motor circuit is electrically connected to the stepping motor driving circuit with power supply protection function.

[0034] Furthermore, the GPIO power supply circuit includes a reference voltage source, an operational amplifier, a second resistor and a third resistor;

[0035] The operational amplifier comprises a non-inverting input terminal, an inverting input terminal and an output terminal; the non-inverting input terminal of the operational amplifier is electrically connected to the reference voltage source;

[0036] One end of the second resistor is electrically connected to the output end of the operational amplifier, and the other end is electrically connected to the third resistor;

[0037] One end of the third resistor is electrically connected to the second resistor, and the other end is grounded;

[0038] The inverting input terminal of the operational amplifier is electrically connected to the connection link between the second resistor and the third resistor.

[0039] Furthermore, the stepper motor circuit system further includes:

[0040] A first motor power supply is electrically connected to the first motor circuit.

[0041] Furthermore, the stepper motor circuit system further includes:

[0042] The second motor power supply is electrically connected to the second motor circuit.

[0043] The present application relates to a stepper motor drive circuit and a stepper motor circuit system with a power supply protection function. By setting an additional leakage circuit and connecting it to the main drive circuit, the first motor circuit and the second motor circuit respectively, when the GPIO power supply circuit stops working and most of the tubes in the main drive circuit are turned off, the induced current generated by the inductance in the second motor circuit can be discharged from the leakage circuit, thereby achieving the purpose of protecting the GPIO power supply circuit. BRIEF DESCRIPTION OF THE DRAWINGS

[0044] Figure 1 A schematic structural diagram of a stepper motor drive circuit with power protection function provided in one embodiment of the present application.

[0045] Figure 2 A schematic structural diagram of a stepper motor circuit system provided in one embodiment of the present application.

[0046] Figure 3 This is a structural diagram of a stepper motor drive circuit with power protection function provided by another embodiment of the present application.

[0047] Figure 4 This is a structural diagram of a stepper motor circuit system provided in another embodiment of the present application.

[0048] Reference numerals:

[0049] 10-GPIO power circuit; 110-reference voltage source; 120-operational amplifier;

[0050] 121 - non-inverting input terminal of the operational amplifier; 122 - inverting input terminal of the operational amplifier;

[0051] 123 - output terminal of the operational amplifier; 130 - second resistor; 140 - third resistor;

[0052] 20-Stepper motor drive circuit with power protection function;

[0053] 210 - enable signal output circuit; 220 - main drive circuit; 221 - first PMOS transistor;

[0054] 221a - the gate of the first PMOS transistor; 221b - the source of the first PMOS transistor;

[0055] 221c - drain of the first PMOS transistor; 222 - second PMOS transistor; 222a - gate of the second PMOS transistor;

[0056] 222b - source of the second PMOS transistor; 222c - drain of the second PMOS transistor; 223 - third PMOS transistor;

[0057] 223a - the gate of the third PMOS transistor; 223b - the source of the third PMOS transistor;

[0058] 223c - drain of the third PMOS transistor; 224 - first NMOS transistor; 224a - gate of the first NMOS transistor;

[0059] 224b - source of the first NMOS transistor; 224c - drain of the first NMOS transistor; 225 - second NMOS transistor;

[0060] 225a - gate of the second NMOS transistor; 225b - source of the second NMOS transistor;

[0061] 225c - drain of the second NMOS transistor; 230 - first driving enhancement circuit; 231 - first inverter circuit;

[0062] 231a - first inverter; 231b - first inverter power supply; 240 - second drive enhancement circuit;

[0063] 241 - second inverter circuit; 241a - second inverter; 241b - second inverter power supply;

[0064] 250 - leakage circuit; 251 - AND gate; 251a - first input terminal of the AND gate;

[0065] 251b - the second input terminal of the AND gate; 251c - the output terminal of the AND gate; 252 - the third NMOS transistor;

[0066] 252a - the gate of the third NMOS transistor; 252b - the source of the third NMOS transistor;

[0067] 252c - drain of the third NMOS transistor; 253 - leakage diode; 253a - anode of the leakage diode;

[0068] 253b - cathode of the leakage diode; 30 - first motor circuit; 40 - second motor circuit;

[0069] 41 - first resistor; 42 - inductor; 50 - first motor power supply; 60 - second motor power supply. DETAILED DESCRIPTION

[0070] In order to make the purpose, technical solutions and advantages of this application more clearly understood, the following further describes this application in detail with reference to the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are only used to explain this application and are not intended to limit this application.

[0071] The present application provides a stepper motor driving circuit 20 with a power supply protection function.

[0072] like Figure 1 and Figure 2 As shown, in one embodiment of the present application, the stepper motor driving circuit 20 with power protection function includes an enable signal output circuit 210, a main driving circuit 220, a first driving enhancement circuit 230, a second driving enhancement circuit 240 and a leakage circuit 250.

[0073] The main drive circuit 220 is electrically connected to the GPIO power supply circuit 10. The first drive enhancement circuit 230 is electrically connected to the main drive circuit 220. The second drive enhancement circuit 240 is electrically connected to the main drive circuit 220. The bleeder circuit 250 is electrically connected to the enable signal output circuit 210. The bleeder circuit 250 is also electrically connected to the main drive circuit 220. The bleeder circuit 250 is also electrically connected to the first motor circuit 30. The main drive circuit 220 is also electrically connected to the second motor circuit 40. The second motor circuit 40 includes a first resistor 41 and an inductor 42 connected in series. The bleeder circuit 250 is also electrically connected to the second motor circuit 40.

[0074] Specifically, the first driving enhancement circuit 230 and the second driving enhancement circuit 240 function to increase the driving capability of the main driving circuit 220 .

[0075] The enable signal output circuit 210 is used to output an enable signal, en, to change the on / off status of some transistors in the main drive circuit 220. In layman's terms, enable is a "permit" signal. Feed enable is a signal that allows feeding. In other words, only when the feed enable signal is valid can the entire stepper motor drive circuit 20 with power protection function function to function, thereby driving the stepper motor to start.

[0076] In this embodiment, an additional leakage circuit 250 is provided and connected to the main drive circuit 220, the first motor circuit 30 and the second motor circuit 40 respectively. When the GPIO power supply circuit 10 stops working, most of the tubes in the main drive circuit 220 are turned off, and the induced current generated by the inductor 42 in the second motor circuit 40 can be discharged from the leakage circuit 250, thereby achieving the purpose of protecting the GPIO power supply circuit 10.

[0077] In addition, the stepper motor driving circuit 20 with power protection function provided by the present invention is mainly implemented by digital logic, has high process portability, and occupies a small area.

[0078] like Figure 3 As shown, in one embodiment of the present application, the main driving circuit 220 includes a first PMOS transistor 221 , a second PMOS transistor 222 , a third PMOS transistor 223 , a first NMOS transistor 224 and a second NMOS transistor 225 .

[0079] The source 221b of the first PMOS transistor 221 is electrically connected to the GPIO power supply circuit 10. The gate 221a of the first PMOS transistor 221 is electrically connected to the first drive enhancement circuit 230. The source 222b of the second PMOS transistor 222 is electrically connected to the drain 221c of the first PMOS transistor 221. The source 223b of the third PMOS transistor 223 is electrically connected to the gate 222a of the second PMOS transistor 222. The gate 223a of the third PMOS transistor 223 is electrically connected to the enable signal output circuit 210. The gate 224a of the first NMOS transistor 224 is electrically connected to the second drive enhancement circuit 240. The source 224b of the first NMOS transistor 224 is grounded.

[0080] The gate 225a of the second NMOS transistor 225 is electrically connected to the enable signal output circuit 210. The source 225b of the second NMOS transistor 225 is grounded. The drain 225c of the second NMOS transistor 225 is electrically connected to the gate 222a of the second PMOS transistor 222. The drain 225c of the second NMOS transistor 225 is also electrically connected to the source 223b of the third PMOS transistor 223.

[0081] The drain 223c of the third PMOS transistor 223, the drain 222c of the second PMOS transistor 222, the drain 224c of the first NMOS transistor 224 and the second motor circuit 40 are connected to one point, ie Figure 3 Point X in .

[0082] Specifically, the second NMOS transistor 225 and the third PMOS transistor 223 are used to prevent reverse charging and play a protective role. The specific principle will be explained in subsequent embodiments.

[0083] Please continue reading Figure 3 In one embodiment of the present application, the first driving enhancement circuit 230 includes a plurality of first inverter circuits 231 connected in series. Each first inverter circuit 231 includes a first inverter 231a and a first inverter power supply 231b.

[0084] Specifically, a plurality of first inverter circuits 231 connected in series are electrically connected to the gate 221a of the first PMOS transistor 221. Optionally, each first inverter power supply 231b provides a 5V DC voltage.

[0085] In this embodiment, the driving capability is increased by providing a plurality of first inverter circuits 231 connected in series with each other in equal proportion.

[0086] Please continue reading Figure 3In one embodiment of the present application, the second driving enhancement circuit 240 includes a plurality of second inverter circuits 241 connected in series. Each second inverter circuit 241 includes a second inverter 241a and a second inverter power supply 241b.

[0087] Specifically, a plurality of second inverter circuits 241 connected in series are electrically connected to the gate 224a of the first NMOS transistor 224. Optionally, each second inverter power supply 241b provides a 5V DC voltage.

[0088] In this embodiment, the driving capability is increased by providing a plurality of second inverter circuits 241 connected in series with equal ratio amplification.

[0089] In an embodiment of the present application, the number of the first inverter circuits 231 is an even number, and the number of the second inverter circuits 241 is an even number.

[0090] Specifically, the number of the first inverter circuits 231 may be equal to the number of the second inverter circuits 241 .

[0091] Please continue reading Figure 3 In one embodiment of the present application, the leakage circuit 250 includes an AND gate 251, a third NMOS transistor 252, and a leakage diode 253. The AND gate 251 includes a first input terminal 251a of the AND gate 251, a second input terminal 251b of the AND gate 251, and an output terminal 251c of the AND gate 251. The first input terminal 251a is electrically connected to the enable signal output circuit 210.

[0092] The gate 252a of the third NMOS transistor 252 is electrically connected to the output terminal 251c of the AND gate 251. The source 252b of the third NMOS transistor 252 is grounded. Figure 4 As shown, the cathode 253 b of the leakage diode 253 is electrically connected to the first motor circuit 30 .

[0093] The anode 253a of the bleeder diode 253, the drain 224c of the first NMOS transistor 224, the drain 223c of the third PMOS transistor 223 and the drain 222c of the second PMOS transistor 222 are electrically connected to one point, namely Figure 3 The anode 253a of the bleeder diode 253, the drain 252c of the third NMOS transistor 252, the drain 223c of the third PMOS transistor 223 and the second motor circuit 40 are electrically connected at one point, namely Figure 3 Point Y in .

[0094] Specifically, see Figure 3, the working principle of the entire stepper motor driving circuit 20 with power protection function is explained below.

[0095] When the GPIO power supply circuit 10 is in normal operation, the gate 221a of the first PMOS transistor 221 is at a low level, and the first PMOS transistor 221 is turned on. Furthermore, when the GPIO power supply circuit 10 is in normal operation, the enable signal en output by the enable signal output circuit 210 is at a high level. The second input terminal 251b of the AND gate 251, which is the data input terminal, is always at a high level. Therefore, the output terminal 251c of the AND gate 251 is also at a high level, and the third NMOS transistor 253 is turned on. The third PMOS transistor 223 is turned off, and the second NMOS transistor 225 is turned on, causing the second PMOS transistor 222 to be turned on. It can be understood that at this time, the gate 224a of the first NMOS transistor 224 is at a high level, and the first NMOS transistor 224 is turned on. This generates a signal at the drain of the third NMOS transistor 252, which is output to the first motor circuit 30 and the second motor circuit 40, driving the stepper motor.

[0096] When the GPIO power supply circuit 10 is in a non-operating state, the gate 221a of the first PMOS transistor 221 is at a high level, approximately 5V. The first PMOS transistor 221 is turned off, the enable signal en output by the enable signal output circuit 210 is at a low level, and the second input terminal 251b of the AND gate 251, which is the data input terminal, is always at a high level. Therefore, the output terminal 251c of the AND gate 251 is at a low level, and the third NMOS transistor 253 is turned off. The third PMOS transistor 223 is turned on, the second NMOS transistor 225 is turned off, and the second PMOS transistor 222 is turned off. The gate 224a of the first NMOS transistor 224 is at a low level. The first NMOS transistor 224 is turned off. At this time, the third NMOS transistor 253 is turned off, and the gate 252a of the third NMOS transistor 252 is at a low level. The current flowing through the inductor 42 of the second motor circuit 40 generates a DC voltage greater than 5V (typically 6-7V). Since the third NMOS transistor 252 is turned off at this time, this 6-7V voltage cannot be discharged from the third NMOS transistor 252. Since the first NMOS transistor is turned off, this 6-7V voltage cannot be discharged from the first NMOS transistor 224 either. At this time, the second PMOS transistor 222 is turned off, thereby protecting the GPIO power circuit 10. The generated 6-7V DC voltage and current are slowly discharged through the freewheeling diode to the second motor circuit 40.

[0097] The present application also provides a stepper motor circuit system.

[0098] like Figure 2As shown, in one embodiment of the present application, the stepper motor circuit system includes a GPIO power supply circuit 10, the stepper motor driving circuit 20 with power protection function mentioned above, a first motor circuit 30 and a second motor circuit 40.

[0099] The stepper motor driving circuit 20 with power protection function is electrically connected to the GPIO power circuit 10. The first motor circuit 30 is electrically connected to the stepper motor driving circuit 20 with power protection function. The second motor circuit 40 is electrically connected to the stepper motor driving circuit 20 with power protection function.

[0100] Specifically, the first motor circuit 30 is part of the subsequent circuitry within the motor. The second motor circuit 40 is also part of the subsequent circuitry within the electrode. The second motor circuit 40 is relatively complex. For ease of understanding, the second motor circuit 40 is equivalent to a first resistor 41 and an inductor 42 connected in series.

[0101] like Figure 4 As shown, in one embodiment of the present application, the GPIO power supply circuit 10 includes a reference voltage source 110 , an operational amplifier 120 , a second resistor 130 and a third resistor 140 .

[0102] like Figure 4 As shown, the operational amplifier 120 includes a non-inverting input terminal 121 of the operational amplifier 120, an inverting input terminal 122 of the operational amplifier 120, and an output terminal 123 of the operational amplifier 120. The non-inverting input terminal 121 of the operational amplifier 120 is electrically connected to the reference voltage source 110. One end of the second resistor 130 is electrically connected to the output terminal 123 of the operational amplifier 120. The other end of the second resistor 130 is electrically connected to the third resistor 140. One end of the third resistor 140 is electrically connected to the second resistor 130. The other end of the third resistor 140 is grounded. The inverting input terminal 122 of the operational amplifier 120 is electrically connected to the connection link between the second resistor 130 and the third resistor 140.

[0103] Specifically, the reference voltage source 110 can provide a DC voltage of 1.2 V. After passing through the operational amplifier structure composed of the operational amplifier 120 , the second resistor 130 , and the third resistor 140 , the output terminal 123 of the operational amplifier 120 can output a DC voltage of 3.3 V.

[0104] like Figure 4 As shown, in one embodiment of the present application, the stepper motor circuit system further includes a first motor power supply 50 . The first motor power supply 50 is electrically connected to the first motor circuit 30 .

[0105] Specifically, the first electrical power supply 50 provides a DC voltage of 5 V. During energy dissipation, the current flows from the leakage diode 253 to the first electrode electromechanical power supply 50 to complete the energy dissipation.

[0106] Please continue reading Figure 4 In one embodiment of the present application, the stepper motor circuit system further includes a second motor power supply 60 . The second motor power supply 60 is electrically connected to the second motor circuit 40 .

[0107] Specifically, the second motor power supply 60 provides a DC voltage of 5V.

[0108] The various technical features of the above-described embodiments can be combined arbitrarily, and the execution order of the method steps is not restricted. In order to make the description concise, not all possible combinations of the various technical features in the above-described embodiments are described. However, as long as there is no contradiction in the combination of these technical features, they should be considered to be within the scope of this specification.

[0109] The above-described embodiments merely represent several implementation methods of the present application. While the descriptions are relatively specific and detailed, they should not be construed as limiting the scope of the present application. It should be noted that a person of ordinary skill in the art may make various modifications and improvements without departing from the spirit of the present application, and these modifications and improvements fall within the scope of protection of the present application. Therefore, the scope of protection of the present application shall be determined by the appended claims.

Claims

1. A stepper motor drive circuit with power protection function, characterized in that: include: Enable signal output circuit; A main drive circuit, the main drive circuit being electrically connected to the GPIO power supply circuit; a first driving enhancement circuit, electrically connected to the main driving circuit; a second driving enhancement circuit, electrically connected to the main driving circuit; a bleeder circuit, the bleeder circuit being electrically connected to the enable signal output circuit; the bleeder circuit being electrically connected to the main drive circuit; and the bleeder circuit being electrically connected to the first motor circuit; The main drive circuit is also electrically connected to the second motor circuit, the second motor circuit includes a first resistor and an inductor connected in series; the bleeder circuit is also electrically connected to the second motor circuit; The main driving circuit includes: a first PMOS transistor, wherein a source of the first PMOS transistor is electrically connected to the GPIO power supply circuit, and a gate of the first PMOS transistor is electrically connected to the first drive enhancement circuit; a second PMOS transistor, wherein a source of the second PMOS transistor is electrically connected to a drain of the first PMOS transistor; a third PMOS transistor, wherein the source of the third PMOS transistor is electrically connected to the gate of the second PMOS transistor, and the gate of the third PMOS transistor is electrically connected to the enable signal output circuit; a first NMOS transistor, wherein a gate of the first NMOS transistor is electrically connected to the second driving enhancement circuit, and a source of the first NMOS transistor is grounded; a second NMOS transistor, wherein the gate of the second NMOS transistor is electrically connected to the enable signal output circuit, the source of the second NMOS transistor is grounded, the drain of the second NMOS transistor is electrically connected to the gate of the second PMOS transistor, and the drain of the second NMOS transistor is also electrically connected to the source of the third PMOS transistor; The drain of the third PMOS transistor, the drain of the second PMOS transistor, the drain of the first NMOS transistor and the second motor circuit are connected to one point; The leakage circuit includes: An AND gate comprising a first input terminal, a second input terminal and an output terminal; the first input terminal is electrically connected to the enable signal output circuit; a third NMOS transistor, wherein the gate of the third NMOS transistor is electrically connected to the output end of the AND gate, and the source of the third NMOS transistor is grounded; a bleeder diode, wherein a cathode of the bleeder diode is electrically connected to the first motor circuit; The anode of the bleeder diode, the drain of the first NMOS transistor, the drain of the third PMOS transistor and the drain of the second PMOS transistor are electrically connected to one point; The anode of the leakage diode, the drain of the third NMOS tube, the drain of the third PMOS tube and the second motor circuit are electrically connected at one point.

2. The stepping motor driving circuit with power supply protection function according to claim 1, characterized in that: The first driving enhancement circuit includes a plurality of first inverter circuits connected in series; each first inverter circuit includes a first inverter and a first inverter power supply.

3. The stepping motor driving circuit with power supply protection function according to claim 2, characterized in that: The second driving enhancement circuit includes a plurality of second inverter circuits connected in series; each second inverter circuit includes a second inverter and a second inverter power supply.

4. The stepping motor driving circuit with power protection function according to claim 3, characterized in that: The number of the first inverter circuits is an even number, and the number of the second inverter circuits is an even number.

5. A stepper motor circuit system, characterized in that: include: GPIO power circuit; The stepper motor drive circuit with power protection function according to any one of claims 1 to 4, electrically connected to the GPIO power supply circuit; a first motor circuit, electrically connected to the stepping motor drive circuit with a power protection function; The second motor circuit is electrically connected to the stepping motor driving circuit with power supply protection function.

6. The stepper motor circuit system according to claim 5, characterized in that: The GPIO power supply circuit includes a reference voltage source, an operational amplifier, a second resistor and a third resistor; The operational amplifier comprises a non-inverting input terminal, an inverting input terminal and an output terminal; the non-inverting input terminal of the operational amplifier is electrically connected to the reference voltage source; One end of the second resistor is electrically connected to the output end of the operational amplifier, and the other end is electrically connected to the third resistor; One end of the third resistor is electrically connected to the second resistor, and the other end is grounded; The inverting input terminal of the operational amplifier is electrically connected to the connection link between the second resistor and the third resistor.

7. The stepper motor circuit system according to claim 6, characterized in that: Also includes: A first motor power supply is electrically connected to the first motor circuit.

8. The stepper motor circuit system according to claim 7, wherein: Also includes: The second motor power supply is electrically connected to the second motor circuit.

Citation Information

Patent Citations

  • Stepping motor driving circuit with power supply protection function and stepping motor circuit system

    CN216904715U