Aging plate and aging device

Abstract

The present application provides an aging board that can suppress a decrease in the quality of an aging test even when the number of sockets is increased. To this end, the aging board is provided with: a substrate (40); sockets (70) mounted to the substrate (40); connectors (80) mounted to the substrate (40); wiring systems (50a1-50h 10 , 60a-60p) provided to the substrate (40) and connecting the plurality of sockets (70) and the connectors (80); and a compensation circuit (90) connected to the wiring systems (50a1-50h 10 , 60a-60p) and compensating for the frequency characteristics of signals transmitted in the wiring systems (50a1-50h 10 , 60a-60p).

Description

TECHNICAL FIELD

[0001] The present application relates to a burn-in board for a burn-in test of a device under test (DUT) such as a semiconductor integrated circuit element, and a burn-in apparatus provided with the burn-in board. BACKGROUND

[0002] A burn-in apparatus is known which is provided with a burn-in board provided with a plurality of sockets capable of mounting a DUT, a burn-in chamber which houses the burn-in board and applies a heat stress to the DUT, and a burn-in controller which inputs and outputs a signal to the DUT via the burn-in board (for example, see Patent Literature 1). The burn-in board is provided with a socket capable of mounting a DUT, and a wiring board on which the socket is mounted, and a plurality of sockets are arranged on the upper surface of the wiring board. Also, in the burn-in apparatus, the burn-in board is electrically connected to the burn-in controller by fitting a connector of the burn-in board into a connector of the burn-in chamber.

[0003] PRIOR ART LITERATURE

[0004] PATENT LITERATURE

[0005] Patent Literature 1: Japanese Patent Application Laid-Open No. 2014-025829 SUMMARY

[0006] PROBLEMS TO BE SOLVED BY THE INVENTION

[0007] The above-mentioned socket is connected to a driver possessed by the burn-in controller via a connector, and a signal of the driver is inputted and outputted to the DUT through a wiring system of the wiring board. Since the number of the drivers is limited, and a plurality of sockets are connected to the same driver via the wiring system, the number of the sockets is larger than that of the drivers. Since the connector of the burn-in board is provided at one end of the wiring board, the wiring length of the wiring system of the connection between the socket and the connector varies depending on the position of the socket on the wiring board. Depending on the kind of the signal inputted and outputted to the DUT from the burn-in controller, there is a case where the difference in the length of the wiring between the sockets affects the quality of the burn-in test.

[0008] Therefore, in a case where the number of the sockets on the burn-in board is increased, since the wiring length of the wiring system is lengthened, there is a problem that the rise time and / or the fall time of the signal is sometimes delayed, and the quality of the burn-in test is deteriorated.

[0009] The present application aims to provide a burn-in board and a burn-in apparatus which can suppress the deterioration of the quality of the burn-in test even in a case where the number of the sockets is increased.

[0010] MEANS FOR SOLVING THE PROBLEMS

[0011] [1] The aging board according to the present invention includes a substrate, sockets mounted to the substrate, a connector mounted to the substrate, a wiring system provided to the substrate to connect the plurality of sockets and the connector, and a compensation circuit connected to the wiring system to compensate for a frequency characteristic of a signal transmitted in the wiring system.

[0012] [2] In the above invention, the compensation circuit can include a filter that makes an amplitude of a low frequency side of the signal smaller than an amplitude of a high frequency side.

[0013] [3] In the above invention, the wiring system can have a plurality of wirings having different wiring lengths, and the compensation circuit can be connected to a wiring having a longer wiring length among the plurality of wirings.

[0014] [4] In the above invention, an external capacitor can be connected to the wiring system.

[0015] [5] In the above invention, an external capacitor can be connected to the wiring system, and can include a first capacitor and a second capacitor, the wiring system connecting between the plurality of sockets and the connector, the plurality of wirings having different wiring lengths, the first capacitor having a larger electrostatic capacitance than the second capacitor, the first capacitor being connected to a wiring having a shorter wiring length among the plurality of wirings, and the second capacitor being connected to a wiring having a longer wiring length among the plurality of wirings.

[0016] [6] In the above invention, the signal can be a test signal for a DUT electrically connected to the sockets, and the frequency characteristic can be set according to a rise time or a fall time required for the test signal.

[0017] [7] The aging device according to the present invention includes the above aging board.

[0018] Effects of the Invention

[0019] According to the present invention, a substrate, sockets mounted to the substrate, a connector mounted to the substrate, a wiring system provided to the substrate to connect the plurality of sockets and the connector, and a compensation circuit connected to the wiring system to compensate for a frequency characteristic of a signal transmitted in the wiring system are provided. Thus, in the present invention, even if the number of sockets on the aging board increases, a decrease in test quality of an aging test can be suppressed. BRIEF DESCRIPTION OF DRAWINGS

[0020] Figure 1is a front view showing an aging device in the first embodiment of the present application.

[0021] Figure 2 is a block diagram showing a system configuration of the aging device in the first embodiment of the present application.

[0022] Figure 3 is a plan view showing a wiring system of an aging board in the first embodiment of the present application.

[0023] Figure 4 is a view for explaining a wiring circuit of the aging board in the first embodiment of the present application.

[0024] Figure 5 is a graph for explaining a signal characteristic in the wiring circuit of Figure 4 .

[0025] Figure 6 is a graph for explaining a rise time of a signal flowing in the wiring circuit of Figure 4 .

[0026] Figure 7 is a view for explaining a wiring circuit of an aging board in the second embodiment of the present application.

[0027] Figure 8 is a graph for explaining a rise time of a signal flowing in the wiring circuit of Figure 7 . DETAILED DESCRIPTION

[0028] FIRST EMBODIMENT

[0029] Hereinafter, an embodiment of the present application will be described based on the drawings.

[0030] First, the overall configuration of the aging device 1 in the present embodiment will be described with reference to Figure 1 and Figure 2 . Figure 1 is a front view of the aging device in the present embodiment, Figure 2 is a block diagram showing a system configuration of the aging device in the present embodiment.

[0031] The aging device 1 in the present embodiment is a device for picking up initial defects of a DUT such as an IC chip, and implements an aging test which is one kind of screening test aimed at removal of initial defective products. As shown in Figure 1 and Figure 2 , the aging device 1 is provided with: an aging chamber 11 which can accommodate an aging board 20; a test power supply 12 which applies a power supply voltage to a DUT 100 (refer to Figure 2 ) mounted on the aging board 20; and an aging controller 13 which inputs and outputs a signal to the DUT 100.

[0032] The aging device 1 performs screening of the DUT 100 by applying a power supply voltage and inputting and outputting signals to the DUT 100 installed on the aging board 20 housed in the aging chamber 11 in a state where thermal stress (for example, -55°C to about +125°C) is applied to the DUT 100. The DUT 100 in the present embodiment is a storage-type device. In addition, the DUT 100 as a test object is not particularly limited, and for example, can be a logic-type device and a SoC (System on a Chip).

[0033] As shown in Figure 1 , the aging chamber 11 has a thermostat room 111 partitioned by an adiabatic wall or the like, and a door 112 capable of opening and closing the thermostat room 111. In the thermostat room 111, a plurality of slots 113 for holding the aging board 20 are provided. Each slot 113 has a pair of rails 114 that support both ends of the aging board 20. The aging board 20 is carried into the thermostat room 111 via the door 112 while sliding on the rails 114. In the thermostat room 111, 24 layers of slots 111 are provided in two rows, and a total of 48 aging boards 20 can be housed.

[0034] In addition, in the drawing, one door (the door on the right in the drawing) is not illustrated, and the thermostat room 111 is illustrated in an open state. In contrast, the other door 112 (the door on the left in the drawing) is illustrated in a closed state, and in conjunction therewith, the 24 layers of slots 113 on the left in the drawing are not illustrated. Furthermore, the number of slots 113, the arrangement (i.e., the number of housed aging boards 20, the positional relationship in the thermostat room 111) are not limited to the example shown in Figure 1 , and can be arbitrarily set in consideration of test efficiency and the like.

[0035] A connector 115 (refer to Figure 2 ) is provided on the inner side of each slot 113. The connector 80 of the aging board 20 inserted into the slot 113 can be fitted with the connector 115.

[0036] As shown in Figure 2 , the connector 115 is electrically connected to the DUT power supply 12 and the aging controller 13. In addition, in Figure 2 , only one aging board 20 is illustrated, but in fact, the other aging boards 20 are also connected to the DUT power supply 12 and the aging controller 13 in the same manner.

[0037] Furthermore, as shown in Figure 1As shown, the aging chamber 11 is provided with an evaporator 116, a heater 117, and a fan 118. The air in the constant-temperature chamber 111 is cooled by the evaporator 116 or heated by the heater 117 while being circulated by the fan 118, whereby the temperature adjustment in the constant-temperature chamber 111 is performed. The operation of such evaporator 116, heater 117, and fan 118 is controlled by the aging controller 13.

[0038] The DUT power supply 12 is connected in such a manner as to apply a power voltage to each DUT 100 on the aging board 20 via the above-mentioned connectors 115, 60, and is controlled by the aging controller 13.

[0039] The aging controller 13 is capable of judging a DUT in which an abnormal reaction occurs in the aging test as a defective product, storing the serial number of the DUT (for example, corresponding to the number of the socket 113 and the position on the aging board 20), and feeding back the test result, in addition to the control of the voltage application to the DUT 100, the input and output of the signal to the DUT 100, and the control of the temperature adjustment in the constant-temperature chamber 111.

[0040] Next, the aging board 20 in the present embodiment will be described with reference to Figure 3 to Fig. 6. Figure 3 is a plan view schematically showing the wiring system of the aging board in the present embodiment.

[0041] As shown in Fig. 6, the aging board 20 in the present embodiment is provided with a wiring board 30, a plurality of (320 in the present example) sockets 70 mounted to the wiring board 30, and a connector 80 mounted to the wiring board 30. Figure 3

[0042] The sockets 70 (Al to P 20 ) are capable of respectively mounting the DUTs 100. Hereinafter, the sockets 70 (Al to P 20 ) are also collectively referred to as the sockets 70, and the individual sockets 70 are also referred to as the socket 70Al, the socket 70A2. Further, the connector 80 is mounted to one end portion (the upper edge portion in the present example) 41 of the substrate 40 of the wiring board 30, and is capable of being fitted to the connector 115 provided to the aging chamber 11 as described above. Also, by fitting the connector 80 to the aging chamber 11, the sockets 70 are electrically connected to the driver possessed by the aging controller via the connector 80. In addition, the aging board 20 can be provided with a reinforcing frame for reinforcing the wiring board 30, and a bottom cover for protecting the back surface of the wiring board. Figure 3

[0043] ​​Each socket 70 has multiple (16 in this example) contact pins that contact the terminals of the DUT100. During aging tests, when the DUT100 is installed in the socket 70, the contact pins contact the terminals of the DUT100, thereby electrically connecting the DUT100 to the socket 70. Sockets 70A1 to 70P 20 They all have the same structure.

[0044] And, as Figure 3 As shown, multiple sockets 70A1 to 70P 20 The wiring board 30 is arranged in a matrix on the substrate 40.

[0045] More specifically, in this embodiment, there are 20 sockets 70A1 to 70A in the substrate 40. 20 Along one direction ( Figure 3 Arranged in a row along the Y-axis direction, these sockets 70A1 to 70A 20 This forms a socket array.

[0046] Similarly, 20 sockets 70B1 to 70B are arranged in one direction. 20 Arranged in a row, these sockets 70B1 to 70B 20 This forms a socket row. Furthermore, for the remaining sockets 70C1 to 70P... 20 Similarly, the sockets 70, arranged in units of 20, are lined up in the same direction.

[0047] Furthermore, the number of sockets 70 mounted on the substrate 40 is not particularly limited to the above description. Additionally, the arrangement of the sockets 70 on the substrate 40 is not particularly limited to the above description.

[0048] In this embodiment, the wiring board 30 is equipped with the aforementioned multiple sockets 70A1 to 70P. 20 Printed circuit boards. For example... Figure 3 As shown, the wiring board 30 includes an electrically insulating substrate 40 and a wiring system 50. In this embodiment, the wiring board 30 is a multilayer wiring board, and each wiring system is composed of wiring patterns formed on the substrate 40 and conductive paths such as vias.

[0049] In this embodiment, the first wiring system 50a1~50h 10The connection form of the first wiring system 50a1 is different from the connection form of the second wiring system 60a to 60p. Here, the connection form refers to the form of electrical connection between the connector 80 and the plurality of sockets 70 in the wiring board 30, and is represented by a connection path (a positional relationship of wiring and branching points) formed by combining the wiring and the branching points that connect the connector 80 and the plurality of sockets 70. Also, the connection form can be classified according to the presence or absence of the branching points and the positions of the branching points. In the present embodiment, the first wiring systems 50a1 to 50h 10 In contrast, the second wiring systems 60a to 60p have a connection form that does not have branching points. In addition, the number of types of connection forms of the wiring system possessed by the wiring board 30 is not particularly limited, and the wiring board can have three or more types of connection forms of the wiring system.

[0050] The first wiring systems 50a1 to 50h 10 have substantially the same structure, and thus the structure of the first wiring system 50a1 will be described below as representative, and the description of the structures of the other first wiring systems 50a2 to 50h will be omitted. Similarly, since the second wiring systems 60a to 60p have substantially the same structure, the structure of the second wiring system 60a will be described below as representative, and the description of the structures of the other second wiring systems 60b to 60p will be omitted. 10 have substantially the same structure, and thus the structure of the first wiring system 50a1 will be described below as representative, and the description of the structures of the other first wiring systems 50a2 to 50h will be omitted. Similarly, since the second wiring systems 60a to 60p have substantially the same structure, the structure of the second wiring system 60a will be described below as representative, and the description of the structures of the other second wiring systems 60b to 60p will be omitted.

[0051] The first wiring system 50a1 has a connection form in which the wiring is branched between the connector 80 and the socket 70A1 and connected to the socket 70B1. That is, in the first wiring system 50a1, the wiring is branched into two between the connector 80 and the sockets 70A1 and 70B1. Also, in the first wiring system 50a1, the socket 70A1 and the socket 70A2 arranged along the Y-axis direction from the socket 70A1 are connected in a daisy chain by the wiring. Similarly, in the first wiring system 50a1, the socket 70B1 and the socket 70B2 arranged along the Y-axis direction from the socket 70B1 are connected in a daisy chain by the wiring.

[0052] In the present embodiment, the length of the wiring between the branching point of the first wiring system 50a1 and the socket 70A1 and the length of the wiring 53 between the branching point and the socket 70B1 are substantially the same. Therefore, the transmission time of the signal of the socket 70A1 and the transmission time of the signal of the socket 70B1 are substantially the same.

[0053] Further, the length of the wiring between the socket 70A1 and the socket 70A2 and the length of the wiring between the socket 70B1 and the socket 70B2 are substantially the same. Therefore, the total length of the wiring between the branching point of the first wiring system 50al and the socket 70A2 and the wiring connecting the socket 70A1 and the socket 70A2 in a daisy chain, and the total length of the wiring between the branching point of the first wiring system 50al and the socket 70B2 and the wiring connecting the socket 70B1 and the socket 70B2 in a daisy chain are substantially the same. Therefore, the transmission time of the signal of the socket 70A2 and the transmission time of the signal of the socket 70B2 are substantially the same.

[0054] The first wiring system 50a2 also has the same wiring system as the above-described first wiring system 50al, and as shown in FIG. 6, connects the connector 80 with four sockets 70A3, 70A4, 70B3, and 70B4. Figure 3 The first wiring system 50a2 also has the same wiring system as the above-described first wiring system 50al, and as shown in FIG. 6, connects the connector 80 with four sockets 70A3, 70A4, 70B3, and 70B4.

[0055] Although not particularly shown, the first wiring systems 50a3 to 50a9 also have the same wiring system as the above-described first wiring system 50al, the first wiring system 50a3 connects the connector 80 with four sockets 70A5, 70A6, 70B5, and 70B6, the first wiring system 50a4 connects the connector 80 with four sockets 70A7, 70A8, 70B7, and 70B8, the first wiring system 50a5 connects the connector 80 with four sockets 70A9, 70A10, 70B9, and 70B10, the first wiring system 50a6 connects the connector 80 with four sockets 70Al l, 70A12, 70Bl l, and 70B12, the first wiring system 50a7 connects the connector 80 with four sockets 70Al3, 70A14, 70Bl3, and 70B14, the first wiring system 50a8 connects the connector 80 with four sockets 70Al5, 70A16, 70Bl5, and 70B16, and the first wiring system 50a9 connects the connector 80 with four sockets 70Al7, 70A18, 70Bl7, and 70B18. 10 , 70B 10 , 70B 11 , 70B 12 , 70B 11 , 70B 12 , 70B 13 , 70B 14 , 70B 13 , 70B 14 , 70B 15 , 70B 16 , 70B 15 , 70B 16 , 70B 17 , 70B 18 , 70B 17 , 70B 18 .

[0056] The first wiring system 50a 10 also has the same wiring system as the above-described first wiring system 50al, and as shown in FIG. 6, connects the connector 80 with four sockets 70A3, 70A4, 70B3, and 70B4.Figure 3 As shown, connector 80 is connected to four sockets 70A. 19 70A 20 70B 19 70B 20 connect.

[0057] That is, for the two socket rows 75A and 75B, there are 10 first connection configurations 50a1 to 50a that connect four grounds of each socket 70 to the connector 80. 10 Similarly, in the other socket rows 75C to 75P, every two socket rows are provided with 10 first connection configurations 50b1 to 50h. 10 As a result, the aging board 20 of this embodiment is suitable for 320 sockets 70A1 to 70P. 20 It has 80 first connection modes 50a1 to 50h 10 .

[0058] In contrast, the second cabling system 60a has the following connection configuration: it does not have a connection between connector 80 and sockets 70A1 to 70A. 20 The portion where the wiring branches out between. In this second wiring system 60a, 20 sockets 70A1 to 70A are arranged in a row along the first direction to form a socket row 75A. 20 Connecting lines 62a1 to 62a 19 Connected in a chrysanthemum-like chain.

[0059] The second cabling system 60b also has the same cabling system as the second cabling system 60a described above, which includes 20 sockets 70B1 to 70B that constitute the socket row 75B. 20 Connected in a chrysanthemum-like chain.

[0060] Similarly, the second cabling systems 60c to 60p also have the same cabling system as the second cabling system 60a described above, and each of the second cabling systems 60c to 60p will respectively form 20 sockets 70 in the socket rows 75C to 75P connected in a daisy chain.

[0061] In the substrate 40 of the wiring board 30, the connector 80 is mounted at one end 41 of the substrate 40, and the sockets 70 are arranged along the Y direction. Therefore, in a row of sockets, the socket 70A1 is located closest to the connector 70. 20 It is positioned at the furthest point from connector 70. Therefore, from the first wiring system 50a 10 The branch point to connector 80 wiring 51a 10 The wiring length is longer than the wiring length of wiring 51a1 from the branch point of the first wiring system 50a1 to the connector 80.

[0062] Here, the relationship between the wiring length and the rise and fall times of the test signal input / output from the aging controller 13 to the DUT 100 will be explained. Furthermore, since the rise and fall of the test signal are symmetrical, the rise of the test signal will be explained in the following description; however, the relationship between the wiring length and the rise of the test signal is the same as the relationship between the wiring length and the fall of the test signal, so this explanation will be omitted.

[0063] In the testing of DUT100, various test signals are used depending on the type of test. For example, when performing a clock test on DUT100, the test signals for DUT100 include input signals input to DUT100. On the other hand, for example, when performing a memory test on DUT100, the test signals for DUT100 include both input signals input to DUT100 and output signals output from DUT100. As specific examples of such test signals, signals that include signals for writing data to DUT100 and signals for reading data from DUT100 can be illustrated.

[0064] Clock testing signals consist only of input signals, thus requiring lower test speeds and allowing for longer rise times. Conversely, memory testing signals include both input signals for reading and output signals for writing, necessitating higher test speeds and requiring signals with shorter rise times. Therefore, when using memory testing signals to test the DUT100, input and output signals with both short rise and fall times are required.

[0065] The rise time of the test signal of DUT100 is affected by the length of the wiring connecting connector 80 and socket 70. Because the wiring 51a1 included in the first wiring system 50a1 connecting connector 80 and sockets 70A1, A2, B1, B2 is relatively short, the signal attenuation flowing through the first wiring system 50a1 is small. On the other hand, because the wiring 51a1 of the first wiring system 50a1 connecting connector 80 and sockets 70A1, A2, B1, B2 is relatively short, the signal attenuation through the first wiring system 50a1 is small. 19 A 20 B 19 B 20 The first cabling system 50a connecting the two 10 The included wiring 51a 10 The wiring length is relatively long, therefore the signal attenuation through the first wiring system 50a1 is significant. 10 The rise time of the test signal is longer than the rise time of the test signal flowing through the first wiring system 50a1. That is, as Figure 4As shown, when a socket 70 is configured on the wiring board 30, a DUT100 connected to a socket 70 that is closer to the connector 80 can input and output test signals that meet the rise time requirements. On the other hand, a DUT100 connected to a socket 70 that is farther from the connector 80 may not be able to input and output test signals that meet the rise time requirements.

[0066] In this embodiment, in a wiring system with a long wiring length, a compensation circuit 90 is provided in order to shorten the rise time of the test signal. Figure 4 It is a 70A socket. 20 Wiring circuit between connector 80 and connector 80. For example... Figure 5 As shown, the compensation circuit 90 connects the connector 80 to the socket A. 20 50a wiring system connecting between 10 Connection. Compensation circuit 90 is for the first wiring system 50a. 10 A circuit for compensating the frequency characteristics of the transmitted test signal. The compensation circuit 90 has a parallel circuit of capacitor 91 and resistor 92, which is an RC filter. The compensation circuit 90 is connected to multiple first wiring systems 50a1 to 50a. 10 The included wiring 51a1~51a 10 Medium-length wiring 51a1~51a 10 Connection, at least with wiring a 10 Connection. Additionally, wiring 51a. 10 The compensation circuit 90 is not limited to the compensation circuit 90; for example, a terminating resistor used to achieve impedance matching between the input and output sides of the DUT 100 may also be connected. Furthermore, the compensation circuit 90 is not limited to the first wiring systems 50a1 to 50a. 10 It can also be connected with the first connection mode 50b1~50h 10 It can also be connected to the second connection form 60a-60p.

[0067] Figure 5 This is a graph showing the frequency characteristics of the compensation circuit 90, with the horizontal axis representing frequency and the vertical axis representing gain. For example... Figure 6 As shown, the compensation circuit 90 functions as a high-pass filter. The compensation circuit 90 operates when the frequency of the test signal is higher than the high-side threshold frequency (f). b In the case of a signal with a frequency lower than the low-side threshold frequency (f), the signal is transmitted by multiplying it by the maximum gain Kb. The compensation circuit 90 operates when the frequency of the test signal is lower than the low-side threshold frequency (f). а In the case of ), the signal is transmitted by multiplying by the minimum gain Ka. When the frequency of the test signal is at the high-side threshold frequency (f... b The frequency of the lower side threshold (f) is below ) and the frequency of the lower side threshold (f) а) In the above range, the compensation circuit 90 outputs a signal with a gain between Kaand Kb, multiplied by a gain that is higher for a higher frequency. That is, the compensation circuit 90 makes the amplitude of the test signal on the low frequency side smaller than the amplitude on the high frequency side. Also, the threshold frequency (f а b ) and the gains Kaand Kb are set according to the rise time required for the test signal. For example, to further shorten the rise time, the threshold frequency (f а b ) can be set to a lower value. That is, the frequency characteristic of the test signal compensated by the compensation circuit 90 is set according to the rise time or fall time required for the test signal.

[0068] Figure 6 The voltage characteristic of the signal after compensation by the compensation circuit 90, and the voltage characteristic of the signal not compensated by the compensation circuit 90 are shown. The vertical axis represents voltage, and the horizontal axis represents time. In Figure 6 , the graph A represents the characteristic of the signal A not compensated by the compensation circuit 90, and the graph B represents the characteristic of the signal B after compensation by the compensation circuit 90.

[0069] In a case where the maximum voltage at the rise of the signal is set to 100%, the rise time of the test signal is the time for the voltage to change from 20% to 80% at the rise. In Figure 6 , A(100%) represents the maximum voltage at the rise of the signal A, A(80%) represents a voltage of 80% relative to the maximum voltage at the rise of the signal A, and A(20%) represents a voltage of 20% relative to the maximum voltage at the rise of the signal A. Also, B(100%) represents the maximum voltage at the rise of the signal B, B(80%) represents a voltage of 80% relative to the maximum voltage at the rise of the signal B, and B(20%) represents a voltage of 20% relative to the maximum voltage at the rise of the signal B.

[0070] The rise time of the signal not compensated by the compensation circuit 90 is Ta, and the rise time of the signal not compensated by the compensation circuit 90 is Tb (< Ta). In the signal waveform at the rise of the test signal, the waveform of the first half of the rise is greatly influenced by the high frequency component of the signal, and the waveform of the second half of the rise is greatly influenced by the low frequency component of the signal. The compensation circuit 90 reduces the gain on the low frequency side and increases the gain on the high frequency side. Therefore, as Figure 7 ​​As shown, with respect to signal B, the voltage from the start of the rise of signal B until a certain time elapses is shifted with the same characteristic as signal A, but the maximum voltage of the rise of signal B is lower than the maximum voltage of signal A. That is, the compensation circuit 90 suppresses the maximum voltage at the time of the rise without changing the slope of the voltage at the time of the rise of the test signal, thereby shortening the apparent rise time. The compensation circuit 90 is thus connected to a wiring having a long wiring length, and can shorten the rise time of the test signal in a wiring system having a long wiring length.

[0071] As described above, the burn-in board 20 and the burn-in device 1 according to the present embodiment are provided with the sockets 70 and the connectors 80, and the first wiring systems 50a1 to 50h 10 and / or the second wiring systems 60a to 60p connecting the plurality of sockets 70 and the connectors 80, and are provided with the compensation circuit 90 connected to the first wiring systems 50a1 to 50h 10 and / or the second wiring systems 60a to 60p, which compensates for the frequency characteristic of the signal (test signal) transmitted in the wiring system. Thus, the rise time and / or the fall time of the signal can be shortened. Although the burn-in controller 13 makes the output timing of the signal coincide so that the test signal reaches all the DUTs 100 at the same timing as possible, if the operation rate is improved, there is a case where the calibration on the tester side is not effective, and the read timing of the signal can be shifted. In particular, the longer the wiring length of the wiring transmitting the signal, the longer the rise time and / or the fall time of the signal, which affects the test performance. In the present embodiment, the compensation circuit 90 is connected to the connection system having a long wiring length, and the rise time and / or the fall time can be shortened. As a result, even in the case where the number of sockets on the burn-in board increases, the reduction in the test quality of the burn-in test can be suppressed.

[0072] Further, in the present embodiment, the compensation circuit 90 has a filter that makes the amplitude of the low frequency side of the signal smaller than the amplitude of the high frequency side. Thus, the apparent rise time and / or the fall time of the signal can be shortened.

[0073] Further, in the present embodiment, the first wiring systems 50a1 to 50h 10 and / or the second wiring systems 60a to 60p have a plurality of wirings having different wiring lengths, and the compensation circuit 90 is connected to the wiring having a long wiring length among the plurality of wirings. Thus, the delay of the rise and / or the fall occurring in the wiring having a long wiring length can be shortened.

[0074] Further, in the present embodiment, the frequency characteristic compensated for by the compensation circuit is set in accordance with the rise time or the fall time required for the test signal. Thus, the rise time and / or the fall time of the signal can be shortened.

[0075] Second Embodiment

[0076] Figure 7 is a diagram for explaining the wiring circuit of the burn-in board in the present embodiment.

[0077] The burn-in board 20 in the present embodiment is provided with an external capacitor connected to the first wiring system 50a1 to 50h 10 and / or the second wiring system 60a to 60p. The structure is the same as the first embodiment except for the point that the external capacitor is provided. Hereinafter, only the different points from the first embodiment will be explained with respect to the burn-in board 20 in the second embodiment, and the same symbols will be attached to the portions having the same structure as the first embodiment and the explanation will be omitted.

[0078] Figure 7 (a) of FIG. 8 shows the wiring circuit of the first wiring system 50a1 connecting the connector 80 and the socket 70A1, Figure 7 (b) of FIG. 8 shows the wiring circuit of the first wiring system 50a 20 connecting the connector 80 and the socket 70A 10 . The first wiring system 50a1 has a wiring 51a1 connecting a branching point of the first wiring system 50a1 and the connector 80. The first capacitor 111 is further connected to the wiring 51a1. The wiring system a 10 has a wiring 51a 10 connecting a branching point of the first wiring system 50a 10 and the connector 80. The second capacitor 112 is further connected to the wiring 51a 10 . The electrostatic capacitance of the first capacitor 111 is larger than that of the second capacitor 112. The connection position of the second capacitor is not limited to the downstream side of the compensation circuit 90 shown in (b) of FIG. 8, but can be the upstream side of the compensation circuit 90. Figure 8

[0079] The socket 70A1 has a plurality of contact pins configured to correspond to the terminals of the DUT 100. The plurality of contact pins are densely arranged in order to cope with multichannelization. The other sockets 70A2 to 70P 20 also have contact pins.

[0080] Since the contact pins of the sockets 70A1 to 70P 20 are densely arranged, the adjacent distance between the pins is short. Further, the first wiring system 50a1 to 50h 10 ​The adjacent distances between the wirings in the second wiring system 60a-60p are also short depending on their position on the wiring board 30. Furthermore, if the adjacent distances between pins or wirings are short, crosstalk problems arise. In particular, crosstalk occurs with high-frequency signals. On the other hand, the shorter the rise time and / or fall time required for the test signal, the more high-frequency components the test signal contains. To suppress crosstalk, the high-frequency components of the test signal can be reduced, but the rise time and / or fall time becomes longer. That is, crosstalk and the rise / fall time of the test signal are inversely related. Furthermore, as in the first embodiment, the rise / fall time of the test signal is also affected by the length of the wiring.

[0081] In this embodiment, according to the wiring length, a first capacitor 111 is connected to wiring 51a1, and in wiring 51a... 10 Connect the second capacitor 112 so that the rise time and / or fall time of the test signal converge within the required time while suppressing crosstalk.

[0082] Figure 8 (a) shows the voltage characteristics of the signal transmitted in wiring 51a1, and (b) shows the voltage characteristics of the signal transmitted in wiring 51a1. 10 The voltage characteristics of the signal transmitted in the medium. Figure 8 The dotted lines in (a) and (b) represent the voltage characteristics of the signal when the first capacitor 111 and the second capacitor 112 are not connected. The solid line represents the voltage characteristics of the signal when the first capacitor 111 and the second capacitor 112 are connected.

[0083] In cases where crosstalk occurs due to the short rise time of the test signal and the presence of many high-frequency components, an external capacitor (equivalent to the first capacitor 111 and the second capacitor 112) is connected to wiring 51a1 and wiring 51a... 10 Connection. Due to the short length of wiring 51a1, signal attenuation is small, resulting in a short rise time (refer to...). Figure 8 (The curve of the dotted line of (a)). Therefore, the first capacitor 111 with a larger electrostatic capacitance is connected to wiring a1. Figure 8 As shown in the solid line graph of (a), the rise time (T1) is lengthened by the first capacitor 111. Because the rise time (T1) is lengthened, the high-frequency components of the test signal are suppressed, thus suppressing crosstalk.

[0084] Wiring 51a 10 The wiring length is relatively long, resulting in greater signal attenuation and a longer rise time (refer to...). Figure 8 (b) is a curve diagram of the dotted line. Therefore, the second capacitor 112 with smaller electrostatic capacitance is connected to wiring a. 10 Connection. For example... ​As shown in the solid line graph of (b), the rise time (T1) becomes longer due to the second capacitor 112. However, corresponding to the small amount of electrostatic capacitance, the adjustment range of the rise time caused by connecting the second capacitor 112 is shorter than that of the first capacitor 111. Since the rise time (T2) becomes longer, the high-frequency components of the test signal are suppressed, thus crosstalk can be suppressed.

[0085] As described above, in the aging board 20 and aging device 1 involved in this embodiment, the first wiring system 50a1, 50a 10 The first wiring system 50a1, 50a includes an external capacitor comprising a first capacitor 111 and a second capacitor 112. 10 Multiple sockets 70 A1 70 A20 The connector 80 is connected to multiple wires of different lengths. The first capacitor 111 is connected to the shorter wire 51a1, and the longer wire 51a1 is connected to the other wires. 10 Connect the second capacitor 112. Thus, in wiring with different lengths, it is possible to adjust the rise time and / or fall time of the test signal to the optimal length while suppressing crosstalk.

[0086] Furthermore, the external capacitors are not limited to the first wiring systems 50a1 and 50a. 10 It can also be used with other first cabling systems 50a2~50a9, 50b1~50h 10 The included wiring connections. In this case, it can also be that the shorter the wiring length, the larger the electrostatic capacitance of the capacitor.

[0087] Furthermore, the embodiments described above are provided for ease of understanding of the present invention and are not intended to limit the present invention. Therefore, the elements disclosed in the above embodiments are intended to include all design changes and equivalents that fall within the technical scope of the present invention.

[0088] For example, the structure of the aging device 1 described above is only one example and is not particularly limited to the above. For example, the aging device 1 described above uses a constant temperature chamber 111 to adjust the temperature of the DUT 100, but it is not particularly limited to this. For example, the aging device 1 may also adjust the temperature of the DUT 100 by contacting the temperature adjustment push rod with the DUT 100.

[0089] Symbol Explanation

[0090] 1…Aging device

[0091] 11…Aging Chamber

[0092] 12…DUT power supply

[0093] 12 … test power supply

[0094] 13 … aging controller

[0095] 20 … aging board

[0096] 30 … wiring board

[0097] 40 … substrate

[0098] 41 … end portion

[0099] 50a1-50h 10 … first wiring system

[0100] 50a1-50a 10 … wiring

[0101] 60a-60p … second wiring system

[0102] 70, 70A1-70P 20 … socket

[0103] 75A-75P … socket column

[0104] 80 … connector

[0105] 100 … DUT.

Claims

1. An aging board, comprising: substrate; A socket, which is mounted on the substrate; A connector, which is mounted on the substrate; A wiring system disposed on the substrate connects the plurality of the sockets to the connectors; as well as A compensation circuit, connected to the cabling system, compensates for the frequency characteristics of signals transmitted in the cabling system, thereby shortening the rise time and / or fall time of the signals. The cabling system has at least two or more cablings of different lengths. The compensation circuit is connected to the longest wire among the plurality of wires, but not to the shortest wire.

2. The aging board according to claim 1, wherein, The compensation circuit includes a filter that makes the amplitude of the low-frequency side of the signal smaller than the amplitude of the high-frequency side.

3. The aging board according to claim 1, wherein, The aging board has an external capacitor connected to the wiring system.

4. The aging board according to claim 1, wherein, The aging board includes an external capacitor connected to the wiring system, and comprises a first capacitor and a second capacitor. The electrostatic capacitance of the first capacitor is greater than that of the second capacitor. The first capacitor is connected to the shortest wire among the plurality of wires. The second capacitor is connected to the longest of the plurality of wires.

5. The aging board according to any one of claims 1 to 4, wherein, The signal is a test signal for the DUT that is electrically connected to the socket. The frequency characteristics are set according to the rise time or fall time required by the test signal.

6. An aging device comprising an aging plate according to any one of claims 1 to 4.

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