A high impedance semiconductor resistor structure and manufacturing method thereof

Abstract

The present invention discloses a high-impedance semiconductor resistor structure and a manufacturing method thereof, comprising a GaAs device epitaxial layer and a GaAs-based PN structure arranged on the GaAs device epitaxial layer, wherein the GaAs-based PN structure comprises an N-type layer, a first P-type layer, an etching stop layer and a second P-type layer from bottom to top, two metal electrodes are arranged on the second P-type layer, and the part of the second P-type layer located between the two metal electrodes is concave to form a groove. The present invention solves the application limitation problem of low impedance of traditional GaAs-based epitaxial resistors, obtains a semiconductor resistor with high epitaxial resistance and low contact resistance, broadens the application of the product in high impedance characteristics, and increases the utilization rate of the PN structure of the GaAs device epitaxial layer.

Description

Technical Field

[0001] The invention belongs to the field of semiconductor technology, and in particular relates to a high-impedance semiconductor resistor structure and a manufacturing method thereof. Background Art

[0002] With the demand for miniaturization and integration of semiconductor devices, the integrated circuit industry that forms multiple semiconductor functional components in a small area of ​​semiconductor chips has experienced rapid development. Various types of passive circuit components, such as resistors, can be manufactured on semiconductor wafers. At present, semiconductor products generally use ER (EPI Resistor), RER (Recessed EPIResistor), TFR (Thin Film Resistor), etc. as resistors. For example, a part of the epitaxial region in the production of isolated GaAs-based pHEMT devices can be used to form resistors. However, the use of pHEMT epitaxial structure as a semiconductor resistor has a low resistance value. For example, the semiconductor resistor formed by GaAs-based pHEMT EPI has a resistance value of only about 200Ω / sq, which limits the application of some products in high impedance characteristics. Summary of the invention

[0003] The present invention aims at the deficiencies in the prior art and provides a high-impedance semiconductor resistor structure and a manufacturing method thereof.

[0004] In order to achieve the above purpose, the technical solution of the present invention is:

[0005] A high-impedance semiconductor resistor structure comprises a GaAs device epitaxial layer and a GaAs-based PN structure arranged on the GaAs device epitaxial layer, wherein the GaAs-based PN structure comprises, from bottom to top, an N-type layer, a first P-type layer, an etching stop layer and a second P-type layer, two metal electrodes are arranged on the second P-type layer, and a portion of the second P-type layer located between the two metal electrodes is concave to form a groove.

[0006] Optionally, the etching stop layer is exposed at the bottom of the groove.

[0007] Optionally, the etching stop layer at the bottom of the groove is removed, and the first P-type layer is exposed at the bottom of the groove.

[0008] Optionally, the material of the etching stop layer is InGaAs, AlAs or InGaP, and the thickness is 3-7 nm.

[0009] Optionally, the thickness of the first P-type layer is 5-15 nm, and the thickness of the second P-type layer is 30-80 nm.

[0010] Optionally, the N-type layer includes, from bottom to top, a first n+InGaP layer, an n+GaAs layer, a second n+InGaP layer and an n-GaAs layer, wherein the thickness of the first n+InGaP layer is 5 to 15 nm, the thickness of the n+GaAs layer is 300 to 500 nm, the thickness of the second n+InGaP layer is 3 to 7 nm, and the thickness of the n-GaAs layer is 50 to 150 nm.

[0011] Optionally, the epitaxial layer of the GaAs device includes, from bottom to top, a channel layer, a barrier layer, a blocking layer and a cap layer arranged on the substrate, and the GaAs-based PN structure is arranged on the cap layer.

[0012] A method for manufacturing the above-mentioned high-impedance semiconductor resistor structure comprises the following steps:

[0013] 1) forming a GaAs-based PN epitaxial layer on the GaAs device epitaxial layer, wherein the GaAs-based PN epitaxial layer includes, from bottom to top, an N-type layer, a first P-type layer, an etching stop layer, and a second P-type layer, and forming two metal electrodes on the second P-type layer in a preset resistor region;

[0014] 2) coating a photoresist on the structure formed in step 1), and obtaining a display window between two metal electrodes after exposure and development;

[0015] 3) etching and removing the second P-type layer within the display window, and stripping off the photoresist;

[0016] 4) Etching and removing the GaAs-based PN epitaxial layer outside the preset resistor region to obtain a resistor based on a GaAs-based PN structure.

[0017] Optionally, in step 3), after etching away the second P-type layer within the open window, the step further includes etching away the etching stop layer within the open window, and then stripping off the photoresist.

[0018] Optionally, in step 1), the material of the metal electrode is a Pt / Ti / Pt / Au stack, which forms an ohmic contact with the second P-type layer.

[0019] The beneficial effects of the present invention are:

[0020] It solves the application limitation problem of low impedance of traditional GaAs-based epitaxial resistors, obtains semiconductor resistors with high epitaxial resistance and low contact resistance, broadens the application of products in high impedance characteristics, and increases the utilization rate of the PN structure of the epitaxial layer of GaAs devices. BRIEF DESCRIPTION OF THE DRAWINGS

[0021] Figure 1 It is a schematic diagram of the structure of a high-impedance semiconductor resistor of Example 1;

[0022] Figure 2 It is a process flow chart of the manufacturing method of the high impedance semiconductor resistor structure of Example 1, and the structure obtained by each step is shown in the figure;

[0023] Figure 3 It is a schematic diagram of the structure of a high-impedance semiconductor resistor of Example 2;

[0024] Figure 4 Schematic diagram of the semiconductor resistor structure of Comparative Example 1;

[0025] Figure 5 This is a schematic diagram of the semiconductor resistor structure of Comparative Example 2. DETAILED DESCRIPTION

[0026] The present invention is further explained below in conjunction with the accompanying drawings and specific embodiments. The various drawings of the present invention are only for illustration to make it easier to understand the present invention, and the specific proportions can be adjusted according to design requirements. The upper and lower relationships of the relative elements and the definitions of the front / back in the figures described in the text should be understood by those skilled in the art to refer to the relative positions of the components, so they can all be flipped to present the same components, which should all fall within the scope disclosed in this specification.

[0027] Example 1

[0028] refer to Figure 1 A high impedance semiconductor resistor structure 100 of embodiment 1 includes a GaAs device epitaxial layer 1 and a GaAs-based PN structure 2 arranged on the GaAs device epitaxial layer 1. The GaAs-based PN structure 2 includes an N-type layer 21, a first P-type layer 22, an etching stop layer 23 and a second P-type layer 24 from bottom to top. Two metal electrodes 3 are provided on the second P-type layer 24, and the part of the second P-type layer 24 located between the two metal electrodes 3 is concave to form a groove a.

[0029] Among them, the GaAs device epitaxial layer 1 is the pHEMT device epitaxial layer, which includes, from bottom to top, conventional functional layer structures such as buffer layer, nucleation layer, channel layer, etc., which are replaced by ellipsis and arranged on the substrate 11, a barrier layer 12 formed of AlGaAs material, a blocking layer 13 formed of InGaP material, and a cap layer 14, wherein the cap layer 14 is composed of an i-GaAs cap layer 141 and an n+GaAs cap layer 142, and a GaAs-based PN structure 2 is arranged on the n+GaAs cap layer 142. Among them, the thickness range of the barrier layer 12 is 7.5-10nm, the thickness range of the blocking layer 13 is 26-36nm, the thickness range of the i-GaAs cap layer 141 is 25-35nm, and the thickness range of the n+GaAs cap layer 142 is 40-50nm.

[0030] The N-type layer 21 includes, from bottom to top, a first n+InGaP layer 211, an n+GaAs layer 212, a second n+InGaP layer 213 and an n-GaAs layer 214, wherein the first n+InGaP layer 211 and the second n+InGaP layer 213 serve as etching stop layers. The thickness of the first n+InGaP layer 211 is 5 to 15 nm, for example, 10 nm; the thickness of the n+GaAs layer 212 is 300 to 500 nm, for example, 400 nm; the thickness of the second n+InGaP layer 213 is 3 to 7 nm, for example, 5 nm; the thickness of the n-GaAs layer 214 is 50 to 150 nm, for example, 100 nm.

[0031] The first P-type layer 22 and the second P-type layer 24 are p+GaAs layers with the same doping, wherein the thickness of the first P-type layer 22 is 5-15 nm, for example, 10 nm; the thickness of the second P-type layer 24 is 30-80 nm, for example, 50 nm. The material of the etching stop layer 23 is P-type or undoped In x Ga 1-x As, AlAs or InGaP, with a thickness of 3 to 7 nm, for example, 5 nm. The formation of groove a is to etch away the second P-type layer 24 in the area so that the bottom of groove a exposes the etching stop layer 23. Specifically, the distance between the two metal electrodes 3 is 5 um, then the groove a is located between the two metal electrodes 3 and has a width of 4 to 5 um. Thus, the thickness of the P-type layer below the two metal electrodes 3 is the sum of the thickness of the first P-type layer and the second P-type layer, resulting in a smaller contact resistance; and the thickness of the P-type layer in the area between the two metal electrodes 3 is the thickness of the first P-type layer, resulting in a larger epitaxial resistance, thereby obtaining a high-impedance, high-performance resistor structure.

[0032] refer to Figure 2 The method for manufacturing the high impedance semiconductor resistor structure comprises the following steps:

[0033] Step 1: Form a GaAs-based PN epitaxial layer 2' on the GaAs device epitaxial layer 1, and make two metal electrodes 3 on the second P-type layer 24 in the preset resistor area; the material of the two metal electrodes 3 is a Pt / Ti / Pt / Au stack, and form an ohmic contact with the second P-type layer 24;

[0034] Step 2: coating a photoresist R, exposing and developing to obtain a display window R1 located between two metal electrodes 3;

[0035] Step 3: Etching away the second P-type layer within the display window R1, stopping the etching to the etching stop layer 23, and stripping the photoresist to obtain a groove a;

[0036] Step 4: Etching and removing the GaAs-based PN epitaxial layer outside the preset resistor region, etching from top to bottom until the second n+InGaP layer 213 outside the preset resistor region is removed and stopped;

[0037] Step 5: Continue etching to remove the GaAs-based PN epitaxial layer outside the preset resistor area, and stop etching until the first n+InGaP layer 211 is removed to obtain a resistor based on the GaAs-based PN structure 2. This is divided into two etching steps, step 4 and step 5, in order to obtain a PIN diode and a HEMT device that can be made later.

[0038] The resistance value of the resistor based on the GaAs-based PN structure obtained in this embodiment is greater than 1200Ω / sq.

[0039] Example 2

[0040] refer to Figure 3 The difference between the high impedance semiconductor resistor structure 200 of Example 2 and Example 1 is that in step 3) of Example 1, after etching away the second P-type layer within the open window, the step of etching away the etching stop layer within the open window is also included to obtain a groove b, and the bottom surface of the groove b exposes the first P-type layer 22.

[0041] The resistance value of the resistor 200 based on the GaAs-based PN structure obtained in this embodiment is greater than 1200Ω / sq.

[0042] Comparative Example 1

[0043] refer to Figure 4 The difference between the semiconductor resistor based on GaAs-based PN structure of comparative example 1 and embodiment 1 is that its structure includes an N-type layer 21 and a P-type layer 4, the thickness of the P-type layer 4 is 10nm, and two metal electrodes 3 are arranged on the P-type layer 4 without grooves.

[0044] The obtained resistor has a large contact resistance due to the small thickness of the P-type layer 4 under the metal electrode 3, and the metal Pt at the bottom of the metal electrode 3 will penetrate into the N-type layer, which increases the current between the two metal electrodes 3. The final resistor has a resistance of only 40 to 50Ω / sq.

[0045] Comparative Example 2

[0046] refer to Figure 5 The difference between the semiconductor resistor based on GaAs-based PN structure of comparative example 2 and embodiment 1 is that its structure includes an N-type layer 21 and a P-type layer 5, the thickness of the P-type layer 5 is 60nm, and two metal electrodes 3 are arranged on the P-type layer 5 without grooves.

[0047] The obtained resistor has a resistance value not exceeding 100Ω / sq because the thickness of the P-type layer is large and the epitaxial resistance is small.

[0048] In addition, for the embodiments of the present invention, according to actual needs, the GaAs-based PN epitaxial layer outside the preset resistor area can be etched away to obtain a semiconductor resistor based on a GaAs-based PN structure, and after device isolation, other known resistor structures, such as ER resistors, TFR resistors, etc., can be continued to be manufactured on the GaAs device epitaxial layer 1.

[0049] The above embodiments are only used to further illustrate a high-impedance semiconductor resistor structure and a manufacturing method thereof of the present invention, but the present invention is not limited to the embodiments. Any simple modifications, equivalent changes and modifications made to the above embodiments based on the technical essence of the present invention fall within the protection scope of the technical solution of the present invention.

Claims

1. A high impedance semiconductor resistor structure, characterized in that: The invention comprises a GaAs device epitaxial layer and a GaAs-based PN structure arranged on the GaAs device epitaxial layer. The GaAs-based PN structure comprises an N-type layer, a first P-type layer, an etching stop layer and a second P-type layer from bottom to top. Two metal electrodes are arranged on the second P-type layer, and the part of the second P-type layer located between the two metal electrodes is concave to form a groove.

2. The high impedance semiconductor resistor structure according to claim 1, characterized in that: The etching stop layer is exposed at the bottom of the groove.

3. The high impedance semiconductor resistor structure according to claim 1, characterized in that: The etching stop layer at the bottom of the groove is removed, and the first P-type layer is exposed at the bottom of the groove.

4. The high impedance semiconductor resistor structure according to claim 1, characterized in that: The material of the etching stop layer is InGaAs, AlAs or InGaP, and the thickness is 3-7nm.

5. The high impedance semiconductor resistor structure according to claim 1, characterized in that: The thickness of the first P-type layer is 5-15 nm, and the thickness of the second P-type layer is 30-80 nm.

6. The high impedance semiconductor resistor structure according to claim 1, characterized in that: The N-type layer includes, from bottom to top, a first n+InGaP layer, an n+GaAs layer, a second n+InGaP layer and an n-GaAs layer, wherein the thickness of the first n+InGaP layer is 5 to 15 nm, the thickness of the n+GaAs layer is 300 to 500 nm, the thickness of the second n+InGaP layer is 3 to 7 nm, and the thickness of the n-GaAs layer is 50 to 150 nm.

7. The high impedance semiconductor resistor structure according to claim 1, characterized in that: The epitaxial layer of the GaAs device comprises, from bottom to top, a channel layer, a barrier layer, a blocking layer and a cap layer arranged on a substrate, and the GaAs-based PN structure is arranged on the cap layer.

8. A method for manufacturing a high impedance semiconductor resistor structure according to any one of claims 1 to 7, characterized in that: The following steps are involved: 1) forming a GaAs-based PN epitaxial layer on the GaAs device epitaxial layer, wherein the GaAs-based PN epitaxial layer includes, from bottom to top, an N-type layer, a first P-type layer, an etching stop layer, and a second P-type layer, and forming two metal electrodes on the second P-type layer in a preset resistor region; 2) coating a photoresist on the structure formed in step 1), and obtaining a display window between two metal electrodes after exposure and development; 3) etching and removing the second P-type layer within the display window, and stripping off the photoresist; 4) Etching and removing the GaAs-based PN epitaxial layer outside the preset resistor region to obtain a resistor based on a GaAs-based PN structure.

9. The method for manufacturing a high impedance semiconductor resistor structure according to claim 8, characterized in that: In step 3), after etching away the second P-type layer in the display opening window, the method further includes etching away the etching stop layer in the display opening window, and then stripping off the photoresist.

10. The method for manufacturing a high impedance semiconductor resistor structure according to claim 8, characterized in that: In the step 1), the material of the metal electrode is a Pt / Ti / Pt / Au stack, which forms an ohmic contact with the second P-type layer.

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