Hybrid display device and manufacturing method thereof, and display terminal

Abstract

The present application provides a hybrid display device and a manufacturing method thereof, and a display terminal. The hybrid display device includes: a driving backplane, including a driving circuit layer, a first passivation protection layer, and a voltage-resistant layer stacked in sequence; the driving backplane is provided with an undercut groove, and the undercut groove penetrates the first passivation protection layer and the voltage-resistant layer; and a light-emitting structure layer, including a first electrode layer, a common cathode, a light-emitting element, and a first light-emitting unit; the first electrode layer is formed on the voltage-resistant layer and is electrically connected to the driving circuit layer, the light-emitting element and the first light-emitting unit are both formed on the first electrode layer, and the common cathode is formed on the first light-emitting unit; the first electrode layer includes a first anode, an auxiliary cathode, and a second anode, the undercut groove is adjacent to the first anode, the common cathode is disconnected at the undercut groove, and there is a gap between the common cathode and the first anode. The hybrid display device and the manufacturing method thereof, and the display terminal provided by the present application can prevent the anode from short-circuiting.

Description

Technical Field

[0001] The present application relates to the field of display technology, and in particular to a hybrid display device, a method for manufacturing the hybrid display device, and a display terminal. Background Art

[0002] In Micro-LED displays, the efficiency and stability of R and G chips are far inferior to those of QLED and OLED devices, so a hybrid display device structure of Micro-LED+QLED is proposed. First, the Micro-LED chip is transferred to the driving backplane and a QLED light-emitting unit is prepared on the driving backplane, and then a common cathode is made. From the perspective of production cost and production accuracy, the common cathode of the hybrid display device structure of Micro-LED+QLED is generally formed by whole-surface evaporation. Forming the common cathode by whole-surface evaporation will cause a short circuit between the common cathode and the anode of the Micro-LED, causing device failure. Summary of the invention

[0003] In view of this, the present application provides a hybrid display device, a method for manufacturing the hybrid display device, and a display terminal that can prevent a short circuit in the anode of a Micro-LED from causing device failure.

[0004] To solve the above problems, the technical solutions provided by this application are as follows:

[0005] In a first aspect, the present application provides a hybrid display device, comprising:

[0006] A driving backplane, comprising a driving circuit layer, a first passivation protection layer and a voltage-resistant layer stacked in sequence; the first passivation protection layer is formed on the driving circuit layer, and the voltage-resistant layer is formed on the first passivation protection layer; at least one undercut groove is provided on the driving backplane, and the undercut groove penetrates the first passivation protection layer and the voltage-resistant layer; and

[0007] a light emitting structure layer, comprising a first electrode layer, a common cathode, a plurality of light emitting elements and a plurality of first light emitting units; the first electrode layer is formed on the voltage-resistant layer and is electrically connected to the driving circuit layer, the light emitting elements and the first light emitting units are both formed on the first electrode layer, and the common cathode is formed on the first light emitting units;

[0008] Among them, the first electrode layer includes multiple first anodes, multiple auxiliary cathodes and multiple second anodes, the light-emitting element is bound to the driving backplane through the first anodes and the auxiliary cathodes, and the first light-emitting unit is formed between the second anodes and the common cathode; the bottom cut groove is adjacent to the first anode, the common cathode is disconnected at the bottom cut groove, and there is a gap between the common cathode and the first anode.

[0009] In an optional embodiment of the present application, the driving circuit layer includes a first driving transistor, the first driving transistor includes a first source and a first drain; one of the undercut grooves includes a first groove and a second groove, the first groove penetrates the voltage-resistant layer, and the second groove penetrates the first passivation protection layer; the first groove is arranged opposite to the second groove, and the size of the opening of the first groove adjacent to the second groove is smaller than the size of the opening of the second groove adjacent to the first groove;

[0010] A portion of the first drain is exposed from the second trench, and the first anode is electrically connected to the first drain.

[0011] In an optional embodiment of the present application, each of the first driving transistors further includes a first signal input terminal, the first signal input terminal is arranged in the same layer as the first source and the first drain, and the auxiliary cathode is electrically connected to the first signal input terminal.

[0012] In an optional embodiment of the present application, the auxiliary cathode is electrically connected to the common cathode.

[0013] In an optional embodiment of the present application, the thickness of the voltage-resistant layer corresponding to the first driving transistor is smaller than the thickness of the voltage-resistant layer corresponding to the first anode.

[0014] In an optional embodiment of the present application, the driving backplane also includes a light-shielding layer, which is formed on the voltage-resistant layer and is opposite to the first driving transistor; the surface of the light-shielding layer away from the first driving transistor and the surface of the first anode away from the voltage-resistant layer are on the same horizontal plane.

[0015] In an optional embodiment of the present application, the driving backplane further includes a plurality of second driving transistors and a plurality of third driving transistors; the first electrode layer further includes a plurality of third anodes;

[0016] The second anode is arranged corresponding to the second driving transistor, and the second anode is electrically connected to the second driving transistor;

[0017] The light emitting structure layer further includes a plurality of second light emitting units, each of which is formed between the third anode and the common cathode, and the third anode is electrically connected to the third driving transistor.

[0018] In an optional embodiment of the present application, the thickness of the voltage-resistant layer corresponding to the second driving transistor and the third driving transistor is smaller than the thickness of the voltage-resistant layer corresponding to the first anode.

[0019] In an optional embodiment of the present application, the light-emitting element is a light-emitting diode element that emits blue light, the first light-emitting unit is an organic light-emitting unit or a quantum dot light-emitting unit that emits green light, and the second light-emitting unit is an organic light-emitting unit or a quantum dot light-emitting unit that emits red light.

[0020] In an optional embodiment of the present application, the light emitting structure layer further includes a plurality of first retaining walls, a plurality of second retaining walls and a plurality of third retaining walls formed on the voltage-resistant layer, and the common cathode covers the first retaining walls, the second retaining walls and the third retaining walls;

[0021] The first retaining wall is located between the auxiliary cathode and the second anode; the second retaining wall is located between the second anode and the third anode, and the third retaining wall is located outside the third anode;

[0022] A first pixel opening is provided between the first blocking wall and the second blocking wall, and a second pixel opening is provided between the second blocking wall and the third blocking wall;

[0023] The first light emitting unit is located in the first pixel opening, and the second light emitting unit is located in the second pixel opening.

[0024] In an optional embodiment of the present application, in the same etching solution, the etching resistance of the voltage-resistant layer is better than the etching resistance of the first passivation protection layer.

[0025] A second aspect of the present application provides a method for manufacturing a hybrid display device, comprising:

[0026] A driving substrate is provided and a voltage-resistant layer is formed on the driving substrate to obtain a driving backplane; the driving substrate comprises a driving circuit layer and a first passivation protection layer formed on the driving circuit layer, and the voltage-resistant layer is formed on the first passivation protection layer;

[0027] Forming a first electrode layer on the voltage-resistant layer and forming at least one first groove from the voltage-resistant layer to the driving circuit layer, wherein a portion of the first passivation protection layer is exposed from the first groove, the first electrode layer comprises a first anode, an auxiliary cathode and a second anode, and the first groove is adjacent to the first anode;

[0028] Etching the first passivation protection layer exposed from the first groove to form a second groove; one of the first grooves and one of the second grooves corresponding thereto form an undercut groove;

[0029] Providing a plurality of light-emitting elements and a plurality of first light-emitting units, binding the light-emitting elements to the first anode and the auxiliary cathode, and forming the first light-emitting units on the second anode; and

[0030] A common cathode is formed on the light-emitting element, the first light-emitting unit and the voltage-resistant layer by a whole-surface plating method to form a light-emitting structure layer; the common cathode is disconnected at the bottom cut groove, and there is a gap between the common cathode and the first anode.

[0031] In an optional embodiment of the present application, the auxiliary cathode is electrically connected to the common cathode.

[0032] In an optional embodiment of the present application, the driving circuit layer includes a first driving transistor, the thickness of the voltage-resistant layer corresponding to the first driving transistor is less than the thickness of the voltage-resistant layer corresponding to the first anode, and the surface of the voltage-resistant layer away from the first driving transistor is on the same horizontal plane; after the step of "etching the first passivation protection layer exposed from the first groove to form a second groove", the step further includes:

[0033] forming a light shielding layer on a surface of the voltage-resistant layer opposite to the first driving transistor;

[0034] A surface of the light shielding layer away from the first driving transistor and a surface of the first anode away from the voltage-resistant layer are on the same horizontal plane.

[0035] A third aspect of the present application provides a display terminal, comprising a main body and the hybrid display device as described above, wherein the hybrid display device is formed on the main body.

[0036] The hybrid display device and its manufacturing method and display terminal provided by the present application form a voltage-resistant layer on the first passivation protection layer of the existing driving backplane, form a first anode, an auxiliary cathode and a second anode on the voltage-resistant layer, form an undercut groove at a position adjacent to the first anode in the voltage-resistant layer and the first passivation protection layer of the driving substrate, bind the light-emitting element to the first anode and the auxiliary cathode, and form a light-emitting unit on the first anode, and finally form a common cathode; due to the existence of the undercut groove, the common cathode is disconnected at the undercut groove to cut off the electrical contact between the common cathode and the first anode, thereby avoiding the short circuit of the first anode caused by the overlap between the common cathode and the first anode to cause device failure. BRIEF DESCRIPTION OF THE DRAWINGS

[0037] In order to more clearly illustrate the technical solutions in the embodiments of the present application, the drawings required for use in the description of the embodiments will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present application. For those skilled in the art, other drawings can be obtained based on these drawings without paying any creative work.

[0038] Figure 1A cross-sectional view of a hybrid display device provided in a preferred embodiment of the present application.

[0039] Figure 2 A schematic diagram of the manufacturing process of a hybrid display device provided in a preferred embodiment of the present application.

[0040] Figure 3 A cross-sectional view of a driving backplane with a first electrode layer provided in a preferred embodiment of the present application.

[0041] Figure 4 For Figure 3 The cross-sectional view of the driving backplane after the light shielding layer, bottom cut grooves and retaining walls are formed is shown.

[0042] Figure 5 To transfer the light emitting element to Figure 4 A cross-sectional view of the drive backplane is shown.

[0043] Figure 6 For Figure 5 The cross-sectional view is shown after the first light emitting unit and the second light emitting unit are formed on the driving backplane. DETAILED DESCRIPTION

[0044] The technical solutions in the embodiments of the present application will be described clearly and completely below in conjunction with the drawings in the embodiments of the present application. Obviously, the described embodiments are only part of the embodiments of the present application, rather than all of the embodiments. Based on the embodiments in the present application, all other embodiments obtained by those skilled in the art without creative work are within the scope of protection of the present application.

[0045] In the description of the present application, it should be understood that the orientation or positional relationship indicated by the terms "upper", "lower", etc. is based on the orientation or positional relationship shown in the accompanying drawings, and is only for the convenience of describing the present application and simplifying the description, rather than indicating or implying that the device or element referred to must have a specific orientation, be constructed and operated in a specific orientation, and therefore cannot be understood as a limitation on the present application. In addition, the terms "first" and "second" are used for descriptive purposes only, and cannot be understood as indicating or implying relative importance or implicitly indicating the number of technical features indicated. Thus, the features defined as "first" and "second" may explicitly or implicitly include one or more of the features. In the description of the present application, the meaning of "multiple" is two or more, unless otherwise clearly and specifically defined.

[0046] The present application may repeat reference numerals and / or reference letters in different implementations. Such repetition is for the purpose of simplicity and clarity and does not in itself indicate the relationship between the various implementations and / or settings discussed.

[0047] The hybrid display device, the method for manufacturing the hybrid display device and the display terminal provided by the present application will be described in detail below in conjunction with specific embodiments and drawings.

[0048] See also Figure 1 The preferred embodiment of the present application provides a hybrid display device 100, which includes a driving backplane 110 and a light emitting structure layer 120. The light emitting structure layer 120 is located on one side of the driving backplane 110. The driving backplane 110 is used to drive the light emitting structure layer 120 to emit light.

[0049] The driving backplane 110 includes a substrate 10, a driving circuit layer 30, a first passivation protection layer 40 and a voltage-resistant layer 50. The driving circuit layer 30 is formed on the substrate 10, the first passivation protection layer 40 is formed on the driving circuit layer 30, and the voltage-resistant layer 50 is formed on the first passivation protection layer 40. The light-emitting structure layer 120 is formed on the voltage-resistant layer 50.

[0050] The driving backplane 110 is further provided with at least one undercut groove 510, and the undercut groove 510 penetrates the first passivation protection layer 40 and the voltage-resistant layer 50. Specifically, one undercut groove 510 includes a first groove 51 and a second groove 41, the first groove 51 penetrates the voltage-resistant layer 50, and the second groove 41 penetrates the first passivation protection layer 40; the first groove 51 is arranged opposite to the second groove 41, and the size of the opening of the first groove 51 adjacent to the second groove 41 is smaller than the size of the opening of the second groove 41 adjacent to the first groove 51.

[0051] Among them, in the same etching solution, the etching resistance of the voltage-resistant layer 50 is better than that of the first passivation protection layer 40, so that lateral etching occurs on the contact surface between the first passivation protection layer 40 and the voltage-resistant layer 50 to form the second groove 41 and the bottom cut groove 510.

[0052] Among them, the driving circuit layer 30 also includes multiple first driving transistors 31, multiple second driving transistors 32 and multiple third driving transistors 33, the first driving transistors 31, the second driving transistors 32 and the third driving transistors 33 are respectively arranged on the substrate 10, and the first passivation protection layer 40 covers the first driving transistor 31, the second driving transistor 32 and the third driving transistor 33.

[0053] Specifically, the driving circuit layer 30 further includes an active layer (not numbered in the figure), a gate insulating layer (not numbered in the figure), a gate (not numbered in the figure), a first interlayer insulating layer (not numbered in the figure) and a source-drain electrode layer (not numbered in the figure), wherein the active layer is formed on the substrate 10, the gate insulating layer is located between the gate and the active layer, the first interlayer insulating layer is located between the gate and the source-drain electrode layer, and the first passivation protection layer 40 covers the source-drain electrode layer. The active layer includes a first semiconductor (not numbered in the figure), a second semiconductor (not numbered in the figure) and a third semiconductor (not numbered in the figure), the gate includes a first gate (not numbered in the figure), a second gate (not numbered in the figure) and a third gate (not numbered in the figure), and the source-drain electrode layer includes a first source (not numbered in the figure) and a first drain 311, a second source (not numbered in the figure) and a second drain (not numbered in the figure), and a third source (not numbered in the figure) and a third drain (not numbered in the figure). The first semiconductor, the first gate, and the first source and the first drain 311 are positioned opposite to each other to form the first driving transistor 31. The second semiconductor, the second gate, and the second source and the second drain are positioned opposite to each other to form the second driving transistor 32. The third semiconductor, the third gate, and the third source and the third drain are positioned opposite to each other to form the third driving transistor 33. Parts of the first source and the first drain 311 are exposed from the undercut groove 510.

[0054] The first driving transistor 31 further includes a first signal input terminal 312, which is disposed in the same layer and made of the same material as the first source and the first drain 311. The first signal input terminal 312 is used to input a common cathode driving signal.

[0055] In an optional embodiment of the present application, the thickness of the voltage-resistant layer 50 is 3-5 μm.

[0056] Among them, the voltage-resistant layer 50 can also serve as a buffer layer for the first driving transistor 31, the second driving transistor 32 and the third driving transistor 33. When the driving backplane 110 is subjected to external impact or collision, the impact on the first driving transistor 31, the second driving transistor 32 and the third driving transistor 33 can be reduced.

[0057] In this embodiment, the voltage-resistant layer 50 is made of an organic photoresist material.

[0058] In an optional embodiment of the present application, the driving backplane 110 further includes a metal shielding layer 20 and a second interlayer insulating layer 24, wherein the metal shielding layer is formed on the substrate 10, and the second interlayer insulating layer 24 covers the metal shielding layer. The metal shielding layer includes a first metal shielding portion 21, a second metal shielding portion 22, and a third metal shielding portion 23, wherein the first metal shielding portion 21 is directly opposite to the first driving transistor 31 and is electrically connected to the first drain 311, the second metal shielding portion 22 is directly opposite to the second driving transistor 32 and is electrically connected to the second drain, and the third metal shielding portion 23 is directly opposite to the third driving transistor 33 and is electrically connected to the third drain. In addition to shielding external stray light, the first metal shielding portion 21 also serves as a driving signal input terminal of the first driving transistor 31, the second metal shielding portion 22 also serves as a driving signal input terminal of the second driving transistor 32, and the third metal shielding portion 23 also serves as a driving signal input terminal of the third driving transistor 33.

[0059] In an optional embodiment of the present application, the thickness of the voltage-resistant layer 50 corresponding to at least one of the first driving transistor 31, the second driving transistor 32 and the third driving transistor 33 is smaller than the thickness of the voltage-resistant layer 50 not corresponding to the first driving transistor 31, the second driving transistor 32 and the third driving transistor 33, and the voltage-resistant layer 50 is parallel to the substrate 10 and is on the same horizontal plane away from the surface of the first driving transistor 31.

[0060] In an optional embodiment of the present application, the driving backplane 110 further includes a light shielding layer 72, which is formed on the voltage-resistant layer 50 and is opposite to the first driving transistor 31. The light shielding layer 72 can not only be used to shield external stray light emitted from the direction of the light-emitting structure layer 120, but also can be used to adjust the thickness of the light shielding layer 72.

[0061] In an optional embodiment of the present application, the driving backplane 110 further includes a second passivation protective layer 71, which is formed on the voltage-resistant layer 50 and opposite to the first driving transistor 31, and the light shielding layer 72 is formed on the second passivation protective layer 71. The second passivation protective layer 71 is not only used to adjust the flatness of the surface of the voltage-resistant layer 50 away from the first driving transistor 31 when the area of ​​the voltage-resistant layer 50 corresponding to the first driving transistor 31 is uneven, but also can reduce the thickness of the light shielding layer 72 to a certain extent.

[0062] The light emitting structure layer 120 includes a first electrode layer 60, a common cathode 84, a plurality of light emitting elements 81 and a plurality of first light emitting units 82; the first electrode layer 60 is formed on the voltage-resistant layer 50 and is electrically connected to the driving circuit layer 30, the light emitting elements 81 and the first light emitting units 82 are both formed on the first electrode layer 60, and the common cathode 84 is formed on the first light emitting units 82. The common cathode 84 is also formed on the light shielding layer 72.

[0063] The first electrode layer 60 includes a plurality of first anodes 61, a plurality of auxiliary cathodes 62 and a plurality of second anodes 63. The light-emitting element 81 is bound to the driving backplane 110 through the first anodes 61 and the auxiliary cathodes 62. The first light-emitting unit 82 is formed on the second anode 63 and is located between the second anode 63 and the common cathode 84. The undercut groove 510 is adjacent to the first anode 61, and the common cathode 84 is disconnected at the undercut groove 510. There is a gap between the common cathode 84 and the first anode 61, that is, there is no overlap between the common cathode 84 and the first anode 61. In this way, the electrical contact between the common cathode 84 and the first anode 61 can be cut off, so that the short circuit of the first anode 61 caused by the overlap between the common cathode 84 and the first anode 61 can be avoided to cause device failure.

[0064] Specifically, the first anode 61 is electrically connected to the first drain 311 of the first driving transistor 31, the auxiliary cathode 62 is electrically connected to the first signal input terminal 312 and to the common cathode 84. The second anode 63 is electrically connected to the second drain of the second driving transistor 32.

[0065] In an optional embodiment of the present application, the first electrode layer 60 further includes a plurality of third anodes 64 , and the third anodes 64 are electrically connected to the third drain of the third driving transistor 33 .

[0066] In an optional embodiment of the present application, the light emitting structure layer 120 further includes a plurality of second light emitting units 83 , and the second light emitting units 83 are formed on the third anode 64 and are located between the third anode 64 and the common cathode 84 .

[0067] Of course, in other embodiments of the present application, the light emitting structure layer 120 may also include more than one light emitting element 81 and / or more than one light emitting unit, which may be designed according to actual needs.

[0068] The light emitting element 81 has a different light emitting principle from the first light emitting unit 82 and the second light emitting unit 83, and the colors of light emitted by the light emitting element 81, the first light emitting unit 82 and the second light emitting unit 83 are different. In this embodiment, the light emitting element 81 emits blue light, the first light emitting unit 82 emits green light, and the second light emitting unit 83 emits red light. Of course, in other embodiments, the colors of light emitted by the light emitting element 81, the first light emitting unit 82 and the second light emitting unit 83 are not limited to red, green and blue, and can also be other colors of light.

[0069] In an optional embodiment of the present application, the light-emitting element 81 is a light-emitting diode (LED) chip. In other embodiments, the light-emitting element 81 can also be a sub-millimeter light-emitting diode (mini-LED) chip or a micron light-emitting diode (Micro-LED) chip, etc.

[0070] In an optional embodiment of the present application, the first light-emitting unit 82 and the second light-emitting unit 83 both emit light in the form of quantum dot light. In other embodiments, the first light-emitting unit 82 and the second light-emitting unit 83 may also emit light in the form of organic material light.

[0071] The first light-emitting unit 82 and the second light-emitting unit 83 both include a light-emitting material layer and an electron injection layer, a hole injection layer, an electron transport layer, a hole transport layer, etc. The positions of the electron injection layer, the hole injection layer, the electron transport layer, and the hole transport layer are consistent with those of the quantum dot light-emitting diode or the light-emitting diode of organic light-emitting material in the prior art. They will not be described one by one here.

[0072] In an optional embodiment of the present application, the thickness of the voltage-resistant layer 50 corresponding to at least one of the first driving transistor 31, the second driving transistor 32 and the third driving transistor 33 is smaller than the thickness of the voltage-resistant layer 50 corresponding to the first anode 61, the auxiliary cathode 62, the second anode 63 and the third anode 64. In this way, the step difference between the voltage-resistant layer 50 in the area above the first driving transistor 31 and the second driving transistor 32 and the first anode 61 and the auxiliary cathode 62 can be reduced.

[0073] When the light-emitting element 81 is a Micro-LED, the volume of the Micro-LED chip is small and the height of the connecting terminal is only 1-2μm. In the prior art, due to the large height difference between the upper surface of the driving transistor for driving the Micro-LED chip in the prior art and the first anode and the auxiliary cathode for binding the Micro-LED chip in the prior art, when binding the Micro-LED chip, the height difference will cause the connecting terminal on the Micro-LED chip to be unable to bond well with the first anode and the auxiliary cathode on the driving backplane, resulting in a low transfer and binding yield of the Micro-LED chip, and then problems such as dark lights, falling lights, and dark spots will occur. Therefore, in the present application, reducing the height difference between the voltage-resistant layer 50 and the first anode 61 and the auxiliary cathode 62 in the area above the first driving transistor 31 and the second driving transistor 32 can improve the transfer and binding yield of the light-emitting element 81, thereby avoiding problems such as dark lights, falling lights, and dark spots in the hybrid display device 100.

[0074] Preferably, the voltage-resistant layer 50 is parallel to the substrate 10 and is located on the same horizontal plane away from the surface of the first driving transistor 31 .

[0075] In an optional embodiment of the present application, the surface of the light-shielding layer 72 away from the first driving transistor 31 and the surface of the first anode 61 away from the voltage-resistant layer 50 are on the same horizontal plane, and the step difference between the voltage-resistant layer 50 in the area above the first driving transistor 31 and the second driving transistor 32 and the first anode 61 and the auxiliary cathode 62 is 0, which can further improve the transfer and binding yield of the light-emitting element 81.

[0076] In an optional embodiment of the present application, the light emitting structure layer 120 further includes a first retaining wall 91, a second retaining wall 92 and a third retaining wall 93 formed on the voltage-resistant layer 50, and the common cathode 84 covers the first retaining wall 91, the second retaining wall 92 and the third retaining wall 93. The first retaining wall 91 is located between the auxiliary cathode 62 and the second anode 63, the second retaining wall 92 is located between the second anode 63 and the third anode 64, and the third retaining wall 93 is located outside the third anode 64; a first pixel opening 94 is provided between the first retaining wall 91 and the second retaining wall 92, a second pixel opening 95 is provided between the second retaining wall 92 and the third retaining wall 93, the first light emitting unit 82 is located in the first pixel opening 94, and the second light emitting unit 83 is located in the second pixel opening 95.

[0077] In other embodiments, the number of the retaining walls included in the light emitting structure layer 120 depends on the number of the light emitting units included therein, and the number of the retaining walls is one more than the number of the light emitting units.

[0078] See also Figure 2-Figure 5 The second aspect of the present application provides a method for manufacturing a hybrid display device, comprising the steps of:

[0079] S1: Please refer to Figure 2 and Figure 3 , providing a driving substrate 130 and forming a voltage-resistant layer 50 on the driving substrate 130 to obtain a driving backplane 110; the driving substrate 130 includes a driving circuit layer 30 and a first passivation protection layer 40 formed on the driving circuit layer 30, and the voltage-resistant layer 50 is formed on the first passivation protection layer 40.

[0080] Wherein, in the same etching solution, the etching resistance of the voltage-resistant layer 50 is better than the etching resistance of the first passivation protection layer 40 .

[0081] In an optional embodiment of the present application, the thickness of the voltage-resistant layer 50 is 3-5 μm.

[0082] The voltage-resistant layer 50 may also serve as a buffer layer for the first driving transistor 31 , the second driving transistor 32 and the third driving transistor 33 .

[0083] In this embodiment, the voltage-resistant layer 50 is made of an organic photoresist material.

[0084] The driving substrate 130 further includes a substrate 10 , and the driving circuit layer 30 is formed on the substrate 10 .

[0085] Among them, the driving circuit layer 30 also includes multiple first driving transistors 31, multiple second driving transistors 32 and multiple third driving transistors 33, the first driving transistors 31, the second driving transistors 32 and the third driving transistors 33 are respectively arranged on the substrate 10, and the first passivation protection layer 40 covers the first driving transistor 31, the second driving transistor 32 and the third driving transistor 33.

[0086] Specifically, the driving circuit layer 30 further includes an active layer (not numbered in the figure), a gate insulating layer (not numbered in the figure), a gate (not numbered in the figure), a first interlayer insulating layer (not numbered in the figure) and a source-drain electrode layer (not numbered in the figure), wherein the active layer is formed on the substrate 10, the gate insulating layer is located between the gate and the active layer, the first interlayer insulating layer is located between the gate and the source-drain electrode layer, and the first passivation protection layer 40 covers the source-drain electrode layer. The active layer includes a first semiconductor (not numbered in the figure), a second semiconductor (not numbered in the figure) and a third semiconductor (not numbered in the figure), the gate includes a first gate (not numbered in the figure), a second gate (not numbered in the figure) and a third gate (not numbered in the figure), and the source-drain electrode layer includes a first source (not numbered in the figure) and a first drain 311, a second source (not numbered in the figure) and a second drain (not numbered in the figure), and a third source (not numbered in the figure) and a third drain (not numbered in the figure). The first semiconductor, the first gate, and the first source and the first drain 311 are positioned opposite to each other to form the first driving transistor 31. The second semiconductor, the second gate, and the second source and the second drain are positioned opposite to each other to form the second driving transistor 32. The third semiconductor, the third gate, and the third source and the third drain are positioned opposite to each other to form the third driving transistor 33.

[0087] The first driving transistor 31 further includes a first signal input terminal 312, which is disposed in the same layer and made of the same material as the first source and the first drain 311. The first signal input terminal 312 is used to input a common cathode driving signal.

[0088] In an optional embodiment of the present application, the driving backplane 110 further includes a metal shielding layer and a second interlayer insulating layer 24, the metal shielding layer is formed on the substrate 10, and the second interlayer insulating layer 24 covers the metal shielding layer. The metal shielding layer includes a first metal shielding portion 21, a second metal shielding portion 22, and a third metal shielding portion 23, the first metal shielding portion 21 is directly opposite to the first driving transistor 31 and is electrically connected to the first drain 311, the second metal shielding portion 22 is directly opposite to the second driving transistor 32 and is electrically connected to the second drain, and the third metal shielding portion 23 is directly opposite to the third driving transistor 33 and is electrically connected to the third drain.

[0089] S2: Please refer again Figure 2 and Figure 3A first electrode layer 60 is formed on the voltage-resistant layer 50 and at least one first groove 51 is formed from the voltage-resistant layer 50 to the driving circuit layer 30, and a portion of the first passivation protection layer 40 is exposed from the first groove 51. The first electrode layer 60 includes a plurality of first anodes 61, a plurality of auxiliary cathodes 62 and a plurality of second anodes 63. The first groove 51 is adjacent to the first anode 61.

[0090] Specifically, the first anode 61 is electrically connected to the first source and the first drain 311 of the first driving transistor 31, and the auxiliary cathode 62 is electrically connected to the first signal input terminal 312. The second anode 63 is electrically connected to the second source and the second drain of the second driving transistor 32.

[0091] In an optional embodiment of the present application, the first electrode layer 60 further includes a plurality of third anodes 64 , and the third anodes 64 are electrically connected to the third source and the third drain of the third driving transistor 33 .

[0092] The thickness of the voltage-resistant layer 50 corresponding to at least one of the first driving transistor 31, the second driving transistor 32 and the third driving transistor 33 is less than the thickness of the voltage-resistant layer 50 corresponding to the first electrode layer 60, so that the step difference between the voltage-resistant layer 50 in the area above the first driving transistor 31 and the second driving transistor 32 and the first anode 61 and the auxiliary cathode 62 can be reduced. Preferably, the voltage-resistant layer 50 is parallel to the substrate 10 and is on the same horizontal plane away from the surface of the first driving transistor 31.

[0093] S3: Please refer to Figure 2 and Figure 4 , the first passivation protection layer 40 exposed from the first groove 51 is etched to form a second groove 41 ; one of the first grooves 51 and one of the corresponding second grooves 41 form an undercut groove 510 .

[0094] The second groove 41 penetrates the first passivation protection layer 40 .

[0095] Wherein, the S3 further includes the step of forming a light shielding layer 72 on the voltage-resistant layer 50 corresponding to the first driving transistor 31, wherein the light shielding layer 72 can not only be used to shield the external stray light emitted from the direction of the light-emitting structure layer 120, but also can be used to adjust the thickness of the light shielding layer 72. Wherein, the light shielding layer 72 can be formed before the second groove 41 is formed, or after the second groove 41 is formed.

[0096] In an optional embodiment of the present application, the surface of the light-shielding layer 72 away from the first driving transistor 31 and the surface of the first anode 61 away from the voltage-resistant layer 50 are on the same horizontal plane, and the step difference between the voltage-resistant layer 50 in the area above the first driving transistor 31 and the second driving transistor 32 and the first anode 61 and the auxiliary cathode 62 is 0, which can further improve the transfer and binding yield of the light-emitting element 81.

[0097] In an optional embodiment of the present application, the driving backplane 110 further includes a second passivation protective layer 71, which is formed on the voltage-resistant layer 50 and opposite to the first driving transistor 31, and the light shielding layer 72 is formed on the second passivation protective layer 71. The second passivation protective layer 71 is not only used to adjust the flatness of the surface of the voltage-resistant layer 50 away from the first driving transistor 31 when the area of ​​the voltage-resistant layer 50 corresponding to the first driving transistor 31 is uneven, but also can reduce the thickness of the light shielding layer 72 to a certain extent.

[0098] S4: Please refer to Figure 2 and Figure 5 , provide a plurality of light-emitting elements 81 and a plurality of first light-emitting units 82 , bind the light-emitting elements 81 to the first anode 61 and the auxiliary cathode 62 , and form the first light-emitting unit 82 on the second anode 63 .

[0099] In step S4, the step is further included: forming a plurality of first retaining walls 91, a plurality of second retaining walls 92 and a plurality of third retaining walls 93 on the voltage-resistant layer 50, wherein the first retaining wall 91 is located between the auxiliary cathode 62 and the second anode 63, the second retaining wall 92 is located between the second anode 63 and the third anode 64, and the third retaining wall 93 is located outside the third anode 64; a first pixel opening 94 is provided between the first retaining wall 91 and the second retaining wall 92, a second pixel opening 95 is provided between the second retaining wall 92 and the third retaining wall 93, the first light-emitting unit 82 is located in the first pixel opening 94, and the second light-emitting unit 83 is located in the second pixel opening 95. The first retaining wall 91, the second retaining wall 92 and the third retaining wall 93 may be formed after the step of "binding the light-emitting element 81 to the first anode 61 and the auxiliary cathode 62", or may be formed before the step of "binding the light-emitting element 81 to the first anode 61 and the auxiliary cathode 62".

[0100] S5: Please refer to Figure 1 and Figure 2A common cathode 84 is formed on the light-emitting element 81, the first light-emitting unit 82 and the voltage-resistant layer 50 by a full-surface plating method to form a light-emitting structure layer 120; the common cathode 84 is disconnected at the bottom cut groove 510, and there is a gap between the common cathode 84 and the first anode 61.

[0101] The auxiliary cathode 62 is electrically connected to the common cathode 84 .

[0102] Of course, in other embodiments of the present application, the light emitting structure layer 120 may also include more than one light emitting element 81 and / or more than one light emitting unit, which may be designed according to actual needs.

[0103] The light emitting element 81 has a different light emitting principle from the first light emitting unit 82 and the second light emitting unit 83, and the colors of light emitted by the light emitting element 81, the first light emitting unit 82 and the second light emitting unit 83 are different. In this embodiment, the light emitting element 81 emits blue light, the first light emitting unit 82 emits green light, and the second light emitting unit 83 emits red light. Of course, in other embodiments, the colors of light emitted by the light emitting element 81, the first light emitting unit 82 and the second light emitting unit 83 are not limited to red, green and blue, and can also be other colors of light.

[0104] In an optional embodiment of the present application, the light-emitting element 81 is a light-emitting diode (LED) chip. In other embodiments, the light-emitting element 81 can also be a sub-millimeter light-emitting diode (mini-LED) chip or a micron light-emitting diode (Micro-LED) chip, etc.

[0105] In an optional embodiment of the present application, the first light-emitting unit 82 and the second light-emitting unit 83 both emit light in the form of quantum dot light. In other embodiments, the first light-emitting unit 82 and the second light-emitting unit 83 may also emit light in the form of organic material light.

[0106] See also Figure 6 The present application also provides a display terminal 1000 , which includes a main body 200 and the hybrid display device 100 as described above, and the hybrid display device 100 is formed on the main body 200 .

[0107] The hybrid display device and its manufacturing method and display terminal provided by the present application form a voltage-resistant layer on the first passivation protection layer of the existing driving backplane, form a first anode, an auxiliary cathode and a second anode on the voltage-resistant layer, form an undercut groove at a position adjacent to the first anode in the voltage-resistant layer and the first passivation protection layer of the driving substrate, bind the light-emitting element to the first anode and the auxiliary cathode, and form a light-emitting unit on the first anode, and finally form a common cathode; due to the existence of the undercut groove, the common cathode is disconnected at the undercut groove to cut off the electrical contact between the common cathode and the first anode, thereby avoiding the short circuit of the first anode caused by the overlap between the common cathode and the first anode to cause device failure.

[0108] In addition, the thickness of the voltage-resistant layer corresponding to at least one of the first driving transistor, the second driving transistor and the third driving transistor is smaller than the thickness of the voltage-resistant layer corresponding to the first anode, the auxiliary cathode, the second anode and the third anode. In this way, the step difference between the voltage-resistant layer in the area above the first driving transistor and the second driving transistor and the first anode and the auxiliary cathode can be reduced, and the transfer and binding yield of the light-emitting element can be improved, thereby avoiding problems such as dark lights, light dropping and dark spots in the hybrid display device.

[0109] Furthermore, the surface of the light-shielding layer away from the first driving transistor and the surface of the first anode away from the voltage-resistant layer are on the same horizontal plane, and the step difference between the voltage-resistant layer in the area above the first driving transistor and the second driving transistor and the first anode and the auxiliary cathode is 0, which can further improve the transfer and binding yield of the light-emitting element.

[0110] In summary, although the present application has been disclosed as above with preferred embodiments, the above preferred embodiments are not intended to limit the present application. Ordinary technicians in this field can make various changes and modifications without departing from the spirit and scope of the present application. Therefore, the scope of protection of the present application shall be based on the scope defined in the claims.

Claims

1. A hybrid display device, characterized in that: include: A driving backplane, comprising a driving circuit layer, a first passivation protection layer and a voltage-resistant layer stacked in sequence; the driving backplane is provided with at least one undercut groove, the undercut groove penetrates the first passivation protection layer and the voltage-resistant layer; and a light-emitting structure layer, comprising a first electrode layer, a common cathode, a plurality of light-emitting elements and a plurality of first light-emitting units; the first electrode layer is formed on the voltage-resistant layer and is electrically connected to the driving circuit layer, the light-emitting elements and the first light-emitting units are both formed on the first electrode layer, and the common cathode is formed on the light-emitting elements, the voltage-resistant layer and the first light-emitting units; Among them, the first electrode layer includes multiple first anodes, multiple auxiliary cathodes and multiple second anodes, the light-emitting element is bound to the driving backplane through the first anodes and the auxiliary cathodes, and the first light-emitting unit is formed between the second anodes and the common cathode; the bottom cut groove is adjacent to the first anode, the common cathode is disconnected at the bottom cut groove, and there is a gap between the common cathode and the first anode; the auxiliary cathode is electrically connected to the common cathode.

2. The hybrid display device according to claim 1, characterized in that: The driving circuit layer includes a plurality of first driving transistors, each of which includes a first source and a first drain; one of the undercut grooves includes a first groove and a second groove, the first groove penetrates the voltage-resistant layer, and the second groove penetrates the first passivation protection layer; The first groove is arranged opposite to the second groove, and the size of the opening of the first groove adjacent to the second groove is smaller than the size of the opening of the second groove adjacent to the first groove; A portion of the first drain is exposed from the second trench, and the first anode is electrically connected to the first drain.

3. The hybrid display device according to claim 2, characterized in that: Each of the first driving transistors further includes a first signal input terminal, which is disposed in the same layer as the first source and the first drain, and the auxiliary cathode is electrically connected to the first signal input terminal.

4. The hybrid display device according to claim 2, characterized in that: The thickness of the voltage-resistant layer corresponding to the first driving transistor is smaller than the thickness of the voltage-resistant layer corresponding to the first anode.

5. The hybrid display device according to claim 4, characterized in that: The driving backplane also includes a light shielding layer, which is formed on the voltage-resistant layer and opposite to the first driving transistor; a surface of the light shielding layer away from the first driving transistor and a surface of the first anode away from the voltage-resistant layer are on the same horizontal plane.

6. The hybrid display device according to claim 2, characterized in that: The driving backplane further includes a plurality of second driving transistors and a plurality of third driving transistors; the first electrode layer further includes a plurality of third anodes; The second anode is arranged corresponding to the second driving transistor, and the second anode is electrically connected to the second driving transistor; The light emitting structure layer further includes a plurality of second light emitting units, each of which is formed between the third anode and the common cathode, and the third anode is electrically connected to the third driving transistor.

7. The hybrid display device according to claim 6, characterized in that: The thickness of the voltage-resistant layer corresponding to the second driving transistor and the third driving transistor is smaller than the thickness of the voltage-resistant layer corresponding to the first anode.

8. The hybrid display device according to claim 6, wherein: The light emitting element is a light emitting diode element emitting blue light, the first light emitting unit is an organic light emitting unit or a quantum dot light emitting unit emitting green light, and the second light emitting unit is an organic light emitting unit or a quantum dot light emitting unit emitting red light.

9. The hybrid display device according to claim 6, characterized in that: The light emitting structure layer further includes a plurality of first retaining walls, a plurality of second retaining walls and a plurality of third retaining walls formed on the voltage-resistant layer, and the common cathode covers the first retaining walls, the second retaining walls and the third retaining walls; The first retaining wall is located between the auxiliary cathode and the second anode; the second retaining wall is located between the second anode and the third anode, and the third retaining wall is located outside the third anode; A first pixel opening is provided between the first blocking wall and the second blocking wall, and a second pixel opening is provided between the second blocking wall and the third blocking wall; The first light emitting unit is located in the first pixel opening, and the second light emitting unit is located in the second pixel opening.

10. The hybrid display device according to any one of claims 1 to 9, characterized in that: In the same etching solution, the etching resistance of the voltage-resistant layer is better than the etching resistance of the first passivation protection layer.

11. A method for manufacturing a hybrid display device, characterized in that: include: Providing a driving substrate and forming a voltage-resistant layer on the driving substrate to obtain a driving backplane; The driving substrate comprises a driving circuit layer and a first passivation protection layer formed on the driving circuit layer, and the voltage-resistant layer is formed on the first passivation protection layer; Forming a first electrode layer on the voltage-resistant layer and forming at least one first groove from the voltage-resistant layer to the driving circuit layer, wherein a portion of the first passivation protection layer is exposed from the first groove, the first electrode layer includes a plurality of first anodes, a plurality of auxiliary cathodes and a plurality of second anodes, and the first groove is adjacent to the first anode; Etching the first passivation protection layer exposed from the first trench to form a second trench; One of the first grooves and one of the second grooves corresponding thereto form an undercut groove; Providing a plurality of light-emitting elements and a plurality of first light-emitting units, binding the light-emitting elements to the first anode and the auxiliary cathode, and forming the first light-emitting unit on the second anode; and Forming a common cathode on the light-emitting element, the first light-emitting unit and the voltage-resistant layer by a whole-surface plating method to form a light-emitting structure layer; The common cathode is disconnected at the undercut groove, a gap is provided between the common cathode and the first anode, and the common cathode is electrically connected to the auxiliary electrode.

12. The method for manufacturing a hybrid display device according to claim 11, wherein: The driving circuit layer includes a first driving transistor, the thickness of the voltage-resistant layer corresponding to the first driving transistor is less than the thickness of the voltage-resistant layer corresponding to the first anode, and the surface of the voltage-resistant layer away from the first driving transistor is on the same horizontal plane; after the step of "etching the first passivation protection layer exposed from the first groove to form a second groove", the step further includes: forming a light shielding layer on a surface of the voltage-resistant layer opposite to the first driving transistor; A surface of the light shielding layer away from the first driving transistor and a surface of the first anode away from the voltage-resistant layer are on the same horizontal plane.

13. A display terminal, characterized in that: The invention comprises a main body and a hybrid display device as claimed in any one of claims 1 to 10, wherein the hybrid display device is formed on the main body.

Images