Multi-bit ferroelectric field effect transistor based on zro2 intercalation and method of manufacturing the same

Abstract

The application discloses a multi-bit ferroelectric field effect transistor based on ZrO2 intercalation and a preparation method thereof. The multi-bit ferroelectric field effect transistor based on ZrO2 intercalation comprises a substrate, an interface layer formed on the substrate, a multi-layer HZO ferroelectric layer formed on the interface layer, and ZrO2 intercalation formed between adjacent HZO ferroelectric layers, a gate electrode formed on the HZO ferroelectric layer, and a source electrode and a drain electrode formed in the substrate on both sides of the gate electrode. By adjusting the thickness of each layer of the HZO ferroelectric layer, the ferroelectric domain size is controlled to have different coercive fields, so that a specific HZO ferroelectric layer is completely polarized when different voltages are applied, and a multi-bit ferroelectric field effect transistor with a stable intermediate polarization state is obtained.

Description

Technical Field

[0001] This invention relates to the field of semiconductor technology, specifically to a multi-bit ferroelectric field-effect transistor based on ZrO2 intercalation and its fabrication method. Background Technology

[0002] Ferroelectric memory is a novel type of non-volatile memory. Traditional ferroelectric materials include PZT and PVDF, but PZT has a small bandgap, leading to leakage current and reliability issues; while PVDF has excessively high operating voltage and power consumption. More importantly, traditional ferroelectric materials are incompatible with CMOS processes and can cause hydrogen poisoning; furthermore, traditional ferroelectric materials (PZT) lose their ferroelectric properties when the thickness is reduced, limiting future development. In contrast, hafnium-based ferroelectric materials show excellent potential. The storage mechanism of ferroelectric field-effect transistors (FETs) utilizes the unique hysteresis loop of ferroelectric materials, which can influence the formation of conductive channels. During the write operation, positive / negative gate voltages are applied to the initialized FET, causing the ferroelectric layer to spontaneously polarize downwards or upwards. After the write voltage is removed, the spontaneous polarization of the ferroelectric layer attracts charges in the channel, changing the transistor's threshold voltage. Each threshold voltage corresponds to a state, storing one piece of information. During the read operation, a voltage smaller than the coercive field is applied, and the written data is read by comparing the magnitude of the drain current.

[0003] The development of artificial intelligence has placed higher demands on memory storage density. One current solution is to require memory to store more information, i.e., to implement polymorphic storage operations. The operating mechanism of a multi-bit ferroelectric field-effect transistor (FFET) is similar to that of a regular ferroelectric field-effect transistor (FFET), the difference being that the ferroelectric layer of a multi-bit FFET has multiple polarization states. Different polarization states correspond to different polarization intensities, which have different effects on the conductive channel. Therefore, by changing the write voltage, the transistor can have multiple threshold voltages. During a read operation, the pulse amplitude of the read voltage is increased sequentially, and the change in current is observed to determine the information stored in the ferroelectric layer.

[0004] Polymorphic memory operations require a large memory window. The empirical formula for the memory window is 2·α·E. c ·t FE (α: constant; Ec: coercive field; t) FE (Ferroelectric layer thickness). However, as the thickness of the ferroelectric layer increases, the crystal structure of hafnium-based ferroelectric materials changes, the polarization intensity decreases significantly, and the storage window decreases. In addition, multi-state storage operations place higher demands on the stability of the intermediate polarization states of the ferroelectric layer and the ferroelectric properties. Summary of the Invention

[0005] This invention discloses a method for fabricating a multi-bit ferroelectric field-effect transistor based on ZrO2 intercalation, characterized by the following steps: depositing a SiO2 layer on a substrate, and photolithographically and etching the SiO2 layer to expose the substrate and form a gate window; performing nitriding treatment on the above structure, and then depositing an interface layer on the substrate; forming multiple HZO ferroelectric layers, and forming ZrO2 intercalation layers between adjacent HZO ferroelectric layers; forming a gate on the HZO ferroelectric layers and annealing in a nitrogen atmosphere; etching away the SiO2 layer and forming sidewalls on both sides of the gate; forming source and drain electrodes on both sides of the gate in the substrate; controlling the ferroelectric domain size by adjusting the thickness of each HZO ferroelectric layer to make them have different coercive fields; and fully polarizing a specific HZO ferroelectric layer when different voltages are applied to obtain a multi-bit ferroelectric field-effect transistor with a stable intermediate polarization state.

[0006] In the method for fabricating a multi-bit ferroelectric field-effect transistor based on ZrO2 intercalation of the present invention, preferably, the thickness of the HZO ferroelectric layer is 2nm to 15nm.

[0007] In the method for fabricating a multi-bit ferroelectric field-effect transistor based on ZrO2 intercalation of the present invention, preferably, the thickness of the ZrO2 intercalation layer is 0.5 nm to 5 nm.

[0008] In the method for fabricating a multi-bit ferroelectric field-effect transistor based on ZrO2 intercalation of the present invention, preferably, the interface layer is Al2O3.

[0009] In the method for fabricating a multi-bit ferroelectric field-effect transistor based on ZrO2 intercalation of the present invention, preferably, the thickness of the interface layer is 1 nm to 3 nm.

[0010] This invention also discloses a multi-bit ferroelectric field-effect transistor based on ZrO2 intercalation, comprising: a substrate; an interface layer formed on the substrate; multiple HZO ferroelectric layers formed on the interface layer, with ZrO2 intercalations formed between adjacent HZO ferroelectric layers; a gate formed on the HZO ferroelectric layers; and a source and a drain formed on both sides of the gate in the substrate. By adjusting the thickness of each HZO ferroelectric layer, the ferroelectric domain size is controlled to give them different coercive fields. When different voltages are applied, a specific HZO ferroelectric layer is fully polarized, thereby obtaining a multi-bit ferroelectric field-effect transistor with a stable intermediate polarization state.

[0011] In the multi-bit ferroelectric field-effect transistor based on ZrO2 intercalation of the present invention, preferably, the thickness of the HZO ferroelectric layer is 2nm to 15nm.

[0012] In the multi-bit ferroelectric field-effect transistor based on ZrO2 intercalation of the present invention, preferably, the thickness of the ZrO2 intercalation layer is 0.5nm to 5nm.

[0013] In the multi-bit ferroelectric field-effect transistor based on ZrO2 intercalation of the present invention, preferably, the interface layer is Al2O3.

[0014] In the ZrO2 intercalated multi-bit ferroelectric field-effect transistor of the present invention, the thickness of the interface layer is preferably 1 nm to 3 nm.

[0015] Beneficial effects:

[0016] 1) By changing the Hf:Zr cycle ratio during the ALD growth of HZO, the grain size of HZO can be controlled by the insertion of ZrO2 intercalation, thereby increasing uniformity and avoiding excessively large grain size from affecting ferroelectric properties.

[0017] 2) ZrO2 intercalation can separate the HZO ferroelectric layer into different thicknesses. Ferroelectric layers of different thicknesses have different coercive fields. When different voltages are applied, the complete polarization of a specific ferroelectric layer can be achieved, which is beneficial to the stability of the intermediate state.

[0018] 3) Intercalation of orthorhombic ZrO2 is beneficial to promoting the transformation of HZO crystal phase from T phase to O phase and improving ferroelectric properties. Attached Figure Description

[0019] Figure 1 This is a flowchart of a method for fabricating a multi-bit ferroelectric field-effect transistor based on ZrO2 intercalation.

[0020] Figures 2-6 This is a schematic diagram of the structure of each stage of the fabrication method of a multi-bit ferroelectric field-effect transistor based on ZrO2 intercalation. Detailed Implementation

[0021] To make the objectives, technical solutions, and advantages of this invention clearer, the technical solutions in the embodiments of this invention will be clearly and completely described below with reference to the accompanying drawings. It should be understood that the specific embodiments described herein are only for explaining this invention and are not intended to limit this invention. The described embodiments are merely some embodiments of this invention, not all embodiments. Based on the embodiments of this invention, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of this invention.

[0022] In the description of this invention, it should be noted that the terms "upper," "lower," "vertical," and "horizontal," etc., indicate the orientation or positional relationship based on the orientation or positional relationship shown in the accompanying drawings. They are used only for the convenience of describing the invention and for simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, or be constructed and operated in a specific orientation. Therefore, they should not be construed as limitations on the invention. Furthermore, the terms "first" and "second" are used for descriptive purposes only and should not be construed as indicating or implying relative importance.

[0023] Furthermore, many specific details of the invention, such as the structure, materials, dimensions, processing techniques, and methods of the device, are described below to provide a clearer understanding of the invention. However, as those skilled in the art will understand, the invention may be implemented without adhering to these specific details. Unless specifically indicated below, various parts of the device may be made of materials known to those skilled in the art, or may employ materials with similar functionality developed in the future.

[0024] Figure 1 This is a flowchart illustrating the fabrication method of a multi-bit ferroelectric field-effect transistor based on ZrO2 intercalation. (Example:) Figure 1 As shown, the fabrication method of a multi-bit ferroelectric field-effect transistor based on ZrO2 intercalation includes the following steps:

[0025] In step S1, a 100nm thick SiO2 layer 101 is deposited on the Si substrate 100, and the gate window is exposed by photolithography etching, as shown below. Figure 2 As shown.

[0026] In step S2, the substrate 100 is first nitrided using N2 plasma in a physical vapor deposition (PVD) apparatus at a chamber temperature of 300°C, a pressure of 0.7 Torr, and a power of 45 W. Then, an Al2O3 interface layer 102 with a thickness of 1 nm to 3 nm is deposited on the Si substrate 100 at room temperature using atomic layer deposition (ALD). Next, the chamber temperature is raised to 300°C to grow an HZO ferroelectric layer 103 with a thickness of 2 nm to 15 nm. Preferably, the Hf:Zr growth cycle ratio is 1:1. Following this, a ZrO2 intercalation layer 104 with a thickness of 0.5 to 5 nm is grown, as follows... Figure 3 As shown. In this embodiment, three HZO ferroelectric layers 103 and two ZrO2 intercalation layers 104 are grown. However, the present invention is not limited to this. The thickness and stacking number of HZO layers and ZrO2 intercalation layers can be changed as needed.

[0027] The ZrO2 grown using the ALD method at 300℃ predominantly exhibits orthorhombic ZrO2 crystal structure. Therefore, it can serve as a nucleation layer to suppress the transformation of HfO2 from the tetragonal to the monoclinic phase, thereby increasing the content of orthorhombic HfO2 and improving ferroelectric properties. However, with increasing ZrO2 thickness, the antiferroelectric properties of ZrO2 itself and the increased partial voltage of the ZrO2 film suppress the ferroelectric properties of HZO, reducing remanent polarization. For a 10nm thick HZO ferroelectric layer, the maximum remanent polarization occurs when the ZrO2 nucleation layer thickness is 2nm. Based on this ratio, the ZrO2 intercalation thickness can be selected according to the HZO thickness. Furthermore, without ZrO2 intercalation, the HZO grain size is between 5nm and 10nm; with ZrO2 intercalation, the grain size can reach 20nm. Controlling the thickness of the HZO ferroelectric layer through ZrO2 intercalation allows for artificial control of the HZO grain height, and thus the grain size.

[0028] In step S3, a TiN layer with a thickness of 40nm to 80nm is deposited on the HZO ferroelectric layer 103 using physical vapor deposition as the gate 105, and then annealed in a nitrogen atmosphere. Figure 4 As shown.

[0029] In step S4, after etching away the SiO2 layer 101 on the source and drain, SiO2 sidewalls 106 are formed on both sides of the gate stack by chemical vapor deposition. Then, self-aligned source 107 and drain 108 are implanted with ions for doping. Finally, high-temperature rapid thermal annealing is performed to activate the doped ions, such as... Figure 5 As shown.

[0030] In step S5, Pt / Au is deposited on the source 107, drain 108, and gate 105 using physical vapor deposition as contact electrodes 109, 110, and 111, respectively. Figure 6 As shown.

[0031] like Figure 6 As shown, a multi-bit ferroelectric field-effect transistor based on ZrO2 intercalation includes: a substrate 100; an interface layer 102 formed on the substrate 100; multiple HZO ferroelectric layers 103 formed on the interface layer 102, with ZrO2 intercalation layers 104 formed between adjacent HZO ferroelectric layers 102; a gate 105 formed on the top HZO ferroelectric layer; gate sidewalls 106 formed on both sides of the gate 105; and a source 107 and a drain 108 formed on both sides of the gate 105 in the substrate 100. By adjusting the thickness of each HZO ferroelectric layer, the ferroelectric domain size is controlled to give them different coercive fields. When different voltages are applied, a specific HZO ferroelectric layer is fully polarized, resulting in a multi-bit ferroelectric field-effect transistor with a stable intermediate polarization state.

[0032] As the positive voltage applied to a multi-bit ferroelectric transistor gradually increases, the polarization direction gradually changes from vertically upward to vertically downward. However, only the two fully polarized states are low-energy states, while the others are high-energy states. Therefore, when in an intermediate state for a long time, the polarization direction of some domains will change, tending towards the low-energy state. Thus, the intermediate state cannot remain stable, affecting the stability of multi-state storage.

[0033] This application utilizes ZrO2 intercalation to divide HZO ferroelectric layers of varying thicknesses, enabling control over the size of ferroelectric domains. Ferroelectric domains of different sizes possess different coercive fields, requiring different voltages for complete polarization. Therefore, when the ferroelectric layer is in an intermediate state, one or more ferroelectric domains will be in a fully polarized state (low-energy state), thus stabilizing the intermediate state and facilitating the realization of multi-state storage.

[0034] The above description is merely a specific embodiment of the present invention, but the scope of protection of the present invention is not limited thereto. Any variations or substitutions that can be easily conceived by those skilled in the art within the scope of the technology disclosed in the present invention should be included within the scope of protection of the present invention.

Claims

1. A method for fabricating a multi-bit ferroelectric field-effect transistor based on ZrO2 intercalation, characterized in that, Includes the following steps: A SiO2 layer is deposited on the substrate, and the SiO2 layer is photolithographically and etched to expose the substrate to form a gate window; The above structure is subjected to nitriding treatment, and then an interface layer is deposited on the substrate; Multiple HZO ferroelectric layers are formed, and ZrO2 intercalation is formed between adjacent HZO ferroelectric layers; A gate is formed on the HZO ferroelectric layer and annealed in a nitrogen atmosphere; The SiO2 layer is etched away, and sidewalls are formed on both sides of the gate. Source and drain electrodes are formed on both sides of the gate electrode in the substrate. By adjusting the thickness of each HZO ferroelectric layer and controlling the ferroelectric domain size, different coercive fields can be obtained. When different voltages are applied, one or more HZO ferroelectric layers can be fully polarized, resulting in a multi-bit ferroelectric field-effect transistor with a stable intermediate polarization state.

2. The method for fabricating a multi-bit ferroelectric field-effect transistor based on ZrO2 intercalation according to claim 1, characterized in that, The thickness of the HZO ferroelectric layer is 2nm to 15nm.

3. The method for fabricating a multi-bit ferroelectric field-effect transistor based on ZrO2 intercalation according to claim 1, characterized in that, The thickness of the ZrO2 intercalation layer is 0.5 nm to 5 nm.

4. The method for fabricating a multi-bit ferroelectric field-effect transistor based on ZrO2 intercalation according to claim 1, characterized in that, The interface layer is Al2O3.

5. The method for fabricating a multi-bit ferroelectric field-effect transistor based on ZrO2 intercalation according to claim 4, characterized in that, The thickness of the interface layer is 1 nm to 3 nm.

6. A multi-qubit ferroelectric field-effect transistor based on ZrO2 intercalation, characterized in that, include: Substrate; An interface layer is formed on the substrate; A multilayer HZO ferroelectric layer is formed on the interface layer, and a ZrO2 intercalation layer is formed between adjacent HZO ferroelectric layers. A gate is formed on the HZO ferroelectric layer; The source and drain are formed on both sides of the gate in the substrate; By adjusting the thickness of each HZO ferroelectric layer and controlling the ferroelectric domain size, different coercive fields can be obtained. When different voltages are applied, one or more HZO ferroelectric layers can be fully polarized, resulting in a multi-bit ferroelectric field-effect transistor with a stable intermediate polarization state.

7. The multi-bit ferroelectric field-effect transistor based on ZrO2 intercalation according to claim 6, characterized in that, The thickness of the HZO ferroelectric layer is 2nm to 15nm.

8. The multi-bit ferroelectric field-effect transistor based on ZrO2 intercalation according to claim 6, characterized in that, The thickness of the ZrO2 intercalation layer is 0.5 nm to 5 nm.

9. The multi-bit ferroelectric field-effect transistor based on ZrO2 intercalation according to claim 6, characterized in that, The interface layer is Al2O3.

10. The multi-bit ferroelectric field-effect transistor based on ZrO2 intercalation according to claim 6, characterized in that, The thickness of the interface layer is 1 nm to 3 nm.

Images