Method for configuring hardware resources, electronic device and storage medium

Through the graphical interface, intuitively configure hardware resources and generate configuration files, the problem of cumbersome hardware resource management in the existing technology is solved, and the user experience and simulation verification efficiency is improved.

CN115291963BActive Publication Date: 2025-03-04XINHUAZHANG TECH CO LTD
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Patent Information

Application Number
CN202210692574.4
Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
Filing Date
2022-06-17
Publication Date
2025-03-04
Estimated Expiration
2042-06-17

AI Technical Summary

Technical Problem

In the prior art, managing hardware resources requires users to write complex configuration files, which leads to cumbersome and unintuitive writing process, and it is difficult to take into account readability, compactness and simplicity of analysis.

Method used

Interact with users through a graphical interface, intuitively configure hardware resources, generate new configuration files, and send them to hardware simulation tools to manage and configure hardware resources.

Benefits of technology

The process of hardware resource allocation is simplified, making it more intuitive and simple, improving the user experience, and improving the efficiency of simulation verification.

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Abstract

The present disclosure provides a method for configuring hardware resources, an electronic device, and a storage medium. The method includes: obtaining a first configuration file, the first configuration file describing the connection relationship between multiple peripheral components and a hardware simulation tool; receiving an editing instruction from a user to edit the first configuration file; modifying the first configuration file according to the editing instruction to generate a second configuration file; sending the second configuration file to the hardware simulation tool so that the hardware simulation tool configures at least a part of the multiple peripheral components according to the second configuration file.
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Description

Technical Field

[0001] The present disclosure relates to the field of chip verification, and in particular to a method for configuring hardware resources, an electronic device, and a storage medium. Background Art

[0002] When using hardware simulation tools to verify chip design, the hardware simulation tools need to manage the hardware resources used. These hardware resources can be peripheral components that cooperate with the hardware simulation tools (for example, network cards, mice, monitors, PCI-E devices, etc.).

[0003] Currently, managing hardware resources requires users to write hardware resource configuration files in the form of code, and writing hardware resource configuration files requires users to remember a large number of parameters and syntax. At the same time, the syntax of different manufacturers is usually different. The resource configuration files written cannot take into account readability, compactness, and ease of analysis at the same time. At the same time, the hardware resources corresponding to the resource configuration file may also be different from the actual hardware, resulting in problems such as the resource configuration file being unable to run.

[0004] How to help users intuitively and quickly generate hardware configuration resource files to configure hardware resources is an issue that needs to be addressed urgently. Summary of the invention

[0005] In view of this, the present disclosure proposes a method for configuring hardware resources, an electronic device, and a storage medium.

[0006] In a first aspect of the present disclosure, a method for configuring hardware resources is provided, comprising: obtaining a first configuration file, the first configuration file describing a connection relationship between a plurality of peripheral components and a hardware simulation tool; receiving an editing instruction from a user to edit the first configuration file; modifying the first configuration file according to the editing instruction to generate a second configuration file; and sending the second configuration file to the hardware simulation tool so that the hardware simulation tool configures at least a portion of the plurality of peripheral components according to the second configuration file.

[0007] In a second aspect of the present disclosure, an electronic device for configuring hardware resources is provided, comprising: an interface connected to a hardware simulation tool; a memory for storing a set of instructions; and at least one processor configured to execute the set of instructions so that the electronic device performs the method described in the first aspect.

[0008] According to a third aspect of the present disclosure, a non-transitory computer-readable storage medium is provided, wherein the non-transitory computer-readable storage medium stores a set of instructions for an electronic device, wherein the set of instructions is used to enable the electronic device to execute the method described in the first aspect.

[0009] The present disclosure provides a method for configuring hardware resources, an electronic device, and a storage medium, which interact with a user through a graphical interface, so that the user can intuitively modify the configuration of hardware resources (i.e., peripheral components) and generate a new configuration file. The hardware simulation tool can manage and configure hardware resources according to the new configuration file. The method provided by the present disclosure makes editing hardware resource configuration simple and intuitive, improves the user experience, and thus improves the efficiency of simulation verification. BRIEF DESCRIPTION OF THE DRAWINGS

[0010] In order to more clearly illustrate the technical solutions in the present disclosure or the prior art, the drawings required for use in the embodiments or the description of the prior art will be briefly introduced below. Obviously, the drawings in the following description are only for the present disclosure, and for ordinary technicians in this field, other drawings can be obtained based on these drawings without paying any creative work.

[0011] Figure 1 A schematic diagram showing exemplary hardware resource profile code is shown.

[0012] Figure 2 A schematic structural diagram of an exemplary electronic device according to an embodiment of the present disclosure is shown.

[0013] Figure 3A A schematic diagram showing an exemplary hardware connection relationship according to an embodiment of the present disclosure.

[0014] Figure 3B A schematic diagram showing an exemplary edited topology map according to an embodiment of the present disclosure is shown.

[0015] Figure 3C A schematic diagram showing an exemplary configuration file according to an embodiment of the present disclosure is shown.

[0016] Figure 4 A flowchart of an exemplary method for configuring hardware resources according to an embodiment of the present disclosure is shown. DETAILED DESCRIPTION

[0017] In order to make the objectives, technical solutions and advantages of the present disclosure more clearly understood, the present disclosure is further described in detail below in combination with specific embodiments and with reference to the accompanying drawings.

[0018] It should be noted that, unless otherwise defined, the technical terms or scientific terms used in the present disclosure should be understood by people with ordinary skills in the field to which the present disclosure belongs. The words "first", "second" and similar words used in the present disclosure do not indicate any order, quantity or importance, but are only used to distinguish different components. "Include" or "comprise" and similar words mean that the elements or objects appearing before the word include the elements or objects listed after the word and their equivalents, without excluding other elements or objects. "Connect" or "connected" and similar words are not limited to physical or mechanical connections, but may include electrical connections, whether direct or indirect.

[0019] Figure 1 A schematic diagram of exemplary hardware resource profile code 100 is shown.

[0020] As mentioned above, currently, managing hardware resources requires users to write hardware resource configuration files in the form of code. Figure 1 As shown, writing a hardware resource configuration file requires the user to remember a large number of parameters and syntaxes, and the generated configuration file is not user-friendly and intuitive.

[0021] In view of the above problems, the present disclosure provides a method for configuring hardware resources, an electronic device, and a storage medium, which interact with users through a graphical interface, so that users can intuitively modify the configuration of hardware resources and generate new configuration files. The hardware simulation tool can manage and configure hardware resources according to the new configuration file. The method provided by the present disclosure makes editing hardware resource configuration simple and intuitive, improves user experience, and thus improves the efficiency of simulation verification.

[0022] Figure 2 A schematic structural diagram of an exemplary electronic device 200 according to an embodiment of the present disclosure is shown.

[0023] The electronic device 200 may be, for example, a host computer. The electronic device 200 may include: a processor 202, a memory 204, a network interface 206, a peripheral interface 208, and a bus 210. The processor 202, the memory 204, the network interface 206, and the peripheral interface 208 may be connected to each other in communication within the electronic device 200 via the bus 210.

[0024] Processor 202 may be a central processing unit (CPU), an image processor, a neural network processor, a microcontroller, a programmable logic device, a digital signal processor, an application specific integrated circuit (ASIC), or one or more integrated circuits. Processor 202 may be used to perform functions related to the technology described in this disclosure. In some embodiments, processor 202 may also include multiple processors integrated into a single logical component. Figure 2 As shown, processor 202 may include a plurality of processors 202a, 202b, and 202c.

[0025] The memory 204 may be configured to store data (eg, instruction sets, computer codes, intermediate data, etc.). Figure 2 As shown, the stored data may include program instructions (e.g., program instructions for implementing the technology of the present disclosure) and data to be processed (e.g., the memory 204 may store temporary code generated by the compilation process). The processor 202 may also access the stored program instructions and data, and execute the program instructions to operate on the data to be processed. The memory 204 may include a non-transitory computer-readable storage medium, such as a volatile storage device or a non-volatile storage device. In some embodiments, the memory 204 may include a random access memory (RAM), a read-only memory (ROM), an optical disk, a magnetic disk, a hard disk, a solid-state drive (SSD), a flash memory, a memory stick, etc.

[0026] The network interface 206 can be configured to enable the electronic device 200 to communicate with one or more other external devices via a network. The network can be any wired or wireless network capable of transmitting and / or receiving data. For example, the network can be a wired network, a local wireless network (e.g., Bluetooth, WiFi, near field communication (NFC), etc.), a cellular network, the Internet, or a combination thereof. It is understood that the type of network is not limited to the above specific examples. In some embodiments, the network interface 206 can include any number of network interface controllers (NICs), radio frequency modules, transceivers, modems, routers, gateways, adapters, cellular network chips, etc., in any combination.

[0027] The peripheral interface 208 can be configured to connect the electronic device 200 to one or more peripheral devices to achieve information input and output. For example, the peripheral devices can include input devices such as a keyboard, a mouse, a touch pad, a touch screen, a microphone, and various sensors, and output devices such as a display, a speaker, a vibrator, and an indicator light.

[0028] The bus 210 can be configured to transmit information between various components of the electronic device 200 (e.g., the processor 202, the memory 204, the network interface 206, and the peripheral interface 208), and can be, for example, an internal bus (e.g., a processor-memory bus), an external bus (USB port, PCI-E bus), etc.

[0029] In some embodiments, in addition to Figure 2 In addition to the processor 202, memory 204, network interface 206, peripheral interface 208, and bus 210 shown and described above, the electronic device 200 may also include one or more other components required to achieve normal operation and / or one or more other components required to implement the solution of the embodiments of the present disclosure. In some embodiments, the electronic device 200 may not include Figure 2 One or more components shown in .

[0030] It should be noted that, although the composition architecture of the electronic device 200 only shows the processor 202, the memory 204, the network interface 206, the peripheral interface 208 and the bus 210, in the specific implementation process, the composition architecture of the electronic device 200 may also include other components necessary for normal operation. In addition, it can be understood by those skilled in the art that the composition architecture of the electronic device 200 may also only include the components necessary for implementing the embodiment of the present disclosure, and does not necessarily include all the components shown in the figure.

[0031] The electronic device 200 may run a debugging tool (eg, FusionDebug tool produced by Xinhuazhang Technology Co., Ltd.) to implement the method of the embodiment of the present disclosure.

[0032] Figure 3A A schematic diagram of an exemplary hardware connection relationship 300 according to an embodiment of the present disclosure is shown.

[0033] The electronic device 200 can be connected to the hardware simulation tool 302 through the peripheral interface 208. The hardware simulation tool 302 here can be, for example, the HuaPro-P1 simulation tool produced by Xinhuazhang Technology Co., Ltd. The hardware simulation tool 302 can receive the logic system design 304 for simulation verification. During the simulation verification process, the hardware simulation tool 302 can be connected to the peripheral component 3062 through the interface 3082, to the peripheral component 3064 through the interface 3084, and to the peripheral component 3066 through the interface 3086. The peripheral components here may include FPGA, daughter card, cable, network card, memory card, etc.

[0034] In some embodiments, the electronic device 200 can obtain resource information of peripheral components 3062, 3064, 3066 connected to the hardware simulation tool 302, and generate a configuration file 312 according to the resource information. The resource information may include at least one of the name, type, or connection relationship of the peripheral components 3062, 3064, 3066. The electronic device 200 can generate a graphical interface according to the acquired resource information. The graphical interface may include a topology map 310 describing the peripheral components 3062, 3064, 3066 and their connection relationship, and is displayed on a display, for example, through the peripheral interface 208. The topology map 310 corresponds to the configuration file 312. From the topology map 310, the user can clearly see the connection relationship between the peripheral components 3062, 3064, 3066 and the hardware simulation tool 302.

[0035] The hardware simulation tool 302 may receive the logic system design 304 and perform simulation verification on the logic system design 304 using peripheral components.

[0036] In some embodiments, the peripheral components 3062, 3064, and 3066 in the topology map 310 may include peripheral components that are not needed during the simulation verification process. At this time, according to the needs of the simulation verification, the user can edit the topology map 310. The electronic device 200 can receive the user's editing instructions. For example, the user can directly edit the topology map 310 in the graphical interface and remove the peripheral component 3066 that is not needed during the simulation verification process. The topology map 310 may also lack other peripheral components required during the simulation verification process, such as Figure 3A 3068 that is not in the topology diagram 310. The user can directly connect the peripheral component 3068 to the hardware simulation tool 302 through the interface 3088 in the graphical interface. It should be noted that since the peripheral component 3068 is not connected to the hardware simulation tool 302 at this time, the peripheral component 3068 is not yet available. When displaying the topology diagram, the electronic device 200 can highlight the peripheral component 3068 and its connection method to prompt the user that the peripheral component 3068 should be connected to the hardware simulation tool 302 according to the connection relationship of the topology diagram 310.

[0037] Figure 3B A schematic diagram of an exemplary edited topology map 320 according to an embodiment of the present disclosure is shown.

[0038] After the above editing operation, the edited topology diagram 320 can be displayed in the graphical interface. The hardware simulation tool 302 is connected to the peripheral component 3062 through the interface 3082, connected to the peripheral component 3064 through the interface 3084, and connected to the peripheral component 3068 through the interface 3088. Figure 3ACompared to the topology diagram 310 shown in FIG, the peripheral component 3068 in the topology diagram 320 replaces the peripheral component 3066 to perform simulation verification of the logic system design 304. As described above, in Figure 3B , peripheral components 3068 and their connections are shown in a highlighted (eg, bold) manner.

[0039] It is understandable that in addition to removing peripheral component 3066 or adding peripheral component 3068, the user can also perform other editing operations on topology map 310 to meet the needs of the simulation verification process. The present disclosure does not limit the user's editing operations. For example, the user can edit topology map 310 to change the connection relationship of peripheral components.

[0040] The topology map is user-friendly and easy to edit, but cannot be directly read by the hardware simulation tool 302. The hardware simulation tool 302 can manage the peripheral components used through a configuration file (e.g., a configuration file in JSON format). The electronic device 200 can generate a configuration file 322 based on the edited topology map 320, and send the configuration file 322 to the hardware simulation tool 302. The topology map 320 corresponds to the configuration file 322. For example, the user's editing operation on the topology map 320 can be mapped to the modification of the configuration file 322. The hardware simulation tool 302 can configure the corresponding peripheral components 3062, 3064 and 3068 according to the received configuration file 322.

[0041] Figure 3C A schematic diagram of an exemplary configuration file 322 according to an embodiment of the present disclosure is shown.

[0042] The configuration file 322 may be written in the resource specification language of Xinhuazhang. Figure 3C As shown, the configuration file 322 can directly use "+" or "-" to indicate adding or removing peripheral components. The configuration file 322 can use the JSON format to describe resource information, and the JSON format is a code format that is friendly to both users and the electronic device 200.

[0043] In some embodiments, the electronic device 200 can provide a command line tool to the user and generate a text file describing resource information. Similar to the graphical interface, the user can cut, supplement or modify the text file according to the needs of the simulation verification process. For example, the text file can be edited through an editor such as VI, Emacs, etc. to obtain a new text file that meets the user's needs. The electronic device 200 can generate a configuration file based on the new text file for the hardware simulation tool 302 to read.

[0044] It is understandable that the graphical interface and command line tool here are merely examples, and the electronic device 200 can also generate other visual or user-editable formats for the user to edit based on the resource information.

[0045] As described above, the modified configuration file 322 may be different from the actual current peripheral component connection mode. In order to match the configuration file 322, the user needs to adjust the actual connection of the peripheral component, and this process may cause an operation error (for example, an interface connection error). Therefore, in some embodiments, the electronic device 200 can determine whether the configuration file 322 matches the resource information of multiple peripheral components connected to the hardware simulation tool 302. For example, the electronic device 200 performs a verification mechanism to match the peripheral components required to be configured in the configuration file 322 with the resource information of the peripheral components 3062, 3064, and 3068 actually connected to the hardware simulation tool 302. In response to the configuration file 322 not matching the resource information, the electronic device 200 can highlight the unmatched peripheral components. For example, the electronic device 200 can highlight (for example, highlight) the unmatched peripheral components in the configuration file 322 or the topology map 320. Through the above-mentioned verification mechanism and highlighting, the electronic device 200 of the embodiment of the present disclosure can ensure that the actual connection of the peripheral component corresponds to the configuration file. Even if an operation error occurs, the error can be found in time for adjustment.

[0046] Back to Figure 3A In other embodiments, the configuration file 312 may be written by the user, rather than generated by the electronic device 200 according to the resource information of the peripheral components 3062, 3064, and 3066. The peripheral components involved in the configuration file 312 written by the user may be different from the actual peripheral components, such as the lack of a peripheral component or the inconsistent connection relationship of a peripheral component, which may cause the configuration file to fail to run. Some peripheral component conditions provided in the configuration file 312 written by the user may also not be automatically detected, thereby affecting the automatic verification mechanism of the peripheral component conditions. Similar to the electronic device 200 determining whether the configuration file 322 matches the resource information of multiple peripheral components connected to the hardware simulation tool 302, the electronic device 200 can determine whether the configuration file 312 written by the user matches the resource information of the acquired peripheral components. In response to the configuration file 312 written by the user not matching the resource information, the electronic device 200 can highlight the unmatched peripheral components.

[0047] In this way, the electronic device 200 interacts with the user through a graphical interface, so that the user can intuitively modify the configuration of the hardware resources and generate a new configuration file. The hardware simulation tool 302 can manage and configure the hardware resources according to the new configuration file. The electronic device 200 can also match the configuration file with the actually connected hardware resources and highlight the mismatched hardware resources. Through the method provided by the present disclosure, the user can edit the hardware resource configuration more easily and intuitively, and can find the mismatched parts in the hardware resource configuration more quickly, improve the user experience, and improve the efficiency of simulation verification.

[0048] Figure 4 FIG. 4 is a flowchart of an exemplary method 400 for configuring hardware resources according to an embodiment of the present disclosure. The method 400 may be Figure 2 The method 400 is executed by the electronic device 200, and more specifically, by a debugging tool running on the electronic device 200. The method 400 may include the following steps.

[0049] In step S402, the electronic device 200 may obtain a first configuration file (eg, Figure 3A The first configuration file may describe a plurality of peripheral components (eg, Figure 3A 3062, 3064, and 3066) and hardware simulation tools (e.g., Figure 3A The connection relationship of the hardware simulation tool 302).

[0050] In some embodiments, the electronic device 200 may acquire a plurality of peripheral components (eg, Figure 3A 3062, 3064 and 3066 in the peripheral components), and generates a first configuration file (for example, Figure 3A Configuration file 312 in ).

[0051] In some embodiments, the resource information may include at least one of the names (e.g., "CARD" or "BOARD"), types (e.g., "Cable" or "TWO_CHIP_BORRD"), or connection relationships of the plurality of peripheral components. The electronic device 200 may generate a graphical interface based on the resource information. The graphical interface may include a first topology diagram of the plurality of peripheral components and the hardware simulation tool (e.g., Figure 3A The first topology map corresponds to the first configuration file (for example, Figure 3A 310 and the configuration file 312).

[0052] In step S404, the electronic device 200 may receive an editing instruction from a user to edit the first configuration file.

[0053] In step S406, the electronic device 200 may modify the first configuration file according to the editing instruction to generate a second configuration file (eg, Figure 3B Configuration file 322 in ).

[0054] In some embodiments, the electronic device 200 may receive the editing instruction via the graphical interface. The editing instruction may include at least one of removing a peripheral component (e.g., removing peripheral component 3066), adding a peripheral component (e.g., adding peripheral component 3068), or changing the connection relationship of a peripheral component. The electronic device 200 may edit the first topology map according to the editing instruction to obtain a second topology map (e.g., Figure 3B The electronic device 200 may generate the second configuration file (eg, Figure 3B The configuration file 322 in ). The configuration file may be written in the resource specification language of Xinhuazhang (for example, Figure 3C Configuration file 322 shown).

[0055] In step S408, the electronic device 200 may send the second configuration file to the hardware simulation tool 302 so that the hardware simulation tool 302 performs the operation according to the second configuration file (eg, Figure 3B The configuration file 322 in the configuration file 322) configures at least a portion of the plurality of peripheral components (for example, Figure 3B Peripheral components 3062, 3064 and 3068 in it).

[0056] In some embodiments, the electronic device 200 may further determine whether the second configuration file matches the resource information, and in response to the second configuration file not matching the resource information, the unmatched peripheral components may be highlighted (e.g., the unmatched peripheral components may be highlighted in the configuration file 322 or the topology map 320).

[0057] In some other embodiments, the first configuration file (eg, Figure 3A The configuration file 312 in the hardware simulation tool may be written by a user. The electronic device 200 may obtain the plurality of peripheral components (eg, Figure 3A The first configuration file written by the user may include resource information of the peripheral components 3062, 3064 and 3066). Because the peripheral components involved in the first configuration file written by the user may be different from the actual peripheral components, the first configuration file may not be able to run or affect the automatic verification mechanism of the peripheral component status. Similarly, the electronic device 200 can determine whether the first configuration file matches the resource information; in response to the first configuration file not matching the resource information, the non-matching peripheral components are highlighted.

[0058] The present disclosure also provides an electronic device for configuring hardware resources. The electronic device may be Figure 2 The electronic device 200 shown. The electronic device 200 may include an interface connected to a hardware simulation tool; a memory for storing a set of instructions; and at least one processor configured to execute a computer program stored in the memory 204 to implement a method for configuring hardware resources consistent with the present disclosure, such as the above exemplary method (e.g., Figure 4 The method 400 shown in FIG. 4 is not described in detail here.

[0059] The present disclosure also provides a non-transitory computer-readable storage medium. The non-transitory computer-readable storage medium stores a set of instructions of an electronic device. When the set of instructions is executed, the electronic device 200 can implement a method for configuring hardware resources consistent with the present disclosure, such as the above exemplary method (for example, Figure 4 The method 400 shown in FIG. 4 is not described in detail here.

[0060] The computer-readable medium of this embodiment includes permanent and non-permanent, removable and non-removable media, and information storage can be implemented by any method or technology. Information can be computer-readable instructions, data structures, modules of programs, or other data. Examples of computer storage media include, but are not limited to, phase change memory (PRAM), static random access memory (SRAM), dynamic random access memory (DRAM), other types of random access memory (RAM), read-only memory (ROM), electrically erasable programmable read-only memory (EEPROM), flash memory or other memory technology, read-only compact disk read-only memory (CD-ROM), digital versatile disk (DVD) or other optical storage, magnetic cassettes, magnetic tape magnetic disk storage or other magnetic storage devices or any other non-transmission media that can be used to store information that can be accessed by a computing device.

[0061] The above describes specific embodiments of the present disclosure. Other embodiments are within the scope of the appended claims. In some cases, the actions or steps recorded in the claims can be performed in an order different from that in the embodiments and still achieve the desired results. In addition, the processes depicted in the drawings do not necessarily require the specific order or continuous order shown to achieve the desired results. In some embodiments, multitasking and parallel processing are also possible or may be advantageous.

[0062] Those skilled in the art should understand that the discussion of any of the above embodiments is merely illustrative and is not intended to imply that the scope of the present disclosure (including the claims) is limited to these examples. Based on the concept of the present disclosure, the technical features in the above embodiments or different embodiments may be combined, the steps may be implemented in any order, and there are many other variations of the different aspects of the present disclosure as described above, which are not provided in detail for the sake of simplicity.

[0063] In addition, to simplify the description and discussion, and in order not to obscure the present disclosure, known power / ground connections to integrated circuit (IC) chips and other components may or may not be shown in the provided figures. In addition, the devices may be shown in the form of block diagrams to avoid obscuring the present disclosure, and this also takes into account the fact that the details of the implementation of these block diagram devices are highly dependent on the platform on which the present disclosure will be implemented (i.e., these details should be fully within the scope of understanding of those skilled in the art). Where specific details (e.g., circuits) are set forth to describe exemplary embodiments of the present disclosure, it will be apparent to those skilled in the art that the present disclosure may be implemented without these specific details or with variations in these specific details. Therefore, these descriptions should be considered illustrative rather than restrictive.

[0064] Although the present disclosure has been described in conjunction with specific embodiments of the present disclosure, many replacements, modifications and variations of these embodiments will be apparent to those skilled in the art from the foregoing description. For example, other memory architectures (e.g., dynamic RAM (DRAM)) may use the embodiments discussed.

[0065] The present disclosure is intended to cover all such substitutions, modifications and variations that fall within the broad scope of the appended claims. Therefore, any omissions, modifications, equivalent substitutions, improvements, etc. made within the spirit and principles of the present disclosure should be included in the protection scope of the present disclosure.

Claims

1. A method for configuring hardware resources, comprising: Obtaining a first configuration file, wherein the first configuration file describes a connection relationship between a plurality of peripheral components and a hardware simulation tool; The plurality of peripheral components are used to cooperate with the hardware simulation tool to simulate the logic system design; receiving an editing instruction from a user to edit the first configuration file; modifying the first configuration file according to the editing instruction to generate a second configuration file; Sending the second configuration file to the hardware emulation tool so that the hardware emulation tool configures at least a portion of the plurality of peripheral components according to the second configuration file; Acquiring the first configuration file further includes: acquiring resource information of the plurality of peripheral components connected to the hardware simulation tool; generating a first configuration file according to the resource information; The method further comprises: determining whether the second configuration file matches the resource information; In response to the second configuration file not matching the resource information, highlighting the non-matching peripheral components, wherein: The editing instruction includes at least one of removing a peripheral component, adding a peripheral component, or changing a connection relationship of a peripheral component.

2. The method according to claim 1, wherein: The resource information includes at least one of the names, types, or connection relationships of the plurality of peripheral components, and generating a first configuration file according to the resources further includes: A graphical interface is generated according to the resource information, wherein the graphical interface includes the plurality of peripheral components and a first topology map of the hardware simulation tool, wherein the first topology map corresponds to the first configuration file.

3. The method according to claim 2, wherein: Receiving an editing instruction from a user to edit the first configuration file to generate a second configuration file further includes: Receiving the editing instruction via the graphical interface; Edit the first topological map according to the editing instruction to obtain a second topological map; The second configuration file is generated based on the second topology map.

4. The method according to claim 1, wherein: The first configuration file is written by a user, and the method further comprises: acquiring resource information of the plurality of peripheral components connected to the hardware simulation tool; determining whether the first configuration file matches the resource information; In response to the first configuration file not matching the resource information, the non-matching peripheral components are highlighted.

5. An electronic device comprising: Interface,connected to the hardware simulation tool; a memory for storing a set of instructions; as well as At least one processor is configured to execute the set of instructions so that the electronic device performs the method according to any one of claims 1 to 4.

6. A non-transitory computer-readable storage medium storing a set of instructions for an electronic device, wherein when the set of instructions is executed, the electronic device executes the method according to any one of claims 1 to 4.

Citation Information

Patent Citations

  • A method and a device for generating a configuration file

    CN109861869A

  • System and method for deploying graphical diagram topologies

    US20180373961A1