Device Short-Term Power Failure Recovery Circuit, Electronic Device, and Electronic Device Power Failure Recovery Method

Abstract

The present invention relates to a circuit for recovering a short power failure of a device, an electronic device, and a method for recovering a short power failure of an electronic device. The circuit comprises: a processor, a power supply detection unit, a power conversion unit, an operating voltage generating unit, and a delayed power failure power supply unit. The power supply detection unit generates a first detection level when the power supply input terminal loses power and generates a second detection level when the power is restored. The delayed power failure power supply unit continues to generate the first voltage when receiving a conversion voltage and for a first preset time period after the conversion voltage is turned off. The detection signal input terminal of the processor is connected to the power supply detection unit and is configured to save current configuration data, enter a dormant state, and start periodic self-triggering when receiving the first detection level, and stop periodic self-triggering when receiving the second detection level. The processor enters a dormant state when self-triggering ends and restores current configuration data according to the second detection level during periodic self-triggering. The implementation of the present invention can achieve automatic recovery of a device after a short power failure.

Description

Technical Field

[0001] The present invention relates to the technical field of electronic circuits, and more particularly to a short-time power-off recovery circuit for a device, an electronic device, and a power-off recovery method for an electronic device. Background Art

[0002] When the grid voltage is unstable, intermittent outages can cause electrical equipment to reset all data due to power outages, requiring users to reconfigure or restart many processes from the beginning. For example, if a rice cooker is set to cook on schedule, a brief power outage may prevent the rice from completing. Alternatively, a brief power outage during cooking may prevent the rice from continuing or force the cooker to restart.

[0003] Currently, to enable devices to resume operation after a short power outage, most systems use a method called low-voltage detection to write to the Flash memory (FLASH) to save data during a power outage and read the Flash memory upon power-up to restore the microcontroller's pre-power-out operating parameters. However, due to the Flash memory's limited write cycles, it is impossible to save all RAM data and restore it to its pre-power-out state. Summary of the Invention

[0004] The technical problem to be solved by the present invention is to provide a short-time power failure recovery circuit for a device, an electronic device and a power failure recovery method for an electronic device.

[0005] The technical solution adopted by the present invention to solve the technical problem is: constructing a short-time power-off recovery circuit for equipment, including: a processor, a power supply detection unit, a power conversion unit, a working voltage generation unit and a delayed power-off power supply unit;

[0006] The power supply detection unit is connected to the power supply input terminal of the device, and is used to generate a first detection level when the power supply input terminal is powered off, and generate a second detection level when the power supply input terminal is powered on;

[0007] The power conversion unit is connected to the power supply input terminal of the device and is used to generate a conversion voltage;

[0008] The delayed power-off power supply unit is connected to the power conversion unit, the power supply detection unit and the power supply terminal of the processor, and is configured to generate a first voltage when receiving the converted voltage, and continue to generate the first voltage within a preset time period when the converted voltage is turned off;

[0009] The working voltage generating unit is connected to the power conversion unit and the working circuit of the device, and is used to generate a second voltage when receiving the converted voltage;

[0010] The detection signal input terminal of the processor is connected to the power supply detection unit, and is used to save the current configuration data and enter the dormant state and start the periodic self-triggering when receiving the first detection level, and stop the periodic self-triggering when receiving the second detection level;

[0011] The processor enters a dormant state when the self-triggering ends, and restores the current configuration data according to the second detection level during the periodic self-triggering.

[0012] Preferably, in the device short-time power-off recovery circuit of the present invention, the power conversion unit includes a primary voltage conversion circuit and a secondary voltage conversion circuit, wherein the primary voltage conversion circuit is connected to the power supply input terminal of the device, and the secondary voltage conversion circuit includes an LDO chip U2, a first capacitor, and a first diode;

[0013] The third pin of the LDO chip U2 is connected to the primary voltage conversion circuit, the second pin of the LDO chip U2 is respectively connected to the delayed power-off power supply unit, the working voltage generating unit and the first end of the first capacitor, the second end of the first capacitor is grounded, the first end of the LDO chip U2 is connected to the anode of the first diode, and the cathode of the first diode is grounded.

[0014] Preferably, in the device short-time power failure recovery circuit of the present invention, the delayed power-off power supply unit includes a second diode and a charging circuit;

[0015] An anode of the second diode is connected to the power conversion unit, and a cathode of the second diode is connected to the charging circuit.

[0016] Preferably, in the device short-time power-off recovery circuit of the present invention, the charging circuit includes a charging capacitor, a first end of the charging capacitor is connected to the cathode of the second diode, and a second end of the charging capacitor is grounded.

[0017] Preferably, in the device short-time power-off recovery circuit of the present invention, the periodic self-triggering of the processor includes watchdog triggering or RTC triggering.

[0018] Preferably, in the short-time power-off recovery circuit of the device of the present invention, the working voltage generating unit includes a third diode and a second capacitor, the anode of the third diode is connected to the power conversion unit, the cathode of the third diode is connected to the first end of the second capacitor, and the second end of the second capacitor is grounded.

[0019] Preferably, in the short-time power failure recovery circuit of the device of the present invention, the power supply input end of the device includes a first input end for connecting to an AC live wire input and a second input end for connecting to an AC neutral wire input;

[0020] The power supply detection unit includes a zero-crossing detection circuit, a first end of the zero-crossing detection circuit is connected to the first input end, a second end of the zero-crossing detection circuit is connected to the detection signal input end of the processor, and a third end of the zero-crossing detection circuit is connected to the delayed power-off power supply unit.

[0021] Preferably, in the device short-time power-off recovery circuit of the present invention, the zero-crossing detection circuit includes: a switch tube, a fourth diode, a fifth diode, a first resistor, a second resistor, a third resistor and a third capacitor;

[0022] The first end of the first resistor is connected to the first input end, the second end of the first resistor is connected to the anode of the fourth diode, the cathode of the fourth diode is connected to the cathode of the fifth diode, the first end of the second resistor, the first end of the third capacitor and the third end of the switching tube, the first end of the switching tube is connected to the first end of the third resistor and the detection signal input end of the processor, the second end of the third resistor is connected to the delayed power-off power supply unit, and the second end of the switching tube, the cathode of the fifth diode, the second end of the second resistor and the second end of the third capacitor are all grounded.

[0023] Preferably, in the short-time power-off recovery circuit of the device of the present invention, the processor enters a timing state when the self-triggering starts to obtain the duration of the periodic self-triggering;

[0024] The processor is further configured to trigger its configuration data output terminal to output current to the connected device when the duration of the periodic self-triggering is a second preset duration, wherein the second preset duration is less than or equal to the first preset duration.

[0025] In addition, the present invention also constructs an electronic device, comprising: a power supply input terminal for connecting to an external power input, a working circuit for performing work, and a short-time power-off recovery circuit for the device as described in any one of the above, wherein:

[0026] The power supply input end is connected to the short-time power failure recovery circuit of the device, the power supply detection unit and the power conversion unit, and the working circuit is connected to the short-time power failure recovery circuit of the device, the working voltage generation unit and the configuration data output end of the processor.

[0027] The present invention also provides a method for recovering an electronic device from a power failure, the electronic device comprising: a power supply input terminal for connecting to an external power supply input, a working circuit for performing work, and a short-term power failure recovery circuit for the device as described in any one of the above items;

[0028] The method comprises performing the following steps after the electronic device starts working:

[0029] S1. Monitoring a level generated by the power supply detection unit, and triggering the processor to save its current configuration data and enter a sleep state when the power supply detection unit generates a first detection level;

[0030] S2. Triggering periodic self-triggering of the processor, wherein the processor enters a dormant state when the self-triggering ends;

[0031] S3, determining whether the power supply detection unit generates a second detection level; if so, executing step S4; otherwise, executing step S2 and subsequent actions until the processor is powered off;

[0032] S4. Trigger the processor to configure the working circuit according to the current configuration data.

[0033] Preferably, the electronic device power failure recovery method of the present invention further includes:

[0034] S31, the processor enters a timing state when the self-triggering starts to obtain the duration of the periodic self-triggering;

[0035] S32, determining whether the duration of the periodic self-triggering is less than a second preset duration, if so, executing step S31, otherwise executing step S33; wherein the second preset duration is less than or equal to the first preset duration;

[0036] S33 , triggering the configuration data output terminal of the processor to output current to the connected device until the processor is powered off.

[0037] The device short-time power failure recovery circuit, electronic device and electronic device power failure recovery method implemented in the present invention have the following beneficial effects: automatic recovery of the device after a short power failure is achieved. BRIEF DESCRIPTION OF THE DRAWINGS

[0038] The present invention will be further described below with reference to the accompanying drawings and embodiments, in which:

[0039] Figure 1 This is a logic block diagram of an embodiment of a short-time power-off recovery circuit for a device according to the present invention;

[0040] Figure 2 The present invention is a circuit diagram of an embodiment of a short-time power-off recovery circuit for a device. DETAILED DESCRIPTION

[0041] In order to have a clearer understanding of the technical features, purposes and effects of the present invention, specific embodiments of the present invention are now described in detail with reference to the accompanying drawings.

[0042] like Figure 1As shown, in a first embodiment of a short-time power-off recovery circuit for a device of the present invention, the circuit includes: a processor 150, a power supply detection unit 140, a power conversion unit 110, an operating voltage generating unit 130, and a delayed power-off power supply unit 120; the power supply detection unit 140 is connected to the power supply input terminal 210 of the device, and is used to generate a first detection level when the power supply input terminal 210 is powered off, and to generate a second detection level when the power supply input terminal 210 is powered on; the power conversion unit 110 is connected to the power supply input terminal of the device, and is used to generate a conversion voltage; the delayed power-off power supply unit 120 is connected to the power conversion unit 110, the power supply detection unit 140, and the power supply terminal of the processor 150, and is used to generate a first detection level when the power supply input terminal 210 is powered off, and to generate a second detection level when the power supply input terminal 210 is powered on; The first voltage is generated upon receiving the conversion voltage and continues to be generated for a first preset duration when the conversion voltage is turned off. The operating voltage generating unit 130 is connected to the power conversion unit and the device's operating circuit 220 and is configured to generate a second voltage upon receiving the conversion voltage. The detection signal input terminal of the processor 150 is connected to the power supply detection unit 140 and is configured to save the current configuration data, enter a dormant state, and begin periodic self-triggering upon receiving the first detection level, and stop the periodic self-triggering upon receiving the second detection level. The processor 150 enters a dormant state upon the end of the self-triggering, and the processor restores the current configuration data according to the second detection level during the periodic self-triggering. Specifically, the power supply input terminal 210 is the main power supply terminal of the electronic device, that is, the power supply input terminal 210 is connected to the external power output to power the electronic device. The power supply detection unit 140 is connected to the power supply input terminal 210 and is configured to detect whether the power supply input terminal 210 is receiving power input, that is, whether it is in a powered-on state or a powered-off state. When there is external power input, the power supply detection unit 140 detects that the power supply input terminal 210 is in a powered-on state and generates a second detection level accordingly. When there is no external power input, the power supply detection unit 140 detects that the power supply input terminal 210 is in a power-off state and generates a first detection level accordingly. The power conversion unit 11 converts the external power supply of the power supply input terminal 210 to obtain a conversion voltage. One path of the conversion voltage generates an operating voltage, i.e., a second voltage, through the operating voltage generation unit 130 to power the working circuit 220 of the electronic device. Another path in the conversion circuit generates a first voltage through the delayed power-off power supply unit 120 to power the processor 150 and the power supply detection unit 140. Among them, when the delayed power-off power supply unit 120 turns off the conversion voltage, it will continue to provide the first voltage output within a preset time period to continue to power the power supply detection unit 140 and the processor 150. In normal working state, the power supply detection unit 140 detects that the power supply input terminal is powered on and outputs a second detection level. The processor 150 is in normal working state according to the second detection level and normally configures the working circuit 220 of the electronic device.When the power supply detection unit 140 detects a power outage at the power supply input 210, it outputs a first detection level. Due to the delayed power-off of the delayed power supply unit 120, the processor 150 continues to operate and saves the current configuration data. To conserve power, the processor 150 begins to enter a periodic sleep state. After entering the sleep state, it self-triggers at a preset interval to enter a brief operating state before re-entering the sleep state. During this periodic self-triggered period, when the power supply input of the electronic device is powered on, that is, when the processor 150 detects a second detection level, it reconfigures the electronic device's operating circuit 220 based on the saved current configuration data, ensuring that the electronic device's operating state remains consistent before and after the power outage. During the first preset duration of the first voltage, the processor 150 self-triggers at preset intervals until the second detection level is detected. If the power supply input of the electronic device remains unpowered during the preset duration of the first voltage, that is, when the delayed power supply unit 120 is completely powered off, the processor 150 also powers off, and the electronic device returns to a normal power-off state. When powered on again, the processor 150 will operate according to the normal power-on workflow. When the processor 150 is in a periodic self-triggering state, it can actively detect whether a second detection level is generated when it exits the sleep state. Alternatively, when in the sleep state, the generated second detection level can directly trigger the processor to exit the sleep state.

[0043] Optionally, the periodic self-triggering of the processor 150 includes a watchdog trigger or an RTC trigger. Specifically, the self-triggering of the processor 150 can be a watchdog trigger or an RTC trigger. The trigger period can be set as needed, wherein the trigger period needs to be less than the delay time of the delayed power-off power supply unit 120, that is, the preset time. The trigger period is usually set to 1s. That is, the processor 150 is triggered to enter the working state once every 1s. Figure 2 As shown, the processor includes a chip U2 and its peripheral circuits.

[0044] In one embodiment, the processor 150 enters a timing state upon the start of self-triggering to obtain the duration of the periodic self-triggering. The processor 150 is further configured to trigger its configuration data output port to output current to the connected device when the duration of the periodic self-triggering reaches a second preset duration, wherein the second preset duration is less than or equal to the first preset duration. Specifically, the processor 150 may also enter a timing state upon exiting a sleep state to time the duration of its periodic self-triggering. Since the processor 150 begins periodic self-triggering upon detecting a first detection level, this can also be understood as timing the duration of the first detection level, i.e., timing the power-off time. After obtaining the timed duration, the processor determines whether the timed duration reaches the second preset duration. If the second detection level has not been detected, i.e., power has not been applied, the processor 150 may directly output current through its configuration data output port to discharge the processor's power supply, completely de-energizing the processor 150 and entering the power-off state. In this case, the second preset duration is less than or equal to the first preset duration. When the second preset duration is less than the first preset duration, that is, when the processor power supply is completely cut off, the processor is automatically discharged. For example, the maximum power supply time of the delayed power supply circuit is 100 seconds, but due to the capacitance deviation in the hardware circuit, the shortest may be 80 seconds. The second preset duration ensures that if the second detection level is not received for more than 60 seconds, the configuration data will not be restored.

[0045] Optional, such as Figure 2 As shown, the power conversion unit includes a primary voltage conversion circuit and a secondary voltage conversion circuit, wherein the primary voltage conversion circuit is connected to the power input terminal of the device, and the secondary voltage conversion circuit includes an LDO chip U2, a first capacitor, and a first diode. The third pin of the LDO chip U2 is connected to the primary voltage conversion circuit, and the second pin of the LDO chip U2 is respectively connected to the delayed power-off power supply unit, the working voltage generation unit, and the first end of the first capacitor. The second end of the first capacitor is grounded. The first end of the LDO chip U2 is connected to the anode of the first diode, and the cathode of the first diode is grounded. Specifically, the primary voltage conversion circuit is used to perform preliminary conversion of the power input of the power supply input terminal of the electrical device, and the secondary voltage conversion circuit is used to further convert the voltage obtained by the preliminary conversion. The voltage conversion is mainly performed by the LDO chip U2. The first pin of the LDO chip U2 is grounded through the diode D5 (corresponding to the first diode). The output end of the LDO chip U2 (corresponding to the second pin) is respectively connected to the working voltage generation unit 130 and the delayed power-off power supply unit 120. In one embodiment, the primary voltage conversion circuit is used to convert and obtain a voltage output of 12V, and the secondary voltage conversion circuit is used to obtain a voltage output of 3.9V.

[0046] Optionally, the delayed power-off power supply unit 120 includes a second diode and a charging circuit; the anode of the second diode is connected to the power conversion unit, and the cathode of the second diode is connected to the charging circuit. Specifically, in the delayed power-off power supply unit 120, the conversion voltage is stepped down by the diode D6 (corresponding to the second diode) to obtain a first voltage, and the processor 150 and the power supply detection unit 140 are powered by the first voltage. At the same time, the first voltage charges the charging circuit. When the conversion voltage of the power conversion unit is turned off, the first voltage continues to be generated by discharging the charging circuit. The duration of the first voltage is controlled by the charging and discharging process of the charging circuit.

[0047] Optionally, the charging circuit includes a charging capacitor E6, wherein a first end of the charging capacitor E6 is connected to the cathode of the second diode, and a second end of the charging capacitor is grounded. Specifically, the charging circuit can be composed of a charging capacitor E6. The charging capacitor outputs a first voltage according to charging or discharging of the conversion voltage. The charging capacitor can be selected based on the circuit characteristics of the processor 150. For a general single-chip microcomputer, the normal discharge of an 820uF charging capacitor can last for more than 1 minute, and for a low-power single-chip microcomputer, the maintenance time can last even longer.

[0048] Optionally, the operating voltage generating unit 130 includes a third diode and a second capacitor, wherein the anode of the third diode is connected to the power conversion unit, the cathode of the third diode is connected to the first end of the second capacitor, and the second end of the second capacitor is grounded. Specifically, the converted voltage of the power conversion unit is stepped down by the diode D7 (corresponding to the third diode) and then supplies power to the operating circuit 220 of the electronic device.

[0049] Optionally, the power supply input end of the device includes a first input end for connecting to an AC live wire input and a second input end for connecting to an AC zero wire input; the power supply detection unit 140 includes a zero-crossing detection circuit, a first end of the zero-crossing detection circuit is connected to the first input end, a second end of the zero-crossing detection circuit is connected to the detection signal input end of the processor 150, and a third end of the zero-crossing detection circuit is connected to the delayed power-off power supply unit 120. Specifically, the external power input of the device can be an AC input. The power supply detection unit 140 can be a zero-crossing detection circuit, wherein the zero-crossing detection circuit generates a zero-crossing signal (corresponding to a second detection level) when there is an AC input externally. The input end of the zero-crossing detection circuit is connected to the AC live wire input.

[0050] Optionally, the zero-crossing detection circuit includes: a switch tube, a fourth diode, a fifth diode, a first resistor, a second resistor, a third resistor and a third capacitor; the first end of the first resistor is connected to the first input terminal, the second end of the first resistor is connected to the anode of the fourth diode, the cathode of the fourth diode is connected to the cathode of the fifth diode, the first end of the second resistor, the first end of the third capacitor and the third end of the switch tube, the first end of the switch tube is connected to the first end of the third resistor and the detection signal input terminal of the processor 150, the second end of the third resistor is connected to the delayed power-off power supply unit 120, the second end of the switch tube, the cathode of the fifth diode, the second end of the second resistor and the second end of the third capacitor are all grounded. Specifically, in the zero-crossing detection circuit, the anode of the diode D8 (corresponding to the fourth diode) is connected to the live wire input terminal of the AC input via the resistor R8 and the resistor R9 (R8 and R9 correspond to the first resistor). The cathode of diode D8 is connected to the base of transistor Q1, the cathode of diode D9 (corresponding to the fifth diode), the first end of resistor R10 (corresponding to the second resistor), and the first end of capacitor C5 (corresponding to the third capacitor). The emitter of transistor Q1 is grounded, and the collector of transistor Q1 is connected to delayed power-off power supply unit 120 via resistor R11 (corresponding to the third resistor). The collector of transistor Q1 is used to output the first detection level or the second detection level to the detection signal input terminal of processor 150. Furthermore, transistor Q1 can also be replaced with another switching diode.

[0051] In addition, an electronic device of the present invention includes: a power supply input terminal for connecting to an external power input, a working circuit 220 for performing operations, and a device short-time power loss recovery circuit as described in any of the above items, wherein the power supply input terminal is connected to the device short-time power loss recovery circuit, the power supply detection unit 140, and the power conversion unit, and the working circuit 220 is connected to the device short-time power loss recovery circuit, the working voltage generation unit 130, and the configuration data output terminal of the processor 150. Specifically, in the electronic device, its power supply input terminal is connected to the device short-time power loss recovery circuit, and the processor 150 in the device short-time power loss recovery circuit restores the configuration of the electronic device's working circuit 220 after power failure.

[0052] In addition, the present invention provides a method for recovering an electronic device from a power outage. The electronic device includes: a power supply input terminal for connecting to an external power input, a working circuit 220 for performing work, and a short-term power-off recovery circuit for a device as described above. The method includes the following steps after the electronic device starts operating: S1, monitoring the level generated by the power supply detection unit 140, and triggering the processor 150 to save its current configuration data and enter a dormant state when the power supply detection unit 140 generates a first detection level; S2, triggering the processor 150 to periodically self-trigger, wherein the processor 150 enters a dormant state when the self-triggering ends; S3, determining whether the power supply detection unit 140 generates a second detection level, and if so, executing step S4; otherwise, executing step S2 and subsequent steps until the processor 150 is powered off; S4, triggering the processor 150 to configure the working circuit 220 according to the current configuration data. Specifically, after determining that the electronic device has lost power, the processor in the short-term power-off recovery circuit saves the current configuration data of the electronic device and enters a dormant state. In the dormant state, the processor performs periodic self-triggering actions and detects whether the electronic device is powered on after self-triggering. If the electronic device is powered on, the saved current configuration of the electronic device will be sent to the electronic device to reconfigure the electronic device. If the device short-term power failure recovery circuit does not detect that the electronic device is powered on during the self-triggering process, it will be shut down when the processor 150 is completely powered off in the device short-term power failure recovery circuit.

[0053] Optionally, in a power failure recovery method for an electronic device of the present invention, the following is further included: S31, the processor enters a timing state at the start of self-triggering to obtain the duration of the periodic self-triggering; S32, determines whether the duration of the periodic self-triggering is less than the second preset duration, if so, executes step S31, otherwise executes step S33; wherein the second preset duration is less than or equal to the first preset duration; S33, triggers the configuration data output end of the processor to output current to the connected device until the processor is powered off. Specifically, the processor 150 can also enter a timing state when the sleep state ends, and count the duration of its periodic self-triggering. Since the processor 150 starts periodic self-triggering when the first detection level is detected, it can also be understood as timing the duration of the first detection level, that is, timing the power-off time. After obtaining the timed duration, it determines whether the timed duration is a second preset duration. If the second detection level has not been detected when the timed duration reaches the second preset duration, i.e., power has not yet been applied, the processor can be discharged by directly outputting current through the configuration data output port of the processor, thereby completely powering off the processor and entering a power-off state. In this case, the second preset duration is less than or equal to the first preset duration. When the second preset duration is less than the first preset duration, i.e., before the processor is completely powered off, the processor is automatically discharged.

[0054] It is understandable that the above embodiments only express the preferred implementation modes of the present invention, and the description thereof is relatively specific and detailed, but it cannot be understood as limiting the patent scope of the present invention. It should be pointed out that for ordinary technicians in this field, without departing from the concept of the present invention, the above technical features can be freely combined, and several deformations and improvements can be made, all of which fall within the scope of protection of the present invention. Therefore, all equivalent changes and modifications made to the scope of the claims of the present invention should fall within the scope of coverage of the claims of the present invention.

Claims

1. A short-time power-off recovery circuit for a device, characterized in that: include: Processor, power supply detection unit, power conversion unit, working voltage generation unit and delayed power-off power supply unit; The power supply detection unit is connected to the power supply input terminal of the device, and is used to generate a first detection level when the power supply input terminal is powered off, and generate a second detection level when the power supply input terminal is powered on; The power conversion unit is connected to the power supply input terminal of the device and is used to generate a conversion voltage; The delayed power-off power supply unit is connected to the power conversion unit, the power supply detection unit and the power supply terminal of the processor, and is configured to generate a first voltage when receiving the converted voltage, and continue to generate the first voltage within a first preset time period when the converted voltage is turned off; The working voltage generating unit is connected to the power conversion unit and the working circuit of the device, and is used to generate a second voltage when receiving the converted voltage; The detection signal input terminal of the processor is connected to the power supply detection unit, and is used to save the current configuration data and enter the dormant state and start the periodic self-triggering when receiving the first detection level, and stop the periodic self-triggering when receiving the second detection level; wherein the processor enters a dormant state when the self-triggering ends, and the processor restores the current configuration data according to the second detection level during the periodic self-triggering; Moreover, the processor enters a timing state when the self-triggering starts to obtain the duration of the periodic self-triggering, and when the duration of the periodic self-triggering is a second preset duration, it triggers its configuration data output end to output current to the connected device to discharge the power supply of the processor, so that the processor is completely powered off, wherein the second preset duration is less than or equal to the first preset duration.

2. The device short-time power failure recovery circuit according to claim 1, characterized in that: The power conversion unit includes a primary voltage conversion circuit and a secondary voltage conversion circuit, wherein the primary voltage conversion circuit is connected to the power supply input terminal of the device, and the secondary voltage conversion circuit includes an LDO chip U2, a first capacitor and a first diode; The third pin of the LDO chip U2 is connected to the primary voltage conversion circuit, the second pin of the LDO chip U2 is respectively connected to the delayed power-off power supply unit, the working voltage generating unit and the first end of the first capacitor, the second end of the first capacitor is grounded, the first end of the LDO chip U2 is connected to the anode of the first diode, and the cathode of the first diode is grounded.

3. The short-time power-off recovery circuit of the device according to claim 1, characterized in that: The delayed power-off power supply unit includes a second diode and a charging circuit; An anode of the second diode is connected to the power conversion unit, and a cathode of the second diode is connected to the charging circuit.

4. The device short-time power failure recovery circuit according to claim 3, characterized in that: The charging circuit includes a charging capacitor, a first end of the charging capacitor is connected to the cathode of the second diode, and a second end of the charging capacitor is grounded.

5. The device short-time power failure recovery circuit according to claim 1, characterized in that: The periodic self-triggering of the processor includes watchdog triggering or RTC triggering.

6. The device short-time power failure recovery circuit according to claim 1, characterized in that: The working voltage generating unit includes a third diode and a second capacitor, the anode of the third diode is connected to the power conversion unit, the cathode of the third diode is connected to the first end of the second capacitor, and the second end of the second capacitor is grounded.

7. The device short-time power failure recovery circuit according to claim 1, characterized in that: The power supply input terminal of the device includes a first input terminal for connecting to an AC live wire input and a second input terminal for connecting to an AC neutral wire input; The power supply detection unit includes a zero-crossing detection circuit, a first end of the zero-crossing detection circuit is connected to the first input end, a second end of the zero-crossing detection circuit is connected to the detection signal input end of the processor, and a third end of the zero-crossing detection circuit is connected to the delayed power-off power supply unit.

8. The equipment short-time power failure recovery circuit according to claim 7, characterized in that: The zero-crossing detection circuit includes: a switch tube, a fourth diode, a fifth diode, a first resistor, a second resistor, a third resistor and a third capacitor; The first end of the first resistor is connected to the first input end, the second end of the first resistor is connected to the anode of the fourth diode, the cathode of the fourth diode is connected to the cathode of the fifth diode, the first end of the second resistor, the first end of the third capacitor and the third end of the switching tube, the first end of the switching tube is connected to the first end of the third resistor and the detection signal input end of the processor, the second end of the third resistor is connected to the delayed power-off power supply unit, and the second end of the switching tube, the cathode of the fifth diode, the second end of the second resistor and the second end of the third capacitor are all grounded.

9. An electronic device, characterized in that: The device comprises: a power supply input terminal for connecting an external power input, a working circuit for performing work, and a short-time power-off recovery circuit for a device according to any one of claims 1 to 8, wherein: The power supply input end is connected to the short-time power failure recovery circuit of the device, the power supply detection unit and the power conversion unit, and the working circuit is connected to the short-time power failure recovery circuit of the device, the working voltage generation unit and the configuration data output end of the processor.

10. A method for restoring an electronic device after a power outage, characterized in that: The electronic device comprises: a power supply input terminal for connecting to an external power input, a working circuit for performing work, and a short-time power-off recovery circuit for a device according to any one of claims 1 to 8; The method comprises performing the following steps after the electronic device starts working: S1. Monitoring a level generated by the power supply detection unit, and triggering the processor to save its current configuration data and enter a sleep state when the power supply detection unit generates a first detection level; S2. Triggering periodic self-triggering of the processor, wherein the processor enters a dormant state when the self-triggering ends; S3, determining whether the power supply detection unit generates a second detection level; if so, executing step S4; otherwise, executing step S2 and subsequent actions until the processor is powered off; S4, triggering the processor to configure the working circuit according to the current configuration data; The method further comprises: S31, the processor enters a timing state when the self-triggering starts to obtain the duration of the periodic self-triggering; S32, determining whether the duration of the periodic self-triggering is less than a second preset duration, if so, executing step S31, otherwise executing step S33; wherein the second preset duration is less than or equal to the first preset duration; S33 , triggering the configuration data output terminal of the processor to output current to the connected device until the processor is powered off.

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