An analog transmitter circuit with an input of -5~5V and an output of -20~20mA
Through the H-bridge circuit and the input-5~5V and output-20~20mA transmission circuit designed by the simulation solution, the problem of long response time is solved and the effect of fast protection response is achieved.
Patent Information
- Application Number
- CN202211029335.7
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Filing Date
- 2022-08-26
- Publication Date
- 2025-08-19
- Estimated Expiration
- 2042-08-26
AI Technical Summary
The existing input-5~5V output-20~20mA transmission circuit has a long response time, making it difficult to achieve fast protection response.
The H-bridge circuit structure and simulation scheme are adopted, combined with voltage comparator and operational amplifier, and a transmitting circuit with input -5~5V and output -20~20mA is designed, and a driver circuit composed of transistors and resistors can be quickly responded.
It realizes a fast protection response with a response time of less than 10ms to meet the rapid control needs of the control system for load.
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Figure CN115347899B_ABST
Abstract
Description
Technical Field
[0001] The present invention relates to the technical field of transmission circuits, and in particular to a transmission circuit with an analog scheme of -5~5V input and -20~20mA output. Background Art
[0002] In control systems, it's often necessary to output a voltage or current corresponding to an input signal to further control the load. For example, in a temperature controller, temperature changes generate a varying input signal. However, this input signal, reflecting temperature changes, is typically weak and needs to be converted by a transmitter circuit into a voltage or current with appropriate drive power, such as 0-10V. This is then used to control actuators (such as motors, valves, fans, etc.) and achieve temperature control. Similar requirements exist in other control systems.
[0003] Currently, most 5V-input and 20-20mA-output transmission circuits on the market are digital solutions with a response time of around 100ms. This response time needs to be further accelerated for rapid protection response. Summary of the Invention
[0004] The purpose of the present invention is to overcome the above-mentioned shortcomings and provide an analog scheme transmission circuit with an input of -5~5V and an output of -20~20mA to speed up the response time for rapid protection response.
[0005] The object of the present invention is achieved like this:
[0006] An analog transmission circuit with an input of -5~5V and an output of -20~20mA includes a sampling circuit, a transistor Q1, a transistor Q2, a transistor Q3 and a transistor Q4, wherein the transistors Q1, Q2, Q3 and Q4 form an H-bridge circuit structure; one end of a load is connected to the collectors of the transistors Q1 and Q4 respectively, and the other end is connected to the collectors of the transistors Q3 and Q2 respectively, the collector of the transistor Q1 is connected to the collector of the transistor Q4, and the collector of the transistor Q3 is connected to the collector of the transistor Q2. The collector of the transistor is connected to the collector of the transistor Q2; the base of the transistor Q1 is connected to the Q1 drive circuit, the base of the transistor Q2 is connected to the Q2 drive circuit, the base of the transistor Q3 is connected to the Q3 drive circuit, and the base of the transistor Q4 is connected to the Q4 drive circuit; when the current passing through the load from left to right is positive current, the transistor Q1 and the transistor Q2 are driven, and the input IN is set to 0~5V; when the input IN is -5~0V, the transistor Q3 and the transistor Q4 are driven, and the current from right to left is negative current;
[0007] The Q1 driving circuit includes a voltage comparator U2A and a transistor Q5, the base of the transistor Q1 is connected to the collector of the transistor Q5, and the emitter of the transistor Q5 is connected to GND through a resistor R2; the input signal IN is connected to the same-direction input terminal of the voltage comparator U2A after RC filtering, the reverse input terminal of the voltage comparator U2A is connected to GND, and the output terminal of the voltage comparator U2A is connected to the base of the transistor Q5;
[0008] The Q3 driving circuit includes a voltage comparator U4A and a transistor Q6, the base of the transistor Q3 is connected to the collector of the transistor Q6, and the emitter of the transistor Q3 is connected to GND through a resistor R13; the input signal IN is connected to the inverting input terminal of the voltage comparator U4A after RC filtering, the non-inverting input terminal of the voltage comparator U4A is connected to GND, and the output terminal of the voltage comparator U4A is connected to the base of the transistor Q6;
[0009] The Q4 driving circuit includes an operational amplifier U1A and an operational amplifier U1B. The operational amplifier U1B, resistors R10 and R15 constitute an inverse proportional amplification circuit. The operational amplifier U1A, resistor R3 and transistor Q4 constitute a current source circuit. The emitter of the transistor Q4 is connected to GND via the resistor R3, the base of the transistor Q4 is connected to the output of the operational amplifier U1A, the non-inverting input of the operational amplifier U1A is connected to the output of the operational amplifier U1B via the resistor R17, the input signal IN is connected to the inverting input of the operational amplifier U1B after RC filtering, and the non-inverting input of the operational amplifier U1B is connected to GND.
[0010] The Q2 driving circuit includes an operational amplifier U3A, and the operational amplifier U3A and resistors R1 and R14 constitute a current source circuit. The emitter of the transistor Q2 is connected to GND through the resistor R1, the base of the transistor Q2 is connected to the output end of the operational amplifier U3A, and the non-inverting input end of the operational amplifier U3A is connected to the input signal IN through the resistor R14.
[0011] Furthermore, the sampling circuit is powered by dual power supplies.
[0012] Furthermore, the non-inverting input terminal of the voltage comparator U2A is point A, and the potential of point A is an input signal with GND as a reference.
[0013] Furthermore, the output end of the voltage comparator U2A is point C, and point C is connected to the power supply VCC through the resistor R4.
[0014] Furthermore, the inverting input terminal of the voltage comparator U4A is point B, and the potential of point B is an input signal with GND as a reference.
[0015] Furthermore, the output end of the voltage comparator U4A is point D, and point D is connected to the power supply VCC through the resistor R6.
[0016] Furthermore, the inverting input terminal of the operational amplifier U1A is connected to GND via a resistor R3.
[0017] Furthermore, the inverting input terminal of the operational amplifier U3A is connected to GND via the resistor R1.
[0018] Compared with the prior art, the present invention has the following beneficial effects:
[0019] The present invention provides a transmitter circuit with a -5 to 5V signal input and a -20mA to 20mA signal output. The circuit includes an H-bridge structure circuit, a -5 to 0V and 0 to 5V input determination drive circuit, and a -5 to 0V and 0 to 5V current source output drive circuit. When the current flowing through the load from left to right is positive, transistors Q1 and Q2 are driven, and the input IN is set to 0 to 5V. When the input IN is -5 to 0V, transistors Q3 and Q4 are driven, and the current flowing from right to left is negative. The present invention adopts an analog solution and can achieve a response time of less than 10ms, enabling rapid protection response. BRIEF DESCRIPTION OF THE DRAWINGS
[0020] Figure 1 This is a circuit principle diagram of the present invention with the current direction from left to right.
[0021] Figure 2 This is a circuit principle diagram of the present invention in which the current direction is from right to left.
[0022] Figure 3 Schematic diagram of the structure of the H-bridge circuit of the present invention.
[0023] Figure 4 4 is a circuit schematic diagram of the sampling circuit of the present invention.
[0024] Figure 5 4 is a circuit diagram of the Q1 driving circuit of the present invention.
[0025] Figure 6 4 is a circuit diagram of the Q2 driving circuit of the present invention.
[0026] Figure 7 4 is a circuit diagram of the Q3 driving circuit of the present invention.
[0027] Figure 8 4 is a circuit diagram of the Q4 driving circuit of the present invention. DETAILED DESCRIPTION
[0028] To better understand the technical solution of the present invention, the following detailed description is provided with reference to the relevant illustrations. It should be understood that the following specific embodiments are not intended to limit the specific implementation of the technical solution of the present invention; they are merely examples of possible implementations of the technical solution of the present invention. It should be noted that references herein to the positional relationships of various components, such as component A being located above component B, are based on the relative positions of the components in the illustrations and are not intended to limit the actual positional relationships of the components.
[0029] Example 1:
[0030] See also Figures 1-8 , Figure 1 and Figure 2 The circuit schematics for different current directions of the present invention are drawn separately. As shown in the figure, the present invention relates to an analog transmission circuit with an input of -5~5V and an output of -20~20mA. The circuit includes a sampling circuit, a transistor Q1, a transistor Q2, a transistor Q3, and a transistor Q4. The transistors Q1, Q2, Q3, and Q4 form an H-bridge circuit structure. One end of the load is connected to the collectors of the transistors Q1 and Q4, respectively, and the other end is connected to the collectors of the transistors Q3 and Q2, respectively. The collector of the transistor Q1 is connected to the collector of the transistor Q4, and the collector of the transistor Q3 is connected to the collector of the transistor Q2. The base of the transistor Q1 is connected to the Q1 drive circuit, the base of the transistor Q2 is connected to the Q2 drive circuit, the base of the transistor Q3 is connected to the Q3 drive circuit, and the base of the transistor Q4 is connected to the Q4 drive circuit.
[0031] When the current flows through the load from left to right, it is positive current. Then transistors Q1 and Q2 are driven. At this time, the input IN is set to 0~5V. When the input IN is -5~0V, transistors Q3 and Q4 are driven. The current flows from right to left, which is negative current.
[0032] The sampling circuit is powered by dual power supplies because the input signal is -5~5V, including both positive and negative signals. The reference ground is GND, VCC is the positive power supply, and VEE is the negative power supply.
[0033] The Q1 driving circuit includes a voltage comparator U2A and a transistor Q5. The base of the transistor Q1 is connected to the collector of the transistor Q5, and the emitter of the transistor Q5 is connected to GND through a resistor R2. The input signal IN is connected to the same-direction input terminal of the voltage comparator U2A, that is, point A, after RC filtering. The potential at point A is an input signal with GND as a reference. The reverse input terminal of the voltage comparator U2A is connected to GND. The output terminal of the voltage comparator U2A is point C. Point C is connected to the base of the transistor Q5, and point C is connected to the power supply VCC through a resistor R4.
[0034] The Q3 driving circuit includes a voltage comparator U4A and a transistor Q6. The base of the transistor Q3 is connected to the collector of the transistor Q6, and the emitter of the transistor Q3 is connected to GND through a resistor R13. The input signal IN is connected to the inverting input terminal of the voltage comparator U4A, that is, point B, after RC filtering. The potential of point B is an input signal with GND as a reference. The non-inverting input terminal of the voltage comparator U4A is connected to GND. The output terminal of the voltage comparator U4A is point D, which is connected to the base of the transistor Q6, and point D is connected to the power supply VCC through a resistor R6.
[0035] The Q4 driving circuit includes an operational amplifier U1A and an operational amplifier U1B. The operational amplifier U1B and resistors R10 and R15 constitute a reverse proportional amplification circuit. The operational amplifier U1A, resistor R3 and transistor Q4 constitute a current source circuit. The emitter of the transistor Q4 is connected to GND through resistor R3, and the base of the transistor Q4 is connected to the output end of the operational amplifier U1A, that is, output point E. The non-inverting input end of the operational amplifier U1A is connected to the output end of the operational amplifier U1B through resistor R17, and the inverting input end of the operational amplifier U1A, that is, point F, is connected to resistor R3. The input signal IN is connected to the inverting input end of the operational amplifier U1B after RC filtering, and the non-inverting input end of the operational amplifier U1B is connected to GND.
[0036] The Q2 driving circuit includes an operational amplifier U3A, and the operational amplifier U3A and resistors R1 and R14 constitute a current source circuit. The emitter of the transistor Q2 is connected to GND through the resistor R1, and the base of the transistor Q2 is connected to the output end of the operational amplifier U3A. The non-inverting input end of the operational amplifier U3A, that is, point G, is connected to the input signal IN through the resistor R14, and the inverting input end of the operational amplifier U3A, that is, point H, is connected to the resistor R1.
[0037] Working principle:
[0038] The present invention relates to a -5~5V signal input and -20mA~20mA signal output circuit, which comprises an H-bridge structure circuit, an input -5~0V and 0~5V judgment drive circuit, and a -5~0V and 0~5V current source output drive circuit.
[0039] In the driving circuit of Q1, U2A is a voltage comparator. The input signal IN is connected to the same-direction input terminal of the comparator, that is, point A, after RC filtering. That is, the potential of point A is the input signal with GND as the reference. The reverse input terminal of the comparator U2A is connected to GND.
[0040] When the input signal IN is -5~0V, that is, the potential of point A at the positive input terminal of comparator U2A is -5~0V, the reverse input terminal of comparator U2A is grounded, the voltage of the positive input terminal is less than the voltage of the reverse input terminal, the comparator output is low, that is, point C is low, and transistors Q5 and Q1 cannot be driven; when the input signal IN is 0~5V, that is, the potential of point A at the positive input terminal of comparator U2A is 0~5V, the reverse input terminal of comparator U2A is grounded, the voltage of the positive input terminal is greater than the voltage of the reverse input terminal, the comparator output is high, that is, point C is high, transistors Q5 and Q1 are driven normally, transistor Q5 works in the amplification state, and transistor Q1 works in the saturation state.
[0041] In the driver circuit of Q3, U4A is a voltage comparator. The input signal IN is connected to the inverting input terminal of the comparator, that is, point B, after RC filtering. That is, the potential at point B is the input signal with GND as the reference. The non-inverting input terminal of comparator U2A is connected to GND.
[0042] When the input signal IN is -5~0V, that is, the potential of point B at the reverse input terminal of comparator U2A is -5~0V, the reverse input terminal of comparator U4A is grounded, the voltage of the positive input terminal is greater than the voltage of the reverse input terminal, the comparator output is high, that is, point D is high, transistors Q3 and Q6 are driven normally, transistor Q6 works in the amplification state, and transistor Q3 works in the saturation state; when the input signal IN is 0~5V, that is, the potential of point B at the reverse input terminal of comparator U4A is 0~5V, the non-inverting input terminal of comparator U4A is grounded, the voltage of the non-inverting input terminal is less than the voltage of the reverse input terminal, the comparator output is low, that is, point D is low, and transistors Q5 and Q1 cannot be driven.
[0043] The current source drive circuit of transistor Q4, the operational amplifier U1B and the resistors R15 and R10 form a reverse proportional amplifier circuit. By setting the resistance values of resistors R15 and R10, an output that is opposite to the input voltage can be obtained, that is, the output point E. After RC first-order filtering, the operational amplifier U1A and the resistor R3 and transistor Q4 form a current source circuit. Since the operational amplifier U1A satisfies negative feedback, the voltages at the same-direction input terminal and the reverse input terminal are equal, that is, the potential at point E is equal to the potential at point F.
[0044] When the input signal IN is -5~0V, an inverse proportional circuit is formed through the operational amplifier U1B and the resistors R15 and R10, that is, the potential at point E is VE, which is 0~5V, so the potential at point F is VF, which is 0~5V. The potential at the upper end of the resistor R3 is greater than the potential at the lower end, and the current source outputs normally. The current size I=VF / R3, and the resistor R3 is set to a suitable resistance value to achieve 0~20mA output; when the input signal IN is 0~5V, an inverse proportional circuit is formed through the operational amplifier U1B and the resistors R15 and R10, that is, the potential at point E is VE, which is -5~0V, so the potential at point F is VF, which is -5~0V, the voltage at point F is less than 0V, the potential at the upper end of the resistor R3 is less than the potential at the lower end, and the current source cannot output normally.
[0045] The current source driving circuit of transistor Q2, the operational amplifier U3A and the resistors R14 and R1 form a current source circuit. After the first-order RC filtering, since the operational amplifier U1A satisfies the negative feedback, that is, the voltages at the same-direction input terminal and the reverse input terminal are equal, that is, the potential at point G is equal to the potential at point H.
[0046] When the input signal IN is -5~0V, that is, the potential of point G is VE is -5~0V, so the potential of point H VH is -5~0V, the voltage of point H is less than 0V, the potential of the upper end of resistor R1 is less than the potential of the lower end, and the current source cannot output normally; when the input signal IN is 0~5V, that is, the potential of point G is VG is 0~5V, so the potential of point H VH is 0~5V, the current source outputs, the current size I=VH / R1. Setting a suitable resistance value of resistor R1 can achieve 0~20mA output.
[0047] See also Figure 1 When the input signal IN is -5~0V, transistors Q3 and Q4 cannot work normally, transistor Q1 is saturated and turned on, and the current source circuit of transistor Q2 outputs normally. At this time, the current direction is from left to right, the current is positive current, and the loop is VCC-Q1-load-Q2-R1-GND.
[0048] See also Figure 2 When the input signal IN is 0~5V, transistors Q1 and Q2 cannot work normally, transistor Q3 is saturated and turned on, and the current source circuit of transistor Q4 outputs normally. At this time, the current direction is from right to left, the current is negative, and the loop is VCC-Q3-load-Q4-R3-GND.
[0049] The above are only specific application examples of the present invention and do not constitute any limitation on the scope of protection of the present invention. Any technical solutions formed by equivalent transformation or equivalent replacement shall fall within the scope of protection of the present invention.
Claims
1. An analog transmission circuit with an input of -5~5V and an output of -20~20mA, characterized by: It includes a sampling circuit, a transistor Q1, a transistor Q2, a transistor Q3 and a transistor Q4, wherein the transistors Q1, Q2, Q3 and Q4 form an H-bridge circuit structure; one end of the load is connected to the collectors of the transistors Q1 and Q4 respectively, and the other end is connected to the collectors of the transistors Q3 and Q2 respectively, the collector of the transistor Q1 is connected to the collector of the transistor Q4, and the collector of the transistor Q3 is connected to the collector of the transistor Q2. Connection; the base of the transistor Q1 is connected to the Q1 drive circuit, the base of the transistor Q2 is connected to the Q2 drive circuit, the base of the transistor Q3 is connected to the Q3 drive circuit, and the base of the transistor Q4 is connected to the Q4 drive circuit; when the current through the load is positive from left to right, the transistor Q1 and the transistor Q2 are driven, and the input IN is set to 0~5V; when the input IN is -5~0V, the transistor Q3 and the transistor Q4 are driven, and the current is negative from right to left; The Q1 driving circuit includes a voltage comparator U2A and a transistor Q5, the base of the transistor Q1 is connected to the collector of the transistor Q5, and the emitter of the transistor Q5 is connected to GND through a resistor R2; the input signal IN is connected to the same-direction input terminal of the voltage comparator U2A after RC filtering, the reverse input terminal of the voltage comparator U2A is connected to GND, and the output terminal of the voltage comparator U2A is connected to the base of the transistor Q5; The Q3 driving circuit includes a voltage comparator U4A and a transistor Q6, the base of the transistor Q3 is connected to the collector of the transistor Q6, and the emitter of the transistor Q3 is connected to GND through a resistor R13; the input signal IN is connected to the inverting input terminal of the voltage comparator U4A after RC filtering, the non-inverting input terminal of the voltage comparator U4A is connected to GND, and the output terminal of the voltage comparator U4A is connected to the base of the transistor Q6; The Q4 driving circuit includes an operational amplifier U1A and an operational amplifier U1B. The operational amplifier U1B, resistors R10 and R15 constitute an inverse proportional amplification circuit. The operational amplifier U1A, resistor R3 and transistor Q4 constitute a current source circuit. The emitter of the transistor Q4 is connected to GND via the resistor R3, the base of the transistor Q4 is connected to the output of the operational amplifier U1A, the non-inverting input of the operational amplifier U1A is connected to the output of the operational amplifier U1B via the resistor R17, the input signal IN is connected to the inverting input of the operational amplifier U1B after RC filtering, and the non-inverting input of the operational amplifier U1B is connected to GND. The Q2 driving circuit includes an operational amplifier U3A, and the operational amplifier U3A and resistors R1 and R14 constitute a current source circuit. The emitter of the transistor Q2 is connected to GND through the resistor R1, the base of the transistor Q2 is connected to the output end of the operational amplifier U3A, and the non-inverting input end of the operational amplifier U3A is connected to the input signal IN through the resistor R14.
2. The analog transmission circuit with an input of -5~5V and an output of -20~20mA according to claim 1, characterized in that: The sampling circuit is powered by dual power supplies.
3. The analog transmission circuit with an input of -5~5V and an output of -20~20mA according to claim 1, characterized in that: The non-inverting input terminal of the voltage comparator U2A is point A, and the potential of point A is an input signal with GND as a reference.
4. The analog transmission circuit with an input of -5~5V and an output of -20~20mA according to claim 1, characterized in that: The output end of the voltage comparator U2A is point C, and point C is connected to the power supply VCC through the resistor R4.
5. The analog transmission circuit with an input of -5~5V and an output of -20~20mA according to claim 1, characterized in that: The inverting input terminal of the voltage comparator U4A is point B, and the potential of point B is an input signal with GND as a reference.
6. The analog transmission circuit with an input of -5~5V and an output of -20~20mA according to claim 1, characterized in that: The output end of the voltage comparator U4A is point D, which is connected to the power supply VCC through the resistor R6.
7. The analog transmission circuit with an input of -5~5V and an output of -20~20mA according to claim 1, characterized in that: The inverting input terminal of the operational amplifier U1A is connected to GND via a resistor R3.
8. The analog transmission circuit with an input of -5~5V and an output of -20~20mA according to claim 1, characterized in that: The inverting input terminal of the operational amplifier U3A is connected to GND via the resistor R1.
Citation Information
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