Metal substrate and electronic component mounting substrate

Abstract

The metal base substrate of the present invention includes a metal substrate, an insulating layer laminated on one surface of the metal substrate, and a circuit layer laminated on the surface of the insulating layer opposite to the metal substrate side. The metal base substrate is characterized in that the circuit layer is formed of a metal having a semi-softening temperature of 100 °C or higher and 150 °C or lower, the insulating layer contains a resin, and the relationship between the thickness t (μm) of the insulating layer and the elastic modulus E (GPa) of the insulating layer at 100 °C satisfies the following formula (1). Formula (1): t / E > 10.

Description

Technical Field

[0001] The present invention relates to a metal base substrate and an electronic component mounting substrate using the metal base substrate.

[0002] This application claims priority based on Japanese Patent Application No. 2020-062822 filed on March 31, 2020, and the content thereof is incorporated herein by reference. Background Art

[0003] A substrate for mounting electronic components such as semiconductor elements is preferably a metal base substrate that can efficiently dissipate heat generated by the operation of the electronic components to the outside. As the metal base substrate, a metal base substrate is known in which a metal substrate is used as the base substrate and the metal substrate, an insulating layer, and a circuit layer are sequentially laminated. The electronic component is joined to the circuit layer through a solder layer. Regarding the metal base substrate having such a structure, the heat generated by the electronic component is conducted to the metal substrate through the insulating layer and dissipated from the metal substrate to the outside.

[0004] The insulating layer of the metal base substrate is usually formed of an insulating resin composition containing a resin having excellent insulation properties and ceramic particles (heat conductive fillers, inorganic fillers) having excellent heat conductivity. As the resin for the insulating layer, a polyimide resin, a polyamideimide resin, or a silicone resin is used. Conventionally, in such a metal base substrate, the elastic modulus of the resin constituting the insulating layer is reduced to reduce the thermal stress applied to the solder layer (for example, refer to Patent Document 1 and Patent Document 2).

[0005] Patent Document 1: Japanese Patent No. 5650084

[0006] Patent Document 2: Japanese Patent No. 5665449

[0007] However, in the inventions disclosed in Patent Document 1 and Patent Document 2, even if the thermal stress caused by the expansion of the metal substrate can be alleviated by reducing the elastic modulus of the resin constituting the insulating layer, since the circuit layer thermally expands, there are limitations in significantly reducing the thermal stress applied to the solder layer. Moreover, the smaller the elastic modulus of the resin constituting the insulating layer, the softer the insulating layer, and the more difficult it is to suppress the thermal expansion of the circuit layer.

[0008] The present invention has been completed in view of such circumstances, and an object thereof is to provide a metal base substrate and an electronic component mounting substrate using the metal base substrate that are less likely to cause solder cracks even when a thermal cycle is applied in a state where an electronic component is joined through a solder layer.

[0009] To solve the above problems, the inventors of the present invention put forward the following insights. That is, by limiting the range of the semi-softening temperature of the circuit layer and defining the relationship between the thickness of the insulating layer and the elastic modulus of the resin constituting the insulating layer, the thermal stress applied to the solder layer can be suppressed. Summary of the Invention

[0010] Based on this insight, the present invention proposes the following solutions.

[0011] The metal base substrate of the present invention includes a metal substrate, an insulating layer laminated on one surface of the metal substrate, and a circuit layer laminated on the surface of the insulating layer opposite to the metal substrate side. The metal base substrate is characterized in that the circuit layer is formed of a metal having a semi-softening temperature of 100 °C or more and 150 °C or less, the insulating layer contains a resin, and the relationship between the thickness t (μm) of the insulating layer and the elastic modulus E (GPa) of the insulating layer at 100 °C satisfies the following formula (1).

[0012] t / E > 10...(1)

[0013] Moreover, in the present invention, the insulating layer may be a layer formed by dispersing a filler in the resin.

[0014] Furthermore, in the present invention, a close contact layer may be provided between at least one of the insulating layer and the circuit layer and between the insulating layer and the metal substrate. Moreover, a filler may be dispersed in the close contact layer, and the volume ratio of the filler contained in the close contact layer may be less than the volume ratio of the filler contained in the insulating layer.

[0015] The electronic component mounting substrate of the present invention is characterized by having the metal base substrate described above and an electronic component joined to the circuit layer of the metal base substrate through a solder layer. Brief Description of the Drawings

[0016] Figure 1 A cross-sectional view showing an electronic component mounting substrate including a metal base substrate according to an embodiment of the present invention. Detailed Description of the Invention

[0017] Hereinafter, an embodiment of the present invention will be described in detail with appropriate reference to the drawings. To facilitate understanding of the features of the present invention, in the drawings used in the following description, sometimes the characteristic parts are enlarged for convenience, and sometimes the dimensional ratios of the respective components are different from the actual ones. The materials and dimensions exemplified in the following description are for example only, and the present invention is not limited to these, and can be appropriately changed within the range of achieving its effects for implementation.

[0018] Figure 1The figure is a cross-sectional view of an electronic component mounting substrate having a metal base substrate according to an embodiment of the present invention.

[0019] The electronic component mounting substrate 10 has a metal base substrate 20 and an electronic component 11 joined to the metal base substrate 20 via a solder layer 12. The electronic component 11 is not particularly limited, and examples thereof include semiconductor elements, resistors, capacitors, and crystal oscillators. As examples of semiconductor elements, MOSFET (Metal-oxide-semiconductor field effect transistor), IGBT (Insulated Gate Bipolar Transistor), LSI (Large Scale Integration), LED (light-emitting diode), LED chip, and LED-CSP (LED-Chip Size Package) can be cited.

[0020] The solder layer 12 can be formed of various solders such as Sn-Ag-Cu solder, and is not particularly limited.

[0021] The metal base substrate 20 has a metal substrate 21, an insulating layer 22 laminated on one surface of the metal substrate 21, and a circuit layer 23 laminated on the surface of the insulating layer 22 opposite to the metal substrate 21 side.

[0022] The metal substrate 21 is a component that forms the base of the metal base substrate 20. Regarding the metal substrate 21, for example, a copper plate, an aluminum plate, or a laminated plate thereof can be used as the metal substrate 21.

[0023] The insulating layer 22 is formed of an insulating and thermally conductive resin composition containing an insulating resin (resin) 22a and ceramic particles (filler) 22b. The insulating layer 22 is formed of a material in which the highly thermally conductive and insulating ceramic particles 22b are dispersed in the highly insulating insulating resin 22a, so that the thermal resistance of the entire metal base substrate 20 from the circuit layer 23 to the metal substrate 21 can be further reduced while maintaining the insulation. Therefore, it is possible to easily dissipate the heat generated in the electronic component 11 from the metal substrate 21 side.

[0024] The insulating resin 31 is preferably a polyimide resin, a polyamideimide resin, or a mixture thereof. Since the polyimide resin or polyamideimide has an imide bond, it has excellent heat resistance and mechanical properties.

[0025] As an example of the filler, the ceramic particles 22b can be silica (SiO2) particles, alumina (Al2O3) particles, boron nitride (BN) particles, titanium oxide particles, silica particles doped with alumina, alumina hydrate particles, aluminum nitride particles, etc. The ceramic particles 22b can be used singly or in combination of two or more. From the viewpoint of high thermal conductivity, among these ceramic particles, alumina particles are preferred. Although the form of the ceramic particles 22b is not particularly limited, aggregated particles of fine ceramic particles or single crystal ceramic particles are preferred.

[0026] The aggregated particles of fine ceramic particles can be agglomerates in which the primary particles are weakly connected, or aggregates in which the primary particles are strongly connected.

[0027] Moreover, a particle aggregate formed by further aggregation of the aggregated particles with each other can also be formed. The primary particles of the ceramic particles 22b form aggregated particles and are dispersed in the insulating resin (resin) 22a of the insulating layer 22, thereby forming a network constituted by the mutual contact between the ceramic particles 22b, and heat is easily conducted between the primary particles of the ceramic particles 22b, thereby improving the thermal conductivity of the insulating layer 22.

[0028] As commercially available products of the aggregated particles of fine ceramic particles, AE50, AE130, AE200, AE300, AE380, AE90E (all manufactured by NIPPON AEROSIL CO., LTD.), T400 (manufactured by Wacker Corporation), SFP-20M (manufactured by DENKA COMPANY LIMITED), etc. silica particles, Alu65 (manufactured by NIPPON AEROSIL CO., LTD.), AA-04 (manufactured by SUMITOMO CHEMICAL CO., LTD.), etc. alumina particles, AP-170S (manufactured by MARUKA CORPORATION), etc. boron nitride particles, AEROXIDE(R)TiO2 P90 (manufactured by NIPPON AEROSIL CO., LTD.), etc. titanium oxide particles, MOX170 (manufactured by NIPPON AEROSIL CO., LTD.), etc. silica particles doped with alumina, alumina hydrate particles manufactured by SASOL LIMITED, etc. can be used.

[0029] The single-crystal ceramic particles are preferably α-aluminum oxide single-crystal particles having a crystalline structure of α-aluminum oxide (α-Al2O3). As commercially available products of α-aluminum oxide single-crystal particles, AA-03, AA-04, AA-05, AA-07, AA-1.5, etc. of the Advanced Alumina (AA) series sold by SUMITOMO CHEMICAL CO., LTD. can be used.

[0030] The content of the ceramic particles 22b in the insulating layer 22 may be, for example, in the range of 60% by volume or more and 80% by volume or less. When the content of the ceramic particles 22b is too small, it may not be possible to sufficiently improve the thermal conductivity of the insulating layer 22, and the thermal resistance of the entire metal base substrate 20 becomes high. On the other hand, when the content of the ceramic particles 22b is too large, the content of the insulating resin 22a relatively decreases, and the elastic modulus of the insulating layer 22 becomes too high, making it difficult to relieve the stress applied to the solder layer 12 due to thermal cycling by the insulating layer 22.

[0031] The thickness of the insulating layer 22 is not particularly limited, but is preferably in the range of 1 μm or more and 200 μm or less, more preferably in the range of 3 μm or more and 100 μm or less, for example.

[0032] The insulating layer 22 of the metal base substrate 20 of the present embodiment is formed in such a manner that the relationship between the thickness t (μm) of the insulating layer 22 and the elastic modulus E (GPa) of the insulating layer 22 at 100 °C satisfies the following formula (1).

[0033] t / E > 10...(1)

[0034] If the elastic modulus of the insulating layer 22 is reduced in such a manner that the relationship between the thickness t of the insulating layer 22 and the elastic modulus E of the insulating layer 22 satisfies the above formula (1), the stress caused by the thermal expansion of the metal substrate 21 can be sufficiently relieved.

[0035] The circuit layer 23 may be a metal foil having a semi-softening temperature of 100 °C or more and 150 °C or less. For example, aluminum, copper, and alloys of these metals can be used. Among these metals, copper is preferred. As copper, for example, 4N copper (purity 99.99%) can be cited. In order to set the semi-softening temperature to 100 °C or more and 150 °C or less, it is preferable to contain a trace amount of additive elements in this 4N copper. As the additive elements, yttrium, scandium, samarium, lanthanum, cerium, boron, titanium, vanadium, chromium, manganese, iron, zirconium, hafnium, neodymium, tantalum, calcium, and manganese can be cited.

[0036] The film thickness of the circuit layer 23 is in the range of 10 μm or more and 2000 μm or less, preferably in the range of 20 μm or more and 200 μm or less. When the film thickness of the circuit layer 23 is too thin, it may lead to a decrease in the allowable current or an increase in the thermal resistance. On the other hand, when the film thickness of the circuit layer 23 is too thick, it may be difficult to form a circuit pattern by etching.

[0037] The circuit layer 23 of the present embodiment uses a metal foil (such as 4N copper foil) having a semi-softening temperature of 100 °C or more and 150 °C or less.

[0038] The semi-softening temperature mentioned here refers to the annealing temperature corresponding to the intermediate yield strength between the yield strength before annealing when annealing the sample and measuring the yield strength by a tensile test and the yield strength at complete softening (the state where the yield strength does not change even if the annealing temperature is further increased after annealing for 30 minutes is regarded as complete softening). In addition, the yield strength before annealing is set as the yield strength after cold rolling.

[0039] In addition to the above configuration, an adhesion layer 25 may be further provided between the insulating layer 22 and the circuit layer 23 and / or between the insulating layer 22 and the metal substrate 21. In the present embodiment, an example of providing the adhesion layer 25 between the insulating layer 22 and the circuit layer 23 is shown.

[0040] The adhesion layer 25 is preferably made of a resin. As the resin, silicone resin, epoxy resin, polyamideimide resin, and polyimide resin can be used. The silicone resin includes modified silicone resins into which various organic groups are introduced. Examples of the modified silicone resin include polyimide-modified silicone resin, polyester-modified silicone resin, urethane-modified silicone resin, acrylic-modified silicone resin, olefin-modified silicone resin, ether-modified silicone resin, alcohol-modified silicone resin, fluorine-modified silicone resin, amino-modified silicone resin, mercapto-modified silicone resin, and carboxyl-modified silicone resin. Examples of the epoxy resin include bisphenol A type epoxy resin, bisphenol F type epoxy resin, novolac type epoxy resin, aliphatic type epoxy resin, and glycidylamine type epoxy resin. These resins can be used alone or in combination of two or more.

[0041] In order to improve the thermal conductivity, a thermally conductive filler can be dispersed in the adhesion layer 25.

[0042] As the thermally conductive filler, ceramic particles can be used. Examples of the ceramic particles include silica particles, alumina particles, boron nitride particles, titanium oxide particles, silica particles doped with alumina, alumina hydrate particles, and aluminum nitride particles coated with phosphoric acid.

[0043] Regarding the filler contained in the close contact layer 25, it is preferable that the volume ratio of the filler contained in the close contact layer 25 is less than the volume ratio of the filler contained in the insulating layer 22. For example, in the case of using ceramic particles as the filler, the content of the filler in the close contact layer 25 may be within the range of 20% by volume or more and 60% by volume or less.

[0044] According to the metal substrate 20 of the present embodiment configured as described above and the electronic component mounting substrate 10 using the metal substrate 20, by using the circuit layer 23 having a semi-softening temperature of 100°C or more and 150°C or less, and making the relationship between the thickness t (μm) of the insulating layer 22 and the elastic modulus E (GPa) of the insulating layer 22 at 100°C satisfy the above formula (1), thus in the state where the electronic component 11 is joined by the solder layer 12, even when a thermal cycle is applied, it is possible to suppress excessive stress from being applied to the solder layer 12, and it is possible to realize the metal substrate 20 and the electronic component mounting substrate 10 that are less likely to cause the generation of solder cracks.

[0045] As mentioned above, although one embodiment of the present invention has been described, this embodiment is presented only as an example and is not intended to limit the scope of the invention. Regarding this embodiment, it can be implemented in various other ways, and various omissions, substitutions, and changes can be made without departing from the gist of the invention. Regarding this embodiment or its modifications, it is included in the scope of the invention described in the claims and its equivalents in the same way as being included in the scope or gist of the invention.

[0046] Examples

[0047] The effects of the present invention were verified.

[0048] (Production of copper foil serving as the circuit layer)

[0049] In oxygen-free copper with a purity of 99.996% by mass or more, yttrium (Y) was added to achieve the concentrations shown in Table 1, and melting was performed by vacuum melting (0.1 Pa). Then, after the thickness of the obtained ingot was made 10 mm by hot rolling, surface cutting was performed, and annealing and cold rolling were repeated to form a specified thickness.

[0050] (Production of coating liquid for forming insulating layer)

[0051] As the ceramic particles, alumina (Al2O3) particles (AA-07: manufactured by SUMITOMO CHEMICAL CO., LTD.) were prepared. 1.0 g of the prepared alumina particles was added to 10 g of NMP (N-methyl-2-pyrrolidone), and ultrasonic treatment was performed for 30 minutes to prepare a ceramic particle dispersion liquid.

[0052] Next, a polyimide solution (commercial product) of a solvent-soluble polyimide having an elastic modulus of 100 MPa at 100 °C and a ceramic particle dispersion liquid were mixed so that the content of the ceramic particles relative to the total amount of the resin component and the ceramic particles was 60% by volume. Next, it was diluted with a solvent so that the concentration of the polyimide in the mixture became 5% by mass. Next, by using a wet atomization device (Star Burst: manufactured by SUGINO MACHINE LIMITED), the obtained mixture was subjected to a dispersion treatment by repeating a high-pressure injection treatment at a pressure of 50 MPa 10 times, thereby preparing a polyimide solution (coating liquid for forming an insulating layer) in which ceramic particles were dispersed.

[0053] (Formation of Insulating Layer)

[0054] On the surface of a copper substrate having a thickness of 2.0 mm and a size of 50 mm × 50 mm, the coating liquid for forming an insulating layer was coated by a bar coating method so that the value obtained by dividing the thickness (μm) of the insulating layer formed by heating by the elastic modulus (GPa) of the insulating layer at 100 °C was the value shown in Table 1, thereby forming a coating layer for forming an insulating layer. Next, the copper substrate having the coating layer for forming an insulating layer formed thereon was placed on a hot plate, heated from room temperature to 60 °C at a rate of 3 °C / min, heated at 60 °C for 100 minutes, further heated to 120 °C at a rate of 1 °C / min, and heated at 120 °C for 100 minutes, thereby drying the coating layer for forming an insulating layer. After that, the copper substrate was heated at 250 °C for 1 minute and at 400 °C for 1 minute, thereby forming an insulating layer on one side of the copper substrate.

[0055] In addition, the elastic modulus of the insulating layer used the value measured by the following measurement procedure.

[0056] An insulating layer was coated on a 0.1 mm copper plate and dried, and then the copper plate was removed by etching to separate the insulating film. For the obtained insulating film, using a dynamic viscoelasticity measuring device (Solid Viscoelastic Analyzer RSA-G2: manufactured by TA INSTRUMENTS JAPAN INC.), the elastic modulus at 100 °C was measured by a tensile method. Regarding the measurement conditions, the frequency was set to 1 Hz and the heating rate was set to 1 °C / Min.

[0057] (Bonding of Circuit Layer)

[0058] On the insulating layer, a copper foil (wiring layer) of 40 mm × 40 mm was laminated with the thickness described in Table 1. Next, while applying a pressure of 5 MPa using a carbon jig, it was heated at a temperature of 215 °C in a vacuum for 120 minutes, thereby bonding the insulating layer and the copper foil. In this way, a metal base substrate in which a copper substrate, an insulating layer, and a copper foil were laminated in sequence was manufactured.

[0059] The verification results of Examples 1 to 36 and Comparative Examples 1 to 3 of the present invention are shown in Table 1. In addition, the "reliability" in Table 1 is the result of the reliability test described below. Those with a reliability of 80% or more are marked as ○, and those with a reliability below 80% are marked as ×.

[0060] (Reliability test)

[0061] An insulating layer was formed on a metal substrate, a copper foil was formed as a wiring layer above the insulating layer, and an Sn-Ag-Cu solder was further coated to form a solder layer with a length of 2.5 cm × width of 2.5 cm × thickness of 100 μm. A 2.5 cm square Si chip was mounted above the solder layer to fabricate a test body. The fabricated test body was subjected to 3000 cycles of thermal cycling (-40°C × 30 minutes to 150°C × 30 minutes per cycle). The test body after thermal cycling was embedded in resin, and the observation surface formed by cross-section grinding near the center of the chip was observed, and the length (mm) of the cracks generated in the solder layer was measured. The value calculated by the following formula representing reliability based on the length of one side of the solder layer and the measured crack length was defined as the joint reliability. Those with a joint reliability of 90% or more were marked as reliability ○, and the rest were marked as ×.

[0062] Reliability (%) = {((length of one side of the solder layer (25 mm) - 2 × crack length) / length of one side of the solder layer (25 mm))} × 100

[0063] [Table 1]

[0064]

[0065]

[0066]

[0067] From the results shown in Table 1, it can be confirmed that the metal base substrates of Examples 1 to 36 of the present invention, in which the semi-softening temperature of the circuit layer is 100°C or more and 150°C or less and the relationship between the thickness t (μm) of the insulating layer and the elastic modulus E (GPa) of the insulating layer at 100°C satisfies the following formula (1), meet the required conditions for reliability and are metal base substrates in which solder cracks are not easily generated in the solder layer even when thermal cycling is applied. On the other hand, for the metal base substrates of Comparative Examples 1 to 3, they do not meet the required conditions for reliability, and solder cracks may be generated in the solder layer when thermal cycling is applied. Therefore, the effects of the metal base substrate of the present invention can be confirmed.

[0068] Symbol description

[0069] 10 Electronic component mounting substrate

[0070] 11 Electronic component

[0071] 12 Solder layer

[0072] 20 Metal base substrate

[0073] 21 Metal substrate

[0074] 22 Insulation layer

[0075] 22a Insulating resin (resin)

[0076] 22b Ceramic particles (filler)

[0077] 23 Circuit layer

Claims

1. A metal base substrate, comprising a metal substrate, an insulating layer laminated on one surface of the metal substrate, and a circuit layer laminated on the surface of the insulating layer opposite to the metal substrate side, wherein the metal base substrate is characterized in that, the circuit layer is formed of a metal having a semi-softening temperature of 100 °C or higher and 150 °C or lower, the insulating layer contains a resin, and the relationship between the thickness t of the insulating layer and the elastic modulus E of the insulating layer at 100 °C satisfies the following formula (1), where the unit of the thickness t is μm and the unit of the elastic modulus E is GPa, t / E > 10...(1).

2. The metal base substrate according to claim 1, characterized in that, the insulating layer is a layer formed by dispersing a filler in the resin.

3. The metal base substrate according to claim 2, characterized in that, at least one of between the insulating layer and the circuit layer and between the insulating layer and the metal substrate has a close contact layer formed by dispersing a filler, the volume ratio of the filler contained in the close contact layer is less than the volume ratio of the filler contained in the insulating layer.

4. An electronic component mounting substrate, characterized in that, An electronic component having the metal base substrate according to any one of claims 1 to 3 and the circuit layer of the electronic component bonded to the metal base substrate through a solder layer.

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