Power semiconductor device and preparation method thereof
By tilting the anode and cathode electrodes to increase the contact area, the problem of uneven electric field distribution in power semiconductor devices is solved, and the high-temperature reliability and stability of the device are improved.
Patent Information
- Application Number
- CN202210812168.7
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Filing Date
- 2022-07-11
- Publication Date
- 2025-08-22
- Estimated Expiration
- 2042-07-11
AI Technical Summary
There is a problem of uneven electric field distribution in power semiconductor devices, which leads to current congestion at the anode and cathode electrodes, affecting the high-temperature reliability of the device.
The anode and cathode electrodes are arranged in an inclined arrangement. The first ends of the anode and cathode electrodes penetrate through the SiN protective layer and the GaN cap layer respectively and are inserted into the AlGaN layer. The inclination angle is 5°-50°, which increases the contact area and improves the stability of the epitaxial sheet through the GaN cap layer and the SiN protective layer.
Improve the electric field distribution, avoid the appearance of local tips, improve the reliability of power semiconductor devices in high temperature states, and reduce the risk of leakage.
Smart Images
Figure CN115394894B_ABST
Abstract
Description
Technical Field
[0001] The present disclosure relates to the field of optoelectronic manufacturing technology, and in particular to a power semiconductor device and a preparation method thereof. Background Art
[0002] Light emitting diodes (LEDs) are a type of power semiconductor device. As an extremely influential new product in the optoelectronics industry, they have the characteristics of small size, long service life, rich colors, and low energy consumption. They are widely used in lighting, display screens, signal lights, backlight sources, toys and other fields.
[0003] In related technologies, a power semiconductor device mainly includes an epitaxial wafer, an anode electrode, and a cathode electrode, and both the anode electrode and the cathode electrode are connected to the epitaxial wafer.
[0004] However, uneven electric field distribution is a common problem in power semiconductor devices, which can lead to current congestion at the anode and cathode electrodes. Summary of the Invention
[0005] The present disclosure provides an epitaxial wafer for a power semiconductor device and a method for preparing the same, which can improve the electric field distribution and help enhance the high-temperature reliability of the power semiconductor device. The technical solution is as follows:
[0006] In one aspect, an embodiment of the present disclosure provides a power semiconductor device, the power semiconductor device comprising an epitaxial wafer, an anode electrode, and a cathode electrode;
[0007] The epitaxial wafer includes a substrate and a buffer layer, a U-GaN layer, an AlGaN layer, a GaN cap layer and a SiN protective layer sequentially formed on the substrate;
[0008] The anode electrode and the cathode electrode are spaced apart from each other, the first end of the anode electrode sequentially passes through the SiN protective layer and the GaN cap layer and is inserted into the AlGaN layer, and the side of the anode electrode facing the cathode electrode is inclined relative to the AlGaN layer;
[0009] The first end of the cathode electrode sequentially penetrates the SiN protection layer and the GaN cap layer and is inserted into the AlGaN layer. The side of the cathode electrode facing the anode electrode is inclined relative to the AlGaN layer.
[0010] In an implementation of the present disclosure, in a direction from the first end to the second end of the anode electrode, the anode electrode faces one side of the cathode electrode and is inclined toward the cathode electrode.
[0011] In an implementation of the present disclosure, in a direction from the second end to the first end of the cathode electrode, the cathode electrode is inclined toward one side of the anode electrode and away from the anode electrode.
[0012] In one implementation of the present disclosure, a side of the anode electrode facing the cathode electrode is inclined by 5°-50° relative to the AlGaN layer.
[0013] In an implementation of the present disclosure, a side of the cathode electrode facing the anode electrode is inclined by 5°-50° relative to the AlGaN layer.
[0014] In an implementation of the present disclosure, a distance between the first end of the anode electrode and a side of the AlGaN layer facing the GaN cap layer is 1 nm-15 nm.
[0015] In an implementation of the present disclosure, a distance between the first end of the cathode electrode and a side of the AlGaN layer facing the GaN cap layer is 1 nm-15 nm.
[0016] On the other hand, an embodiment of the present disclosure further provides a method for preparing a power semiconductor device, the method comprising:
[0017] providing a substrate;
[0018] epitaxially growing a buffer layer, a U-GaN layer, an AlGaN layer, a GaN cap layer and a SiN protective layer on the substrate in sequence;
[0019] Providing an anode electrode, one side of which is an inclined surface, and sequentially passing a first end of the anode electrode through the SiN protective layer and the GaN cap layer and inserted into the AlGaN layer;
[0020] A cathode electrode is provided, one side of which is an inclined surface. The first end of the cathode electrode is sequentially passed through the SiN protective layer and the GaN cap layer and inserted into the AlGaN layer, and the inclined surface of the cathode electrode is opposite to the inclined surface of the anode electrode.
[0021] In an implementation of the present disclosure, the AlGaN layer and the GaN cap layer are periodically and alternately stacked and grown, and the number of alternating periods of the AlGaN layer and the GaN cap layer is 1-6.
[0022] In one implementation of the present disclosure, before growing the GaN cap layer and the SiN protective layer, the surface is treated in a pure nitrogen atmosphere for 2-15 minutes.
[0023] The beneficial effects of the technical solutions provided by the embodiments of the present disclosure include at least:
[0024] Because the side of the anode electrode facing the cathode electrode is tilted relative to the AlGaN layer, and the side of the cathode electrode facing the anode electrode is tilted relative to the AlGaN layer, the contact area between the anode electrode and the epitaxial wafer, as well as the contact surface between the cathode electrode and the epitaxial wafer, are increased, thereby improving the electric field distribution at the anode electrode and the cathode electrode, avoiding the appearance of localized tips, which is of great help in stabilizing the reliability of power semiconductor devices at high temperatures. In addition, because the epitaxial wafer includes a GaN cap layer and a SiN protective layer, it can prevent leakage caused by surface adsorption and changes in interface properties, further improving the reliability of the power semiconductor device. BRIEF DESCRIPTION OF THE DRAWINGS
[0025] In order to more clearly illustrate the technical solutions in the embodiments of the present disclosure, the following briefly introduces the drawings required for use in the description of the embodiments. Obviously, the drawings described below are only some embodiments of the present disclosure. For ordinary technicians in this field, other drawings can be obtained based on these drawings without any creative work.
[0026] Figure 1 is a schematic structural diagram of a power semiconductor device provided by an embodiment of the present disclosure;
[0027] Figure 2 This is a flow chart of a method for preparing a power semiconductor device provided by an embodiment of the present disclosure;
[0028] Figure 3 is a flow chart of another method for preparing a power semiconductor device provided by an embodiment of the present disclosure;
[0029] Figure 4 This is a schematic diagram of a manufacturing process of a power semiconductor device provided by an embodiment of the present disclosure;
[0030] Figure 5 This is a schematic diagram of a process for preparing a power semiconductor device provided by an embodiment of the present disclosure;
[0031] Figure 6 This is a schematic diagram of a process for preparing a power semiconductor device provided by an embodiment of the present disclosure;
[0032] Figure 7 This is a schematic diagram of a process for preparing a power semiconductor device provided by an embodiment of the present disclosure;
[0033] Figure 8 This is a schematic diagram of a power semiconductor device manufacturing process provided by an embodiment of the present disclosure.
[0034] The following is an example:
[0035] 10. Epitaxial wafer;
[0036] 110, substrate; 120, buffer layer; 130, U-GaN layer; 140, AlGaN layer; 150, GaN cap layer; 160, SiN protective layer;
[0037] 20. Anode electrode;
[0038] 30. Cathodic electrode. DETAILED DESCRIPTION
[0039] In order to make the objectives, technical solutions and advantages of the present disclosure more clear, the embodiments of the present disclosure will be further described in detail below with reference to the accompanying drawings.
[0040] Light emitting diodes (LEDs) are a type of power semiconductor device. As an extremely influential new product in the optoelectronics industry, they have the characteristics of small size, long service life, rich colors, and low energy consumption. They are widely used in lighting, display screens, signal lights, backlight sources, toys and other fields.
[0041] At this stage, with the reduction in size and the limitations of physical properties, silicon devices have reached their physical limits. In order to continue to improve device performance, new materials must be developed. The advantages of wide-bandgap materials such as SiC, GaN, AlN, and diamond in high-density power and high-temperature applicability have attracted widespread attention in the industry. SiC-based power devices have been commercialized in high-voltage and high-power devices. Among these wide-bandgap materials, GaN material has higher electron mobility than SiC and a higher breakdown electric field strength than Si. GaN-based devices are expected to meet the needs of advanced power device systems, including RF and power conversion equipment applications.
[0042] Power diodes are crucial components in power conversion and inverters used in power conversion. Due to the excellent physical and chemical properties of GaN, GaN-based power diodes can significantly improve conversion efficiency and reduce power loss. Since 2000, GaN-based rectifiers have become a hot area of research. Due to the lack of minority carrier accumulation and lower barrier height, GaN Schottky diodes operate at lower frequencies, offering advantages over PN junction diodes. However, semi-vertical GaN Schottky diodes suffer from uneven current distribution, which in turn leads to current congestion and hinders the application of semi-vertical structures.
[0043] In order to solve the above technical problems, the present disclosure provides a power semiconductor device. Figure 1 is a schematic diagram of the structure of the power semiconductor device, see Figure 1 In this embodiment, it includes an epitaxial wafer 10 , an anode electrode 20 and a cathode electrode 30 .
[0044] The epitaxial wafer 10 includes a substrate 110 and a buffer layer 120 , a U-GaN layer 130 , an AlGaN layer 140 , a GaN cap layer 150 and a SiN protection layer 160 sequentially formed on the substrate 110 .
[0045] The anode electrode 20 and the cathode electrode 30 are spaced apart from each other. The first end of the anode electrode 20 sequentially penetrates the SiN protective layer 160 and the GaN cap layer 150 and is inserted into the AlGaN layer 140. The side of the anode electrode 20 facing the cathode electrode 30 is inclined relative to the AlGaN layer 140. The first end of the cathode electrode 30 sequentially penetrates the SiN protective layer 160 and the GaN cap layer 150 and is inserted into the AlGaN layer 140. The side of the cathode electrode 30 facing the anode electrode 20 is inclined relative to the AlGaN layer 140.
[0046] In this embodiment, the power semiconductor device is a light-emitting diode. Since the side of the anode electrode 20 facing the cathode electrode 30 is tilted relative to the AlGaN layer 140, and the side of the cathode electrode 30 facing the anode electrode 20 is tilted relative to the AlGaN layer 140, the contact area between the anode electrode 20 and the epitaxial wafer 10, as well as the contact surface between the cathode electrode 30 and the epitaxial wafer 10, are increased. This improves the electric field distribution at the anode electrode 20 and the cathode electrode 30, avoids the appearance of localized tips, and is of great help in stabilizing the reliability of the power semiconductor device at high temperatures. Furthermore, since the epitaxial wafer 10 includes a GaN cap layer 150 and a SiN protective layer 160, the epitaxial wafer 10 is protected from leakage caused by surface adsorption and changes in interface properties, further improving the reliability of the power semiconductor device.
[0047] As can be seen from the foregoing, the tilted arrangement of the anode electrode 20 and the cathode electrode 30 is the key to improving the electric field distribution. The anode electrode 20 and the cathode electrode 30 are introduced below.
[0048] In this embodiment, in a direction from the first end to the second end of the anode electrode 20 , the anode electrode 20 is inclined toward the cathode electrode 30 at one side thereof.
[0049] In the above implementation, the longitudinal cross-section of the anode electrode 20 is a right-angled trapezoid, the upper base of the right-angled trapezoid is the first end of the anode electrode 20, the lower base of the right-angled trapezoid is the second end of the anode electrode 20, the height of the right-angled trapezoid is away from the cathode electrode 30 and is perpendicular to the AlGaN layer 140, and the waist of the right-angled trapezoid is close to the cathode electrode 30 and is inclined to the AlGaN layer 140, that is, the side of the anode electrode 20 that is inclined. This design increases the contact area between the anode electrode 20 and the epitaxial wafer 10, thereby improving the electric field distribution at the anode electrode 20 and the cathode electrode 30, avoiding the occurrence of localized sharp points, and greatly helping to stabilize the reliability of power semiconductor devices at high temperatures.
[0050] Exemplarily, the side of the anode electrode 20 facing the cathode electrode 30 is inclined at 5°-50° relative to the AlGaN layer 140 .
[0051] In the above implementation, the side of the anode electrode 20 facing the cathode electrode 30 has an angle α with respect to the AlGaN layer 140, and the angle α is 5°-50°. By designing the angle α within this range, the contact area between the anode electrode 20 and the epitaxial wafer 10 can be guaranteed.
[0052] Exemplarily, the distance between the first end of the anode electrode 20 and the side of the AlGaN layer 140 facing the GaN cap layer 150 is 1 nm-15 nm.
[0053] In the above implementation, the first end of the anode electrode 20 passes through the SiN protective layer 160 and the GaN cap layer 150 in sequence and is inserted into the AlGaN layer 140, and the insertion depth of the first end of the anode electrode 20 in the AlGaN layer 140 is 1-15 nm, which can ensure sufficient and stable contact between the anode electrode 20 and the AlGaN layer 140.
[0054] In this embodiment, in the direction from the second end to the first end of the cathode electrode 30 , the cathode electrode 30 faces the side of the anode electrode 20 and is inclined toward the anode electrode 20 .
[0055] In the above implementation, the longitudinal cross-section of the cathode electrode 30 is a right-angled trapezoid, the upper base of the right-angled trapezoid is the second end of the cathode electrode 30, the lower base of the right-angled trapezoid is the first end of the cathode electrode 30, the height of the right-angled trapezoid is away from the anode electrode 20 and is perpendicular to the AlGaN layer 140, and the waist of the right-angled trapezoid is close to the anode electrode 20 and is inclined to the AlGaN layer 140, that is, the inclined side of the cathode electrode 30. This design increases the contact area between the cathode electrode 30 and the epitaxial wafer 10, thereby improving the electric field distribution at the cathode electrode 30 and the anode electrode 20, avoiding the occurrence of localized sharp points, and greatly helping to stabilize the reliability of power semiconductor devices at high temperatures.
[0056] In this embodiment, the inclination direction of the anode electrode 20 is the same as the inclination direction of the cathode electrode 30, so that the distance between the anode electrode 20 and the cathode electrode 30 remains approximately the same. In addition, compared with the anode electrode 20 and the cathode electrode 30 arranged vertically, the distance between the inclined anode electrode 20 and the cathode electrode 30 is smaller.
[0057] Exemplarily, a side of the anode electrode 20 tilted toward the cathode electrode 30 and a side of the cathode electrode 30 tilted toward the anode electrode 20 are parallel to each other.
[0058] Exemplarily, the side of the cathode electrode 30 facing the anode electrode 20 is inclined at 5°-50° relative to the AlGaN layer 140 .
[0059] In the above implementation, the side of the cathode electrode 30 facing the anode electrode 20 has an angle β with respect to the AlGaN layer 140, and the angle β is 5°-50°. Designing the angle β within this value range can ensure the contact area between the cathode electrode 30 and the epitaxial wafer 10.
[0060] Exemplarily, the distance between the first end of the cathode electrode 30 and the side of the AlGaN layer 140 facing the GaN cap layer 150 is 1 nm-15 nm.
[0061] In the above implementation, the first end of the cathode electrode 30 passes through the SiN protective layer 160 and the GaN cap layer 150 in sequence and is inserted into the AlGaN layer 140, and the insertion depth of the first end of the cathode electrode 30 in the AlGaN layer 140 is 1-15 nm, which can ensure sufficient and stable contact between the cathode electrode 30 and the AlGaN layer 140.
[0062] Exemplarily, the substrate 110 is made of sapphire, silicon wafer, quartz wafer, silicon carbide, diamond, or single crystal materials such as GaAs, InP, AlN, and GaN, and can be 2 inches or larger in size. The substrate 110 can be a flat substrate 110 or a patterned substrate 110.
[0063] As an example, in the embodiment of the present disclosure, the substrate 110 is a sapphire substrate 110 . The sapphire substrate 110 is a commonly used substrate 110 with mature technology and low cost. Specifically, it can be a patterned sapphire substrate 110 or a sapphire flat sheet substrate 110 .
[0064] Figure 2 A flowchart of a method for preparing a power semiconductor device provided in an embodiment of the present disclosure, which can prepare Figure 1 The power semiconductor device shown in FIG. Figure 2 In this embodiment, the preparation method includes:
[0065] Step 201: Provide a substrate 110.
[0066] Step 202 : epitaxially growing a buffer layer 120 , a U-GaN layer 130 , an AlGaN layer 140 , a GaN cap layer 150 and a SiN protection layer 160 on the substrate 110 in sequence.
[0067] Step 203 : providing an anode electrode 20 , one side of which is an inclined surface; passing a first end of the anode electrode 20 through the SiN protective layer 160 and the GaN cap layer 150 in sequence and inserting the first end into the AlGaN layer 140 .
[0068] Step 204: Provide a cathode electrode 30 with a sloped side. Insert the first end of the cathode electrode 30 through the SiN protective layer 160 and the GaN cap layer 150 in sequence and insert it into the AlGaN layer 140 , with the slope of the cathode electrode 30 facing the slope of the anode electrode 20 .
[0069] Since the side of the anode electrode 20 facing the cathode electrode 30 is tilted relative to the AlGaN layer 140, and the side of the cathode electrode 30 facing the anode electrode 20 is tilted relative to the AlGaN layer 140, the contact area between the anode electrode 20 and the epitaxial wafer 10, as well as the contact surface between the cathode electrode 30 and the epitaxial wafer 10, are increased, thereby improving the electric field distribution at the anode electrode 20 and the cathode electrode 30, avoiding the occurrence of localized sharp points, which is of great help to the reliability stability of power semiconductor devices at high temperatures. In addition, since the epitaxial wafer 10 includes a GaN cap layer 150 and a SiN protective layer 160, the epitaxial wafer 10 can be protected from leakage caused by surface adsorption and changes in interface properties, further improving the reliability of the power semiconductor device.
[0070] Figure 3 A flowchart of another method for preparing a power semiconductor device provided in an embodiment of the present disclosure, which can prepare Figure 1 The power semiconductor device shown in FIG. Figure 3 In this embodiment, the preparation method includes:
[0071] Step 301: Provide a substrate 110.
[0072] Exemplarily, the substrate 110 is made of sapphire, silicon wafer, quartz wafer, silicon carbide, diamond, or single crystal materials such as GaAs, InP, AlN, and GaN, and can be 2 inches or larger in size. The substrate 110 can be a flat substrate 110 or a patterned substrate 110.
[0073] As an example, in the embodiment of the present disclosure, the substrate 110 is a sapphire substrate 110 . The sapphire substrate 110 is a commonly used substrate 110 with mature technology and low cost. Specifically, it can be a patterned sapphire substrate 110 or a sapphire flat sheet substrate 110 .
[0074] Illustratively, the substrate 110 is annealed in a hydrogen atmosphere for 8 minutes at a temperature between 1000° C. and 1200° C. to clean the surface of the substrate 110 , and then nitridation is performed.
[0075] Illustratively, the temperature is 1100°C.
[0076] Step 302: epitaxially grow a buffer layer 120 on the substrate 110 (see Figure 4 ).
[0077] Exemplarily, the temperature is adjusted to 400° C.-600° C., the buffer layer 120 is grown to a thickness of 15 nm-35 nm, and the growth pressure range is 400 Torr-600 Torr.
[0078] For example, the temperature is 500° C., the thickness is 25 nm, and the growth interval is 500 Torr.
[0079] In this embodiment, the buffer layer 120 is subjected to in-situ annealing treatment at a temperature of 1000° C. to 1200° C., for a time of 5 minutes to 10 minutes, and at a pressure of 400 Torr to 600 Torr.
[0080] For example, the temperature is 1100° C., the time is 7 minutes, and the pressure range is 500 Torr.
[0081] It should be noted that the quality of the epitaxial wafer 10 formed will be different depending on the thickness of the buffer layer 120. If the thickness of the buffer layer 120 is too thin, the surface of the buffer layer 120 will be loose and rough, and cannot provide a good template for the growth of subsequent structures. As the thickness of the buffer layer 120 increases, the surface of the buffer layer 120 gradually becomes denser and smoother, which is conducive to the growth of subsequent structures. However, if the thickness of the buffer layer 120 is too thick, the surface of the buffer layer 120 will be too dense, which is also not conducive to the growth of subsequent structures and cannot reduce the lattice defects in the epitaxial layer.
[0082] Step 303: Growing a U-GaN layer 130 on the buffer layer 120 (see Figure 5 ).
[0083] Exemplarily, the temperature is adjusted to 1000° C.-1100° C., the U-GaN layer 130 is grown to a thickness of 0.5 μm-2.0 μm, and the growth pressure range is 100 Torr-500 Torr.
[0084] For example, the temperature is 1050° C., the thickness is 1 μm, and the growth pressure is 250 Torr.
[0085] Step 304: Grow an AlGaN layer 140 and a GaN cap layer 150 on the U-GaN layer 130 (see Figure 6 ).
[0086] For example, the thickness of the AlGaN layer 140 is 3 nm to 15 nm, the Al molar content of the AlGaN layer 140 is 0.07 to 0.30, and the AlGaN layer 140 is grown at the same temperature as the N-type GaN layer, at a pressure range of 50 Torr to 150 Torr. After the growth of the GaN cap layer 150 is completed, the Mo source and ammonia gas are turned off, and a pure nitrogen relaxation anneal is performed for 2 to 15 minutes.
[0087] For example, the AlGaN layer 140 has a thickness of 7 nm and an Al molar content of 0.18. The AlGaN layer 140 is grown at the same temperature as the N-type GaN layer, and the growth pressure is within the range of 100 Torr. After the growth of the GaN cap layer 150 is completed, the Mo source and ammonia gas are turned off, and a pure nitrogen gas relaxation annealing is performed for 8 minutes.
[0088] In this embodiment, the AlGaN layer 140 and the GaN cap layer 150 are periodically and alternately stacked and grown, and the number of the alternating periods of the AlGaN layer 140 and the GaN cap layer 150 is 1-6.
[0089] Step 305: Growing a SiN protective layer 160 on the GaN cap layer 150 (see Figure 7 ).
[0090] Exemplarily, the thickness of the SiN protective layer 160 is 5 nm-50 nm.
[0091] Exemplarily, the thickness of the SiN protective layer 160 is 27 nm.
[0092] In this embodiment, after the SiN protective layer 160 is grown, the epitaxial wafer 10 is grown, cooled to room temperature, taken out, and manufactured into a chip through semiconductor processes such as cleaning, deposition, photolithography, and etching.
[0093] Step 306: Provide an anode electrode 20, one side of which is an inclined surface. Insert the first end of the anode electrode 20 through the SiN protective layer 160 and the GaN cap layer 150 in sequence and insert it into the AlGaN layer 140 (see Figure 8 ).
[0094] In this embodiment, in a direction from the first end to the second end of the anode electrode 20 , the anode electrode 20 is inclined toward the cathode electrode 30 at one side thereof.
[0095] In the above implementation, the longitudinal cross-section of the anode electrode 20 is a right-angled trapezoid, the upper base of the right-angled trapezoid is the first end of the anode electrode 20, the lower base of the right-angled trapezoid is the second end of the anode electrode 20, the height of the right-angled trapezoid is away from the cathode electrode 30 and is perpendicular to the AlGaN layer 140, and the waist of the right-angled trapezoid is close to the cathode electrode 30 and is inclined to the AlGaN layer 140, that is, the side of the anode electrode 20 that is inclined. This design increases the contact area between the anode electrode 20 and the epitaxial wafer 10, thereby improving the electric field distribution at the anode electrode 20 and the cathode electrode 30, avoiding the occurrence of localized sharp points, and greatly helping to stabilize the reliability of power semiconductor devices at high temperatures.
[0096] Exemplarily, the side of the anode electrode 20 facing the cathode electrode 30 is inclined at 5°-50° relative to the AlGaN layer 140 .
[0097] In the above implementation, the side of the anode electrode 20 facing the cathode electrode 30 has an angle α with respect to the AlGaN layer 140, and the angle α is 5°-50°. By designing the angle α within this range, the contact area between the anode electrode 20 and the epitaxial wafer 10 can be guaranteed.
[0098] Exemplarily, the distance between the first end of the anode electrode 20 and the side of the AlGaN layer 140 facing the GaN cap layer 150 is 1 nm-15 nm.
[0099] In the above implementation, the first end of the anode electrode 20 passes through the SiN protective layer 160 and the GaN cap layer 150 in sequence and is inserted into the AlGaN layer 140, and the insertion depth of the first end of the anode electrode 20 in the AlGaN layer 140 is 1-15 nm, which can ensure sufficient and stable contact between the anode electrode 20 and the AlGaN layer 140.
[0100] Step 307: Provide a cathode electrode 30, one side of which is an inclined surface. The first end of the cathode electrode 30 is passed through the SiN protective layer 160 and the GaN cap layer 150 in sequence and inserted into the AlGaN layer 140, with the inclined surface of the cathode electrode 30 facing the inclined surface of the anode electrode 20 (see Figure 1 ).
[0101] In this embodiment, in the direction from the second end to the first end of the cathode electrode 30 , the cathode electrode 30 faces the side of the anode electrode 20 and is inclined toward the anode electrode 20 .
[0102] In the above implementation, the longitudinal cross-section of the cathode electrode 30 is a right-angled trapezoid, the upper base of the right-angled trapezoid is the second end of the cathode electrode 30, the lower base of the right-angled trapezoid is the first end of the cathode electrode 30, the height of the right-angled trapezoid is away from the anode electrode 20 and is perpendicular to the AlGaN layer 140, and the waist of the right-angled trapezoid is close to the anode electrode 20 and is inclined to the AlGaN layer 140, that is, the side of the cathode electrode 30 that is inclined. This design increases the contact area between the cathode electrode 30 and the epitaxial wafer 10, thereby improving the electric field distribution at the cathode electrode 30 and the anode electrode 20, avoiding the occurrence of localized sharp points, and greatly helping to stabilize the reliability of power semiconductor devices at high temperatures.
[0103] In this embodiment, the inclination direction of the anode electrode 20 is the same as the inclination direction of the cathode electrode 30, so that the distance between the anode electrode 20 and the cathode electrode 30 remains approximately the same. In addition, compared with the anode electrode 20 and the cathode electrode 30 arranged vertically, the distance between the inclined anode electrode 20 and the cathode electrode 30 is smaller.
[0104] Exemplarily, a side of the anode electrode 20 tilted toward the cathode electrode 30 and a side of the cathode electrode 30 tilted toward the anode electrode 20 are parallel to each other.
[0105] Exemplarily, the side of the cathode electrode 30 facing the anode electrode 20 is inclined at 5°-50° relative to the AlGaN layer 140 .
[0106] In the above implementation, the side of the cathode electrode 30 facing the anode electrode 20 has an angle β with respect to the AlGaN layer 140, and the angle β is 5°-50°. Designing the angle β within this value range can ensure the contact area between the cathode electrode 30 and the epitaxial wafer 10.
[0107] Exemplarily, the distance between the first end of the cathode electrode 30 and the side of the AlGaN layer 140 facing the GaN cap layer 150 is 1 nm-15 nm.
[0108] In the above implementation, the first end of the cathode electrode 30 passes through the SiN protective layer 160 and the GaN cap layer 150 in sequence and is inserted into the AlGaN layer 140, and the insertion depth of the first end of the cathode electrode 30 in the AlGaN layer 140 is 1-15 nm, which can ensure sufficient and stable contact between the cathode electrode 30 and the AlGaN layer 140.
[0109] The above description is merely an optional embodiment of the present disclosure and is not intended to limit the present disclosure. Any modifications, equivalent replacements, improvements, etc. made within the spirit and principles of the present disclosure shall be included in the scope of protection of the present disclosure.
Claims
1. A power semiconductor device, characterized in that: It comprises an epitaxial wafer (10), an anode electrode (20) and a cathode electrode (30); The epitaxial wafer (10) comprises a substrate (110) and a buffer layer (120), a U-GaN layer (130), an AlGaN layer (140), a GaN cap layer (150) and a SiN protective layer (160) sequentially formed on the substrate (110); The anode electrode (20) and the cathode electrode (30) are spaced apart from each other. The first end of the anode electrode (20) sequentially penetrates the SiN protective layer (160) and the GaN cap layer (150) and is inserted into the AlGaN layer (140). The side of the anode electrode (20) facing the cathode electrode (30) is inclined relative to the AlGaN layer (140). In the direction from the first end to the second end of the anode electrode (20), the side of the anode electrode (20) facing the cathode electrode (30) is inclined relative to the AlGaN layer (140). The cathode electrode (30) is inclined, the longitudinal section of the anode electrode (20) is a right-angled trapezoid, the upper base of the right-angled trapezoid is the first end of the anode electrode (20), the lower base of the right-angled trapezoid is the second end of the anode electrode (20), the height of the right-angled trapezoid is away from the cathode electrode (30) and is perpendicular to the AlGaN layer (140), the waist of the right-angled trapezoid is close to the cathode electrode (30) and is inclined to the AlGaN layer (140), and the waist of the right-angled trapezoid is the inclined side of the anode electrode (20); The first end of the cathode electrode (30) sequentially penetrates the SiN protective layer (160) and the GaN cap layer (150) and is inserted into the AlGaN layer (140); the side of the cathode electrode (30) facing the anode electrode (20) is tilted relative to the AlGaN layer (140); in the direction from the second end to the first end of the cathode electrode (30), the cathode electrode (30) faces the side of the anode electrode (20) and tilts away from the anode electrode (20); The longitudinal section of the cathode electrode (30) is a right-angled trapezoid, the upper base of the right-angled trapezoid is the second end of the cathode electrode (30), the lower base of the right-angled trapezoid is the first end of the cathode electrode (30), the height of the right-angled trapezoid is away from the anode electrode (20) and is perpendicular to the AlGaN layer (140), the waist of the right-angled trapezoid is close to the anode electrode (20) and is inclined to the AlGaN layer (140), and the waist of the right-angled trapezoid is the inclined side of the cathode electrode (30); The side of the anode electrode (20) tilted toward the cathode electrode (30) is parallel to the side of the cathode electrode (30) tilted toward the anode electrode (20).
2. The power semiconductor device according to claim 1, wherein: The side of the anode electrode (20) facing the cathode electrode (30) is inclined at 5°-50° relative to the AlGaN layer (140).
3. The power semiconductor device according to claim 1, wherein: The side of the cathode electrode (30) facing the anode electrode (20) is inclined at 5°-50° relative to the AlGaN layer (140).
4. The power semiconductor device according to claim 1, wherein: The distance between the first end of the anode electrode (20) and the side of the AlGaN layer (140) facing the GaN cap layer (150) is 1 nm to 15 nm.
5. The power semiconductor device according to claim 1, wherein: The distance between the first end of the cathode electrode (30) and the side of the AlGaN layer (140) facing the GaN cap layer (150) is 1 nm to 15 nm.
6. A method for preparing a power semiconductor device, characterized in that: include: Providing a substrate (110); epitaxially growing a buffer layer (120), a U-GaN layer (130), an AlGaN layer (140), a GaN cap layer (150) and a SiN protective layer (160) in sequence on the substrate (110); An anode electrode (20) is provided, one side of the anode electrode (20) is an inclined surface, a first end of the anode electrode (20) is sequentially passed through the SiN protective layer (160) and the GaN cap layer (150) and inserted into the AlGaN layer (140), in a direction from the first end to the second end of the anode electrode (20), the anode electrode (20) faces one side of the cathode electrode (30) and is inclined toward the cathode electrode (30), and the anode electrode (20) is inclined toward the cathode electrode (30). The longitudinal section is a right-angled trapezoid, the upper base of the right-angled trapezoid is the first end of the anode electrode (20), the lower base of the right-angled trapezoid is the second end of the anode electrode (20), the height of the right-angled trapezoid is away from the cathode electrode (30) and is perpendicular to the AlGaN layer (140), the waist of the right-angled trapezoid is close to the cathode electrode (30) and is inclined to the AlGaN layer (140), and the waist of the right-angled trapezoid is the inclined side of the anode electrode (20); A cathode electrode (30) is provided, one side of the cathode electrode (30) is an inclined surface, the first end of the cathode electrode (30) is sequentially passed through the SiN protective layer (160) and the GaN cap layer (150) and inserted into the AlGaN layer (140), and the inclined surface of the cathode electrode (30) is opposite to the inclined surface of the anode electrode (20), in the direction from the second end to the first end of the cathode electrode (30), the cathode electrode (30) is inclined toward one side of the anode electrode (20) and away from the anode electrode (20), the longitudinal section of the cathode electrode (30) is a right-angled trapezoid, and the right-angled The upper base of the trapezoid is the second end of the cathode electrode (30), the lower base of the right-angled trapezoid is the first end of the cathode electrode (30), the height of the right-angled trapezoid is away from the anode electrode (20) and is perpendicular to the AlGaN layer (140), the waist of the right-angled trapezoid is close to the anode electrode (20) and is inclined to the AlGaN layer (140), the waist of the right-angled trapezoid is the side of the cathode electrode (30) that is inclined, and the side of the anode electrode (20) that is inclined toward the cathode electrode (30) is parallel to the side of the cathode electrode (30) that is inclined toward the anode electrode (20).
7. The preparation method according to claim 6, characterized in that The AlGaN layer (140) and the GaN cap layer (150) are periodically and alternately stacked and grown, and the number of alternating periods of the AlGaN layer (140) and the GaN cap layer (150) is 1-6.
8. The preparation method according to claim 6, characterized in that Before growing the GaN cap layer (150) and the SiN protective layer (160), the surface is treated in a pure nitrogen atmosphere for 2-15 minutes.
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CN103715274A