A pixel driving circuit

Abstract

An embodiment of the present application provides a pixel driving circuit that can be used for a micro LED, including a first switch and a second switch cascaded between the cathode of the light-emitting diode and the ground, and a charge absorption circuit. Among them, the first switch is controlled by a PWM signal to control the conduction and cut-off of the light-emitting diode, the control end of the second switch receives a bias voltage, and the charge absorption circuit is connected to the connection point of the first switch and the second switch to absorb the charge at this connection point, accelerate the signal establishment of the light-emitting diode, and improve the display performance of the pixel light-emitting diode.

Description

Technical Field

[0001] This application relates to circuit technologies, and in particular to a pixel driving circuit. Background Art

[0002] An LED (Light Emitting Diode) display panel uses LEDs to implement pixel display, and its display performance has higher contrast and brightness compared with traditional LCD (Liquid Crystal Display).

[0003] In an LED display panel, an LED pixel array is driven by a pixel driving circuit. The pixel driving circuit is gated according to a row strobe signal and a column driving signal, so as to drive the LED to emit light. The anode of the LED is connected to a power supply, and the cathode is connected to the pixel driving circuit. Due to the parasitic capacitance and parasitic resistance existing at the cathode of the LED, when the LED frequently switches between the on state and the off state, the pixel driving circuit needs to charge or discharge the cathode of the LED at a high speed, and the charge and discharge time affects the switching time of the LED, thereby limiting the switching speed of the LED. When the switching speed of the LED is slow, the human eye is prone to observe an afterimage phenomenon, which affects the user experience. Summary of the Invention

[0004] An embodiment of this application provides a pixel driving circuit, which accelerates the absorption of charges in a parasitic capacitance through a charge absorption circuit, thereby increasing the switching frequency of a light emitting diode.

[0005] In a first aspect, an embodiment of this application provides a pixel driving circuit, including a first switch and a second switch cascaded between the cathode of a light emitting diode and the ground, and a charge absorption circuit, wherein the anode of the light emitting diode is electrically connected to a voltage source, one end of the charge absorption circuit is electrically connected to the connection point (the first node) of the first switch and the second switch, and the other end is connected to the ground. The first end of the first switch is electrically connected to the cathode of the light emitting diode, and the control end of the first switch receives a control signal and conducts or disconnects according to the control signal, so as to control the light emitting diode to conduct or cut off. The first end of the second switch is electrically connected to the second end of the first switch, the second end of the second switch is grounded, and the control end of the second switch receives a bias voltage and conducts in a working state. The charge absorption circuit is used to absorb charges from the first node. When the first switch is disconnected, the light emitting diode goes out, and the parasitic capacitance on the cathode (the second node) of the light emitting diode D1 will accumulate charges. When the first switch conducts, the charges in the parasitic capacitance are discharged through the first switch and the second switch, and can also be discharged through the charge absorption circuit.

[0006] The charge absorption circuit electrically connected to the first node can accelerate the release of the charge at the first node, enabling the charge in the parasitic capacitance to be released more quickly. When the release speed of the charge in the parasitic capacitance increases, the establishment time of the current signal of the light-emitting diode becomes shorter, and the refresh frequency of the light-emitting diode becomes higher. As a result, the time experienced by the light-emitting diode from being extinguished to being lit becomes shorter, which can improve the afterimage phenomenon when the human eye observes the light-emitting diode and enhance the display accuracy of the light-emitting diode, thus improving the user experience.

[0007] In a possible implementation manner, both the first switch and the second switch can be NMOS transistors. The source electrode of the first NMOS transistor serving as the first switch is electrically connected to the ground, the drain electrode of the first NMOS transistor is electrically connected to the source electrode of the second NMOS transistor serving as the second switch at the first node, and the drain electrode of the second NMOS transistor is electrically connected to the cathode of the light-emitting diode.

[0008] In a possible implementation manner, the charge absorption circuit includes a first capacitor. One end of the first capacitor is electrically connected to the first node, and the other end is grounded. The capacitor serving as the charge absorption circuit occupies a small area resource and can significantly improve the display performance of the light-emitting diode at the cost of extremely small hardware resources.

[0009] In a possible implementation manner, the first capacitor is a metal-insulator-metal MIM capacitor, a metal-oxide-metal MOM capacitor, or a metal-oxide-semiconductor MOS capacitor.

[0010] In a possible implementation manner, the charge absorption circuit includes a diode-connected MOS transistor, that is, two MOS transistors are connected as a two-terminal device to be used as a diode. The diode-connected MOS transistor can better improve the display performance of the light-emitting diode.

[0011] In a possible implementation manner, the diode-connected MOS transistor includes a third NMOS transistor and a fourth NMOS transistor. The drain electrode and the gate electrode of the third NMOS transistor are electrically connected to the first node, the drain electrode of the fourth NMOS transistor is electrically connected to the source electrode of the third NMOS transistor, the source electrode of the fourth NMOS transistor is grounded, and the gate electrode of the fourth NMOS transistor is electrically connected to the first node.

[0012] In a possible implementation manner, the charge absorption circuit includes a Schottky diode. The cathode of the Schottky diode is electrically connected to the first node, and the anode is grounded. The Schottky diode serving as the charge absorption circuit occupies a small area resource and can significantly improve the display performance of the light-emitting diode at the cost of extremely small hardware resources.

[0013] In a possible implementation manner, the pixel driving circuit further includes a second capacitor. One end of the second capacitor is electrically connected to the control terminal of the second switch, and the other end is grounded.

[0014] In a possible implementation manner, the control signal input to the first switch above is a pulse width modulation (PWM) signal.

[0015] In a possible implementation manner, the above-mentioned plurality of light-emitting diodes may include a plurality of RGB pixels, and each RGB pixel includes three types of pixels: R, G, and B.

[0016] In a possible implementation manner, the above-mentioned plurality of pixel driving circuits are respectively arranged in a plurality of chips, and each pixel circuit drives the corresponding light-emitting diode.

[0017] In a second aspect, an embodiment of the present application provides a pixel driving circuit, including a first switch and a second switch connected in series between the cathode of the light-emitting diode and the ground, a charge absorption circuit, and a ninth switch. The anode of the light-emitting diode is electrically connected to a voltage source. One end of the charge absorption circuit is electrically connected to the cathode of the light-emitting diode through the ninth switch, and the other end is connected to the ground. The first end of the first switch is electrically connected to the cathode of the light-emitting diode, and the control ends of the first switch and the ninth switch receive the same control signal, and are turned on or off according to the control signal, so as to control the light-emitting diode to be turned on or off. The first end of the second switch is electrically connected to the second end of the first switch, the second end of the second switch is grounded, and the control end of the second switch receives a bias voltage and is turned on in the working state. The above-mentioned charge absorption circuit is used to absorb charges from the cathode of the light-emitting diode. When the first switch is turned off, the light-emitting diode is turned off, and the parasitic capacitance on the cathode (the second node) of the light-emitting diode D1 will accumulate charges. When the first switch is turned on, the charges in the parasitic capacitance are discharged through the first switch and the second switch, and can also be discharged through the charge absorption circuit.

[0018] The charge absorption circuit electrically connected to the cathode of the light-emitting diode can accelerate the release of the charges on the cathode of the light-emitting diode, so that the charges in the parasitic capacitance can be released faster. When the release speed of the charges in the parasitic capacitance is accelerated, the establishment time of the current signal of the light-emitting diode becomes shorter, the refresh frequency of the light-emitting diode becomes higher, so that the time experienced by the light-emitting diode from being turned off to being turned on becomes shorter, which can improve the afterimage phenomenon when the human eye observes the light-emitting diode, and improve the display accuracy of the light-emitting diode, and enhance the user experience.

[0019] In a possible implementation manner, both the first switch and the second switch may be NMOS transistors. The source electrode of the first NMOS transistor serving as the first switch is electrically connected to the ground, the drain electrode of the first NMOS transistor is electrically connected to the source electrode of the second NMOS transistor serving as the second switch at the cathode of the above-mentioned light-emitting diode, and the drain electrode of the second NMOS transistor is electrically connected to the cathode of the light-emitting diode.

[0020] In a possible implementation, the above charge absorption circuit includes a first capacitor. One end of the first capacitor is electrically connected to the cathode of the above light-emitting diode, and the other end is grounded. As a capacitor of the charge absorption circuit, it occupies a small area resource and can significantly improve the display performance of the light-emitting diode at the cost of extremely small hardware resources.

[0021] In a possible implementation, the above first capacitor is a metal-insulator-metal MIM capacitor, a metal-oxide-metal MOM capacitor, or a metal-oxide-semiconductor MOS capacitor.

[0022] In a possible implementation, the above charge absorption circuit includes a diode-connected MOS transistor, that is, two MOS transistors are connected as a two-terminal device to be used as a diode. The diode-connected MOS transistor can better improve the display performance of the light-emitting diode.

[0023] In a possible implementation, the above diode-connected MOS transistor includes a third NMOS transistor and a fourth NMOS transistor. The drain and gate of the third NMOS transistor are electrically connected to the cathode of the above light-emitting diode. The drain of the fourth NMOS transistor is electrically connected to the source of the third NMOS transistor. The source of the fourth NMOS transistor is grounded, and the gate of the fourth NMOS transistor is electrically connected to the cathode of the above light-emitting diode.

[0024] In a possible implementation, the above charge absorption circuit includes a Schottky diode. The cathode of the Schottky diode is electrically connected to the cathode of the above light-emitting diode, and the anode is grounded. As a Schottky diode of the charge absorption circuit, it occupies a small area resource and can significantly improve the display performance of the light-emitting diode at the cost of extremely small hardware resources.

[0025] In a possible implementation, the above pixel driving circuit further includes a second capacitor. One end of it is electrically connected to the control terminal of the second switch, and the other end is grounded.

[0026] In a possible implementation, the control signal input to the above first switch is a pulse width modulation PWM signal.

[0027] In a third aspect, an embodiment of the present application provides a display circuit, including a plurality of pixel driving circuits in the first aspect and any possible implementation manner thereof, and a plurality of light-emitting diodes. The above plurality of light-emitting diodes are respectively electrically connected to the above plurality of pixel driving circuits, and the above plurality of pixel driving circuits are used to drive the plurality of light-emitting diodes respectively.

[0028] Fourth aspect, an embodiment of the present application provides a display circuit, including a pixel driving circuit in multiple second aspects and any possible implementation manner, and multiple light-emitting diodes. The multiple light-emitting diodes are respectively electrically connected to the multiple pixel driving circuits, and the multiple pixel driving circuits are used to drive the multiple light-emitting diodes respectively.

[0029] Fifth aspect, an embodiment of the present application provides a terminal device, including a rear cover, a frame, and the display circuit in the third aspect or the fourth aspect, wherein the rear cover and the display circuit are oppositely arranged and connected through the frame.

[0030] The pixel driving circuit in the second aspect, the display circuit in the third and fourth aspects, and the terminal device in the fifth aspect have similar effects to the pixel driving circuit in the first aspect, and can all improve the afterimage phenomenon when the human eye observes the light-emitting diode and improve the display accuracy of the light-emitting diode, which will not be elaborated here. Description of the Drawings

[0031] Figure 1 It is a schematic cross-sectional structure diagram of a terminal device provided by an embodiment of the present application.

[0032] Figure 2 It is a schematic diagram of a display circuit provided by an embodiment of the present application.

[0033] Figure 3 It is a circuit structure diagram of a pixel driving circuit provided by an embodiment of the present application.

[0034] Figure 4a It is a waveform diagram of the PWM signal in the pixel driving circuit provided by an embodiment of the present application;

[0035] Figure 4b It is a current waveform diagram of the light-emitting diode;

[0036] Figure 4c It is a waveform diagram of node A in the traditional circuit;

[0037] Figure 4d It is a waveform diagram of node A in the pixel driving circuit provided by an embodiment of the present application.

[0038] Figure 5 It is a more specific pixel driving circuit provided by an embodiment of the present application.

[0039] Figure 6 It is another more specific pixel driving circuit provided by an embodiment of the present application.

[0040] Figure 7 It is yet another more specific pixel driving circuit provided by an embodiment of the present application.

[0041] Figure 8Another more specific pixel driving circuit provided by the embodiment of the present application.

[0042] Figure 9 Schematic diagram of another pixel driving circuit provided by the embodiment of the present application. Detailed implementation manner

[0043] Next, the technical solutions in the embodiments of the present application will be clearly and completely described with reference to the accompanying drawings in the embodiments of the present application.

[0044] In the present application, terms such as "first" and "second" are only used for descriptive purposes, and cannot be understood as indicating or implying relative importance or implicitly specifying the quantity of the indicated technical features. In addition, the term "electrically connected" should be understood in a broad sense. For example, "electrically connected" can refer to a direct physical connection, or can refer to an electrical connection achieved through an intermediate medium, such as a connection achieved through a resistor, an inductor, or other electrical components.

[0045] When describing a three-terminal switching element, the "first terminal" and the "second terminal" can respectively refer to the connection terminals of the three-terminal switching element, and the "control terminal" can refer to the control terminal of the three-terminal switching element. For example, for a MOS (metal-oxide-semiconductor) transistor switch, the control terminal can refer to the gate of the MOS transistor, the first terminal can refer to the source of the MOS transistor, the second terminal refers to the drain of the MOS transistor, or the first terminal can refer to the drain of the MOS transistor, and the second terminal refers to the source of the MOS transistor.

[0046] Such as Figure 1Shown is a schematic cross-sectional structure diagram of a terminal device 200 provided by an embodiment of the present application. The terminal device 200 can be a smart phone, a portable computer, a tablet computer, an electronic bracelet, etc. or an ultra-small display. The above terminal device 200 includes a screen 210, a frame 220, and a rear cover 230. Among them, the screen 210 and the rear cover 230 are disposed opposite to each other and are connected by the frame 220 to form a cavity between the screen 210 and the rear cover 230. A substrate 240 is disposed in the cavity, and a plurality of driving circuits 250 are disposed on the substrate 240. An LED array 260 is also disposed on the substrate 240. One of the driving circuits 250 can be connected to one or more LED arrays 260 and drive the corresponding LED array 260 to emit light. The above substrate 240 can be a PCB (Printed Circuit Board, printed circuit board). The terminal device 200 may further include a touch panel for sensing a contact signal and converting it into an electrical signal. The terminal device 200 may further include other chips such as a processor chip, a storage chip, and a baseband chip. The above chips can be disposed on the substrate 240 or on other PCBs in the terminal device 200 and are electrically connected to the above driving circuit 250 to control the driving circuit 250 to drive the LED array 260.

[0047] Figure 2 Shown is a schematic diagram of a display circuit 300 provided by an embodiment of the present application. The display circuit 300 can be a micro light emitting diode (micro LED) display circuit. The display circuit 300 includes a plurality of pixel driving circuits 310 arranged in an array and a plurality of corresponding RGB pixels. The above pixel driving circuit 310 can be Figure 1 the driving circuit 250 shown, and the RGB pixel can be Figure 1 the LED array 260 shown. Each pixel driving circuit 310 can Figure 2The connection relationship shown drives 4 RGB pixels, and can also drive more RGB pixels, or only drive 1 RGB pixel. Each RGB pixel includes R (red), G (green), and B (blue). The above-mentioned multiple pixel driving circuits 310 can be respectively arranged in multiple chips, or can be fabricated on the above-mentioned substrate 240 in the form of thin film transistors (TFTs). Taking the example that one pixel driving circuit 310 drives 4 RGB pixels, for a 2K screen with a resolution of 2560*1440, the display circuit 300 can include 2560*1440 / 4 = 921,600 pixel driving circuits 310, and each pixel driving circuit 310 is arranged in one chip and drives 4 RGB pixels. Specifically, each pixel driving circuit contains 12 current sources to drive 12 light-emitting diodes in the above-mentioned 4 RGB pixels. In another embodiment, multiple pixel driving circuits can also be integrated in one chip.

[0048] Figure 3 The following shows a circuit structure diagram of a pixel driving circuit 310 provided by an embodiment of the present application. The pixel driving circuit 310 includes a cascaded first switch M1 and second switch M2, and a charge absorption circuit 311. Among them, the first end of the first switch M1 is electrically connected to the cathode of the light-emitting diode D1, the second end of the first switch M1 is electrically connected to the first end of the second switch M2, and the control end of the first switch M1 is used to receive a switch control signal. In one embodiment, the switch control signal can be a PWM (pulse width modulation) signal. The second end of the second switch M2 is grounded and is electrically connected to one end of the second capacitor Cgg. The control end of the second switch M2 is used to receive a bias voltage VBIAS. In addition, the anode of the above-mentioned light-emitting diode D1 is connected to a power supply to provide a voltage difference applied across the light-emitting diode D1. The above-mentioned charge absorption circuit 311 is electrically connected to node A (i.e., the connection point of the first switch M1 and the second switch M2) to absorb the charge of node A. Part of the charge of node A flows to the ground through the second switch M2, and the other part is absorbed by the charge absorption circuit 311. The pixel driving circuit 310 may further include a second capacitor Cgg electrically connected between the control end and the second end of the second switch M2.

[0049] In the working state, the first switch M1 is turned on or off by receiving a switch control signal, and the second switch M2 is kept on by receiving a bias voltage VBIAS. When the switch control signal controls the first switch M1 to turn off, the voltage of node B (i.e., the cathode of the light-emitting diode D1) becomes higher, the current in the light-emitting diode D1 is 0, and the parasitic capacitance Cp on node B accumulates charge. When the switch control signal controls the first switch M1 to turn on, the parasitic capacitance Cp discharges through the first switch M1 and the second switch M2. When the voltage of node B is lower than a certain threshold (depending on the characteristics of the light-emitting diode D1), the light-emitting diode D1 turns on. After the first switch M1 is turned on, the charge absorption circuit 311 can absorb the charge of node A. Therefore, the charge accumulated in the parasitic capacitance Cp can first discharge through the first switch M1, then through the second switch M2, and at the same time discharge through the charge absorption circuit 311, thereby accelerating the discharge of the parasitic capacitance Cp on node B, improving the current signal establishment time of the light-emitting diode D1, and increasing the refresh frequency of the light-emitting diode D1. In the non-working state, the bias voltage VBIAS controls the second switch M2 to turn off.

[0050] When the voltage of the above node B is lower than a certain threshold, the light-emitting diode D1 turns on. This threshold is mainly related to the forward conduction voltage of the light-emitting diode D1. For example, for a silicon (Si) tube, its forward conduction voltage is about 0.7V, while for a germanium (Ge) tube, its forward conduction voltage is about 0.3V.

[0051] In one embodiment, both the first switch M1 and the second switch M2 are NMOS transistors. The control terminal of the first switch M1 is the gate, the first terminal of the first switch M1 is the drain, and the second terminal is the source. The control terminal of the second switch M2 is the gate, the first terminal of the second switch M2 is the drain, and the second terminal is the source.

[0052] The switch control signal is generated by a control signal generator and output to the control terminal of the first switch M1 in the pixel driving circuit 310. In one embodiment, the control signal generator and the pixel driving circuit 310 can be respectively arranged in different chips. For example, a pixel driving circuit 310 is arranged in a corresponding driving IC, while the control signal generator is arranged in other chips. A control signal generated by a control signal generator, such as a PWM signal, can control the on and off of the first switch M1 in multiple pixel driving circuits 310.

[0053] Within the same charge and discharge cycle, Figure 4a shows the waveform diagram of the PWM signal in the pixel driving circuit 310, Figure 4b shows the current I in the light-emitting diode D1 D1 of the waveform diagram, Figure 4c shows the waveform diagram of node A in the traditional circuit, whileFigure 4d It shows the optimized circuit, that is, the waveform diagram of node A in the pixel driving circuit 310 provided in the embodiments of the present application. In the embodiments of the present application, the switching control signal is a PWM signal, and the first switch M1 and the second switch M2 are both NMOS transistors as an example for illustration.

[0054] When the pixel driving circuit 310 works normally, the second switch M2 is turned on. From 0 to t 1 moment, the PWM signal is at a low level. At this time, the first switch M1 is in an off state. Therefore, the voltage of node B is higher than the above threshold voltage, and the current I in the light-emitting diode D1 D1 is 0, and the light-emitting diode D1 is in an off state. At t 1 moment, the PWM signal changes from a low level to a high level. At this time, the first switch M1 switches from an off state to a on state. Since both the first switch M1 and the second switch M2 are in an on state, ideally, the voltage of node B will quickly drop to 0, and the current I in the light-emitting diode D1 D1 will quickly increase to a relatively large value, as shown by the "ideal current" curve in Figure 4b . In actual operation, as shown by the "traditional circuit" curve in Figure 4b , in the traditional circuit in the prior art, due to the existence of the parasitic capacitance Cp at node B, when the first switch M1 switches from an off state to a on state, the parasitic capacitance Cp first needs to be discharged through the first switch M1 and the second switch M2 from t 1 to t 4 moment until the voltage of node B is lower than the above threshold voltage. At t 4 moment, the current I in the light-emitting diode D1 D1 starts to increase and reaches the maximum value at t3 moment, and then remains at this maximum value until t2 moment, and the light-emitting diode D1 is in a lit state. At t2 moment, the PWM signal changes from a high level to a low level, and the current I in the light-emitting diode D1 D1 becomes smaller. Correspondingly, as shown in Figure 4c , due to the slow discharge, after the first switch M1 is turned on, the node A in the traditional circuit in the prior art needs a time of T1 to complete the signal establishment. As can be seen from Figure 4a-5 c, from t 1 to t 4 moment, the parasitic capacitance Cp is in the discharge process, resulting in a long time for the light-emitting diode D1 to change from off to on. When the parasitic capacitance Cp is larger, the time from t 1 to t 4 is longer, and it is easier for the human eye to observe the afterimage phenomenon, affecting the user experience.

[0055] In the pixel driving circuit 310 provided by the embodiment of the present application, the charge absorption circuit 311 connected to node A can absorb the charge of node A when the parasitic capacitor Cp discharges, thereby accelerating the discharge process and increasing the refresh frequency of the light-emitting diode D1. As Figure 4b shown by the "optimized circuit" curve in, since the charge absorption circuit 311 accelerates the discharge process, the current I in the light-emitting diode D1 D1 can reach the maximum value and stabilize faster, enabling the light-emitting diode D1 to emit light normally. As Figure 4d shown, the voltage of node A in the pixel driving circuit 310 drops to near the normal operating voltage after time T2, and then reaches the normal operating voltage after time T3. Compared with time T3, the pixel driving 310 provided by the embodiment of the present application can reduce node B to the normal operating voltage in a shorter time, thereby accelerating the signal establishment time of the light-emitting diode D1, increasing the switching frequency of the light-emitting diode D1, and achieving the purpose of eliminating afterimages, improving display accuracy, and enhancing the user experience.

[0056] As Figure 5 shown is a more specific pixel driving circuit 310 provided by the embodiment of the present application, where the charge absorption circuit 311 includes a capacitor Ca. During the above discharge process, the charge in the parasitic capacitor Cp can be absorbed by the capacitor Ca through the first switch M1 and node A, which is equivalent to redistributing the charge in the capacitor Ca and the parasitic capacitor Cp, accelerating the discharge process of node B. The capacitance value of the capacitor Ca is related to the capacitance value of the parasitic capacitor Cp. When the capacitance value of the parasitic capacitor Cp is large, the capacitor Ca also requires a large capacitance value. In addition, when the first switch M1 is turned off, the greater the voltage difference between node B and node A, the larger the capacitance value of the capacitor Ca required.

[0057] The capacitor Ca can be a metal-insulator-metal (MIM) capacitor, a metal-oxide-metal (MOM) capacitor, or a metal-oxide-semiconductor (MOS) capacitor.

[0058] As Figure 6 shown is another more specific pixel driving circuit 310 provided by the embodiment of the present application, where the charge absorption circuit 311 includes a diode-connected MOS transistor. Specifically, the diode-connected MOS transistor includes an NMOS transistor M3 and an NMOS transistor M4. The drain and gate of the NMOS transistor M3 are connected to node A, the drain of the NMOS transistor M4 is connected to the source of the NMOS transistor M3, the source of the NMOS transistor M4 is grounded, and the gate of the NMOS transistor M4 is also connected to the above node A.

[0059] During the above-mentioned discharging process, the charge in the parasitic capacitor Cp can flow to the ground through the conducting NMOS transistors M3 and M4. Specifically, when the first switch M1 is turned on, the voltage of node A increases. At this time, the NMOS transistors M3 and M4 are turned on, and the voltages of node A and node B both rapidly decrease. When the voltage of node A drops to near the normal operating voltage, the NMOS transistors M3 and M4 are turned off. After the NMOS transistors M3 and M4 are turned off, the second switch M2 continues to discharge node A and node B, so that node B reaches the normal operating voltage of the light-emitting diode D1.

[0060] As Figure 7 Shown is another more specific pixel driving circuit 310 provided by an embodiment of the present application, in which the charge absorption circuit 311 includes a Schottky diode D2. The cathode of the Schottky diode D2 is electrically connected to node A, and the anode is grounded. The Schottky diode D2 can also accelerate the absorption of the charge of node A, so that the pixel driver 310 can reduce node B to the normal operating voltage in a shorter time, thereby accelerating the signal establishment time of the light-emitting diode D1, increasing the switching frequency of the light-emitting diode D1, and achieving the purpose of eliminating afterimages, improving display accuracy, and enhancing the user experience.

[0061] As Figure 8 Shown is another more specific pixel driving circuit 310 provided by an embodiment of the present application. Figure 8 The shown pixel driving circuit 310 further includes a fifth switch M5 connected between the second switch M2 and the ground. The fifth switch M5 can be an NMOS transistor. In one implementation, the drain of the fifth switch M5 is connected to the source of the second switch M2, its source is grounded and connected to one end of the capacitor Cgg, and its gate is connected to the gate of the second switch M2 and connected to the other end of the capacitor Cgg to receive the bias voltage VBIAS. Figure 8 The charge absorption circuit 311 in

[0062] As Figure 8As shown in the figure, the embodiment of the present application further provides a bias circuit 320. The bias circuit 320 includes a sixth switch M6, a seventh switch M7, and an eighth switch M8. In one embodiment, the sixth switch M6 and the seventh switch M7 are NMOS transistors, and the eighth switch M8 is a PMOS transistor. Among them, the source of the sixth switch M6 is grounded, and the gate is connected to the gate of the seventh switch M7 to generate a bias voltage VBIAS. The drain of the sixth switch M6 is connected to the source of the seventh switch M7. The drain of the seventh switch M7 is connected to the gate of the seventh switch M7 and the drain of the eighth switch M8 respectively, and the source of the eighth switch M8 is connected to the power supply. This bias circuit 320 can provide a bias voltage for any pixel driving circuit provided by the embodiment of the present application.

[0063] In one embodiment, one of the above-mentioned bias circuits 320 and the pixel driving circuit 310 can be respectively disposed on different chips. The above-mentioned bias circuit 320 can provide a bias voltage VBIAS for multiple pixel driving circuits 310. In another embodiment, the above-mentioned bias circuit 320 can also be integrated with one or more pixel driving circuits 310 on the same chip.

[0064] As Figure 9 shown in the figure, the embodiment of the present application further provides a pixel driving circuit 900. The circuit structure of the pixel driving circuit 900 is similar to that of the pixel driving circuit 310. The difference is that the charge absorption circuit 310 in the pixel driving circuit 900 is connected to the cathode of the light-emitting diode D1 through a ninth switch M9. The charge absorption circuit 310 in the pixel driving circuit 900 can be any charge absorption circuit in the embodiment of the present application. One end of the ninth switch M9 is connected to one end of the charge absorption circuit 310, and the other end is connected to the cathode of the light-emitting diode D1. The PWM signal received by the gate of the ninth switch M9 is the same as the PWM signal received by the first switch M1. During normal operation, since the PWM signal controls the conduction and disconnection of the first switch M1 and the ninth switch M9 at the same time, when the above two switches are turned on, the charge absorption circuit 310 starts to absorb the charge of the light-emitting diode D1, accelerating the release of the charge at the cathode of the light-emitting diode D1, so that the charge in the parasitic capacitance can be released faster. When the release speed of the charge in the parasitic capacitance is accelerated, the establishment time of the current signal of the light-emitting diode becomes shorter, the refresh frequency of the light-emitting diode becomes higher, so that the time experienced by the light-emitting diode from extinction to lighting becomes shorter, which can improve the afterimage phenomenon when the human eye observes the light-emitting diode, and improve the display accuracy of the light-emitting diode, enhancing the user experience.

[0065] In addition to the above terminal devices mentioned in the embodiments of the present application, the pixel driving circuit provided by the embodiments of the present application can also be used in other devices, such as extra-large indoor display screens, helmet-mounted displays (HMDs), head up displays (HUDs), wireless optical communication (Li-Fi, Light Fidelity), AR (augmented reality), VR (virtual reality), etc.

[0066] As described above, the above are only specific embodiments of the present application, but the protection scope of the present application is not limited thereto. Any person skilled in the art within the technical scope disclosed by the present application can easily think of changes or substitutions, which should all be covered within the protection scope of the present application. Therefore, the protection scope of the present application should be subject to the protection scope of the claims.

Claims

1. A pixel driving circuit, characterized in that, the pixel driving circuit includes: a first switch and a second switch, a first end of the first switch is electrically connected to a cathode of a light-emitting diode, a second end of the first switch is electrically connected to a first end of the second switch, a second end of the second switch is electrically connected to ground, a control end of the first switch receives a control signal, a control end of the second switch receives a bias voltage, and an anode of the light-emitting diode is electrically connected to a power supply; and a charge absorption circuit, electrically connected between ground and a first node, the first node being the second end of the first switch, the charge absorption circuit being configured to absorb charge from the first node; wherein, the charge absorption circuit includes a diode-connected MOS transistor, and the diode-connected MOS transistor includes: a third NMOS transistor, a drain and a gate of the third NMOS transistor are electrically connected to the first node; a fourth NMOS transistor, a drain of the fourth NMOS transistor is electrically connected to a source of the third NMOS transistor, a source of the fourth NMOS transistor is grounded, and a gate of the fourth NMOS transistor is electrically connected to the first node.

2. The pixel driving circuit according to claim 1, characterized in that, the first switch is a first NMOS transistor, the second switch is a second NMOS transistor, wherein a source of the first NMOS transistor is electrically connected to ground, a drain of the first NMOS transistor and a source of the second NMOS transistor are electrically connected at the first node, and a drain of the second NMOS transistor is electrically connected to the cathode of the light-emitting diode.

3. The pixel driving circuit according to claim 1 or 2, characterized in that, the pixel driving circuit further includes a second capacitor, one end of the second capacitor is electrically connected to the control end of the second switch, and the other end is grounded.

4. The pixel driving circuit according to any one of claims 1 to 3, characterized in that, the control signal is a pulse width modulation (PWM) signal.

5. A display circuit, characterized in that, the display circuit includes: a plurality of pixel driving circuits according to any one of claims 1 to 4; a plurality of the light-emitting diodes, respectively electrically connected to the plurality of pixel driving circuits, the plurality of pixel driving circuits being configured to respectively drive the plurality of light-emitting diodes.

6. A terminal device, including a rear cover, a frame, and the display circuit according to claim 5, the rear cover and the display circuit are disposed opposite to each other and connected by the frame.

Images