A method for preparing an InGaAs focal plane infrared detector

Abstract

The invention discloses a method for preparing an InGaAs focal plane infrared detector, wherein the light absorption layer is In 0.53 Ga 0.47 As absorption layer, holes are the majority carriers in the light absorption layer, and the generation rate of photogenerated holes is the medium relaxation rate, which is in the femtosecond order and can be ignored. 0.53 Ga 0.47 As in the absorption layer moves to the N-type InP drift layer through diffusion and drift; at the same time, in the detector of the present invention, only electrons are carriers that control the actual transport speed. Compared with the traditional PIN-type InP focal plane detector, the detector of the present invention is not restricted by the slower holes, so its response speed is greatly improved. 0.53 G a0.47 The Zn diffusion doping concentration of the As absorption layer gradually decreases from top to bottom, so its energy band gradually decreases from top to bottom, which will assist the diffusion of electrons and increase the diffusion speed.

Description

Technical Field

[0001] The invention relates to the technical field of photoelectric detectors, and in particular to a method for preparing an InGaAs focal plane infrared detector. Background Art

[0002] The working wavelength of infrared detectors is 3 to 4 orders of magnitude shorter than the microwaves detected by radar, so the infrared imaging resolution is higher and can meet the high-precision imaging requirements of a specific detail. Infrared detection also has the advantages of accuracy, reliability, good confidentiality, and strong resistance to electronic interference. In the past few decades, a large number of new materials and novel devices have emerged. Infrared detectors have completed the transition from the first generation of unit and multi-element photoconductive devices to the second generation of infrared focal plane devices. They are currently developing towards the third generation of infrared focal plane technology characterized by large scale, high resolution, multi-band, high integration, lightweight and low cost.

[0003] The traditional PIN-type InP focal plane detector is constrained by the slower holes, and its response speed is limited. At the same time, the traditional PIN-type InP focal plane detector has a large space charge region and cannot carry high concentrations of photogenerated carriers. The traditional PIN-type InP focal plane detector cannot work stably under higher light intensities and its response speed will be slow. Summary of the invention

[0004] In order to solve the deficiencies of the above technical solutions, the object of the present invention is to provide a method for preparing an InGaAs focal plane infrared detector.

[0005] The purpose of the present invention is achieved through the following technical solutions.

[0006] A method for preparing an InGaAs focal plane infrared detector comprises the following steps:

[0007] Step 1: Use MOCVD or MBE deposition to sequentially grow an N-type InP buffer layer, an N-type InP drift layer, an N-type InGaAsP transition layer (one or more layers), and an InGaAsP transition layer on an N-type InP substrate. 0.53 Ga 0.47 As absorption layer, intrinsic In 0.52 Al 0.48 As electron blocking layer and intrinsic InP capping layer;

[0008] Step 2: Depositing a SiN film on the upper surface of the intrinsic InP cap layer by using a PECVD deposition method;

[0009] Step 3: forming a Zn diffusion window pattern array on the surface of the SiN film by using a photoresist, removing the SiN film on the Zn diffusion window pattern array by an etching method to expose the intrinsic InP cap layer below, and removing the photoresist after the etching is completed to form a Zn diffusion window array;

[0010] Step 4: Use MOCVD or furnace tube method to diffuse Zn in the Zn diffusion window array area to form a P-type diffusion array. The diffused area includes the intrinsic InP cap layer, the intrinsic In 0.52 Al 0.48 As electron blocking layer and In 0.53 Ga 0.47 As absorption layer, stops at the upper surface of the N-type InGaAsP transition layer, the P-type diffusion array area is the photosensitive area, after Zn diffusion, the intrinsic InP cap layer, the intrinsic In 0.52 Al 0.48 As electron blocking layer and In 0.53 Ga 0.47 As absorption layer is converted into P type, the In 0.53 Ga 0.47 The P-type doping concentration of the As absorption layer decreases from top to bottom, from 5×10 17 ~5×10 18 Down to 1×10 17 ~5×10 17 / cm 3 ;

[0011] Step 5: using photoresist to evaporate metal in the Zn diffusion window array and above the P-type diffusion array, and then perform metal stripping, and annealing to form an ohmic contact to obtain a P metal electrode array;

[0012] Step 6: Use photoresist to form a circle of channel patterns around the P-type diffusion array area, and obtain the channel area by etching. After the etching is completed, remove the photoresist. The etched area includes the intrinsic InP cap layer, the intrinsic In 0.52 Al 0.48 As electron blocking layer, In 0.53 Ga 0.47 As absorption layer, N-type InGaAsP transition layer, N-type InP drift layer and N-type InP buffer layer, stopping above the N-type InP buffer layer;

[0013] Step 7, using photoresist to form an N-electrode metal pattern in the channel region, using electron beam evaporation or magnetron sputtering to evaporate metal and perform metal stripping, and forming an ohmic contact after annealing to obtain an N-metal electrode ring;

[0014] Step 8: Deposit SiNx film on all exposed upper surfaces by PECVD deposition method;

[0015] Step nine: using photoresist to form a VIA hole pattern on the SiNx film, the VIA hole pattern is above the P metal electrode array and above the N metal electrode ring, and using an etching method to remove the SiNx film above the P metal electrode array and above the N metal electrode ring, so that the P metal electrode array and the N metal electrode ring are exposed to obtain the VIA hole;

[0016] Step 10: using photoresist to form a UBM metal pattern above the VIA hole, using electron beam evaporation or magnetron sputtering to evaporate metal and perform metal stripping, forming UBM metal directly above the P metal electrode array and the N metal electrode ring, the aperture of the UBM metal pattern is greater than or equal to the aperture of the VIA hole;

[0017] Step 11: After thinning and polishing the back side of the N-type InP substrate, the thickness of the thinned and polished InP substrate is 50-200 um, and an anti-reflection film is deposited on its lower surface by PECVD, magnetron sputtering or thermal evaporation.

[0018] In the above technical solution, the thickness of the N-type InP buffer layer is 0.2-2 μm and the thickness of the intrinsic InP cap layer is 0.5-4 μm.

[0019] In the above technical solution, in step 1, the In 0.53 Ga 0.47 The thickness of the As absorption layer is 1~4μm.

[0020] In the above technical solution, in step 1, the thickness of the N-type InP drift layer is 0.1-1 μm, and the doping concentration is 5×10 15 ~2×10 17 / cm 3 .

[0021] In the above technical solution, in step 1, the intrinsic In 0.52 Al 0.48 The thickness of the As electron blocking layer is 10~200nm.

[0022] In the above technical solution, in step 2, the thickness of the SiN film is 100 nm.

[0023] In the above technical solution, in step 4, the area around the photosensitive area is a non-active area.

[0024] In the above technical solution, the photosensitive area is a plurality of horizontal and vertical pixel arrays, the number of horizontal pixel points is greater than 320, the number of vertical pixel points is greater than 256, and the pixel pitch is less than or equal to 30 μm.

[0025] In the above technical solution, in step eight, the thickness of the SiNx film is 200 nm.

[0026] In the above technical solution, in step nine, the aperture of the VIA hole is smaller than the top surface diameter of the P metal electrode array, and the aperture of the VIA hole on the N metal electrode ring is smaller than the top surface diameter of the N metal electrode ring.

[0027] In the above technical solution, in step eleven, the thickness of the N-type InP substrate after thinning and polishing is 50-200 μm.

[0028] In the above technical solution, the reflectivity of the anti-reflection film for light with a wavelength of 900-1700nm is greater than or equal to 70%.

[0029] The advantages and beneficial effects of the present invention are:

[0030] 1. The light absorption layer is In 0.53 Ga 0.47 As absorption layer, holes are the majority carriers in the light absorption layer, and the generation rate of photogenerated holes is the medium relaxation rate, which is in the femtosecond order and can be ignored. 0.53 Ga 0.47 As moves from the As absorption layer to the N-type InP drift layer through diffusion and drift; at the same time, in the detector of the present invention, only electrons are the carriers that control the actual transport speed. Compared with the traditional PIN-type InP focal plane detector, the detector of the present invention is not restricted by the slower holes, so its response speed is greatly improved.

[0031] 2. In 0.53 G a0.47 The Zn diffusion doping concentration of the As absorption layer gradually decreases from top to bottom, so its energy band gradually decreases from top to bottom, which will assist the diffusion of electrons and increase the diffusion speed.

[0032] 3. Intrinsic In 0.52 Al 0.48 As electron blocking layer is intrinsic In 0.52 Al 0.48 As electron blocking layer and In 0.53 Ga 0.47 A larger conduction band step is generated at the interface of the As absorption layer, which blocks the diffusion of photogenerated electrons toward the intrinsic InP cap layer, thereby further controlling the single carrier transport characteristics of the detector.

[0033] 4. Due to low bandwidth In0.53 Ga 0.47 The As absorber layer is not depleted at the operating voltage, so its generation-recombination current is very low, thus reducing the overall dark current of the detector.

[0034] 5. Since the space charge area of ​​the entire detector is greatly reduced compared to the traditional PIN type detector, it can carry high concentrations of photogenerated carriers. In the case of high concentrations of photogenerated carriers, since its space charge area is very small, the change of photogenerated carriers has little effect on the fluctuation of potential, and the operation of the detector is more stable.

[0035] 6. The detector of the present invention adopts the backlight incidence mode, and the P-type metal electrode on the front side can contact the entire P-type InP cover layer area, thereby increasing the metal contact area, thereby further reducing the series resistance of the detector and improving its RC response speed.

[0036] 7. Compared with the traditional PIN-type InGaAs focal plane infrared detector, the detector of the present invention can work stably under higher light intensity and has a faster response speed. BRIEF DESCRIPTION OF THE DRAWINGS

[0037] Figure 1 This is a schematic diagram of the structure obtained from step one to step four of the present invention.

[0038] Figure 2 This is a schematic diagram of a P metal electrode array obtained in step five of the present invention.

[0039] Figure 3 This is a schematic diagram of the channel region obtained in step six of the present invention.

[0040] Figure 4 This is a schematic diagram of obtaining an N metal electrode ring in step seven of the present invention.

[0041] Figure 5 This is a schematic diagram of depositing a SiNx film in step eight of the present invention.

[0042] Figure 6 This is a schematic diagram of a VIA hole obtained in step nine of the present invention.

[0043] Figure 7 It is a schematic diagram of forming a UBM metal pattern in step ten of the present invention.

[0044] Figure 8 This is a schematic diagram of depositing an anti-reflection film in step eleven of the present invention.

[0045] Fig. 9 This is a top view of step three of the present invention.

[0046] Fig.10 It is a top view of the final structure of the present invention.

[0047] in,

[0048] 1: N-type InP substrate,

[0049] 2: N-type InP buffer layer,

[0050] 3: N-type InP drift layer,

[0051] 4: N-type InGaAsP transition layer,

[0052] 5:In 0.53 Ga 0.47 As absorption layer,

[0053] 6: Intrinsic In 0.52 Al 0.48 As electron blocking layer,

[0054] 7: Intrinsic InP capping layer,

[0055] 8: SiN film,

[0056] 9: Zn diffusion window array,

[0057] 10: P-type diffusion array,

[0058] 11: P metal electrode array,

[0059] 12: Channel area,

[0060] 13: N metal electrode ring,

[0061] 14: SiNx film,

[0062] 15: VIA hole,

[0063] 16: UBM Metal,

[0064] 17: Anti-reflection film. DETAILED DESCRIPTION

[0065] The technical solution of the present invention is further described below in conjunction with specific embodiments.

[0066] Example 1

[0067] This embodiment provides a method for preparing an InGaAs focal plane infrared detector, comprising the following steps:

[0068] Step 1: If Figure 1 As shown, an N-type InP buffer layer 2, an N-type InP drift layer 3, an N-type InGaAsP transition layer (one or more layers), an InGaAsP transition layer (one or more layers), and an N-type InP substrate 1 are sequentially grown on the N-type InP substrate 1 by MOCVD or MBE deposition. 0.53 Ga 0.47As absorption layer 5, intrinsic In 0.52 Al 0.48 As electron blocking layer 6 and intrinsic InP capping layer 7, wherein In 0.53 Ga 0.47 The thickness of the As absorption layer 5 is 3 μm, and the background doping concentration is less than 1×10 15 / cm 3 This layer is the photogenerated carrier generation layer, which is designed to absorb the photon energy of 1.0~1.7um as much as possible; the thickness of the N-type InP drift layer 3 is 1μm, and its doping concentration is 5×10 15 / cm 3 , which is completely depleted under the operating voltage, generating an electric field for collecting photogenerated electrons; the thickness of the N-type InP buffer layer 2 is 0.5 μm, and the doping concentration is 5×10 17 / cm 3 Its function is to better match the difference in lattice constant between the N-type InP substrate 1 and the epitaxial layer material on the N-type InP buffer layer 2 due to different growth conditions, so as to ensure the growth quality of the epitaxial layer; the intrinsic In 0.52 Al 0.48 The thickness of the As electron blocking layer 6 is 20 nm, which is used to block the photogenerated electrons from diffusing upward, thereby ensuring the unidirectional transport characteristics of the photogenerated carriers; the thickness of the intrinsic InP cap layer 7 is 1 μm, which is used for Zn diffusion to form a P-type array region.

[0069] Step 2: Deposit a SiN film 8 on the upper surface of the intrinsic InP cap layer 7 by using PECVD (Plasma Enhanced Chemical Vapor Deposition), and the thickness of the SiN film 8 is 100 nm.

[0070] Step 3: Use photoresist to form a Zn diffusion window pattern array (in the form of an equidistant rectangular array, such as Fig. 9 As shown in FIG. 1 ), the SiN film 8 on the Zn diffusion window pattern array is removed by etching to expose the intrinsic InP cap layer 7 underneath. After the etching is completed, the photoresist is removed to form a Zn diffusion window array 9.

[0071] Step 4: Use MOCVD or furnace tube method to diffuse Zn in the Zn diffusion window array 9 area to form a P-type diffusion array 10. The diffused area includes the intrinsic InP cap layer 7, the intrinsic In 0.52 Al 0.48 As electron blocking layer 6 and In 0.53 Ga 0.47The As absorption layer 5 stops at the upper surface of the N-type InGaAsP transition layer 4, and the P-type diffusion array 10 area is a photosensitive area.

[0072] Step 5: If Figure 2 As shown, photoresist is used to evaporate metal in the Zn diffusion window array 9 and above the P-type diffusion array 10, and metal stripping is performed. After annealing, ohmic contact is formed to obtain a P metal electrode array 11.

[0073] Step 6: If Figure 3 As shown, a circle of channel patterns is formed around the P-type diffusion array 10 region by using photoresist, and the channel region 12 is obtained by etching. After the etching is completed, the photoresist is removed. The etched region includes the intrinsic InP cap layer 7, the intrinsic In 0.52 Al 0.48 As electron blocking layer 6, In 0.53 Ga 0.47 The As absorption layer 5 , the N-type InGaAsP transition layer 4 , the N-type InP drift layer 3 and the N-type InP buffer layer 2 stop above the N-type InP buffer layer 2 .

[0074] Step 7: Figure 4 As shown, an N-electrode metal pattern is formed in the channel region 12 by using photoresist, and metal is evaporated by electron beam evaporation or magnetron sputtering and metal stripping is performed. After annealing, an ohmic contact is formed to obtain an N-metal electrode ring 13.

[0075] Step 8: If Figure 5 As shown, a SiNx film 14 is deposited on all exposed upper surfaces by using a PECVD deposition method, and the thickness of the SiNx film 14 is 200 nm.

[0076] Step 9: If Figure 6 As shown, a VIA hole pattern is formed on the SiNx film 14 by using photoresist, and the VIA hole pattern is above the P metal electrode array 11 and above the N metal electrode ring 13. The SiNx film 14 above the P metal electrode array 11 and above the N metal electrode ring 13 is removed by etching to expose the P metal electrode array 11 and the N metal electrode ring 13 to obtain the VIA hole 15; the aperture of the VIA hole 15 on the P metal electrode array 11 is smaller than the top surface diameter of the P metal electrode array 11, and the aperture of the VIA hole on the N metal electrode ring 13 is smaller than the top surface diameter of the N metal electrode ring 13.

[0077] Step 10: Figure 7As shown, a UBM metal pattern is formed above each VIA hole 15 using photoresist, and then metal is evaporated by electron beam evaporation or magnetron sputtering and metal stripping is performed, thereby forming UBM metal 16 directly above the P metal electrode array 11 and the N metal electrode ring 13, and the size of each UBM metal 16 is larger than the aperture of the VIA hole.

[0078] Step 11: Figure 8 As shown, after the back side of the N-type InP substrate 1 is thinned and polished, an anti-reflection film 17 is deposited on its lower surface by PECVD, magnetron sputtering or thermal evaporation. After thinning and polishing, the thickness of the N-type InP substrate 1 is 150 μm, and the reflectivity of the anti-reflection film 17 for light with a wavelength of 1150 nm is greater than 90%.

[0079] The present invention is described above by way of example. It should be noted that, without departing from the core of the present invention, any simple deformation, modification or other equivalent replacement that can be made by those skilled in the art without inventive effort falls within the protection scope of the present invention.

Claims

1. A method for preparing an InGaAs focal plane infrared detector, characterized in that: The following steps are involved: Step 1: Using MOCVD or MBE deposition method, an N-type InP buffer layer (2), an N-type InP drift layer (3), an N-type InGaAsP transition layer (4), an In 0.53 Ga 0.47 As absorption layer (5), intrinsic In 0.52 Al 0.48 As electron blocking layer (6) and intrinsic InP capping layer (7); Step 2: Depositing a SiN film (8) on the upper surface of the intrinsic InP cap layer (7) by using a PECVD deposition method; Step 3: using photoresist to form a Zn diffusion window pattern array on the surface of the SiN film (8), removing the SiN film (8) on the Zn diffusion window pattern array by etching to expose the intrinsic InP cap layer (7) below, and removing the photoresist after etching to form a Zn diffusion window array (9); Step 4: Use MOCVD or furnace tube method to diffuse Zn in the Zn diffusion window array (9) area to form a P-type diffusion array (10), and the diffused area includes the intrinsic InP cap layer (7), the intrinsic In 0.52 Al 0.48 As electron blocking layer (6) and In 0.53 Ga 0.47 As absorption layer (5), stops at the upper surface of N-type InGaAsP transition layer (4), the P-type diffusion array (10) area is a photosensitive area, after Zn diffusion, the intrinsic InP cap layer (7), the intrinsic In 0.52 Al 0.48 As electron blocking layer (6) and In 0.53 Ga 0.47 The As absorption layer (5) is converted into a P-type, and the In 0.53 Ga 0.47 The P-type doping concentration of the As absorption layer (5) decreases from top to bottom, from 5×10 17 ~5×10 18 / cm 3 Down to 1×10 17 ~5×10 17 / cm 3 ; Step 5: using photoresist to deposit metal in the Zn diffusion window array (9) and above the P-type diffusion array (10), and then perform metal stripping, and annealing to form an ohmic contact, thereby obtaining a P metal electrode array (11); Step 6: Use photoresist to form a circle of channel patterns around the P-type diffusion array (10) area, and obtain the channel area (12) by etching. After the etching is completed, remove the photoresist. The etched area includes the intrinsic InP cap layer (7), the intrinsic In 0.52 Al 0.48 As electron blocking layer (6), In 0.53 Ga 0.47 As absorption layer (5), N-type InGaAsP transition layer (4), N-type InP drift layer (3) and N-type InP buffer layer (2), stopping above the N-type InP buffer layer (2); Step seven, using photoresist to form an N-electrode metal pattern in the channel region (12), using electron beam evaporation or magnetron sputtering to evaporate metal and perform metal stripping, and forming an ohmic contact after annealing to obtain an N-metal electrode ring (13); Step 8: Depositing a SiNx film (14) on all exposed upper surfaces by using a PECVD deposition method; Step nine: using photoresist to form a VIA hole (15) pattern on the SiNx film (14), wherein the VIA hole (15) pattern is above the P metal electrode array (11) and above the N metal electrode ring (13), and using an etching method to remove the SiNx film (14) above the P metal electrode array (11) and above the N metal electrode ring (13), so that the P metal electrode array (11) and the N metal electrode ring (13) are exposed, thereby obtaining the VIA hole (15); Step ten: using photoresist to form a UBM metal (16) pattern above the VIA hole (15), using electron beam evaporation or magnetron sputtering to evaporate metal and perform metal stripping, forming the UBM metal (16) directly above the P metal electrode array (11) and the N metal electrode ring (13), wherein the aperture of the UBM metal (16) pattern is greater than or equal to the aperture of the VIA hole (15); Step 11: After the back side of the N-type InP substrate (1) is thinned and polished, the thickness of the thinned and polished N-type InP substrate (1) is 50 to 200 μm, and an anti-reflection film (17) is deposited on the lower surface of the thinned and polished N-type InP substrate (1) by using PECVD, magnetron sputtering or thermal evaporation.

2. The preparation method according to claim 1, characterized in that: In step 1, the thickness of the N-type InP buffer layer (2) is 0.2-2 μm and the thickness of the intrinsic InP cap layer (7) is 0.5-4 μm; 0.53 Ga 0.47 The thickness of the As absorption layer (5) is 1 to 4 μm.

3. The preparation method according to claim 1, characterized in that: In step 1, the thickness of the N-type InP drift layer (3) is 0.1-1 μm, and the doping concentration is 5×10 15 ~2×10 17 / cm 3 ; The intrinsic In 0.52 Al 0.48 The thickness of the As electron blocking layer (6) is 10 to 200 nm.

4. The preparation method according to claim 1, characterized in that: In step 2, the thickness of the SiN film (8) is 100 nm.

5. The preparation method according to claim 1, characterized in that: In step 4, the area surrounding the photosensitive area is a non-active area.

6. The preparation method according to claim 1, characterized in that: In step 4, the photosensitive area is a plurality of horizontal and vertical pixel arrays, the number of horizontal pixel points is greater than 320, the number of vertical pixel points is greater than 256, and the pixel pitch is less than or equal to 30 μm.

7. The preparation method according to claim 1, characterized in that: In step eight, the thickness of the SiNx film (14) is 200 nm.

8. The preparation method according to claim 1, characterized in that: In step nine, the aperture of the VIA hole (15) is smaller than the top surface diameter of the P metal electrode array (11), and the aperture of the VIA hole (15) on the N metal electrode ring (13) is smaller than the top surface diameter of the N metal electrode ring (13).

9. The preparation method according to claim 1, characterized in that: In step eleven, the thickness of the N-type InP substrate (1) after thinning and polishing is 50-200 μm, and the reflectivity of the anti-reflection film (17) for light with a wavelength of 900-1700 nm is greater than or equal to 70%.

10. An InGaAs focal plane infrared detector obtained by the preparation method according to any one of claims 1 to 9.

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