Flyback switching power supply snubber circuit, transformer leakage inductance snubber method and chip

Abstract

This invention relates to the field of electrical technology, and more particularly to a flyback switching power supply absorption circuit, a transformer leakage inductance absorption method, and a chip. The circuit includes: a transformer comprising a primary winding NP and a secondary winding NS; a primary sub-circuit comprising an energy storage branch connected to the primary winding NP and an absorption branch connected to the primary winding NP, wherein when the energy storage branch is on, the primary winding NP stores energy, and when the absorption branch is on, it absorbs the leakage inductance energy of the transformer; and a secondary sub-circuit connected to the secondary winding NS, wherein when the secondary winding NS is on, it provides an output voltage VOUT to the load connected to the secondary winding NS. This invention can solve the problem of low power conversion efficiency. By absorbing leakage inductance energy through the absorption branch for use by the load connected to the secondary sub-circuit, the power conversion efficiency can be improved.

Description

Technical Field

[0001] This invention relates to the field of electrical technology, and in particular to a flyback switching power supply absorption circuit, a transformer leakage inductance absorption method, and a chip. Background Technology

[0002] In flyback switching power supplies, due to the leakage inductance of the transformer, a large voltage spike is generated when the switching transistor is turned off. This voltage spike is coupled to the secondary side and supplied to the load, causing the secondary side and the switching transistor to be subjected to high voltage stress. In severe cases, it may damage the load or the switching transistor, affecting the stability and safety of the entire system and generating electromagnetic interference problems. Therefore, it is necessary to suppress the voltage spike by means of clamping absorption.

[0003] Traditional methods for absorbing voltage spikes include clamping the voltage using diodes and capacitors in an RCD (Residual Current Device) absorption circuit to reduce and slow down the voltage spike, while simultaneously dissipating the absorbed energy using energy-consuming components (such as resistors).

[0004] However, while existing RCD snubber circuits can improve voltage withstand and optimize electromagnetic interference characteristics, the energy absorbed by the capacitor is simply released as heat, making it difficult to improve power conversion efficiency, resulting in low power conversion efficiency. Summary of the Invention

[0005] This application provides a flyback switching power supply snubber circuit, a transformer leakage inductance snubber method, and a chip, which can solve the problem of low power conversion efficiency. This application provides the following technical solution:

[0006] In a first aspect, this application provides an electric flyback switching power supply absorption circuit, comprising: a transformer, the transformer including a primary coil NP and a secondary coil NS;

[0007] The primary-side sub-circuit includes an energy storage branch connected to the primary-side coil NP and an absorption branch connected to the primary-side coil NP. When the energy storage branch is turned on, the primary-side coil NP stores energy, and when the absorption branch is turned on, it absorbs the leakage inductance energy of the transformer.

[0008] A secondary sub-circuit is connected to a secondary coil NS. When the secondary coil NS is turned on, it provides an output voltage VOUT to the load connected to the secondary coil NS.

[0009] Optionally, the energy storage branch includes a first switching transistor Q1, which is connected in series with the primary coil NP;

[0010] The absorption branch includes a second switch Q2, an absorption module, an absorption capacitor C3, and a power supply capacitor C5. The second switch Q2 and the absorption capacitor C3 are connected in series and then connected in parallel with the primary coil NP.

[0011] Optionally, the absorption module includes:

[0012] The sampling VS terminal is connected between the absorption capacitor C3 and the second switching transistor Q2;

[0013] The control GATE terminal is connected to the control terminal of the second switch Q2 and is used to control the turn-on and turn-off of the second switch Q2.

[0014] The grounding GND terminal is connected to the primary coil NP and the first switching transistor Q1;

[0015] The power supply VDD terminal is connected to the power supply capacitor C5 and then grounded. When the energy storage branch is turned on, it obtains the power supply VDD voltage that powers the absorption module to work normally.

[0016] The absorption module is configured to: acquire the voltage signal VS at the sampling VS terminal and the GND voltage signal at the grounding GND terminal when the first switch Q1 is off, i.e., the energy storage branch is off; control the second switch Q2 to turn on when the voltage signal VS is less than the preset voltage threshold of the GND voltage signal, so that the absorption capacitor C3 absorbs the leakage inductance energy of the transformer; and supply power to the load connected to the output terminal of the secondary sub-circuit after the absorption capacitor C3 has completed absorbing the leakage inductance energy.

[0017] Optionally, the energy storage branch and the absorption branch do not operate simultaneously.

[0018] Optionally, the absorption module includes a power supply submodule, an analog comparator CMP, a delay module TD, an AND gate circuit AND, and a driver submodule DRV, wherein the power supply submodule includes a power unit, a single-phase conducting diode D1, and the power supply capacitor C5.

[0019] One end of the power supply submodule is connected to the sampling VS terminal of the absorption module, and is used to sample the voltage signal VS of the absorption module;

[0020] The inverting input of the analog comparator CMP is connected to the sampling VS terminal, and the non-inverting input of the analog comparator CMP is connected to the reference voltage Vref.

[0021] The output of the analog comparator CMP is connected to the first input of the AND gate circuit;

[0022] One end of the delay module TD is connected to the output of the analog comparator CMP, and the other end of the delay module TD is connected to the second input of the AND gate circuit.

[0023] The output of the AND gate circuit is connected to the driver submodule DRV.

[0024] The output terminal of the drive submodule DRV is connected to the control GATE terminal of the absorption module.

[0025] Optionally, in response to the received voltage signal VS, the analog comparator CMP is configured to output a first high-level signal to the delay module TD and the AND gate circuit when the voltage signal VS is less than a preset voltage threshold of the reference voltage Vref;

[0026] In response to the received first high-level signal, the delay module TD is used to output a second high-level signal to the AND gate circuit;

[0027] In response to the received first high-level signal and the second high-level signal, the AND gate is used to output a third high-level signal to the driver submodule DRV;

[0028] In response to the received third high-level signal, the driving submodule DRV outputs a driving signal to the control GATE terminal of the absorption module, so that the second switch Q2 connected to the control GATE terminal turns on after receiving the driving signal as high level.

[0029] Optionally, the delay module TD further includes a timer;

[0030] In response to the first high-level signal received by the delay module TD, the timer is used to start a countdown based on a preset duration, and output an end signal St when the countdown ends;

[0031] In response to the end signal St, the delay module TD is also used to output a first low-level signal to the AND gate circuit.

[0032] Optionally, in response to the received first low-level signal, the AND gate is further configured to output a second low-level signal;

[0033] In response to the received second low-level signal, the driver submodule DRV is further configured to output a third low-level signal to the control GATE terminal, so that the second switch Q2 connected to the control GATE terminal is turned off after receiving the third low-level signal.

[0034] Optionally, the preset duration is less than the discharge duration of the secondary side line NS.

[0035] Secondly, a method for absorbing transformer leakage inductance in the above-mentioned flyback switching power supply snubber circuit is provided, comprising:

[0036] When the first switch Q1 is off, i.e. the energy storage branch is off, the voltage signal VS of the sampling VS terminal of the absorption module in the absorption branch and the GND voltage signal of the grounding GND terminal of the absorption module are obtained.

[0037] When the voltage signal VS is less than the preset voltage threshold of the GND voltage signal, the second switch Q2 connected to the control GATE terminal of the absorption module is turned on by the absorption module.

[0038] When the second switch Q2 is turned on, the leakage inductance energy of the transformer is absorbed by the absorption capacitor C3 in the absorption branch, and after the absorption capacitor C3 has completed absorbing the leakage inductance energy, it supplies power to the load connected to the output terminal of the secondary sub-circuit.

[0039] Thirdly, an absorption chip for a flyback switching power supply is provided, comprising the absorption module of the aforementioned flyback switching power supply absorption circuit.

[0040] Optionally, the absorption chip includes a sampling VS terminal, a control GATE terminal, a ground GND terminal, and a power supply VDD terminal.

[0041] Optionally, the absorption chip further includes a second switching transistor Q2.

[0042] Optionally, the absorption chip further includes a sampling VS terminal, a ground GND terminal, and a power supply VDD terminal.

[0043] The beneficial effects of this application are as follows: It includes a transformer, comprising a primary coil NP and a secondary coil NS; a primary sub-circuit, comprising an energy storage circuit and an absorption circuit, the energy storage branch comprising a first switching transistor Q1, and the absorption branch comprising a second switching transistor Q2, an absorption chip, and an absorption capacitor C3; and a secondary sub-circuit connected to the secondary coil NS; when the first switching transistor is off, it acquires the voltage signal VS at the VS terminal of the absorption chip and the GND voltage at the GND terminal of the absorption chip; when the voltage signal VS is less than the GND voltage, it controls the second switching transistor to turn on, so that the leakage inductance current of the transformer charges the absorption capacitor; when the leakage inductance current is 0, the absorption capacitor resonates with the parasitic capacitance; during the resonance process, it supplies power to the load connected to the output terminal of the secondary sub-circuit. This solves the problem of low power conversion efficiency. By absorbing leakage inductance energy through the absorption chip for use by the load connected to the secondary sub-circuit, the power conversion efficiency can be improved.

[0044] In addition, the absorption chip can effectively solve the problem of the peak voltage at the drain end of the first switch in the primary circuit after it is turned off, thereby reducing the impact damage of the peak voltage on the devices in the circuit. On the one hand, it can protect the safety of the devices in the circuit, and on the other hand, it can use a switch with a lower withstand voltage to reduce the circuit cost.

[0045] In addition, by absorbing the leakage inductance current through the absorption capacitor, it resonates with the parasitic capacitance when the leakage inductance current is 0. During the resonance process, it supplies power to the load connected to the output terminal of the secondary sub-circuit, avoiding energy consumption through the resistor and reducing circuit heating.

[0046] In addition, when the primary coil is turned on, the absorption chip is powered by the input voltage, eliminating the need for an additional power supply. This reduces circuit complexity and saves resources.

[0047] In addition, using a second switching transistor instead of a diode can reduce the on-state voltage drop when absorbing energy, thereby further improving the power supply conversion efficiency. Attached Figure Description

[0048] To more clearly illustrate the specific embodiments of the present invention or the technical solutions in the prior art, the drawings used in the description of the specific embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are some embodiments of the present invention. For those skilled in the art, other drawings can be obtained from these drawings without creative effort.

[0049] Figure 1 This is a partial waveform diagram of a flyback switching power supply without a snubber circuit.

[0050] Figure 2 This is a schematic diagram of a typical existing RCD snubber circuit.

[0051] Figure 3 yes Figure 2 Partial voltage waveform diagram;

[0052] Figure 4 This is a schematic diagram of the structure of a flyback switching power supply absorption circuit provided in one embodiment of this application;

[0053] Figure 5 yes Figure 4 Partial voltage waveform diagram;

[0054] Figure 6 yes Figure 4 A schematic diagram of the specific structure of the absorption module;

[0055] Figure 7This is a schematic diagram of the specific structure of the absorption chip provided in one embodiment of this application;

[0056] Figure 8 This is a flowchart of a transformer leakage inductance absorption method for a flyback switching power supply absorption circuit provided in one embodiment of this application. Detailed Implementation

[0057] The technical solutions of this application will now be clearly and completely described with reference to the accompanying drawings. Obviously, the described embodiments are only some, not all, of the embodiments of this application. The application will be described in detail below with reference to the accompanying drawings and embodiments. It should be noted that, unless otherwise specified, the embodiments and features in the embodiments of this application can be combined with each other.

[0058] It should be noted that the terms "first," "second," etc., in the specification, claims, and drawings of this application are used to distinguish similar objects and are not necessarily used to describe a specific order or sequence.

[0059] In this application, unless otherwise stated, directional terms such as "upper," "lower," "top," and "bottom" are generally used in relation to the direction shown in the accompanying drawings, or in relation to the vertical, perpendicular, or gravitational direction of the component itself; similarly, for ease of understanding and description, "inner" and "outer" refer to the inner and outer contours of each component itself, but the above directional terms are not used to limit this application.

[0060] First, let me introduce some of the terms used in this application.

[0061] Voltage spikes: In flyback switching power supplies, due to the leakage inductance of the transformer, a large voltage spike is generated at the moment the switching transistor turns off. This voltage is coupled and induced to the secondary side, supplying power to the load. This causes the secondary side and the switching transistor to experience high voltage stress, which can seriously damage the load or the switching transistor, affecting the stability and safety of the entire system and generating electromagnetic interference. Therefore, clamping and absorption methods must be used to suppress this voltage spike. A schematic diagram of the drain voltage waveform of the switching transistor without an RCD snubber circuit is shown below. Figure 1 The waveform shown in the figure is Vd. The Vin waveform is the input voltage, the Vor waveform is the reflected voltage of the secondary coil in the primary coil, and the Vspike waveform is the spike voltage generated by the leakage inductance.

[0062] A typical system diagram of an existing RCD snubber circuit is shown below. Figure 2 As shown in the figure, the waveform of the drain voltage Vd1 of the switching transistor Q1 is as follows: Figure 3 As shown by the solid line Vd1, the waveform of the cathode voltage VA1 of diode D5 is shown in the figure below. Figure 3 As shown by the dashed line in Vd1, refer to Figure 2 and Figure 3Its working principle is as follows: Due to the existence of transformer leakage inductance Lk, at the instant the primary winding of the transformer is turned off (corresponding to...) Figure 3 At time t1, energy cannot be directly transferred to the secondary coil. The current in the primary coil does not immediately drop to zero, but continues to charge the parasitic capacitance Cds from the drain of the switching transistor Q1 to ground. The drain voltage rises rapidly until the drain voltage Vd1 is greater than the sum of the input voltage Vin and the reflected voltage Vor of the secondary output voltage on the primary coil (corresponding to...). Figure 3 At time t2 (i.e., Vd1 > Vin + Vor), the secondary coil turns on, and the energy in the primary coil is transferred to the secondary coil to supply power to the load. At this time, due to the leakage inductance of the primary coil, it continues to charge the parasitic capacitance Cds, and the drain voltage Vd1 continues to rise until the drain voltage Vd1 is greater than the cathode voltage VA1 of the diode in the absorption circuit by the forward voltage drop of diode D5, i.e., Vd1 > VA1 + Vdio. At this time, the drain voltage Vd1 is clamped by the absorption circuit, and the leakage inductance current begins to charge the capacitor C3 of the absorption circuit. The voltage VA1 rises slowly until the leakage inductance current decreases to 0 (corresponding to...). Figure 3 At time t3). After the above process is completed, the energy on the parasitic capacitance Cds continues to participate in resonance until the energy is completely consumed, while the charge from the leakage inductance to the absorption capacitor C3 is consumed by the energy-dissipating device resistor R in the absorption circuit (corresponding to Figure 3 (Time t4 in the middle).

[0063] Power Supply Submodules: Power supply submodules are power supplies that can be directly mounted on a printed circuit board. Their key feature is the ability to power application-specific integrated circuits (ASICs), digital signal processors (DSPs), microprocessors, memory, field-programmable gate arrays (FPGAs), and other digital or analog loads. Generally, these modules are called point-of-use (POL) power supply systems or point-of-use power supply systems (PUPS). Due to the numerous advantages of their modular structure, modular power supplies are widely used in switching equipment, access equipment, mobile communications, microwave communications, optical transmission, routers, and other communication fields, as well as in automotive electronics, aerospace, and other industries.

[0064] A diode is an electronic device made of semiconductor materials (silicon, selenium, germanium, etc.). It exhibits unidirectional conductivity; that is, when a forward voltage is applied to the anode, the diode conducts. When a reverse voltage is applied to both the anode and cathode, the diode is cut off. Therefore, the conduction and cutoff of a diode are equivalent to the switching on and off of a switch. Diodes are among the earliest semiconductor devices and have a wide range of applications. Especially in various electronic circuits, diodes are used in conjunction with resistors, capacitors, inductors, and other components to form circuits with different functions, such as rectifying AC power, detecting modulated signals, limiting and clamping, and regulating power supply voltage. Diodes can be found in common radio circuits, as well as in other household appliances and industrial control circuits.

[0065] Analog comparator (CMP): Compares an analog signal to a standard value. When the signal is higher than the standard value, it outputs a high (or low) level; conversely, when the signal is lower, it outputs a low (or high) level. For example, if a temperature signal is connected to the non-inverting input of an op-amp and a voltage reference (representing a temperature) is connected to the inverting input, the op-amp will output a high level when the temperature is higher than the reference value, turning off the heater. Conversely, when the temperature signal is lower than the reference value, the op-amp will output a low level, turning on the heater. This op-amp is a simple comparator because its input and output are in phase; it is called a non-inverting comparator.

[0066] Reflected voltage: Reflected voltage refers to the energy stored in the transformer in a flyback switching power supply that is not absorbed by the secondary side in time when the switching transistor is turned off. At this time, it will return to the primary side, which will lead to low efficiency of the switching power supply and easy breakdown of the switching transistor.

[0067] The following is a detailed description of the flyback switching power supply snubber circuit provided in this application.

[0068] like Figure 4 As shown, the flyback switching power supply absorption circuit provided in the embodiments of this application includes at least: a transformer 110, a primary-side sub-circuit 120, and a secondary-side sub-circuit 130. The transformer 110 includes a primary-side coil NP and a secondary-side coil NS.

[0069] In this embodiment, the primary-side sub-circuit 120 includes an energy storage branch connected to the primary-side coil NP and an absorption branch connected to the primary-side coil NP. The energy storage branch and the absorption branch do not operate simultaneously. When the energy storage branch is on, the primary-side coil NP stores energy; when the absorption branch is on, it absorbs the leakage inductance energy of the transformer.

[0070] The energy storage branch includes a first switching transistor Q1, which is connected in series with the primary coil NP; the absorption branch includes a second switching transistor Q2, an absorption module, an absorption capacitor C3, and a power supply capacitor C5, which are connected in series with the second switching transistor Q2 and the absorption capacitor C3 and then connected in parallel with the primary coil NP.

[0071] In actual implementation, the power supply capacitor C5 can also be placed inside the absorption module. This embodiment does not limit the positional relationship between the power supply capacitor C5 and the absorption module.

[0072] refer to Figure 4 In this embodiment, the absorption module includes a sampling VS terminal, a control GATE terminal, a ground GND terminal, and a power supply VDD terminal.

[0073] The sampling VS terminal is connected between the absorption capacitor C3 and the second switch Q2; the control GATE terminal is connected to the control terminal of the second switch Q2 and is used to control the conduction and turn-off of the second switch Q2; the ground GND terminal is connected to the primary coil NP and the first switch Q1; the power supply VDD terminal is connected to the power supply capacitor C5 and then grounded, and obtains the power supply VDD voltage for the normal operation of the absorption module when the energy storage branch is on.

[0074] Among them, the absorption capacitor C3 can be a non-polar capacitor, and the second switching transistor Q2 includes the parasitic diode DQ2.

[0075] In this embodiment, the absorption module is used to: when the first switch Q1 is off, i.e. the energy storage branch is off, acquire the voltage signal VS at the sampling VS terminal of the absorption module and the GND voltage signal at the grounding GND terminal; when the voltage signal VS is less than the preset voltage threshold of the GND voltage signal, control the second switch Q2 to be turned on so that the absorption capacitor C3 absorbs the leakage inductance energy of the transformer, and after the absorption capacitor C3 has completed the absorption of the leakage inductance energy, supply power to the load connected to the output terminal of the secondary sub-circuit 130.

[0076] The preset voltage threshold is a pre-set voltage value, which can be 100 microvolts, 150 microvolts, or 200 microvolts, etc. This embodiment does not limit the implementation method of the preset voltage threshold.

[0077] In addition, in this embodiment, the parasitic capacitance Cds of the first switch Q1 supplies power to the load connected to the output terminal of the secondary sub-circuit 130 during the resonance process.

[0078] The secondary circuit 130 is connected to the secondary coil NS. When the secondary coil NS is turned on, it provides the output voltage VOUT to the load connected to the secondary coil NS.

[0079] In addition, to ensure the proper functioning of the flyback switching power supply snubber circuit, the flyback switching power supply snubber circuit also includes an input voltage sub-circuit 140. The input voltage sub-circuit 140 is connected to the primary side sub-circuit 120 and is used to provide the input voltage Vin to the primary side sub-circuit 120.

[0080] like Figure 4 As shown, optionally, the input voltage sub-circuit 140 is a full-wave bridge rectifier circuit, specifically including diodes D1, D2, D3, and D4, capacitors C1 and C2. Capacitor C1 can be a non-polarized capacitor.

[0081] refer to Figure 5 Due to the leakage inductance of the transformer, at the instant the first switch Q1 is turned off (i.e., Figure 5 At time t1, energy cannot be directly transferred to the secondary coil NS. At this time, the current in the primary coil NP will not immediately drop to zero, but will continue to charge the parasitic capacitance Cds from the drain of the first switching transistor Q1 to ground. The drain voltage Vd2 rises rapidly until it is greater than the sum of the input voltage Vin and the reflected voltage Vor of the output voltage of the secondary sub-circuit 120 on the primary coil NP (i.e., ...). Figure 5 At time t2, the drain voltage Vd2 can be expressed by the following formula:

[0082] Vd2>Vin+Vor

[0083] In the formula, Vd2 is the drain voltage of the first switching transistor Q1, Vin is the input voltage, and Vor is the reflected voltage of the output voltage of the secondary sub-circuit 120 on the primary coil NP.

[0084] At this point, the secondary coil NS is turned on, and the energy on the primary coil NP is transferred to the secondary coil NS, supplying power to the load connected to the output terminal of the secondary sub-circuit 120.

[0085] Meanwhile, due to the leakage inductance of the transformer, the parasitic capacitance Cds will continue to charge, causing the drain voltage Vd2 to continue to rise until it is greater than the voltage signal VS at the cathode of the body diode of the second switching transistor Q2 by the forward voltage drop VQ2 of the body diode (reference). Figure 5 In the voltage signal VS waveform, the drain voltage Vd2 can be expressed by the following formula:

[0086] Vd2>VS+VQ2

[0087] In the formula, Vd2 is the drain voltage of the first switch Q1; VS is the voltage signal VS of the cathode of the body diode of the second switch Q2, that is, the voltage detected by the sampling VS terminal of the absorption module; VQ2 is the forward voltage drop of the body diode of the second switch Q2.

[0088] When the absorption module detects that the voltage signal VS is less than the GND voltage signal at the grounding GND terminal, the absorption module turns on the second switch Q2. At this time, the drain voltage Vd2 is almost the same as the voltage signal VS, and the leakage inductance current begins to charge the absorption capacitor C3. The voltage signal VS rises slowly until the leakage inductance current decreases to 0 (i.e., Figure 5 At time t3). After that, the absorption capacitor C3, parasitic capacitance Cds, and leakage inductance continue to resonate. The energy collected on the absorption capacitor C3 is transferred to the secondary coil NS during the resonance process and supplies power to the load until the energy is completely consumed (i.e., Figure 5 At time t4 in the middle. When the delay module TD finishes timing, the second switch Q2 is turned off, and the voltage signal VS (i.e., Figure 5 The VS signal waveform, indicated by the dashed line, remains constant and does not decrease. However, the drain voltage Vd2 decreases slightly because the circuit has a load, which causes the current to decrease.

[0089] like Figure 6 As shown, the absorption module includes a power supply submodule, an analog comparator CMP, a delay module TD, an AND gate circuit, and a driver submodule DRV. The power supply submodule includes a power unit, a single-phase conducting diode D1, and a power supply capacitor C5.

[0090] In this embodiment, one end of the power supply submodule is connected to the sampling VS terminal of the absorption module, which is the sampling voltage signal VS of the absorption module.

[0091] The inverting input of the analog comparator CMP is connected to the sampling VS terminal, and the non-inverting input of the analog comparator CMP is connected to the reference voltage Vref; the output of the analog comparator CMP is connected to the first input of the AND gate circuit.

[0092] One end of the delay module TD is connected to the output of the analog comparator CMP, and the other end of the delay module TD is connected to the second input of the AND gate circuit; at the same time, the output of the AND gate circuit is connected to the driver submodule DRV; the output of the driver submodule DRV is connected to the control GATE terminal of the absorption module.

[0093] The drive submodule DRV is connected to the second switch Q2 through the control GATE terminal of the absorption module to control the second switch Q2 to be turned on or off.

[0094] In this embodiment, when the primary coil NP is turned on, the voltage signal VS is the sum of the input voltage VIN and the voltage across the absorption capacitor C3.

[0095] When the energy storage branch is disconnected, the primary coil NP is turned off. In the absorption module, when the analog comparator CMP detects that the voltage signal VS is lower than the reference voltage Vref, the analog comparator CMP will output a high level to one end of the AND gate circuit and the delay module TD.

[0096] The reference voltage Vref includes a value of -330 millivolts. In actual implementation, the reference voltage Vrfe can be set according to the actual situation. This embodiment does not limit the reference voltage Vref.

[0097] After receiving a high-level signal from the analog comparator CMP, the delay module TD will output a high-level signal to the other end of the AND gate. The AND gate, upon receiving the high-level signal from the delay module TD, will output a high-level signal to the driver module DRV.

[0098] After receiving the high-level signal from the delay module TD, the drive module DRV outputs a high-level drive signal to the control GATE terminal of the absorption module to turn on the second switch Q2.

[0099] Specifically, when the primary coil NP is turned off, in response to the received voltage signal VS, the analog comparator CMP outputs a first high-level signal to the delay module TD and the AND gate circuit when the voltage signal VS is less than the preset voltage threshold of the reference voltage Vref; in response to the received first high-level signal, the delay module TD outputs a second high-level signal to the AND gate circuit; in response to the received first and second high-level signals, the AND gate circuit outputs a third high-level signal to the driver submodule DRV; in response to the received third high-level signal, the driver submodule DRV outputs a drive signal to the control GATE terminal of the absorption module, so that the second switch Q2 connected to the control GATE terminal turns on after receiving a high-level drive signal.

[0100] In this embodiment, after the delay module TD receives the high level output from the analog comparator CMP, it will output a high level signal to the other end of the AND gate circuit by default, and at the same time, the delay module TD will start a countdown.

[0101] When the countdown of the delay module TD ends, the delay module TD will output a low-level signal to the AND gate circuit. After receiving the low-level signal from the delay module TD, the AND gate circuit will immediately output a low-level signal to the driver submodule DRV. After receiving the low-level signal from the AND gate circuit, the driver submodule DRV will output a low-level drive signal to the control GATE terminal of the absorption module, so as to turn off the second switch Q2.

[0102] Specifically, the delay module TD also includes a timer; in response to a first high-level signal received by the delay module TD, the timer starts a countdown based on a preset duration, and outputs an end signal St when the countdown ends; in response to the end signal St, the delay module TD also outputs a first low-level signal to the AND gate circuit. In response to the received first low-level signal, the AND gate circuit also outputs a second low-level signal; in response to the received second low-level signal, the driver submodule DRV also outputs a third low-level signal to the control GATE terminal, so that the second switch Q2 connected to the control GATE terminal turns off after receiving the third low-level signal.

[0103] The preset duration is less than the discharge duration of the secondary coil NS; specifically, the preset duration is less than the minimum discharge duration of the secondary coil NS. In this embodiment, the preset duration ranges from 50 ns to 2 μs. In actual implementation, the preset duration can be set according to the actual situation; this embodiment does not limit the range of the preset duration.

[0104] In summary, the flyback switching power supply absorption circuit provided in this embodiment includes a transformer, which includes a primary winding NP and a secondary winding NS; a primary sub-circuit, which includes an energy storage circuit and an absorption circuit, wherein the energy storage branch includes a first switching transistor Q1, and the absorption branch includes a second switching transistor Q2, an absorption chip, and an absorption capacitor C3; and a secondary sub-circuit, which is connected to the secondary winding NS. When the first switching transistor is off, the voltage signal VS at the VS terminal of the absorption chip and the GND voltage at the GND terminal of the absorption chip are acquired. When the voltage signal VS is less than the GND voltage, the second switching transistor is turned on to charge the absorption capacitor using the transformer leakage inductance current. When the leakage inductance current is zero, the absorption capacitor resonates with the parasitic capacitance. During resonance, power is supplied to the load connected to the output terminal of the secondary sub-circuit. This solves the problem of low power conversion efficiency. By absorbing leakage inductance energy through the absorption chip to supply power to the load connected to the secondary sub-circuit, power conversion efficiency can be improved.

[0105] In addition, the absorption chip can effectively solve the problem of the peak voltage at the drain end of the first switch in the primary circuit after it is turned off, thereby reducing the impact damage of the peak voltage on the devices in the circuit. On the one hand, it can protect the safety of the devices in the circuit, and on the other hand, it can use a switch with a lower withstand voltage to reduce the circuit cost.

[0106] In addition, by absorbing the leakage inductance current through the absorption capacitor, it resonates with the parasitic capacitance when the leakage inductance current is 0. During the resonance process, it supplies power to the load connected to the output terminal of the secondary sub-circuit, avoiding energy consumption through the resistor and reducing circuit heating.

[0107] In addition, when the primary coil is turned on, the absorption chip is powered by the input voltage, eliminating the need for an additional power supply. This reduces circuit complexity and saves resources.

[0108] In addition, using a second switching transistor instead of a diode can reduce the on-state voltage drop when absorbing energy, thereby further improving the power supply conversion efficiency.

[0109] Figure 7 This application provides an embodiment of an absorption chip for a flyback switching power supply, which includes an absorption module in the flyback switching power supply absorption circuit.

[0110] Optionally, the absorption chip includes a sampling VS terminal, a control GATE terminal, a ground GND terminal, and a power supply VDD terminal.

[0111] Optionally, the absorption chip also includes a second switch Q2. In this case, the absorption chip also includes a sampling VS terminal, a ground GND terminal, and a power supply VDD terminal.

[0112] In actual implementation, the second switch Q2 can also be placed outside the absorption chip. This embodiment does not limit the positional relationship between the second switch Q2 and the absorption chip.

[0113] For detailed descriptions of this embodiment, please refer to the above embodiment of the flyback switching power supply absorption circuit. This embodiment will not be repeated here.

[0114] Figure 8 This is a flowchart illustrating a transformer leakage inductance absorption method for a flyback switching power supply snubber circuit according to an embodiment of this application. The method includes at least the following steps:

[0115] Step 801: When the first switch Q1 is turned off, i.e. the energy storage branch is turned off, the voltage signal VS at the sampling VS terminal of the absorption chip in the absorption branch and the GND voltage signal at the grounding GND terminal of the absorption chip are acquired.

[0116] Step 802: When the voltage signal VS is less than the preset voltage threshold of the GND voltage signal, the second switch Q2 connected to the control GATE terminal of the absorption chip is turned on by controlling the absorption chip.

[0117] Step 803: When the second switch Q2 is turned on, the leakage inductance energy of the transformer is absorbed by the absorption capacitor C3 in the absorption branch, and after the absorption capacitor C3 has completed absorbing the leakage inductance energy, the load connected to the output terminal of the secondary sub-circuit is powered.

[0118] For detailed descriptions of this embodiment, please refer to the above embodiment of the flyback switching power supply absorption circuit. This embodiment will not be repeated here.

[0119] In summary, the transformer leakage inductance absorption method provided in this embodiment, when the energy storage branch is disconnected, controls the second switching transistor to conduct through the absorption chip, so that the absorption capacitor absorbs the leakage inductance energy of the transformer and supplies power to the load connected to the output terminal of the secondary sub-circuit, thereby improving the power conversion efficiency.

[0120] The technical features of the above embodiments can be combined in any way. For the sake of brevity, not all possible combinations of the technical features in the above embodiments are described. However, as long as there is no contradiction in the combination of these technical features, they should be considered to be within the scope of this specification.

[0121] Obviously, the embodiments described above are only some embodiments of this application, and not all embodiments. Based on the embodiments of this application, those skilled in the art can make other variations or modifications without creative effort, and all such variations or modifications should fall within the scope of protection of this application.

Claims

1. A flyback switching power supply absorption circuit, characterized in that, The flyback switching power supply snubber circuit includes: A transformer, comprising a primary winding NP and a secondary winding NS; The primary-side sub-circuit includes an energy storage branch connected to the primary-side coil NP and an absorption branch connected to the primary-side coil NP. When the energy storage branch is turned on, the primary-side coil NP stores energy, and when the absorption branch is turned on, it absorbs the leakage inductance energy of the transformer. A secondary sub-circuit is connected to a secondary coil NS. When the secondary coil NS is turned on, it provides an output voltage VOUT to the load connected to the secondary coil NS. The energy storage branch includes a first switching transistor Q1, which is connected in series with the primary coil NP; the absorption branch includes a second switching transistor Q2, an absorption module, an absorption capacitor C3, and a power supply capacitor C5, which are connected in series with the second switching transistor Q2 and the absorption capacitor C3 and then connected in parallel with the primary coil NP. The absorption module includes: a sampling VS terminal, connected between the absorption capacitor C3 and the second switching transistor Q2; a control GATE terminal, connected to the control terminal of the second switching transistor Q2, used to control the conduction and turn-off of the second switching transistor Q2; a ground GND terminal, connected to the primary coil NP and the first switching transistor Q1; and a power supply VDD terminal, connected to the power supply capacitor C5 and then grounded, which obtains the power supply VDD voltage for normal operation of the absorption module when the energy storage branch is on. The absorption module is configured to: acquire the voltage signal VS at the sampling VS terminal and the GND voltage signal at the grounding GND terminal when the first switch Q1 is off, i.e., the energy storage branch is off; control the second switch Q2 to turn on when the voltage signal VS is less than the preset voltage threshold of the GND voltage signal, so that the absorption capacitor C3 absorbs the leakage inductance energy of the transformer; and supply power to the load connected to the output terminal of the secondary sub-circuit after the absorption capacitor C3 has completed absorbing the leakage inductance energy.

2. The flyback switching power supply absorption circuit according to claim 1, characterized in that, The energy storage branch and the absorption branch do not operate simultaneously.

3. The flyback switching power supply absorption circuit according to claim 1, characterized in that, The absorption module includes a power supply submodule, an analog comparator CMP, a delay module TD, an AND gate circuit AND, and a driver submodule DRV. The power supply submodule includes a power unit, a single-phase conducting diode D1, and the power supply capacitor C5. One end of the power supply submodule is connected to the sampling VS terminal of the absorption module, and is used to sample the voltage signal VS of the absorption module; The inverting input of the analog comparator CMP is connected to the sampling VS terminal, and the non-inverting input of the analog comparator CMP is connected to the reference voltage Vref. The output of the analog comparator CMP is connected to the first input of the AND gate circuit; One end of the delay module TD is connected to the output of the analog comparator CMP, and the other end of the delay module TD is connected to the second input of the AND gate circuit. The output of the AND gate circuit is connected to the driver submodule DRV. The output terminal of the drive submodule DRV is connected to the control GATE terminal of the absorption module.

4. The flyback switching power supply absorption circuit according to claim 3, characterized in that, In response to the received voltage signal VS, the analog comparator CMP is configured to output a first high-level signal to the delay module TD and the AND gate circuit when the voltage signal VS is less than the preset voltage threshold of the reference voltage Vref; In response to the received first high-level signal, the delay module TD is used to output a second high-level signal to the AND gate circuit; In response to the received first high-level signal and the second high-level signal, the AND gate is used to output a third high-level signal to the driver submodule DRV; In response to the received third high-level signal, the driving submodule DRV is used to output a driving signal to the control GATE terminal of the absorption module, so that the second switch Q2 connected to the control GATE terminal is turned on after receiving the driving signal as high level; The reference voltage Vref is the GND voltage signal, and the preset voltage threshold of the reference voltage Vref is the preset voltage threshold of the GND voltage signal.

5. The flyback switching power supply absorption circuit according to claim 4, characterized in that, The delay module TD also includes a timer; In response to the first high-level signal received by the delay module TD, the timer is used to start counting down based on a preset duration, and output an end signal St when the countdown ends; In response to the end signal St, the delay module TD is also used to output a first low-level signal to the AND gate circuit.

6. The flyback switching power supply absorption circuit according to claim 5, characterized in that, In response to the received first low-level signal, the AND gate is also used to output a second low-level signal; In response to the received second low-level signal, the driver submodule DRV is further configured to output a third low-level signal to the control GATE terminal, so that the second switch Q2 connected to the control GATE terminal is turned off after receiving the third low-level signal.

7. The flyback switching power supply absorption circuit according to claim 5, characterized in that, The preset duration is less than the discharge duration of the secondary coil NS.

8. A method for absorbing transformer leakage inductance based on the flyback switching power supply absorption circuit according to any one of claims 1-7, characterized in that, The method includes: When the first switch Q1 is turned off, i.e. the energy storage branch is turned off, the voltage signal VS at the sampling VS terminal of the absorption module in the absorption branch and the GND voltage signal at the grounding GND terminal of the absorption module are obtained. When the voltage signal VS is less than the preset voltage threshold of the GND voltage signal, the second switch Q2 connected to the control GATE terminal of the absorption module is turned on by the absorption module. When the second switch Q2 is turned on, the leakage inductance energy of the transformer is absorbed by the absorption capacitor C3 in the absorption branch, and after the absorption capacitor C3 has completed absorbing the leakage inductance energy, it supplies power to the load connected to the output terminal of the secondary sub-circuit.

9. An absorption chip for a flyback switching power supply, characterized in that, The absorption module includes the flyback switching power supply absorption circuit as described in any one of claims 1-7.

10. The absorption chip for a flyback switching power supply according to claim 9, characterized in that, The absorption chip includes a sampling VS terminal, a control GATE terminal, a ground GND terminal, and a power supply VDD terminal.

11. The absorption chip for a flyback switching power supply according to claim 9, characterized in that, It also includes the second switching transistor Q2.

12. The absorption chip for a flyback switching power supply according to claim 11, characterized in that, This includes the sampling VS terminal, the ground GND terminal, and the power supply VDD terminal.

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