A low-profile silicon-based CMOS phased array antenna

By adopting a surface-mounted phased array architecture with low profile silicon-based CMOS phased array antenna, multi-channel T/R components are integrated into silicon-based CMOS three-mm phased array T/R chip, solving the problems of low integration and high cost in traditional phased array antennas, and achieving high integration and low cost of three-mm band phased array antennas.

CN115441190BActive Publication Date: 2025-04-18GUIZHOU AEROSPACE ELECTRONICS TECH CO LTD
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Patent Information

Application Number
CN202211130197.1
Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
Filing Date
2022-09-16
Publication Date
2025-04-18
Estimated Expiration
2042-09-16

AI Technical Summary

Technical Problem

Traditional brick-type and tile-type phased array antennas have problems of low integration and high cost, and it is difficult to meet the integration and cost requirements of three-mm band phased array antennas.

Method used

The surface-mounted phased array architecture of low-profile silicon-based CMOS phased array antenna is adopted to integrate multi-channel T/R components into a silicon-based CMOS three-mm phased array T/R chip, and directly attach it to the antenna board, combining multi-layer microwave composite substrate and differential metal structural parts to achieve high integration and low cost.

Benefits of technology

It realizes high integration and low cost of three-mm band phased array antennas, solves the problems of low integration and high cost of traditional phased array antennas, and is suitable for a pre-research project, achieving the expected results.

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Abstract

A low-profile silicon-based CMOS phased array antenna includes an antenna unit, a composite substrate, a T / R chip, a summator, a rigid disruptor, and a wave control board. The composite substrate is in the shape of a disk. The antenna unit is fixed to the upper surface of the composite substrate. One end of the T / R chip is fixedly connected to the lower surface of the composite substrate, and the other end is in contact with the upper surface of the summator. The summator is a metal cavity structure, and the upper end is connected to the lower surface of the composite substrate. The wave control board is fixed to the lower end surface of the summator. The rigid disruptor is wrapped around the outside of the summator, and one end is connected to the composite substrate, and the other end is connected to the wave control board. Through the implementation of the present invention, a low-profile silicon-based CMOS phased array antenna is provided, which solves the problem that traditional brick-type and tile-type phased array antennas have low integration and high cost, and are difficult to meet the integration and cost requirements of three-millimeter frequency band phased array antennas.
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Description

Technical Field

[0001] The invention belongs to the technical field of antennas, and in particular relates to a low-profile silicon-based CMOS phased array antenna. Background Art

[0002] Traditional phased array antennas are divided into two types of architectures: brick-type and tile-type. The integration method of phased array antennas is usually based on the T / R component form and the assembly form of the antenna. In the brick-type phased array antenna, the T / R components are integrated vertically and the antenna structure is assembled horizontally; while in the tile-type phased array antenna, the T / R components are integrated horizontally and the antenna structure is assembled vertically.

[0003] Traditional brick-type or tile-type phased array antennas assembled from T / R components have the following disadvantages: 1. Millimeter-wave devices mostly use a multi-chip combination of compound semiconductor microwave millimeter-wave monolithic integrated circuits (GaAs / GaNMMIC), and the cost of a single-channel T / R is relatively high; 2. T / R component packaging uses micro-assembly, micro-welding and other processes to package various integrated chips and chip components in the same tube or cavity, which has a large volume and weight and high packaging cost; 3. The integrated structure uses a three-layer architecture of phased array chip-T / R component-phased array antenna, which has low integration, a large number of modules and low assembly efficiency. Summary of the invention

[0004] In order to solve the above technical problems, the present invention provides a low-profile silicon-based CMOS phased array antenna, which solves the problem that traditional brick-type and tile-type phased array antennas have low integration and high cost, and are difficult to meet the integration and cost requirements of three-millimeter frequency band phased array antennas.

[0005] The present invention is achieved through the following technical solutions.

[0006] The present invention provides a low-profile silicon-based CMOS phased array antenna, comprising an antenna unit, a composite substrate, a T / R chip, a summator, a rigid disruptor and a wave control board, wherein the composite substrate is disc-shaped, the antenna unit is fixed to the upper surface of the composite substrate, one end of the T / R chip is fixedly connected to the lower surface of the composite substrate, and the other end is in contact with the upper surface of the summator; the summator is a metal cavity structure, and the upper end is connected to the lower surface of the composite substrate; the wave control board is fixed to the lower end surface of the summator, the rigid disruptor is wrapped around the outside of the summator, one end is connected to the composite substrate, and the other end is connected to the wave control board.

[0007] Furthermore, the T / R chip is a multi-channel silicon-based CMOS T / R chip with 16 channels.

[0008] Furthermore, a heat sink is attached to the side of the T / R chip that contacts the composite substrate.

[0009] Furthermore, when the multi-layer substrate and the summator are connected and installed, they are first positioned using positioning pins, and then silver paste is used to bond the butt joint gaps.

[0010] Furthermore, the upper end surface of the summator is provided with an inner groove adapted to the T / R chip, and the T / R chip is placed in the inner groove of the upper end surface of the summator when fixedly connected to the composite substrate.

[0011] Furthermore, the wave control plate is fixed on the lower surface of the summator and the differential device by a screw mounting process.

[0012] Furthermore, there are 64 T / R chips, with 16 chips forming a quadrant, which are evenly distributed on the lower surface of the composite substrate.

[0013] Furthermore, it also includes a power divider, wherein there are four power dividers, and the 16 T / R chips in each quadrant are connected to the sum-and-difference circuit via one power divider.

[0014] The beneficial effects of the present invention are as follows: through the implementation of the present invention, a surface-mounted phased array architecture is adopted to replace the traditional three-layer architecture of phased array chip-T / R component-phased array antenna, and a multi-channel T / R component is integrated into a chip, which is directly surface-mounted on the antenna board to construct a low-profile three-millimeter frequency band phased array antenna; the advantages of high integration and low cost of silicon-based CMOS technology are utilized to integrate the receiving, transmitting, transceiver control, phase shift attenuation control, SPI interface conversion, and power division network functional circuits of 16 T / R channels into a silicon-based CMOS three-millimeter phased array T / R chip, the three-millimeter phased array antenna component is highly integrated, chip-based and low-cost; the multi-channel silicon-based CMOS three-millimeter T / R chip is directly mounted on the antenna circuit multi-layer microwave composite substrate after packaging, the substrate is tightly fixed on the metal structure of the summator, and the wave control power board is also fixed on the metal structure of the summator. This structure has good heat dissipation performance and solves the problem that traditional brick-type and tile-type phased array antennas have low integration and high cost, and are difficult to meet the integration and cost requirements of three-millimeter frequency band phased array antennas. This product has been used in a pre-research project and achieved the expected effect. BRIEF DESCRIPTION OF THE DRAWINGS

[0015] Figure 1 It is a schematic diagram of the structure of the present invention;

[0016] Figure 2 It is a functional block diagram of the present invention;

[0017] In the figure: 1-antenna unit, 2-composite substrate, 3-T / R chip, 4-single and double-difference device, 5-rigid scrambler board, 6-single and double-difference network, 7-wave control board. DETAILED DESCRIPTION

[0018] The technical solution of the present invention is further described below, but the scope of protection claimed is not limited to the description.

[0019] like Figure 1-2 As shown, a low-profile silicon-based CMOS phased array antenna provided by the present invention includes an antenna unit 1, a composite substrate 2, a T / R chip 3, a summator 4, a rigid scrambler 5, and a wave control board 7. The composite substrate 2 is disc-shaped, the antenna unit 1 is fixed to the upper surface of the composite substrate 2, one end of the T / R chip 3 is fixedly connected to the lower surface of the composite substrate 2, and the other end is in contact with the upper surface of the summator 4; the summator 4 is a metal cavity structure, and the upper end is connected to the lower surface of the composite substrate 2; the wave control board 7 is fixed to the lower end surface of the summator 4, and the rigid scrambler 5 is wrapped around the outside of the summator 4, one end is connected to the composite substrate 2, and the other end is connected to the wave control board 7. The T / R chip 3 is a multi-channel silicon-based CMOS T / R chip 3 with 16 channels. There are 64 T / R chips 3, each 16 forming a quadrant, and they are evenly distributed on the lower surface of the composite substrate 2. It also includes a power divider, which is 4 in number. The 16 T / R chips 3 in each quadrant are connected to the sum-and-difference device 4 circuit via one power divider.

[0020] The composite substrate 2 is a multi-layer microwave composite substrate 2, in which the antenna unit 1, the T / R chip 3, and the control and power feeder network are integrated. The T / R chip 3 is soldered to the bottom surface of the multi-layer composite substrate 2 by flip-chip soldering; the summator 4 is a metal cavity structure, and also serves as a heat dissipation carrier of the T / R chip 3. The back of the T / R chip 3 is attached with a heat sink and mounted on the metal cavity wall of the summator 4; the multi-layer substrate and the summator 4 are positioned by pin holes and bonded together by silver paste; the SPI signal and power signal of the antenna are connected to the wave control board 7 through the rigid disruptor board 5, and the wave control board 7 is screwed to the lower surface of the metal cavity of the summator 4.

[0021] The low-profile silicon-based CMOS phased array antenna of the present invention has the characteristics of ultra-thin, ultra-light, conformable, and scalable. Its caliber is 127mm and the total thickness is 35mm. A total of 64 16-channel silicon-based CMOS three-millimeter T / R chips are used to form 1024 channels, and the unit spacing is 2.4mm×2.4mm.

[0022] Functionally, the present invention comprises antenna array, heat sink, sum-difference network 6 and wave control network from top to bottom, wherein the heat sink and sum-difference network 6 are concentrated on sum-difference device 4 in structure, that is, the cavity of sum-difference device 4 is used as heat sink, sum-difference network 6 is arranged therein, and wave control network is arranged on wave control board 7. Antenna array comprises antenna unit 1 and integrated chip module, and the array adopts triangular array mode, and reduces the number of channels under the premise of making full use of aperture, so as to realize low cost of antenna array. Integrated chip module comprises feeding network, calibration network, SPI and power supply signal conversion circuit, and integrates multi-channel silicon-based CMOS T / R chip and pre-stage driver chip, so as to realize conversion of digital wave control signal to analog amplitude and phase control signal and control of transceiver switching switch. Heat sink is not only the carrier of chip and circuit substrate, but also the cover plate for installing wave control board 7, and is also a good conductor of heat capacity and thermal conductivity. Heat sink corresponds to microstrip and device position of circuit substrate, and blind slot is opened to avoid; sum-difference network 6 adopts waveguide bridge structure to realize sum-difference beam of four quadrants. The hardware circuit of the wave control network includes digital control DC-DC power supply, RF power supply DC-DC, and digital control logic. The digital control circuit is mainly composed of FPGA, configuration chip, parallel FLASH (for storing quantitative data), serial FLASH (for storing pointing accuracy data), and low-frequency connector.

[0023] Working principle:

[0024] During transmission, after the excitation signal enters the antenna's summator 4, it is divided into four equal-amplitude power paths and provided to the four quadrants of the antenna unit 1 on the antenna array. In each quadrant of the antenna unit 1, 16 equal-amplitude microwave signals are input to 16 multi-channel silicon-based CMOS T / R chips with 16 channels, amplified by the T channels of the 16-channel multi-channel silicon-based CMOS T / R chips, and phase-adjusted before being radiated to free space by the antenna on the array.

[0025] When receiving, the signal received by the antenna from free space is amplified by the R channel of the 16-channel multi-channel silicon-based CMOS T / R chip, and then the amplitude and phase of each signal are controlled by the amplitude and phase controller, and then the 4-way signal is synthesized with equal amplitude, and the 4-way signal is input to the sum-differentiator 4 to generate sum, difference and differential signals.

[0026] The array's transmit and receive switching, beam scanning, channel switching and other functions are controlled by the signal processing extension through the SPI control interface; the signal processing extension sends the frequency and beam pointing signals to the beam control extension through SPI. After calculation, the beam control extension combines the antenna array element amplitude and phase calibration data stored on the board to generate the amplitude and phase control information corresponding to each channel, and transmits it to the multi-channel silicon-based CMOS T / R chip for execution; the power supply provided by the power supply extension is powered by the DC / DC chip on the power board to the chip of the array.

Claims

1. A low-profile silicon-based CMOS phased array antenna, characterized in that: Including antenna unit, composite substrate, T / R chip, summator, scrambler and wave control board, The composite substrate is disc-shaped, the antenna unit is fixed to the upper surface of the composite substrate, one end of the T / R chip is fixedly connected to the lower surface of the composite substrate, and the other end is in contact with the upper surface of the summator; the summator is a metal cavity structure, and the upper end is connected to the lower surface of the composite substrate; the wave control board is fixed to the lower end surface of the summator, and the rigid disturbance board is wrapped around the outside of the summator, one end is connected to the composite substrate, and the other end is connected to the wave control board; The number of the T / R chips is 64, with 16 chips forming a quadrant, and the chips are evenly distributed on the lower surface of the composite substrate; It also includes a power divider, wherein there are four power dividers, and the 16 T / R chips in each quadrant are connected to the sum-and-difference circuit through one power divider; The summator is internally provided with a summation and difference network, which is connected to the T / R chip circuit.

2. The low-profile silicon-based CMOS phased array antenna according to claim 1, characterized in that: A heat sink is attached to the side of the T / R chip that contacts the composite substrate.

3. The low-profile silicon-based CMOS phased array antenna according to claim 1, characterized in that: When the composite substrate is connected and installed with the summator, positioning pins are used for positioning first, and then silver paste is used to bond the butt joint gap.

4. The low-profile silicon-based CMOS phased array antenna according to claim 1, characterized in that: The upper end surface of the summator is provided with an inner groove adapted to the T / R chip, and the T / R chip is placed in the inner groove of the upper end surface of the summator when fixedly connected to the composite substrate.

5. The low-profile silicon-based CMOS phased array antenna according to claim 1, characterized in that: The wave control plate is fixed on the lower surface of the summator and the differential device by means of a screw mounting process.

Citation Information

Patent Citations

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    CN104393415A

  • Sheathed millimeter wave satellite communication phased array antenna

    CN105305075A