Semiconductor structure and method of manufacturing the same

By employing a double etching process and a pump-out process during MEMS device manufacturing, the problem of polymer blocking the connection lines at the bottom of the trench was solved, enabling normal connection of MEMS devices and preventing device failure.

CN115483102BActive Publication Date: 2025-10-21SHANGHAI HUAHONG GRACE SEMICON MFG CORP
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Patent Information

Application Number
CN202211185603.4
Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
Filing Date
2022-09-27
Publication Date
2025-10-21
Estimated Expiration
2042-09-27

AI Technical Summary

Technical Problem

In the manufacturing process of existing MEMS devices, the polymer at the bottom of the trench blocks the connection between the interconnect and the metal layer, leading to wire breakage and device failure.

Method used

The etching process employs two steps: a first etching process and a second etching process. The pressure range is 50mT to 100mT. A mixture of methane, oxygen, and argon is used for etching. During the etching process, a pump-out process is performed to remove polymer, ensuring the uniformity of the trenches and the integrity of the connections.

Benefits of technology

It effectively removes residual polymer in the trenches, improves etching uniformity, avoids wire breakage problems, and ensures normal device operation.

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Abstract

The application provides a semiconductor structure and a manufacturing method thereof. The semiconductor structure is manufactured by using twice etching processes to etch the oxide layer to form a groove, and the twice etching processes adopt high pressure of 50 mT-100 mT. Further, the plasma in the etching process has the ability of lateral etching, which can not only remove the residual polymer, but also make the plasma collide more in the reaction cavity, so as to reduce the bombardment energy, improve the uniformity of etching, and avoid device failure.
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Description

Technical Field

[0001] The present invention relates to the field of semiconductor technology, and in particular to a semiconductor structure and a manufacturing method thereof. Background Art

[0002] In recent years, with the development of micro-electromechanical systems (MEMS) technology, various micro-electromechanical devices, including microsensors and microactuators, have been miniaturized. Miniaturization is conducive to improving device integration, so MEMS has become one of the main development directions.

[0003] Nowadays, micro-electromechanical systems (MEMS) fabricated using anisotropic magnetoresistance (AMR) have been widely used due to their high sensitivity, good thermal stability, low material cost, and simple fabrication process. Therefore, improving the performance of MESM devices is becoming increasingly important.

[0004] In existing MEMS device manufacturing processes, when etching at least the top oxide layer of the MEMS device to form a trench, a large amount of polymer forms at the bottom of the trench. This polymer accumulates in the middle of the trench, blocking further etching of the oxide layer, thus forming micro-grooves on both sides of the trench bottom. The polymer in the middle of the trench bottom blocks the connection between the subsequent connecting wires and the metal layer, causing wire breakage and device failure. Summary of the Invention

[0005] The object of the present invention is to provide a semiconductor structure and a method for manufacturing the same, so as to solve the problem that the existing MESM device may suffer from abnormal disconnection and thus cause the device to fail.

[0006] To solve the above technical problems, the present invention provides a method for manufacturing a flash memory, comprising:

[0007] providing a substrate;

[0008] providing a substrate;

[0009] forming a metal layer and an oxide layer in sequence on the substrate, wherein a top of the oxide layer has a notch;

[0010] A first etching process and a second etching process are sequentially performed on the oxide layer to etch the oxide layer and expand the gap to form a groove that at least penetrates the oxide layer, wherein the pressure range of the first etching process and the second etching process is: 50mT ~ 100mT.

[0011] Preferably, the time for performing the first etching process and the time for performing the second etching process are the same.

[0012] Preferably, the etching gas of the first etching process and the second etching process is a mixed gas of methane, oxygen and argon.

[0013] Preferably, the flow rate of the methane is 50 SCCM to 250 SCCM, the flow rate of the oxygen is 10 SCCM to 30 SCCM, and the flow rate of the argon gas is 0 SCCM to 200 SCCM.

[0014] Preferably, after performing the first etching process and before performing the second etching process, the method further comprises: performing a pumping process to extract polymer formed in the trench during the first etching process from the trench.

[0015] Preferably, the pressure of the pumping process is 40 mT to 80 mT.

[0016] Preferably, the etching gas in the pump-out process is oxygen and argon.

[0017] Preferably, the flow rate of the oxygen gas is 20 SCCM to 100 SCCM, and the flow rate of the argon gas is 50 SCCM to 200 SCCM.

[0018] Preferably, the metal layer includes a first metal layer and a second metal layer formed sequentially on the substrate; and while performing a second etching process on the oxide layer, the method further includes: etching the second metal layer so that the groove extends at least to the second metal layer.

[0019] To solve the above problems, the present invention further provides a semiconductor structure, which is manufactured according to any one of the above-mentioned methods for manufacturing a semiconductor structure.

[0020] The present invention provides a method for manufacturing a semiconductor structure. Two etching processes are used sequentially to etch the oxide layer to form trenches. Both etching processes employ a high voltage of 50mT to 100mT. This allows the plasma during the etching process to etch laterally, removing residual polymers while also increasing plasma collisions within the reaction chamber to reduce bombardment energy, improve etching uniformity, and further reduce residual polymers, thereby preventing device failure. BRIEF DESCRIPTION OF THE DRAWINGS

[0021] Figure 1 It is a schematic flow chart of a method for manufacturing a semiconductor structure in one embodiment of the present invention.

[0022] Figures 2 to 4 It is a structural schematic diagram of a method for manufacturing a semiconductor structure in an embodiment of the present invention during its preparation process.

[0023] The accompanying drawings are numerals as follows:

[0024] 1-substrate;

[0025] 2-metal layer;

[0026] 21-first metal layer; 22-second metal layer;

[0027] 3-Oxide layer;

[0028] 31-first oxide layer; 33-second oxide layer;

[0029] B-gap;

[0030] C-groove. DETAILED DESCRIPTION

[0031] The following is a further detailed description of a semiconductor structure and a manufacturing method thereof proposed by the present invention, in conjunction with the accompanying drawings and specific embodiments. The advantages and features of the present invention will become clearer based on the following description. It should be noted that the drawings are all in a very simplified form and are not in precise proportions, and are only used to conveniently and clearly assist in explaining the purpose of the embodiments of the present invention. In addition, the structure shown in the drawings is often a portion of the actual structure. In particular, different drawings need to show different focuses, and sometimes different proportions are used. The purpose of the present invention is to etch the oxide layer in two etching processes in sequence to form a groove, and the pressure range of the two etching processes is: 50mT to 100mT. The high pressure of 50mT to 100mT enables the plasma in the etching process to have the ability to lateral etching, which can not only remove residual polymers, but also make the plasma produce more collisions in the reaction chamber to reduce bombardment energy, improve etching uniformity, and thus avoid wire breakage problems and device failure.

[0032] Figure 1 It is a schematic flow chart of a method for manufacturing a semiconductor structure in one embodiment of the present invention. Figures 2 to 4 This is a schematic structural diagram of a method for manufacturing a semiconductor structure in an embodiment of the present invention during its preparation process; Figures 2 to 4 Each step of the method for manufacturing the semiconductor structure provided in this embodiment is described in detail, and the following detailed description does not deviate from the main purpose of the invention.

[0033] In step S10, Figure 2 As shown, a substrate 1 is provided.

[0034] The substrate may include a semiconductor material, an insulating material, a conductive material, or any combination thereof, and may be a single-layer structure or a multi-layer structure. Thus, the substrate may be a semiconductor material such as Si, SiGe, SiGeC, SiC, GaAs, InAs, InP, and other III / V or II / VI compound semiconductors. It may also include a layered substrate such as, for example, Si / SiGe, Si / SiC, silicon-on-insulator (SOI), or silicon-germanium-on-insulator.

[0035] In step 2, continue to Figure 2 As shown, a metal layer 2 and an oxide layer 3 are sequentially formed on the substrate 1 , and a notch B is provided on the top of the oxide layer 3 .

[0036] Continue to participate Figure 2 As shown, in this embodiment, the metal layer 2 includes a first metal layer 21 and a second metal layer 22 sequentially formed on the substrate 1, wherein the material forming the first metal layer 21 is aluminum. The material forming the second metal layer 22 is titanium nitride. The method of forming the first metal layer 21 and the second metal layer 22 is physical vapor deposition.

[0037] Continue to participate Figure 2 and combined Figure 3 As shown, in this embodiment, the method for forming the oxide layer 3 includes the following steps 1 and 2.

[0038] In step 1, a first oxide layer (not shown) is formed on the metal layer 2 , wherein the first oxide layer (not shown) has an opening (not shown) therein.

[0039] In this embodiment, the material forming the first oxide layer (not shown) is silicon oxide.

[0040] In step 2, combine Figure 2As shown, a second oxide layer (not shown) is formed on the first oxide layer (not shown), and the second oxide layer (not shown) is formed on the top surface of the first oxide layer (not shown) and fills part of the opening (not shown) to form the gap B. The first oxide layer (not shown) and the second oxide layer (not shown) constitute the oxide layer 3. In this embodiment, the material forming the second oxide layer (not shown) is silicon oxide, and the second oxide layer (not shown) is formed by chemical vapor deposition. When forming the second oxide layer (not shown), the silicon oxide material fills the opening (not shown) and is formed on the top surface of the first oxide layer (not shown). Since the bottom surface of the opening (not shown) is lower than the top surface of the first oxide layer (not shown), the final formed second oxide layer (not shown) will form the gap B in the area corresponding to the opening (not shown).

[0041] In step S30, continue to Figure 2 and combined Figure 3 and Figure 4 The first etching process and the second etching process are sequentially performed on the oxide layer 3 to etch the oxide layer 3 and expand the gap B to form a groove C that at least penetrates the oxide layer, wherein the pressure range of the first etching process and the second etching process is: 50mT~100mT.

[0042] In addition, in this embodiment, the method for etching the oxide layer 3 is maskless etching, that is, no mask layer is formed on the oxide layer 3, and etching is performed directly on a large area. In this way, more polymers will be formed during the etching process, and therefore more residual polymers will accumulate in the formed groove C.

[0043] In this embodiment, the oxide layer 3 is etched using two etching processes in sequence to form the trench C. The pressure range of the two etching processes is 50 mT to 100 mT. Since both etching processes use a high pressure of 50 mT to 100 mT, the plasma during the etching process has the ability to lateral etch, which not only removes residual polymer but also causes more collisions in the plasma in the reaction chamber, thereby reducing bombardment energy, improving etching uniformity, and preventing device failure.

[0044] Specifically, Figure 3As shown, in this embodiment, a first etching process is performed on the oxide layer 3 to enlarge the gap B, but without penetrating the oxide layer 3. In this embodiment, the pressure range of the first etching process is: 50mT ~ 100mT. The etching gas of the first etching process is a mixture of methane, oxygen and argon. The flow rate of the methane is: 50SCCM ~ 250SCCM, the flow rate of the oxygen is: 10SCCM ~ 30SCCM, and the flow rate of the argon is: 0SCCM ~ 200SCCM. The time for performing the first etching process is 180s.

[0045] Further, continue to participate Figure 3 As shown, in this embodiment, after performing the first etching process, the method further includes: performing a pumping process to extract polymer formed in the groove during the first etching process from the groove. In this embodiment, the polymer in the groove C is extracted from the groove C through the pumping process, i.e., through continuous air extraction and ventilation, thereby further reducing the formation of polymer in the groove C.

[0046] In this embodiment, the pressure of the pumping process is 40 mT to 80 mT. The etching gases used in the pumping process are oxygen and argon. The flow rate of the oxygen is 20 SCCM to 100 SCCM, and the flow rate of the argon is 50 SCCM to 200 SCCM.

[0047] Further, continue to participate Figure 3 and combined Figure 4 As shown, after the pump-out process is performed, a second etching process is performed to continue etching the oxide layer 3 and to further expand the gap B to form a trench C that at least penetrates the oxide layer.

[0048] In this embodiment, the etching conditions of the second etching process are the same as those of the first etching process, namely, the etching pressure is 50 mT to 100 mT. The etching gas of the second etching process is a mixture of methane, oxygen, and argon. The flow rate of the methane is 50 SCCM to 250 SCCM, the flow rate of the oxygen is 10 SCCM to 30 SCCM, and the flow rate of the argon is 0 SCCM to 200 SCCM. Furthermore, the time required to execute the first etching process and the second etching process is the same. That is, the time required to execute the second etching process is also 180 seconds.

[0049] In addition, in this embodiment, a protective gas is introduced during the first etching process and the second etching process to protect the oxide layer 3 forming the sidewalls of the trench C from being etched, thereby further reducing the formation of polymers and improving the uniformity of the sidewalls of the trench C. In this embodiment, the protective gas is nitrogen.

[0050] Further, continue to participate Figure 4 In this embodiment, while performing the second etching process on the oxide layer 3 , the method further includes: etching the second metal layer 22 so that the groove C extends to the second metal layer C and at least stays on the top surface of the first metal layer 21 .

[0051] Furthermore, in this embodiment, while or after performing the second etching process, the method further includes: etching the first metal layer 21 and extending the trench C to the first metal layer 21 and stopping within the first metal layer C. In this embodiment, the depth of the portion of the trench C extending into the first metal layer 21 is

[0052] Furthermore, this embodiment also discloses a semiconductor structure, which is manufactured according to the above-mentioned method for manufacturing a semiconductor structure.

[0053] The above description is only a description of the preferred embodiments of the present invention and does not limit the scope of the present invention. Any changes and modifications made by ordinary technicians in the field of the present invention based on the above disclosure shall fall within the scope of protection of the claims.

Claims

1. A method for manufacturing a semiconductor structure, characterized in that: providing a substrate; forming a metal layer and an oxide layer on the substrate in sequence, wherein the top of the oxide layer has a notch, the oxide layer comprising a first oxide layer and a second oxide layer, wherein the first oxide layer has an opening therein, and the second oxide layer is formed on the top surface of the first oxide layer and fills a portion of the opening to form the notch; A first etching process, a pumping-out process, and a second etching process are sequentially performed on the oxide layer, wherein the first etching process and the second etching process are used to etch the oxide layer and expand the gap to form a groove that at least penetrates the oxide layer, wherein the pressure range of the first etching process and the second etching process is: 50mT~100mT, and the first etching process and the second etching process are both dry etching processes; the pumping-out process is used to extract the polymer formed in the groove during the execution of the first etching process from the groove.

2. The method for manufacturing a semiconductor structure according to claim 1, wherein: The first etching process and the second etching process are performed for the same time.

3. The method for manufacturing a semiconductor structure according to claim 1, wherein: The etching gas used in the first etching process and the second etching process is a mixed gas of methane, oxygen and argon.

4. The method for manufacturing a semiconductor structure according to claim 3, wherein: The flow rate of the methane is 50 SCCM to 250 SCCM, the flow rate of the oxygen is 10 SCCM to 30 SCCM, and the flow rate of the argon gas is 0 SCCM to 200 SCCM.

5. The method for manufacturing a semiconductor structure according to claim 1, wherein: The pressure of the pumping process is 40mT to 80MT.

6. The method for manufacturing a semiconductor structure according to claim 5, wherein: The etching gases in the pump-out process are oxygen and argon.

7. The method for manufacturing a semiconductor structure according to claim 6, wherein: The flow rate of the oxygen gas is 20 SCCM to 100 SCCM, and the flow rate of the argon gas is 50 SCCM to 200 SCCM.

8. The method for manufacturing a semiconductor structure according to claim 1, wherein: The metal layer includes a first metal layer and a second metal layer sequentially formed on the substrate; While performing a second etching process on the oxide layer, the method further includes: etching the second metal layer so that the trench extends at least to the second metal layer.

9. A semiconductor structure, characterized in that The semiconductor structure is manufactured according to the method for manufacturing the semiconductor structure according to any one of claims 1 to 8.

Citation Information

Patent Citations

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