A high-speed, low-latency, and low-power active noise controller

By designing a high-speed, low-latency, low-power active noise controller with dual-core control of ARM and DSP, the problem of real-time computing requirements and high cost in complex reverb fields in the prior art is solved, and low-latency, high-latency Frequency noise reduction and low power consumption effects.

CN115494775BActive Publication Date: 2025-01-14NANJING UNIV
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Patent Information

Application Number
CN202211186488.2
Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
Filing Date
2022-09-27
Publication Date
2025-01-14
Estimated Expiration
2042-09-27

AI Technical Summary

Technical Problem

The existing active noise controllers cannot meet the real-time computing requirements in complex reverberation fields, and are costly or have large power consumption, so they cannot take into account high-speed noise reduction, low latency and low power consumption.

Method used

Design a high-speed, low-delay, low-power active noise controller including power supply module, multi-channel signal path module, multi-channel high-speed signal processing module and multi-channel amplifier output module. It adopts dual-core control mechanism of ARM and DSP, and the main frequency is not Below 456MHz, low-pass filtering circuit and differential output amplifier are configured, and NAND Flash storage is used to achieve the extraction and cancellation of noise signals under complex sound fields, with static power consumption not exceeding 1W.

Benefits of technology

It realizes low latency and high frequency noise reduction under complex sound fields, low system delay and low power consumption, and is suitable for broadband active noise reduction in daily wear, meeting the needs of real-time computing and lightweight and portable.

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Patent Text Reader

Abstract

A high-speed, low-latency, low-power active noise controller, characterized in that it includes a power supply module, a multi-channel signal path module, a multi-channel high-speed signal processing module, a multi-channel power amplifier output module, and a storage module, which can realize the extraction and elimination of noise signals in complex sound fields; the power supply module provides three-speed DC voltages of 3.3V, 1.8V, and 1.3V for other modules of the circuit; the multi-channel signal path module is responsible for analog-to-digital conversion and digital-to-analog conversion of the signal, and the microphone signal is output and connected to the multi-channel high-speed signal processing module after analog-to-digital conversion; the multi-channel high-speed signal processing module is responsible for running the active noise control algorithm, and the algorithm is output to the multi-channel power amplifier output module after digital-to-analog conversion; the multi-channel power amplifier output module adopts differential output; the data storage module is used to store data and execute algorithm programs; the present invention is significantly characterized in that it has a high working main frequency, low system latency, low power consumption, and is light and easy to carry, and is suitable for broadband active noise reduction in daily wear.
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Description

Technical Field

[0001] The present invention relates to an active noise control device, and in particular to high-speed, low-delay and low-power consumption active noise control. Technical Background

[0002] Noise has always been one of the important problems faced by people. Noise pollution has caused many inconveniences to people's production and life. High-intensity noise harms people's bodies, makes people feel tired, produces negative emotions, and even causes diseases. It not only damages people's hearing, but also has different degrees of impact on the nervous system, cardiovascular system, endocrine system, digestive system, vision, intelligence, etc. At the same time, noise pollution is also a kind of environmental pollution. It has become a major hazard to mankind. It is listed as one of the four major public hazards by the United Nations along with water pollution, air pollution and garbage pollution.

[0003] To this end, a series of noise control methods have been proposed. The traditional noise control method is to use passive technology to hinder the propagation of noise by adding sound-absorbing or sound-insulating materials, such as sealing and shielding to reduce noise. Passive silencers are highly praised for their good attenuation ability at high frequencies, but their disadvantages are that they are bulky and not very effective at low frequencies.

[0004] The principle of active noise control (ANC) is to add sound waves with the same amplitude and opposite phase as the noise into the sound field, superimpose and cancel each other with the noise source to achieve noise reduction. The advantages of this method are good noise reduction effect in the low and medium frequency bands and light system. As the performance and reliability of active noise control systems continue to improve and costs continue to decrease, the practical application of active noise control technology has developed rapidly.

[0005] Active noise control is actually a real-time application of adaptive filters with a large number of calculations, and only 1-2ms is allowed to complete the entire calculation process. Therefore, the active noise controller must consider the real-time performance and low power consumption of the system when designing. At present, the controllers that are widely used in the field of active noise control are ARM, DSP, and FPGA. The ARM series platform takes into account both control interface and data processing, but the working frequency of the Contex-M core is mostly lower than 400MHz, which cannot meet the real-time computing requirements under complex reverberation fields. Although the main frequency of the Contex-A series can reach 2GHz, the cost is relatively high; the DSP series platform has strong data processing capabilities, and the working main frequency can reach up to 500MHz, but its control interface resources are less than ARM; FPGA has strong parallel data processing capabilities and realizes complex logic, mainly focusing on operations with strong parallelism and single data, such as anti-aliasing filtering, but its working main frequency is around 200MHz, which is not suitable for complex real-time operations. Therefore, it is necessary to develop an active noise controller that takes into account real-time high-speed noise reduction operations and has multiple interfaces. Summary of the invention

[0006] In order to overcome the above-mentioned deficiencies in the prior art, the present invention proposes a high-speed, low-latency and low-power active noise controller.

[0007] In order to achieve the above-mentioned invention object, the technical solution proposed by the present invention is:

[0008] A high-speed, low-latency, low-power active noise controller, characterized in that: it includes a power supply module, a multi-channel signal path module, a multi-channel high-speed signal processing module, a multi-channel power amplifier output module, and a storage module, which can realize the extraction and elimination of noise signals in complex sound fields, and the static power consumption does not exceed 1W; the power supply module adopts 5V power supply, which can provide 3.3V, 1.8V, and 1.3V three-speed DC voltage for other modules of the circuit, and the power supply design takes effective measures to suppress the startup current surge, and the startup process will not affect the power supply and other equipment; the multi-channel signal path module is responsible for the analog-to-digital conversion and digital-to-analog conversion of the signal, and each channel is equipped with a low-pass filter circuit, and has a microphone drive unit, which can control the microphone at 48kHz-192kHz After analog-to-digital conversion, the wind signal output is connected to a multi-channel high-speed signal processing module, with a delay of no more than 50μs under 192kHz analog-to-digital conversion, and the algorithm output of the multi-channel high-speed signal processing module can be output to the multi-channel power amplifier output module according to 48kHz-192kHz digital-to-analog conversion, with a delay of no more than 70μs under 192kHz digital-to-analog conversion; the multi-channel high-speed signal processing module adopts a dual-core control mechanism of ARM and DSP, with a main frequency of no less than 456MHz, and is responsible for running the active noise control algorithm, and the algorithm is output to the multi-channel signal acquisition module; the multi-channel power amplifier output module adopts differential output, the positive end of the differential output is connected to the positive end of the speaker, and the negative end of the differential output is connected to the negative end of the speaker; the data storage module is implemented with NAND Flash, which is used to store data and execute algorithm programs.

[0009] Furthermore, the number of channels of the multi-channel signal path module is greater than or equal to 4.

[0010] Furthermore, the number of channels of the multi-channel power amplifier output module is greater than or equal to 2.

[0011] Furthermore, the multi-channel high-speed signal processing module runs an active noise control algorithm, including but not limited to a feedforward algorithm, a feedback algorithm, a feedforward hybrid algorithm, and a virtual noise reduction sensing algorithm.

[0012] Furthermore, the multi-channel signal path module adopts a dedicated audio codec, built-in 24-bit ADC and DAC, a sampling rate of up to 192kHz, and a built-in gain-controllable amplifier, and the signal gain can be adjusted through software. The multi-channel high-speed signal processing module communicates with the multi-channel signal path module using the I2C protocol, and data transmission uses the I2S audio transmission protocol.

[0013] Furthermore, the multi-channel high-speed signal processing module adopts an ARM core and a DSP core dual-core control mechanism, with a working main frequency of up to 456MHz, wherein the ARM core is responsible for system control and the DSP core is responsible for real-time data calculation.

[0014] Furthermore, the power supply module is powered by 5V and has three DC voltage output interfaces, providing 3.3V, 1.8V, and 1.3V DC voltages for the circuit.

[0015] Furthermore, the multi-channel power amplifier output module adopts a Class D audio power amplifier, adopts a differential output mode, has an anti-distortion function, and can detect and suppress output signal distortion caused by excessive input signal amplitude.

[0016] Furthermore, the storage module adopts NAND Flash, and contains a storage space of no less than 1024 megabytes in a 16-bit wide data I / O.

[0017] The high-speed, low-latency, and low-power active noise controller proposed in the present invention has the remarkable characteristics of high operating main frequency, low system latency, low power consumption, and lightness and portability, and is suitable for broadband active noise reduction in daily wear. BRIEF DESCRIPTION OF THE DRAWINGS

[0018] Figure 1 This is a block diagram of the active noise controller of the present invention.

[0019] Figure 2 It is a schematic diagram of connecting the multi-channel high-speed signal processing module with the multi-channel signal path module.

[0020] Figure 3 This is the delay test result of the active noise controller of the present invention. DETAILED DESCRIPTION

[0021] To further illustrate the effects of the present invention in detail, the present invention will be described in detail below in conjunction with specific embodiments, but the following embodiments are only illustrative and not restrictive.

[0022] A high-speed, low-latency, low-power active noise controller, characterized by comprising a power supply module, a multi-channel signal path module, a multi-channel high-speed signal processing module, a multi-channel power amplifier output module, and a storage module. Figure 1 The block diagram of the active noise controller of the present invention; the power supply module adopts 5V power supply, which can provide 3.3V, 1.8V, 1.3V three-speed DC voltage for other modules of the circuit, and the power supply design takes effective measures to suppress the startup current surge, and the startup process will not affect the power supply and other equipment; the multi-channel signal path module adopts a dedicated audio codec, which is responsible for the analog-to-digital conversion and digital-to-analog conversion of the signal, and each channel is equipped with a low-pass filter circuit and a microphone drive unit. The communication mode of the multi-channel high-speed signal processing module and the multi-channel signal path module adopts the I2C protocol, and the data transmission mode adopts the I2S audio transmission protocol. Figure 2The multi-channel signal path module is a schematic diagram of the data transmission interface connection between the multi-channel signal path module and the multi-channel high-speed signal processing module. The multi-channel signal path module converts the microphone signal into digital form at a sampling rate of 192kHz and then outputs the converted signal to the multi-channel high-speed signal processing module. The algorithm output of the multi-channel high-speed signal processing module is converted into digital form at 192kHz and then output to the multi-channel power amplifier output module. The multi-channel high-speed signal processing module adopts a dual-core control mechanism of ARM and DSP, in which the ARM core is responsible for system control and the DSP core is responsible for real-time data calculation. The dual-channel FxLMS centralized control noise reduction algorithm is operated at a main frequency of 456MHz, and the algorithm operation rate is 24kHz. The algorithm is output to the multi-channel signal power amplifier output module. The multi-channel power amplifier output module adopts an audio power amplifier, adopts a differential output mode, has an anti-distortion function, can detect and suppress the output signal distortion caused by excessive input signal amplitude, the positive end of the differential output is connected to the positive end of the speaker, and the negative end of the differential output is connected to the negative end of the speaker. The data storage module adopts NANAD Flash, with 1024 megabytes of storage space in 16-bit wide data I / O, is used to store noise reduction data and execute algorithm programs; the delay does not exceed 50μs at 192kHz digital-to-analog conversion, and the system delay does not exceed 70μs at 192kHz analog-to-digital conversion. Figure 3 This is the delay test result of the active noise controller of the present invention. The oscilloscope shows that the overall delay of the system is 128μs, which meets the design indicators within the allowable error range. The active noise controller of the present invention is powered by a 5V voltage regulator. When the algorithm is not started, the current is 148mA, that is, the static power consumption is 0.74W, and the static power consumption of the system does not exceed 1W.

Claims

1. A high-speed, low-latency, low-power active noise controller, characterized in that: It includes a power supply module, a multi-channel signal path module, a multi-channel high-speed signal processing module, a multi-channel power amplifier output module, and a storage module. It can realize the extraction and elimination of noise signals in complex sound fields, and the static power consumption does not exceed 1W; the power supply module adopts 5V power supply, which can provide 3.3V, 1.8V, and 1.3V three-speed DC voltage for other modules of the circuit, and the power supply design takes effective measures to suppress the startup current surge, and the startup process will not affect the power supply and other equipment; the multi-channel signal path module is responsible for the analog-to-digital conversion and digital-to-analog conversion of the signal. Each channel is equipped with a low-pass filter circuit and has a microphone drive unit. The microphone signal is converted into digital form at 48kHz-192kHz and then output and connected to the The multi-channel high-speed signal processing module has a delay of no more than 50μs under 192kHz analog-to-digital conversion, and the algorithm output of the multi-channel high-speed signal processing module can be output to the multi-channel power amplifier output module according to 48kHz-192kHz digital-to-analog conversion, with a delay of no more than 70μs under 192kHz digital-to-analog conversion; the multi-channel high-speed signal processing module adopts a dual-core control mechanism of ARM and DSP, with a main frequency of no less than 456MHz, and is responsible for running the active noise control algorithm, and the algorithm is output to the multi-channel signal acquisition module; the multi-channel power amplifier output module adopts differential output, the positive end of the differential output is connected to the positive end of the speaker, and the negative end of the differential output is connected to the negative end of the speaker; the data storage module is implemented with NAND Flash, which is used to store data and execute algorithm programs.

2. A high-speed, low-latency, low-power active noise controller according to claim 1, characterized in that: The number of channels of a multi-channel signal path module is greater than or equal to 4.

3. A high-speed, low-latency, low-power active noise controller according to claim 1, characterized in that: The number of channels of the multi-channel power amplifier output module is greater than or equal to 2.

4. The high-speed, low-latency, low-power active noise controller according to claim 1, characterized in that: The multi-channel high-speed signal processing module runs active noise control algorithms, including but not limited to feedforward algorithms, feedback algorithms, feedforward-feedback hybrid algorithms, and virtual noise reduction sensing algorithms.

5. The high-speed, low-latency, low-power active noise controller according to claim 1, characterized in that: The multi-channel signal path module uses a dedicated audio codec, built-in 24-bit ADC and DAC, a sampling rate of up to 192kHz, and a built-in gain-controllable amplifier. The signal gain can be adjusted through software. The multi-channel high-speed signal processing module communicates with the multi-channel signal path module using the I2C protocol, and data transmission uses the I2S audio transmission protocol.

6. A high-speed, low-latency, low-power active noise controller according to claim 1, characterized in that: The multi-channel high-speed signal processing module adopts an ARM core and a DSP core dual-core control mechanism, with an operating frequency of up to 456MHz. The ARM core is responsible for system control and the DSP core is responsible for real-time data calculation.

7. The high-speed, low-latency, low-power active noise controller according to claim 1, characterized in that: The power supply module is powered by 5V and has three DC voltage output interfaces, providing 3.3V, 1.8V, and 1.3V DC voltages for the circuit.

8. The high-speed, low-latency, low-power active noise controller according to claim 1, characterized in that: The multi-channel power amplifier output module adopts a Class D audio power amplifier with a differential output mode and has an anti-distortion function. It can detect and suppress output signal distortion caused by excessive input signal amplitude.

9. The high-speed, low-latency, low-power active noise controller according to claim 1, characterized in that: The storage module uses NAND Flash and contains no less than 1024 megabytes of storage space in a 16-bit wide data I / O.

Citation Information

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