A digital-analog hybrid synchronous rectification control method suitable for LLC resonant circuit

Abstract

The application is a digital-analog mixed synchronous rectification control method suitable for LLC resonant circuit. Firstly, the rising edge of the gate voltage of the main switch tube of the LLC main topology is detected in the state detection module. When the rising edge comes, the state of the counter in the state detection module is changed, so that the voltage sampling circuit detects the voltage across the synchronous rectification tube in the N main switch tube periods, N is 3 to 30, and the voltage after the integral operation processing of the output analog circuit is output. The voltage comparison module reads the output of the voltage sampling circuit and compares it with the initial value to adjust the duty cycle of the synchronous rectification tube in the next period. Finally, the adaptive synchronous rectification tube turn-off module turns off the rectification tube (SR2), and the turn-on time of the rectification tube is synchronized with the main switch tube (Q1) of the switching power supply. The technical problems of high component cost and low reliability existing in the existing LLC adaptive synchronous rectification scheme are solved.

Description

Technical Field

[0001] This invention relates to switching power supplies, and more particularly to a hybrid analog-digital synchronous rectification control method suitable for LLC resonant circuits, belonging to the technical field of power generation, transformation, or distribution. Background Technology

[0002] In modern power electronics technology, with increasingly fierce competition in the switching power supply market and rising user demands, DC-DC converters sometimes require higher power densities to meet user switching needs. However, increasing power density is limited by the size of passive components. High-frequency operation can significantly reduce the size of passive components, such as transformers and filters. However, increasing the operating frequency inevitably increases switching losses. But at the same efficiency, the higher the power density of a DC-DC converter, the more heat is dissipated per unit volume, which is detrimental to the converter's heat dissipation. Therefore, to further improve the power density of DC-DC converters, their operating efficiency must be further improved.

[0003] Among the various DC-DC converter topologies, resonant converters have gained widespread attention and research in the field of high-frequency power conversion due to their ability to achieve soft switching, effectively reduce switching losses, and allow for high-frequency operation. LLC resonant converters are increasingly popular in their half-bridge implementations due to their high efficiency, low EMI emissions, and ability to achieve high power density. In an LLC resonant converter, the DC supply voltage is converted into a square wave voltage through a switching network, then transformed into a sine wave through a resonant network, and finally output as the required DC voltage through a rectifier and filter circuit.

[0004] Synchronous rectification is a technique to further improve the efficiency of DC-DC converters, especially in low-voltage, high-current applications. Synchronous rectification improves efficiency by replacing rectifier diodes in the DC-DC converter with MOSFETs, which have lower on-resistance. While the effectiveness of synchronous rectification in improving DC-DC converter efficiency is undeniable, the use of MOSFETs instead of diodes necessitates the design of a MOSFET driver circuit, increasing circuit complexity. Furthermore, the cost of MOSFETs used in synchronous rectification is often higher than that of diodes; therefore, efficiency and cost must be considered comprehensively when designing a DC-DC converter.

[0005] There are currently two main driving methods for synchronous rectifier diodes: current-driven and voltage-driven.

[0006] Current-driven: The rectifier MOSFET should be on whenever current flows through the device, and off when the current drops to zero. Therefore, the most direct way to drive a synchronous rectifier is to directly detect the current flowing through it. This method accurately meets all operating regions, but in applications requiring high efficiency and high power density, detecting the current across the rectifier MOSFET requires a bulky and lossy current transformer, increasing circuit complexity and converter size, making it less of a preferred driving method. Alternatively, another method involves detecting the resonant inductor current and the magnetizing inductor current, which can deduce the rectifier MOSFET current and generate a corresponding drive signal. However, decoupling the magnetizing inductor current from the resonant inductor current is not easy and also requires complex circuitry.

[0007] Voltage-driven: This is currently the mainstream method for driving rectifier MOSFETs. It generates a drive signal by detecting the voltage across the rectifier MOSFET. The switching state of the rectifier MOSFET can be identified by comparing it with a pre-designed threshold voltage. Due to the small-signal characteristics of the voltage across the synchronous rectifier MOSFET, it is sensitive to circuit parasitics and noise, thus reducing system reliability. The presence of parasitic inductance also leads to a significant duty cycle loss, causing the rectifier MOSFET to turn off prematurely.

[0008] To achieve precise turn-off of a voltage-driven synchronous rectifier MOSFET, an adaptive synchronous rectification scheme can be employed. The basic idea behind existing adaptive synchronous rectification schemes is to detect the conduction state of the body diode at the turn-off moment. If the body diode conducts after the synchronous rectifier is turned off, the duty cycle of the synchronous rectifier will increase by a small step ΔD in the next switching cycle to minimize duty cycle loss. This adjustment will continue cyclically. When no body diode is conducting, the duty cycle will decrease by ΔD in the next switching cycle to avoid delayed turn-off. This implementation typically requires a high-speed comparator and a digital controller, resulting in high cost. Furthermore, adjusting the duty cycle cycle by cycle based on the voltage signal in each cycle makes it susceptible to noise and circuit parasitics, leading to low reliability. Summary of the Invention

[0009] Technical Problem: The purpose of this invention is to address the shortcomings in the aforementioned background technology by providing a mixed-signal synchronous rectification control method suitable for LLC resonant circuits, thus solving the technical problems of high component cost and low reliability in existing LLC adaptive synchronous rectification schemes.

[0010] Technical Solution: This invention provides a mixed-signal synchronous rectification control method for LLC resonant circuits. First, the rising edge of the gate voltage of the main switch transistor in the LLC main topology is detected in the state detection module. When the rising edge arrives, the state of the counter in the state detection module is changed, causing the voltage sampling circuit to detect the voltage across the synchronous rectifier transistor during N main switch transistor cycles, where N ranges from 3 to 30, and outputs the voltage processed by the analog circuit integration operation. The voltage comparison module reads the output of the voltage sampling circuit and compares it with the initial value to adjust the duty cycle of the synchronous rectifier transistor in the next cycle. Finally, the rectifier transistor is turned off by the adaptive synchronous rectifier transistor turn-off module, and the turn-on time of the rectifier transistor is synchronized with the main switch transistor of the switching power supply.

[0011] The state detection module consists of a counter and combinational logic circuits. The state detection module changes the value of the counter by detecting the rising edge of the gate drive voltage of the main switch transistor in the LLC topology. The initial value of the counter is set to 0, and the maximum value is N. When the counter value is 0, the voltage sampling circuit is controlled to start sampling the voltage across the secondary synchronous rectifier. Then, the counter value is incremented by one for each voltage rising edge detected. When the counter value reaches N, the voltage sampling circuit is controlled to stop sampling. In the (N+1)th cycle, the enable voltage comparison module is controlled to read the output voltage value of the voltage sampling circuit, the counter value is set to 0, and the next cycle begins.

[0012] The voltage sampling circuit is composed of analog circuitry, including diodes, a first NMOS transistor, a second NMOS transistor, a third NMOS transistor, a comparator, a capacitor, and a resistor. The voltage sampling circuit is controlled by a state detection module. When the state detection module enables the voltage sampling circuit to start sampling, the voltage across the secondary-side synchronous rectifier is input to the voltage sampling circuit. This voltage is compared with the threshold voltage of the body diode by the first comparator, and a positive pulse is output. This pulse drives the first NMOS transistor through the second comparator, thereby converting the voltage calculation into a current calculation through deep negative feedback. The capacitor is then charged through a current mirror. Thus, during the state detection module's enable cycle, the capacitor continuously calculates and stores the detected signal voltage. When the state detection module reaches the (N+1)th cycle, the voltage comparison module reads the capacitor voltage value. After adjusting the duty cycle of the synchronous rectifier for the next cycle, it enables the NMOS transistor at the capacitor terminal to discharge the capacitor, causing the capacitor voltage value to be cleared to zero after the state detection module enters the next cycle.

[0013] The voltage comparison module consists of a comparator and a digital controller. After receiving the enable signal from the state detection module, the voltage comparison module reads the capacitor voltage value of the voltage sampling circuit and compares the capacitor voltage value Vout with the preset voltage value Vx. If the capacitor voltage value is greater than the preset value, the voltage comparison module enables the adaptive synchronous rectifier turn-off module, so that in the next synchronous rectifier conduction cycle, the duty cycle of the synchronous rectifier is increased by a small step ΔD, i.e., D[n] = D[n-1] + ΔD. If the capacitor voltage value is less than the preset value, the voltage comparison module enables the adaptive synchronous rectifier turn-off module, so that in the next synchronous rectifier conduction cycle, the duty cycle of the synchronous rectifier is decreased by a small step ΔD, i.e., D[n] = D[n-1] - ΔD. Then, the voltage comparison module enables the NMOS gate of the output capacitor of the sampling circuit, so that the output capacitor discharges and the capacitor voltage value is cleared to zero.

[0014] The adaptive synchronous rectifier turn-off module controls the turn-off time of the synchronous rectifier in the LLC circuit based on the enable signal of the voltage comparison module. If a decrease in duty cycle is required, the synchronous rectifier is turned off earlier; conversely, if an increase in duty cycle is required, the synchronous rectifier is turned off later. The LLC main topology operates in CCM mode, which can keep the turn-on time of the synchronous rectifier synchronized with the turn-on of the main topology switch.

[0015] Beneficial effects: The present invention, employing the above technical solution, has the following advantages:

[0016] (1) This invention effectively reduces the sampling and turn-off losses of the synchronous rectifier circuit. Since the diode in the voltage sampling circuit is reverse-biased when the synchronous rectifier is on, there is no current in the voltage sampling circuit, and the sampling circuit does not operate. That is, the voltage sampling circuit only performs sampling operations when the synchronous rectifier is off, thus significantly reducing the losses of the voltage sampling circuit and achieving low-loss sampling. This invention adjusts the turn-off time of the synchronous rectifier based on the conduction time of the body diode after the synchronous rectifier is turned off within multiple cycles, thereby minimizing duty cycle losses and achieving low-loss turn-off.

[0017] (2) This invention employs a hybrid analog-digital synchronous rectification control method, which reduces the cost of the synchronous rectification circuit. In this invention, the voltage across the synchronous rectifier tube is detected by a voltage sampling circuit over multiple cycles. Compared to the method of detecting the voltage and adjusting the duty cycle in each cycle, the requirements for the digital controller and high-speed comparator are significantly reduced, allowing the use of low-cost digital controllers and comparators, thereby reducing the cost of the synchronous rectification circuit.

[0018] (3) This invention improves the reliability of the synchronous rectification detection and control circuit. Traditional methods detect the voltage and adjust the duty cycle in each cycle, which is susceptible to noise and electromagnetic interference. In this invention, the voltage sampling circuit detects the voltage across the synchronous rectifier tube in multiple cycles, effectively reducing the sensitivity to noise, and the initial voltage comparison value can be adjusted to take the influence of noise into account.

[0019] (4) The present invention adopts a voltage-driven synchronous rectification control method. The voltage across the synchronous rectifier tube is detected by a voltage sampling circuit within multiple cycles. The circuit is relatively simple and has high efficiency. Attached Figure Description

[0020] Figure 1 This is a structural block diagram of the control system of the present invention.

[0021] Figure 2 This is a flowchart of the state detection module of the present invention.

[0022] Figure 3 This is a circuit diagram of the voltage sampling circuit of the present invention.

[0023] Figure 4 This is a flowchart of the voltage comparison module of the present invention.

[0024] Figure 5 This is a structural diagram of the closed-loop network composed of the synchronous rectification system and the LLC resonant converter of this invention.

[0025] Figure 6 yes Figure 5 The waveform of the voltage sampling circuit of the closed-loop structure shown is in a steady state. Detailed Implementation

[0026] The technical solution of the invention will now be described in detail with reference to the accompanying drawings.

[0027] To achieve the above-mentioned objectives, this invention employs a mixed-signal synchronous rectification control method suitable for LLC resonant circuits, as follows:

[0028] First, the rising edge of the gate voltage of the main switch transistor in the LLC main topology is detected in the state detection module. When the rising edge arrives, the state of the counter in the state detection module is changed, so that the voltage sampling circuit detects the voltage across the synchronous rectifier transistor in these N main switch transistor cycles (N can be changed) and outputs the voltage after integration and processing by the analog circuit. The voltage comparison module reads the output of the voltage sampling circuit and compares it with the initial value to adjust the duty cycle of the synchronous rectifier transistor in the next cycle. Finally, the rectifier transistor is turned off by the adaptive synchronous rectification turn-off module. It should be noted that the turn-on time of the rectifier transistor is synchronized with the main switch topology.

[0029] A hybrid analog-digital synchronous rectification control system suitable for LLC resonant circuits includes: a state detection module, a voltage sampling circuit, a voltage comparison module, and an adaptive synchronous rectifier tube turn-off module. This control system is connected to the controlled synchronous rectifier tube in the main structure of the switching power supply to form a closed loop.

[0030] The status detection module consists of a digital controller. It changes the value of a counter in the module by detecting the rising edge of the gate drive voltage of the main switch transistor in the LLC topology. The initial value of the counter is set to 0, and the maximum value is N. When the counter value is initially 0, the voltage sampling circuit starts sampling the voltage across the secondary synchronous rectifier diode. Each time a voltage rising edge is detected, the counter value is incremented. When the counter value reaches N, the voltage sampling circuit stops sampling. In the (N+1)th cycle, the enable voltage comparison module reads the output voltage value of the voltage sampling circuit, sets the counter value to 0, and enters the next cycle.

[0031] The voltage sampling circuit is composed of analog circuitry, including diodes, MOSFETs, comparators, capacitors, and resistors. Controlled by the state detection module, when the state detection module enables the voltage sampling circuit to start sampling, the voltage across the secondary-side synchronous rectifier is input to the voltage sampling circuit. This voltage is compared with the threshold voltage of the body diode by the first comparator, and a positive pulse is output. This pulse drives the NMOS transistor through the second comparator, thereby converting the voltage calculation into a current calculation through deep negative feedback. The capacitor is then charged through a current mirror. Thus, during the state detection module's enable cycle, the capacitor continuously calculates and stores the detected signal voltage. When the state detection module reaches the (N+1)th cycle, the voltage comparison module reads the capacitor voltage value and, after adjusting the duty cycle of the synchronous rectifier for the next cycle, enables the NMOS transistor at the output capacitor to discharge the capacitor, causing the capacitor voltage value to be reset to zero after the state detection module enters the next cycle.

[0032] The voltage comparison module consists of a comparator and a digital controller. After receiving an enable signal from the state detection module, the voltage comparison module reads the capacitor voltage value from the voltage sampling circuit and compares it with the preset voltage value Vx. If the capacitor voltage value is greater than the preset value, the voltage comparison module enables the adaptive synchronous rectification shutdown module, causing the duty cycle of the synchronous rectifier to increase by a small step ΔD in the next synchronous rectifier conduction cycle, i.e., D[n] = D[n-1] + ΔD. If the capacitor voltage value is less than the preset value, the voltage comparison module enables the adaptive synchronous rectification shutdown module, causing the duty cycle of the synchronous rectifier to decrease by a small step ΔD in the next synchronous rectifier conduction cycle, i.e., D[n] = D[n-1] - ΔD. Then, the voltage comparison module enables the NMOS gate of the output capacitor of the sampling circuit, causing the output capacitor to discharge and the capacitor voltage value to be cleared to zero.

[0033] The adaptive synchronous rectifier turn-off module controls the turn-off time of the synchronous rectifier in the LLC circuit based on the enable signal from the voltage comparator module. If a decrease in duty cycle is required, the synchronous rectifier is turned off earlier; conversely, if an increase in duty cycle is required, the synchronous rectifier is turned off later. The LLC main topology operates in CCM mode, which keeps the turn-on time of the synchronous rectifier synchronized with the turn-on time of the main topology switch.

[0034] like Figure 1 As shown, the hybrid analog-digital synchronous rectification control system for LLC resonant circuits of this invention includes a switching power supply main topology, a state detection module, a voltage sampling circuit, a voltage comparison module, and an adaptive synchronous rectification turn-off module. The figure also illustrates the signal transmission and control relationships between the modules.

[0035] Figure 2 This is a flowchart of the state detection module. For example, N=3 is chosen in the diagram, meaning the voltage sampling circuit samples the voltage across the synchronous rectifier diodes of the main circuit over three cycles. In practice, N can be chosen to be a larger value to further reduce the speed requirements on the high-speed comparator and digital controller. At the start of each cycle, the flip-flop in the state detection module detects the rising edge of the gate drive voltage of the LLC topology main switch. After detecting the rising edge, the module counter value M is checked to see if it equals 0. If it equals 0, it means this is the first cycle of one period. At this time, the digital controller of the state detection module activates the digital switch of the voltage sampling module, causing the voltage sampling module to start sampling the voltage across the synchronous rectifier diodes on the secondary side of the LLC topology. If M is not equal to 0, it indicates that it is a subsequent cycle of one period, and the above operation is not required. After the judgment is completed, the counter value M changes to M+1. At this time, it is judged whether M is equal to 4. If it is not equal to 4, it means that the target of sampling the voltage value of the synchronous rectifier for three cycles has not been reached, and the rising edge of the gate voltage of the main switch is detected. If M is equal to 4, it means that the main switch has passed three cycles, and the voltage sampling circuit has sampled the voltage across the synchronous rectifier for three cycles. At this time, the digital controller turns off the digital switch of the voltage sampling circuit to stop sampling, and controls the voltage comparison module to read the output voltage of the voltage sampling circuit. All the above operations are completed in the fourth cycle. Then, the value M of the internal counter of the after-state detection module is set to 0, so as to enter the next cycle and continue to detect the rising edge of the gate drive voltage of the main switch of the LLC topology.

[0036] Figure 3 This is a simplified circuit diagram of the voltage sampling circuit in this invention. Figure 6 for Figure 5The waveform of the voltage sampling circuit in the steady state of the closed-loop structure shown can be analyzed by combining the two. The input signal is the voltage across the synchronous rectifier diode. There is also a digital switch controlled by the state detection module digital controller before the input. As mentioned above, when the state detection module turns on the digital switch, the voltage across the synchronous rectifier diode is clamped at the negative body diode voltage drop because the body diode of the synchronous rectifier diode is conducting. Therefore, at the input of the voltage sampling circuit, current flows through VDD, R1, and D. a A path is formed, where the value of R1 can be chosen to be relatively large to reduce sampling loss. After the path is formed, the voltage value at the lower end of R1 is compared with the preset turn-on threshold voltage. The output voltage after passing through the first comparator is V1, and the waveform of V1 is as follows. Figure 6 As shown, after the rising edge of the main switch voltage arrives, the body diode of the synchronous rectifier diode conducts first, V ds If the voltage is below the threshold voltage, the first comparator outputs a high level, such as... Figure 6 This is reflected in V1; similarly, when the main switch is about to turn off, the adaptive synchronous rectification turn-off module controls the synchronous rectification transistor to turn off in advance, causing the body diode to conduct, V ds When the voltage is below the threshold voltage, V1 will also generate a high level.

[0037] To further process the positive voltage pulse signal of V1, it is connected to a second comparator and Q. a In a deep negative feedback circuit composed of switching transistors, the positive input is connected to V1. When a positive pulse arrives, the second comparator outputs a high level, causing Q to... a The NMOS transistor turns on, allowing current to flow through R2. The voltage across R2 increases, which is then connected to the inverting terminal of the comparator, creating negative feedback. Therefore, the voltage across R2 stabilizes at V1, thus converting the pulse voltage into a current. Q a The upper part is a current mirror composed of Q2PMOS and Q3PMOS, which maintains Q during operation. b and Q c On, therefore when Q a When the circuit is turned on, the converted current is mirrored to Q through a current mirror. c The output port is connected to charge the output capacitor C1. Since the current mirror can be considered a constant current source, the waveform of capacitor charging is linearly related to time. Therefore, during the sampling of the synchronous rectifier tube by the voltage sampling circuit, V... ds The positive pulse converted into V1 is then converted into a voltage V across the output capacitor C1. out .like Figure 6 As shown, V out The rise in voltage varies with the width of the positive pulse V1, thus achieving a linear conversion. The module detection circuit controls the voltage comparison module to read V1. outThis value is output at the specified time. After the duty cycle is adjusted, the digital controller of the voltage comparator module enables the gate voltage V of Q4NMOS. w The signal is high, which in turn turns on Q4 to discharge capacitor C1. The waveform is as follows: Figure 6 As shown, it can be seen that in the first three cycles, V out The value increases linearly as the body diode of the synchronous rectifier diode conducts. After reading V in the fourth cycle... out From now on, V out The value is discharged through Q4, so that the capacitor voltage value is cleared to zero after the state detection module enters the next cycle. In practical applications, a suitable capacitor can be selected according to different N cycle values.

[0038] Figure 4 This is a flowchart of the voltage comparison module in this invention. In one cycle, it checks whether the digital controller of the status detection module sends an enable signal. If an enable signal is detected, it reads the output voltage value V from the voltage sampling circuit. out , will V out With V x In contrast, the above discussion pointed out that the turn-on time of the synchronous rectifier is synchronized with the turn-on time of the main switch, which will inevitably result in conduction losses. Therefore, V x A minimum value greater than 0 needs to be preset. This corresponds to the output capacitor voltage value sampled by the voltage sampling circuit over N cycles when there is only conduction loss. Ideally, V should be continuously decreased. out Make it infinitely close to V x This eliminates shutdown losses, but in practice it's best to maintain V. out Slightly greater than V x This avoids delayed turn-off issues. The adaptive synchronous rectifier turn-off module can control the turn-off time of the synchronous rectifier in the LLC circuit based on the enable signal from the voltage comparator module. Therefore, for V out and V x After comparison, if V out Greater than V x If V is controlled, the adaptive synchronous rectification turn-off module will delay turning off the synchronous rectifier in the next cycle, thereby increasing the duty cycle of the synchronous rectifier; out Less than V x The adaptive synchronous rectification turn-off module then turns off the synchronous rectifier diode earlier in the next cycle, thereby reducing the duty cycle of the synchronous rectifier diode and avoiding premature turn-off. Afterwards, the voltage comparator module enables the gate of Q4 in the voltage sampling module, turning Q4 on and thus outputting the capacitor voltage V. out Discharge occurs, thus initiating the next cycle. Figure 6 It can be seen that after adjusting the duty cycle, the pulse width of V1 in the next N cycles is significantly reduced compared to the previous N cycles, thus giving V... outThe charging time of the capacitor is also reduced accordingly, V out The final output level drops as follows Figure 6 As shown.

[0039] Figure 5 This is a structural diagram of the closed-loop network composed of the hybrid analog-digital synchronous rectification system and the LLC resonant converter of this invention. The synchronous rectification system of this invention can also be used in other types of switching power supply circuit structures. The LLC resonant converter example has an input of 220V and an output of 20V. The state detection module detects the rising edge of the gate voltage of the main switch to enable the digital switch of the voltage sampling circuit to sample the source-drain voltage of the synchronous rectifier, and changes the state of the counter. At the (N+1)th cycle, the sampling circuit stops sampling, and the voltage comparison module is enabled to read the sampling capacitor voltage value. The comparison module compares the sampled voltage value with a preset value to determine the turn-off time of the synchronous rectifier in the next cycle and the following N cycles. An adaptive synchronous rectification turn-off module is used for adjustment, and then the capacitor voltage value of the sampling circuit is cleared. The state detection circuit then enters a new cycle.

[0040] The above description, in conjunction with specific preferred embodiments, provides a further detailed explanation of the present invention. It should not be construed that the specific implementation of the invention is limited to these descriptions. Many variations of the invention described herein are possible, and such variations should not deviate intentionally from the spirit and scope of the invention. Therefore, all modifications that are obvious to those skilled in the art should be included within the scope of the claims.

Claims

1. A mixed-signal synchronous rectification control method suitable for LLC resonant circuits, characterized in that... The control method is as follows: First, the rising edge of the gate voltage of the main switch transistor in the LLC main topology is detected in the state detection module. When the rising edge arrives, the state of the counter in the state detection module is changed, so that the voltage sampling circuit detects the voltage across the synchronous rectifier transistor in these N main switch transistor cycles, where N is 3 to 30, and outputs the voltage after integration by the analog circuit. The voltage comparison module reads the output of the voltage sampling circuit and compares it with the initial value to adjust the duty cycle of the synchronous rectifier transistor in the next cycle. Finally, the adaptive synchronous rectifier transistor turn-off module turns off the rectifier transistor (SR2), and the turn-on time of the rectifier transistor is synchronized with the main switch transistor (Q1) of the switching power supply. The state detection module consists of a counter and combinational logic circuits. The state detection module changes the value of the counter by detecting the rising edge of the gate drive voltage of the main switch of the LLC topology. The initial value of the counter is set to 0, and the maximum value is N. When the counter value is 0, the voltage sampling circuit is controlled to start sampling the voltage across the secondary synchronous rectifier. Then, the counter value is incremented by one for each voltage rising edge detected. When the counter value reaches N, the voltage sampling circuit is controlled to stop sampling. In the (N+1)th cycle, the enable voltage comparison module is controlled to read the output voltage value of the voltage sampling circuit, the counter value is set to 0, and the next cycle begins. The voltage comparison module consists of a comparator and a digital controller. After receiving the enable signal from the state detection module, the voltage comparison module reads the capacitor voltage value of the voltage sampling circuit and compares the capacitor voltage value Vout with the preset voltage value Vx. If the capacitor voltage value is greater than the preset value, the voltage comparison module enables the adaptive synchronous rectifier tube turn-off module, so that in the next synchronous rectifier tube (SR2) conduction cycle, the duty cycle of the synchronous rectifier tube is increased by a small step ΔD compared to the original, that is, D[n]=D[n-1]+ΔD. If the capacitor voltage is less than the preset value, the voltage comparison module enables the adaptive synchronous rectification shutdown module, so that in the next synchronous rectifier conduction cycle, the duty cycle of the synchronous rectifier is reduced by a small step ΔD, i.e., D[n]=D[n-1]-ΔD; then the voltage comparison module enables the NMOS gate of the output capacitor of the sampling circuit, so that the output capacitor discharges and the capacitor voltage is cleared to zero.

2. The mixed-signal synchronous rectification control method for LLC resonant circuits according to claim 1, characterized in that, The voltage sampling circuit is composed of analog circuits, including a diode (Da), a first NMOS transistor (Qa), a second NMOS transistor (Qb), a third NMOS transistor (Qc), a comparator, a capacitor, and a resistor. The voltage sampling circuit is controlled by the state detection module. When the state detection module enables the voltage sampling circuit to start sampling, the voltage across the secondary synchronous rectifier is input to the voltage sampling circuit. After being compared with the threshold voltage of the body diode (D1) by the first comparator (Camp1), a positive pulse is output. This pulse drives the first NMOS transistor (Qa) through the second comparator (Camp2), thereby converting the voltage calculation into the current calculation through deep negative feedback. The capacitor is then charged through the current mirror. Thus, during the enable cycle of the state detection module, the capacitor continuously calculates and stores the voltage of the detection signal. When the state detection module reaches the N+1th cycle, the voltage comparison module reads the capacitor voltage value. After adjusting the duty cycle of the synchronous rectifier in the next cycle, the NMOS transistor at the output capacitor terminal is enabled to discharge the capacitor, so that the capacitor voltage value is cleared to zero after the state detection module enters the next cycle.

3. The mixed-signal synchronous rectification control method for LLC resonant circuits according to claim 1, characterized in that, The adaptive synchronous rectifier turn-off module controls the turn-off time of the synchronous rectifier (SR2) in the LLC circuit according to the enable signal of the voltage comparison module. If a decrease in duty cycle is required, the synchronous rectifier is turned off earlier; conversely, if an increase in duty cycle is required, the synchronous rectifier (SR2) is turned off later. The LLC main topology operates in CCM mode, which can keep the turn-on time of the synchronous rectifier synchronized with the turn-on of the main topology switch.

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