electronic devices

Abstract

The present disclosure provides an electronic device, characterized in that, comprising: a substrate comprising an active region and a peripheral region adjacent to the active region; a plurality of spacers disposed in the active region and comprising a first spacer and a second spacer; a plurality of signal lines disposed on the substrate and extending along a first direction; a plurality of gate lines disposed on the substrate and extending along a second direction, wherein the first direction is different from the second direction; and a gate driving unit disposed in the active region and comprising a receiving switch component and a buffer switch component; wherein the receiving switch component is disposed corresponding to the first spacer and receives an input signal via a signal line of the signal lines, the buffer switch component is disposed corresponding to the second spacer and is electrically connected with the receiving switch component, wherein the buffer switch component outputs a scan signal to a gate line of the gate lines.

Description

TECHNICAL FIELD

[0001] The present disclosure provides an electronic device, in particular, an electronic device with a gate driving unit disposed in an active area. BACKGROUND

[0002] With the advancement of technology, electronic products are pursuing the trend of being light, thin, and small. In order to pursue a more delicate edge visual effect, manufacturers are committed to developing narrow frame designs to meet consumer needs.

[0003] Therefore, there is still a need to develop an electronic device that can achieve a narrow frame effect.

[0004] DISCLOSURE

[0005] Therefore, the present disclosure provides an electronic device, in particular, an electronic device with a gate driving unit disposed in an active area to achieve a narrow frame effect.

[0006] To achieve the above-mentioned purpose, the present disclosure provides an electronic device, characterized in that it comprises: a substrate comprising an active area and a peripheral area adjacent to the active area; a plurality of spacers disposed in the active area and comprising a first spacer and a second spacer; a plurality of signal lines disposed on the substrate and extending in a first direction; a plurality of gate lines disposed on the substrate and extending in a second direction, wherein the first direction is different from the second direction; and a gate driving unit disposed in the active area and comprising a receiving switch component and a buffer switch component; wherein the receiving switch component is disposed corresponding to the first spacer and receives an input signal through one of the signal lines, the buffer switch component is disposed corresponding to the second spacer and is electrically connected to the receiving switch component, wherein the buffer switch component outputs a scan signal to one of the gate lines. BRIEF DESCRIPTION OF DRAWINGS

[0007] Figure 1 Circuit diagram of the gate driving unit of an embodiment of the present disclosure.

[0008] Figure 2 Schematic diagram of an electronic device of an embodiment of the present disclosure.

[0009] Figure 3A And Figure 3B Top view of part of the active area of an electronic device of an embodiment of the present disclosure.

[0010] Figure 4 Top view of part of the active area of an electronic device of an embodiment of the present disclosure.

[0011] Figure 5 Top view of part of the active area of an electronic device of an embodiment of the present disclosure.

[0012] Figure 6 FIG. 1 is a schematic diagram of a portion of an active area of ​​an electronic device according to an embodiment of the present disclosure.

[0013] Figure 7A FIG. 1 is a schematic diagram of a portion of an active area of ​​an electronic device according to an embodiment of the present disclosure.

[0014] Figure 7B for Figure 7A Schematic cross-sectional view of line segment AA'.

[0015] Figure 8A and Figure 8B FIG. 1 is a schematic cross-sectional view of a portion of an active area of ​​an electronic device according to an embodiment of the present disclosure.

[0016] Figure 9 FIG. 1 is a top view of a portion of an active area of ​​an electronic device according to an embodiment of the present disclosure.

[0017] Figure 10 FIG. 1 is a top view of a portion of an active area of ​​an electronic device according to an embodiment of the present disclosure.

[0018] Figure 11 FIG. 1 is a schematic diagram of an active area of ​​an electronic device according to an embodiment of the present disclosure.

[0019] Description of Reference Numerals

[0020] 1: Substrate

[0021] 2: Spacer

[0022] 21: First spacer

[0023] 22: Second spacer

[0024] 3: Signal line

[0025] 4, 4A, 4B: Gate lines

[0026] 41: First line segment

[0027] 5, 51, 52: Data cable

[0028] 6: Touch signal line

[0029] 71: First insulation layer

[0030] 72: Second insulation layer

[0031] 73: The third insulation layer

[0032] 74: Fourth insulation layer

[0033] 8: Conductive layer

[0034] GD, GD1, GD2, GD3: Gate drive unit

[0035] T1 to T10: Switching components

[0036] T10-1: First sub-switch assembly

[0037] T10-2: Second sub-switch assembly

[0038] BM: light-shielding layer

[0039] AA: Active Area

[0040] N: surrounding area

[0041] P: sub-pixel unit

[0042] P1: first pixel unit

[0043] P2: Second pixel unit

[0044] P3: The third pixel unit

[0045] P11, P21, P31: first sub-pixel unit

[0046] P12, P22, P32: second sub-pixel unit

[0047] P13, P23, P33: third sub-pixel unit

[0048] R: red sub-pixel unit

[0049] G: Green sub-pixel unit

[0050] B: blue sub-pixel unit

[0051] G: Channel

[0052] X: First direction

[0053] Y: Second direction DETAILED DESCRIPTION

[0054] The following describes the implementation of the present disclosure through specific embodiments. Those skilled in the art will readily understand the other advantages and benefits of the present disclosure from the disclosure herein. The present disclosure may also be implemented or applied through other different specific embodiments, and the details in this specification may be modified and altered to accommodate different viewpoints and applications without departing from the spirit of the present invention.

[0055] It should be noted that, unless otherwise specified, "having a component" is not limited to having a single component, but may include one or more components. Furthermore, the use of ordinal numbers such as "first" and "second" in the specification and claims to modify claimed components does not in itself imply or represent any previous ordinal number of the claimed components, nor does it represent the order of one claimed component to another claimed component, or the order in the manufacturing method. The use of such ordinal numbers is only used to clearly distinguish a claimed component with a certain name from another claimed component with the same name.

[0056] Throughout the present disclosure and the claims that follow, certain words will be used to refer to specific components. It will be understood by those skilled in the art that electronic equipment manufacturers may refer to the same components by different names. This document does not intend to distinguish between components that have the same function but different names. In the following description and claims, words such as "include", "contain", and "have" are open-ended words and should therefore be interpreted as meaning "including but not limited to..." Therefore, when the terms "include", "contain" and / or "have" are used in the description of the present disclosure, although the existence of corresponding features, areas, steps, operating methods and / or components is specified, the existence of one or more corresponding features, areas, steps, operating methods and / or components is not excluded.

[0057] The terms "approximately," "equal to," "equal," or "same," "substantially," or "approximately" are generally interpreted as within 20% of a given value, or as a range within 10%, 5%, 3%, 2%, 1% or 0.5% of a given value.

[0058] Unless otherwise defined, all terms used herein (including technical and scientific terms) have the same meaning as commonly understood by one of ordinary skill in the art to which this disclosure belongs. It should be understood that these terms, such as those defined in commonly used dictionaries, should be interpreted as having a meaning that is consistent with the background or context of the relevant technology and this disclosure, and should not be interpreted in an idealized or overly formal manner unless specifically defined herein.

[0059] In addition, relative terms, such as "below" or "bottom" and "above" or "top," may be used in the embodiments to describe the relative relationship of one component to another component in the drawings. It is understood that if the device in the drawings is turned upside down, the component described as being on the "below" side will become the component on the "above" side.

[0060] When a component (e.g., a layer or region) is referred to as being "on" another component, it can be directly on the other component or there can be other components between the two components. On the other hand, when a component is referred to as being "directly on" another component, there are no components between the two components. In addition, when a component is referred to as being "on" another component, the two components have a top-to-bottom relationship in a plan view, and the component can be above or below the other component, depending on the orientation of the device.

[0061] Furthermore, if a value is between a first value and a second value, the value may be the first value, the second value, or another value between the first value and the second value.

[0062] It should be noted that the technical solutions provided in the following different embodiments can be replaced, combined or mixed with each other to form another embodiment without violating the spirit of the present disclosure.

[0063] Figure 1 FIG. 1 is a circuit diagram of a gate drive unit according to an embodiment of the present disclosure. Figure 1 As shown, the gate driving unit may include a plurality of switch components (T1 to T10). The plurality of switch components (T1 to T10) are electrically connected to each other by wires to transmit the signal from the start signal input terminal STV to the signal output terminal GOUT, and the plurality of switch components (T1 to T10) can be connected to a plurality of signal lines (such as Figure 1 The XCKV1, VH, VL, and CKV4 shown are electrically connected to transmit signals from a controller (not shown) to each switch component. Figure 1 In the schematic diagram, the gate driving unit includes 10 switch components (T1 to T10), but the present disclosure is not limited to this. In other embodiments of the present disclosure, the gate driving unit may include 20, 30 or more switch components, or less than 10 switch components according to requirements and designs.

[0064] In addition, multiple switch elements can form a vertical shift register (VSR), a buffer, etc., and have corresponding functions. For example, switch elements T1, T2, T3 and T4 can form a vertical shift register; switch elements T9 and T10 can form a buffer, but the present disclosure is not limited to this.

[0065] Figure 2 FIG. 1 is a schematic diagram of an electronic device according to an embodiment of the present disclosure.

[0066] like Figure 2As shown, the electronic device of the present disclosure includes a substrate 1 including an active area AA and a peripheral area N, wherein the peripheral area N is adjacent to the active area AA. In the present disclosure, a gate driving unit (not shown) can be disposed in the active area AA to enable the electronic device to achieve a narrow bezel effect.

[0067] The active area of ​​the electronic device of the present disclosure will be described in detail below.

[0068] Figure 3A and Figure 3B FIG1 is a top view of a portion of the active area of ​​an electronic device according to an embodiment of the present disclosure. Figure 3A and Figure 3B For the same schematic diagram, but for the convenience of explanation, Figure 3B Omitted Figure 3A In addition, Figure 3B The circuit diagram is as follows Figure 1 As shown, and for the convenience of explanation, Figure 3B Some switch components are omitted.

[0069] like Figure 2 、 Figure 3A and 3B As shown, the electronic device of the present disclosure includes: a plurality of spacers 2, which are disposed in the active area AA and include a first spacer 21 and a second spacer 22; a plurality of signal lines 3, which are disposed on the substrate 1 and extend along a first direction X; a plurality of gate lines 4, which are disposed on the substrate 1 and extend along a second direction Y, wherein the first direction X is different from the second direction Y; and a gate driving unit GD, which is disposed in the active area AA and includes a receiving switch element T2 and a buffer switch element T10; wherein the receiving switch element T2 is disposed corresponding to the first spacer 21 and receives an input signal (e.g., Figure 1 The buffer switch element T10 is disposed corresponding to the second spacer 22 and is electrically connected to the receiving switch element T2. The buffer switch element T10 outputs a scan signal to one of the gate lines 4. By disposing the gate driver unit GD in the active area AA, the present disclosure reduces the area occupied by the gate driver unit GD and its wiring in the peripheral area N, as in the prior art, thereby achieving a narrow bezel effect.

[0070] like Figure 2 and Figure 3B As shown, the electronic device of the present disclosure further includes a plurality of data lines 5 disposed on the substrate 1 and extending along the first direction X. The data lines 5 intersect with the gate lines 4 and define a plurality of sub-pixel units P.

[0071] In the present disclosure, the gate driving unit GD includes a plurality of switch components T1 to T10. In one embodiment of the present disclosure, the receiving switch component T2 can be used to receive the input signal input by the signal line 3, and the buffer switch component T10 can be used to output the scan signal to the gate line 4. In addition, Figure 3B As shown, the gate drive unit GD may further include other switch components (such as Figure 3B T1, T6, T7 and T9) and Figure 1 The switch assemblies shown correspond to each other, and these switch assemblies can also correspond to the same or different spacers. At least part of the other switch assemblies can be electrically connected to the receiving switch assembly T2 and / or the buffer switch assembly T10, but it should be noted that Figure 3B The positions and electrical connection methods of the switch components shown are merely examples, and the present disclosure is not limited thereto.

[0072] like Figure 3A and Figure 3B As shown, the electronic device of the present disclosure further includes a light shielding layer BM, which is disposed on the substrate 1, and the light shielding layer BM can cover multiple spacers 2, multiple signal lines 3, multiple gate lines 4 and / or multiple data lines 5, thereby reducing the display quality degradation of the electronic device due to light leakage or reflection. More specifically, the light shielding layer BM can be disposed above the multiple spacers 2, multiple signal lines 3, multiple gate lines 4 and / or multiple data lines 5. Therefore, in the normal direction of the substrate 1, the light shielding layer BM can at least partially overlap with the multiple spacers 2, multiple signal lines 3, multiple gate lines 4 and / or multiple data lines 5, respectively, and these spacers 2, these signal lines 3, these gate lines 4 and these data lines 5 can be located between the light shielding layer BM and the substrate 1.

[0073] In the present disclosure, multiple spacers 2 can be randomly arranged within the active area AA to provide support for the electronic device. Because the switch elements (e.g., the receiving switch element T2 and the buffer switch element T10) can be arranged corresponding to the spacers 2 (e.g., adjacent to or at least partially overlapping the spacers 2), the switch elements can share the light shielding layer BM disposed above the spacers 2. This allows the switch elements to achieve a shielding effect without the need for an additional light shielding layer BM, thereby increasing the aperture ratio of the electronic device.

[0074] Furthermore, since two adjacent spacers 2 can be separated by multiple sub-pixel units P, the display quality is not significantly affected. Furthermore, in the present disclosure, a sub-spacer (not shown) slightly smaller in height than the spacer 2 can be provided between two adjacent spacers 2 to enhance support. Although the switch assembly is not provided corresponding to the sub-spacer in this embodiment, the present disclosure is not limited thereto. In some embodiments, the switch assembly may be provided corresponding to the sub-spacer.

[0075] Here, the material of the signal line 3, the gate line 4 and the data line 5 may include a metal, a metal oxide, or a combination thereof. The metal may be, for example, gold, silver, copper, aluminum, molybdenum, titanium, chromium, an alloy thereof, or a combination thereof; the metal oxide may be, for example, indium tin oxide (ITO), indium zinc oxide (IZO), or a combination thereof, but the present disclosure is not limited thereto. In addition, the signal line 3, the gate line 4 and the data line 5 may be made of the same or different materials. The light shielding layer BM is a black matrix layer, and the material of the light shielding layer BM may include a black metal layer (such as molybdenum oxide, copper oxide, other suitable materials or a combination thereof), a black ink layer, a black resin layer, an anti-reflective material or a light absorbing material, but the present disclosure is not limited thereto.

[0076] Figure 4 FIG1 is a top view of a portion of the active area of ​​an electronic device according to an embodiment of the present disclosure. Figure 4 and Figure 3A and Figure 3B Similar, but for the sake of convenience, Figure 4 Part of the light-shielding layer is omitted.

[0077] like Figure 4 As shown, in the present disclosure, the gate line 4 and the data line 5 intersect and define a plurality of sub-pixel units, which may include a first sub-pixel unit P11, a second sub-pixel unit P12, and a third sub-pixel unit P13, with the second sub-pixel unit P12 disposed between the first sub-pixel unit P11 and the third sub-pixel unit P13. The first sub-pixel unit P11 may be a red sub-pixel unit R, the second sub-pixel unit P12 may be a green sub-pixel unit G, and the third sub-pixel unit P13 may be a blue sub-pixel unit B, but the present disclosure is not limited thereto.

[0078] In the present disclosure, when the switch components are relatively large, the switch components (e.g., receiving switch component T2 or buffer switch component T10) in the gate driver unit GD can be positioned adjacent to, for example, the blue sub-pixel unit B. This reduces the aperture ratio of the blue sub-pixel unit B, making the aperture ratio of the blue sub-pixel unit B different from the aperture ratio of the green sub-pixel unit G. More specifically, the aperture ratio ratio between the blue sub-pixel unit B and the green sub-pixel unit G can be between 70% and 99% (70% ≤ aperture ratio ratio ≤ 99%), for example, between 70% and 90% (70% ≤ aperture ratio ratio ≤ 90%), but the present disclosure is not limited thereto. Because the human eye is less sensitive to blue, appropriately reducing the aperture ratio of the blue sub-pixel unit B has little impact on the display quality. It should be noted that the switch components can also be positioned adjacent to sub-pixels of other colors (e.g., red or green) if this does not significantly impact the display quality.

[0079] Figure 5FIG1 is a top view of a portion of the active area of ​​an electronic device according to an embodiment of the present disclosure. Figure 5 and Figure 3A and Figure 3B Similar, except for the following differences. In addition, for ease of explanation, Figure 5 Part of the light-shielding layer is omitted.

[0080] like Figure 5 As shown, the buffer switch assembly T10 of the present disclosure may include a first sub-switch assembly T10-1 and a second sub-switch assembly T10-2, wherein the first sub-switch assembly T10-1 and the second sub-switch assembly T10-2 are electrically connected in parallel (as indicated by the dotted line). Since the buffer switch assembly T10 may be relatively large, if the display effect is not significantly affected, the buffer switch assembly T10 can be disassembled into multiple sub-switch assemblies, and the multiple sub-switch assemblies are connected in parallel to maintain the function of the buffer switch assembly. In this embodiment, the buffer switch assembly T10 is disassembled into two sub-switch assemblies, but the present disclosure is not limited to this. In other embodiments of the present disclosure, the buffer switch assembly T10 can be disassembled into three, four, or more sub-switch assemblies, and these sub-switch assemblies are connected in parallel.

[0081] In this embodiment, the buffer switch assembly T10 is split into multiple sub-switch assemblies, but the present disclosure is not limited to this. Similarly, when other switch assemblies are larger in size, they can also be split into multiple sub-switch assemblies to achieve the same effect. For example, the switch assembly T1 (such as Figure 3B ) may include a first sub-switch component and a second sub-switch component, wherein the first sub-switch component and the second sub-switch component are electrically connected to each other in parallel. In addition, in other embodiments of the present disclosure, the switch component T1 may be split into three, four or more sub-switch components, and these sub-switch components are connected to each other in parallel. Similarly, the other switch components T2 to T9 may also be split into two or more sub-switch components connected in parallel, similar to the buffer switch component T10 or the switch component T1. It should be noted that when the switch component is split into multiple sub-switch components, these sub-switch components may correspond to the same or different spacer settings.

[0082] Figure 6 FIG1 is a schematic diagram of a portion of the active area of ​​an electronic device according to an embodiment of the present disclosure. Figure 6 and Figure 3A and Figure 3B Similar, except for the following differences. In addition, for ease of explanation, Figure 6 The light shielding layer is omitted.

[0083] Please refer to Figure 3A 、 Figure 3B and Figure 6When the signal line 3 and the data line 5 are formed using the same metal layer, since the signal line 3 and the data line 5 need to be electrically insulated from each other, there is a distance between the signal line 3 and the data line 5. In order to shield the signal line 3 and the data line 5 at the same time, Figure 3A As shown in FIG, the light shielding layer BM disposed above the signal line 3 has a larger width. Figure 6 In the illustrated embodiment, different metal layers may be used to form the signal line 3 and the data line 5, respectively, and the signal line 3 may be disposed on the data line 5 (and in some embodiments, the data line 5 may be disposed on the signal line 3). More specifically, in the normal direction of the substrate 1, the signal line 3 may at least partially overlap the data line 5. Therefore, the light shielding layer BM disposed above the signal line 3 can achieve the effect of shielding both the signal line 3 and the data line 5 without increasing or only slightly increasing the width of the light shielding layer BM.

[0084] In addition, when the electronic device of the present disclosure is applied to a touch device, it may further include a touch signal line 6 disposed on the substrate 1. Here, the touch signal line 6 may be made of a material similar to or different from that of the signal line 3. When the touch signal line 6 is made of the same metal layer as the signal line 3, the manufacturing process steps can be further simplified. Figure 6 As shown, the touch signal line 6 can be disposed on the data line 5. More specifically, in the normal direction of the substrate 1, the touch signal line 6 can at least partially overlap the data line 5. In this way, the light shielding layer BM can achieve a shielding effect without increasing the width of the light shielding layer BM or only slightly increasing it.

[0085] Figure 7A FIG. 1 is a schematic diagram of a portion of an active area of ​​an electronic device according to an embodiment of the present disclosure. Figure 7B for Figure 7A Schematic cross-sectional view of line segment AA'.

[0086] like Figure 7A and 7B As shown, when the same metal layer is used to form the signal line 3 and the data line 5, since the signal line 3 and the data line 5 need to be electrically insulated from each other, there will be a distance between the signal line 3 and the data line 5 to reduce the voltage transmission error caused by the capacitive coupling effect between the signal line 3 and the data line 5. However, in this case, a wider light shielding layer BM is required for shielding, which may affect the display effect. Therefore, in one embodiment of the present disclosure, the electronic device may further include a first line segment 41 disposed on the substrate 1, such as Figure 7A As shown, the first line segment 41 can be electrically connected to the gate line 4 and extends along the first direction X. The signal line 3 and one of the data lines 5 are adjacently arranged, and the first line segment 41 is arranged between the two. Figure 7BAs shown, the first line segment 41 can be located in a different layer from the signal line 3 and the data line 5 (e.g., located below the signal line 3 and the data line 5), and can be electrically insulated from the signal line 3 and the data line 5, respectively. Therefore, the electronic device of the present disclosure can further include an insulating layer disposed between the first line segment 41 and the signal line 3 and between the first line segment 41 and the data line 5. The first line segment 41 can be at the same electrical potential as the gate line 4. The provision of the first line segment 41 can shield a portion of the electric field between the signal line 3 and the data line 5, thereby improving the capacitive coupling effect between the signal line 3 and the data line 5.

[0087] In the present disclosure, the insulating layer may be a single layer or a multi-layer structure. Figure 7B As shown, the insulating layer may be a first insulating layer 71, which is disposed on the substrate 1 and is located between the first line segment 41 and the signal line 3 and between the first line segment 41 and the data line 5. Here, the material of the first insulating layer 71 may include silicon nitride, silicon oxide, silicon oxynitride, aluminum oxide, polymer, photoresist, or a mixture thereof, but the present disclosure is not limited thereto.

[0088] Figure 8A and Figure 8B FIG. 1 is a cross-sectional diagram of a portion of an active area of ​​an electronic device according to an embodiment of the present disclosure. Figure 8A and Figure 8B and Figure 7A and Figure 7B Similar, except for the following differences.

[0089] like Figure 8A As shown, in the present disclosure, the electronic device may further include an insulating layer disposed on the signal line 3 and the data line 5, and a channel G may be located between two adjacent signal lines 3 and data lines 5. Furthermore, a conductive layer 8 may be disposed in the channel G. The conductive layer 8 extends along the first direction X and may have the same potential as the first line segment 41. The channel G and the conductive layer 8 disposed therein may shield a portion of the electric power line between the signal line 3 and the data line 5, thereby improving the capacitive coupling effect between the signal line 3 and the data line 5.

[0090] In the present disclosure, the insulating layer may be a single layer or a multi-layer structure. When the insulating layer is a multi-layer structure, Figure 8A As shown, the insulating layer may include a second insulating layer 72, a third insulating layer 73, and a fourth insulating layer 74, and a channel G may be formed in the second insulating layer 72, the third insulating layer 73, and the fourth insulating layer 74. The conductive layer 8 may be disposed on the insulating layer 74 and extended into the channel G to shield a portion of the power line between the signal line 3 and the data line 5. In addition, as shown in FIG. Figure 8A As shown, in this embodiment, the range of the channel G can be further extended to the first insulating layer 71 to further improve the capacitive coupling effect between the signal line 3 and the data line 5 .

[0091] Here, the materials of the second insulating layer 72, the third insulating layer 73 and the fourth insulating layer 74 may be similar to those of the first insulating layer 71 and will not be described in detail here. In addition, the first insulating layer 71, the second insulating layer 72, the third insulating layer 73 and the fourth insulating layer 74 may be made of the same or different materials. The material of the conductive layer 8 may include a transparent conductive electrode, such as indium tin oxide (ITO), indium zinc oxide (IZO), indium gallium zinc oxide (IGZO) or a combination thereof, but the present disclosure is not limited thereto. In some embodiments, the conductive layer 8 may also use an opaque metal material.

[0092] In another embodiment of the present disclosure, Figure 8B As shown, the electronic device may include Figure 7B The first line segment 41 and Figure 8A The structures of the channel G and the conductive layer 8 are similar. In this way, the capacitive coupling effect caused between the signal line 3 and the data line 5 can be shielded.

[0093] In this embodiment, if Figure 8B As shown, the insulating layer may include a second insulating layer 72 , a third insulating layer 73 and a fourth insulating layer 74 , and a channel G may be formed in the second insulating layer 72 , the third insulating layer 73 and the fourth insulating layer 74 to enhance the shielding effect.

[0094] Figure 9 FIG1 is a top view of a portion of the active area of ​​an electronic device according to an embodiment of the present disclosure. Figure 9 and Figure 4 Similar, except for the following differences. In addition, for ease of explanation, Figure 9 The light shielding layer is omitted.

[0095] like Figure 9 As shown, in the present disclosure, the gate line 4 and the data line 5 intersect and define a plurality of sub-pixel units, and the plurality of sub-pixel units may include a first sub-pixel unit P11, a second sub-pixel unit P12, and a third sub-pixel unit P13, and the second sub-pixel unit P12 is disposed between the first sub-pixel unit P11 and the third sub-pixel unit P13. The first sub-pixel unit P11, the second sub-pixel unit P12, and the third sub-pixel unit P13 may constitute a pixel unit P1. In the present disclosure, the electronic device may include a plurality of pixel units, and are arranged in a matrix along a first direction X and a second direction Y, respectively. The plurality of pixel units may include a first pixel unit P1, a second pixel unit P2, and a third pixel unit P3, and the second pixel unit P2 is disposed between the first pixel unit P1 and the third pixel unit P3, and each pixel unit may include a plurality of sub-pixel units.

[0096] exist Figure 4In an electronic device, one of the signal lines 3 and one of the data lines 5 are disposed adjacent to each other, and adjacent signal lines 3 and data lines 5 are disposed between two adjacent sub-pixel units. When the signal lines 3 and data lines 5 are formed using the same metal layer, if the distance between the signal lines 3 and data lines 5 is too small, capacitive coupling between the signal lines 3 and data lines 5 can easily lead to voltage transmission errors.

[0097] Therefore, if Figure 9 As shown, in one embodiment of the present disclosure, the data line 5 can be arranged on a side away from the signal line 3, that is, the two data lines can be arranged between two adjacent sub-pixel units. More specifically, one of the signal lines 3 can be arranged between the third sub-pixel unit P13 of the first pixel unit P1 and the first sub-pixel unit P21 of the second pixel unit P2, and two data lines 51 and 52 of the data lines 5 can be arranged between the first sub-pixel unit P21 and the second sub-pixel unit P22 of the second pixel unit P2. Because the potential difference between the two adjacent data lines 51 and 52 can be smaller than the potential difference between the adjacent data line 5 and the signal line 3, the capacitive coupling effect can be reduced or the situation where the sub-pixel units receive erroneous signal potentials can be improved.

[0098] Figure 10 FIG1 is a top view of a portion of the active area of ​​an electronic device according to an embodiment of the present disclosure. Figure 10 and Figure 9 Similar, except for the following differences.

[0099] exist Figure 9 In an electronic device, the signal line 3 may be disposed between a first pixel unit P1 and a second pixel unit P2, and two adjacent data lines 51 and 52 may be disposed between a first sub-pixel unit P21 and a second sub-pixel unit P22 in the same pixel unit (e.g., the second pixel unit P2). When the two adjacent data lines 51 and 52 are disposed between two adjacent sub-pixel units in the same pixel unit, the light shielding layer BM disposed above the two adjacent data lines 51 and 52 has a larger width. Therefore, a larger light shielding layer BM exists within the same pixel unit.

[0100] Therefore, if Figure 10 As shown, in one embodiment of the present disclosure, the signal line 3 can be disposed between two adjacent pixel units, and two adjacent data lines 51 and 52 can also be disposed between two other adjacent pixel units. More specifically, the signal line 3 can be disposed between the first and second adjacent pixel units P1 and P2, and the two adjacent data lines 51 and 52 can be disposed between the second and third pixel units P2 and P3. In this way, the width of the light shielding layer BM between each sub-pixel unit in the same pixel unit can be maintained substantially the same.

[0101] Figure 11 FIG. 1 is a schematic diagram of an active area of ​​an electronic device according to an embodiment of the present disclosure. Figure 11 The data lines, pixel units, and light shielding layers disposed above the gate lines, signal lines, and gate driving units are omitted.

[0102] like Figure 11 As shown in the present disclosure, the active area of ​​the electronic device may include a plurality of gate drive units GD, and the plurality of gate drive units GD are electrically connected via signal lines 3 and gate lines 4, so that signals are transmitted from a controller (not shown) to each gate drive unit GD to drive the entire electronic device. The circuit structure of each gate drive unit GD may be, for example, Figure 1 As shown, and as Figure 3B The figure shows a plurality of sub-pixel units, which will not be described in detail here. Figure 11 The direction indicated by the arrow is the direction of signal transmission between the multiple gate drive units GD. More specifically, the receiving switch component (not shown) of a gate drive unit GD1 can receive a first gate signal from a gate line, and the buffer switch component (not shown) of the gate drive unit can output a second gate signal to another gate line 4A. Another gate drive unit GD2 can receive the second gate signal from the other gate line 4A and output a third gate signal to another gate line 4B as an input signal to the next-level gate drive unit GD3, and so on. However, the electrical connection method of each drive unit GD in the present disclosure is not limited to this. The setting position of the multiple gate drive units GD can be adjusted as needed, and the electrical connection relationship and signal transmission direction between them can be designed.

[0103] The present disclosure can achieve a narrow frame effect for the electronic device by disposing the gate driving unit in the active area of ​​the electronic device. In addition, the gate driving unit can be further disposed between the pixel units of the electronic device to improve the overall appearance of the electronic device.

[0104] In the present disclosure, an electronic device may include a display panel, and the display panel may be, for example, a flexible display panel, a touch display panel, a curved display panel, or a tiled display panel, but the present disclosure is not limited thereto. Therefore, the electronic device of the present disclosure may be, for example, a display, a mobile phone, a laptop computer, a video camera, a camera, a music player, a mobile navigation device, a television, or other electronic device that needs to display an image, but the present disclosure is not limited thereto. In some embodiments, the electronic device may include a sensor panel (e.g., a fingerprint sensor panel) or an antenna device, etc.

[0105] The above specific embodiments should be interpreted as merely illustrative and not limiting the rest of the present disclosure in any way, and features between different embodiments may be mixed and matched for use as long as they do not conflict with each other.

Claims

1. An electronic device, characterized in that: Include: A substrate comprising an active region and a peripheral region adjacent to the active region; a plurality of spacers disposed in the active area and including a first spacer and a second spacer; A plurality of signal lines are disposed on the substrate and extend along a first direction; A plurality of gate lines are disposed on the substrate and extend along a second direction, wherein the first direction is different from the second direction; a plurality of data lines disposed on the substrate and extending along the first direction, wherein, in a normal direction of the substrate, one of the signal lines at least partially overlaps one of the data lines; and a gate driving unit disposed in the active region and comprising a receiving switch component and a buffer switch component; The receiving switch component is arranged corresponding to the first spacer and receives an input signal through one of the signal lines. The buffer switch component is arranged corresponding to the second spacer and is electrically connected to the receiving switch component. The buffer switch component outputs a scan signal to one of the gate lines.

2. The electronic device according to claim 1, wherein The gate lines intersect the data lines and define a plurality of sub-pixel units, including a green sub-pixel unit and a blue sub-pixel unit, wherein the aperture ratio of the blue sub-pixel unit is different from the aperture ratio of the green sub-pixel unit.

3. The electronic device according to claim 2, wherein: The aperture ratio ratio between the blue sub-pixel unit and the green sub-pixel unit is between 70% and 99%.

4. The electronic device according to claim 2, wherein: At least one of the receiving switch component and the buffer switch component is disposed adjacent to the blue sub-pixel unit.

5. The electronic device according to claim 1, wherein: The gate driving unit further includes a switch component, and the switch component is electrically connected to at least one of the receiving switch component and the buffer switch component.

6. The electronic device according to claim 1, wherein: The buffer switch component includes a first sub-switch component and a second sub-switch component, wherein the first sub-switch component and the second sub-switch component are electrically connected to each other in parallel.

7. The electronic device according to claim 1, wherein: It also includes a first line segment, which is arranged on the substrate and extends along the first direction; wherein another signal line among the signal lines is arranged adjacent to another data line among the data lines, and the first line segment is arranged between the another signal line among the signal lines and the another data line among the data lines.

8. The electronic device according to claim 7, wherein: The first line segment is electrically connected to one of the gate lines.

9. The electronic device according to claim 1, wherein: It also includes multiple pixel units, which include a first pixel unit, a second pixel unit and a third pixel unit, wherein one of the signal lines is arranged between the first pixel unit and the second pixel unit, and two of the data lines are arranged between the second pixel unit and the third pixel unit.

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