Image sensor including CMOS image sensor pixels and dynamic vision sensor pixels

Abstract

An image sensor includes a CIS (CMOS image sensor) pixel, a DVS (dynamic vision sensor) and an image signal processor. The CIS pixel includes: a photoelectric conversion device that generates a charge corresponding to incident light; and a readout circuit that generates an output voltage corresponding to the generated charge. The DVS pixel detects a change in the intensity of the incident light based on the generated charge and outputs an event signal, and does not include a separate photoelectric conversion device. The image signal processor enables the photoelectric conversion device to be connected to the readout circuit or the DVS pixel.

Description

[0001] This application is a divisional application of the invention application with the application date of September 9, 2019, application number 2019108568114, and invention name “Image sensor comprising CMOS image sensor pixels and dynamic vision sensor pixels”.

[0002] CROSS-REFERENCE TO RELATED APPLICATIONS

[0003] This application claims the priority of Korean Patent Application No. 10-2018-0107280 filed on September 7, 2018, in the Korean Intellectual Property Office, and Korean Patent Application No. 10-2019-0028938 filed on March 13, 2019, in the Korean Intellectual Property Office, the disclosures of which are incorporated herein by reference in their entirety. Technical Field

[0004] The present disclosure relates to image sensors, and more particularly, to image sensors including two different kinds of pixels. Background Art

[0005] Conventional types of image sensors include complementary metal oxide semiconductor (CMOS) image sensors and dynamic vision sensors. An advantage of CMOS image sensors may be that captured images are provided to users without modification, but a disadvantage of CMOS image sensors may be that the amount of data to be processed is high. Because dynamic vision sensors only detect events where the intensity of light changes and provide outputs of the detected events, an advantage of dynamic vision sensors may be that the amount of data to be processed is low, but a disadvantage may be that the size of the dynamic vision sensor is larger than that of the CMOS image sensor.

[0006] However, both the CMOS image sensor and the dynamic vision sensor may require a photoelectric conversion device for detecting light. Generally, because the photoelectric conversion device occupies most of the size of the image sensor, when the CMOS image sensor and the dynamic vision sensor are implemented together in one device, the size of the device increases. Therefore, there is a need for a structure of an image sensor for reducing the size of the image sensor and reducing the manufacturing cost of the image sensor. Summary of the invention

[0007] Aspects of the embodiments of the present disclosure provide a structure for a CMOS image sensor and a dynamic vision sensor to share a photoelectric conversion device.

[0008] Aspects of the embodiments provide a structure in which a dynamic vision sensor uses a photoelectric conversion device included in a CMOS image sensor.

[0009] According to an embodiment, an image sensor includes: a CIS pixel, which includes a photoelectric conversion device and a readout circuit, the photoelectric conversion device is configured to generate a charge corresponding to incident light incident on the CIS pixel, and the readout circuit is configured to generate an output voltage corresponding to the charge; a dynamic vision sensor (DVS) pixel, which is configured to detect a change in the intensity of the incident light based on the charge generated by the photoelectric conversion device, and output an event signal based on the change in intensity; and an image signal processor, which is configured to selectively control the image sensor to generate first image data of the image sensor based on the output voltage generated by the CIS pixel, and generate second image data based on the event signal generated by the DVS pixel.

[0010] According to an embodiment, an image sensor includes: a CIS pixel, which includes: a photoelectric conversion device, a driving transistor and a reset transistor, the photoelectric conversion device is configured to generate charges corresponding to incident light incident on the CIS pixel, the driving transistor includes a gate electrode connected to a floating diffusion node, the charges generated by the photoelectric conversion device are transmitted to the floating diffusion node, and the reset transistor is configured to reset the voltage of the floating diffusion node; a dynamic vision sensor (DVS) pixel, the DVS pixel includes a logarithmic current source, the DVS pixel is configured to detect changes in the intensity of incident light based on the charges generated by the photoelectric conversion device, and output an event signal based on the change in intensity; and an image signal processor, which is configured to connect the gate electrode of the reset transistor and one end of the driving transistor to the logarithmic current source.

[0011] According to an embodiment, an image sensor includes: a first substrate, on which a CIS pixel array including a plurality of CMOS image sensor (CIS) pixels is formed, each CIS pixel of the CIS pixel array including a photoelectric conversion device and a readout circuit, the photoelectric conversion device being configured to generate a charge corresponding to incident light incident on the CIS pixel, and the readout circuit being configured to generate an output voltage corresponding to the charge generated by the photoelectric conversion device; a second substrate, on which a DVS pixel array including a plurality of dynamic vision sensor (DVS) pixels is formed, each DVS pixel of the DVS pixel array being configured to detect a change in the intensity of the incident light based on the charge generated by the CIS pixel array to output an event signal based on the change in intensity; and an image signal processor, which is configured to selectively control the image sensor to generate image data of the image sensor based on the output voltage, and to generate image data based on the event signal generated by the DVS pixel array. BRIEF DESCRIPTION OF THE DRAWINGS

[0012] The above and other objects and features of the present disclosure will become clear by describing in detail embodiments of the present disclosure with reference to the accompanying drawings, in which:

[0013] Figure 1An image sensor according to an embodiment of the present disclosure is shown;

[0014] Figure 2 Shows Figure 1 The structure of CMOS image sensor;

[0015] Figure 3 Shows Figure 2 A circuit diagram of the structure of a CIS pixel;

[0016] Figure 4 Shows Figure 1 The construction of dynamic vision sensor;

[0017] Figure 5 Shows Figure 4 A circuit diagram of a DVS pixel array having a DVS pixel structure;

[0018] Figure 6 Shows Figure 5 The construction of the DVS pixel back-end circuit;

[0019] Figure 7 illustrating a CIS pixel and a DVS pixel sharing a photoelectric conversion device according to an embodiment of the present disclosure;

[0020] Figure 8 shows a cross-sectional view of an image sensor according to an embodiment of the present disclosure;

[0021] Fig. 9 A circuit diagram of an image sensor according to an embodiment of the present disclosure is shown;

[0022] Fig.10 It is shown Fig. 9 An illustration of an image sensor operating in a first mode;

[0023] Fig.11 It is shown Fig. 9 An illustration of an image sensor operating in a second mode;

[0024] Fig.12 A circuit diagram of an image sensor according to an embodiment of the present disclosure is shown;

[0025] Fig.13 A circuit diagram of an image sensor according to an embodiment of the present disclosure is shown;

[0026] Fig.14 A circuit diagram of an image sensor according to an embodiment of the present disclosure is shown;

[0027] Fig.15 A circuit diagram of an image sensor according to an embodiment of the present disclosure is shown;

[0028] Fig.16Shows Figure 2 A circuit diagram of the structure of a CIS pixel;

[0029] Fig.17 A circuit diagram of an image sensor according to an embodiment of the present disclosure is shown;

[0030] Fig.18 A circuit diagram of an image sensor according to an embodiment of the present disclosure is shown;

[0031] Fig.19 A circuit diagram of an image sensor according to an embodiment of the present disclosure is shown;

[0032] Fig. 20 It is shown Fig.19 An illustration of an image sensor operating in a first mode;

[0033] Fig.21 It is shown Fig.19 An illustration of an image sensor operating in a second mode;

[0034] Fig. 22 A circuit diagram of an image sensor according to an embodiment of the present disclosure is shown;

[0035] Fig.23 A circuit diagram of an image sensor according to an embodiment of the present disclosure is shown; and

[0036] Fig.24 A circuit diagram of an image sensor according to an embodiment of the present disclosure is shown. DETAILED DESCRIPTION

[0037] Embodiments of the present disclosure are described hereinafter in detail and clearly to the extent that those having ordinary skill in the art to which the present disclosure pertains can easily implement the embodiments.

[0038] The components described in the detailed description and the functional blocks shown in the drawings with reference to the terms "unit", "module", "... or "... device" etc. will be implemented with software, hardware, or a combination thereof. In an embodiment, the software may be machine code, firmware, embedded code, and application software. For example, the hardware may include electrical circuits, electronic circuits, processors, computers, integrated circuits, integrated circuit cores, pressure sensors, inertial sensors, micro-electromechanical systems (MEMS), passive components, or a combination thereof. In addition, unless otherwise stated in this specification, the expression "a first component is connected to a second component" includes a configuration in which two components are indirectly connected with a third component inserted between them.

[0039] Figure 1An image sensor 1000 according to an embodiment of the present disclosure is shown. The image sensor 1000 includes an image signal processor 1100 , a complementary metal oxide semiconductor (CMOS) image sensor 1200 , and a dynamic vision sensor (DVS) 1300 .

[0040] The image signal processor 1100 may process the signal output from the CMOS image sensor 1200 and / or the dynamic vision sensor 1300, and may generate and output the image IMG. In an embodiment, the image signal processor 1100 may process the frame-based image data received from the CMOS image sensor 1200, and may generate the image IMG based on the frame-based image data. Alternatively, the image signal processor 1100 may process the packet-based or frame-based image data received from the dynamic vision sensor 1300, and may generate the image IMG based on the packet-based or frame-based image data.

[0041] The image signal processor 1100 may perform various processes on the image data received from the CMOS image sensor 1200. For example, the image signal processor 1100 may perform various processes such as color interpolation, color correction, automatic white balance, gamma correction, color saturation correction, formatting, bad pixel correction, and chromaticity correction.

[0042] The image signal processor 1100 may perform various processes on the image data received from the dynamic vision sensor 1300. For example, the image signal processor 1100 may correct (or calibrate) the time stamp values ​​of noise pixels, hot pixels, or dead pixels by using the time correlation between the time stamp values ​​of adjacent pixels of the dynamic vision sensor 1300.

[0043] The CMOS image sensor 1200 includes a plurality of CMOS image sensor (CIS) pixels, each of the plurality of CIS pixels including a photoelectric conversion device (PSD). In contrast, each of the plurality of DVS pixels of the dynamic vision sensor 1300 does not include a photoelectric conversion device. The dynamic vision sensor 1300 may instead utilize the photoelectric conversion device PSD of the CMOS image sensor 1200. That is, the CMOS image sensor 1200 and the dynamic vision sensor 1300 may share the photoelectric conversion device PSD.

[0044] In an embodiment, when the CMOS image sensor 1200 is operating to generate frame-based image data, the path electrically connecting the photoelectric conversion device PSD and the DVS 1300 may be blocked, disconnected, or inaccessible to the DVS 1300. In contrast, when the CMOS image sensor 1200 is not operating to generate frame-based image data, the photoelectric conversion device PSD and the DVS 1300 may be electrically connected. Therefore, when the CMOS image sensor 1200 is not operating to generate frame-based image data and the photoelectric conversion device PSD is not used, the DVS 1300 may instead utilize the photoelectric conversion device PSD to generate packet-based or frame-based image data. In an embodiment, the image signal processor 1100 may control the operating mode of the image sensor 1000. For example, the image signal processor 1100 may generate at least one control signal for changing the operating mode to control switching between various operating modes. The configuration in which the CMOS image sensor 1200 and the dynamic vision sensor 1300 share the photoelectric conversion device may reduce the size and manufacturing cost of the image sensor 1000. The detailed configuration will be described in more detail below.

[0045] Here, the CIS pixel of the CMOS image sensor 1200 and the DVS pixel of the DVS 1300 that share the photoelectric conversion device will be described, but such a concept can be applied to different types of sensors and pixels other than the CMOS sensor and the pixel and the DVS sensor and the pixel and their combination. For example, the present concept can be applied to the combination of a charge coupled device (CCD) type pixel and a CIS pixel. In addition, the present concept can be applied to the combination of a CCD type pixel and a DVS pixel. In addition, the present concept can be applied to an image sensor including a CCD type pixel, a CIS pixel and a DVS pixel. The types of sensors and pixels and their combinations are not limited to the above types and combinations.

[0046] Figure 2 Shows Figure 1 Configuration of the CMOS image sensor 1200 .

[0047] The CMOS image sensor 1200 is configured to generate image data of the object 10 incident through the lens 1201. The CMOS image sensor 1200 includes a CIS pixel array 1210, a row decoder 1220, a correlated double sampler (CDS) 1230, an analog-to-digital converter (ADC) 1240, an output buffer 1250, a timing controller 1260, and a ramp generator 1270.

[0048] The CIS pixel array 1210 may include a plurality of CIS pixels (PX) 1211 arranged in rows and columns. In an embodiment, each of the plurality of CIS pixels 1211 may have a three-transistor (3TR) pixel structure in which a pixel is implemented with three transistors, a four-transistor (4TR) pixel structure in which a pixel is implemented with four transistors, or a five-transistor (5TR) pixel structure in which a pixel is implemented with five transistors. Alternatively, at least two of the plurality of CIS pixels constituting the CIS pixel array 1210 may share the same floating diffusion region FD (or floating diffusion node). However, the structure of the CIS pixel is not limited to the above-described configuration.

[0049] The row decoder 1220 may select and drive a row of the CIS pixel array 1210. In an embodiment, the row decoder 1220 decodes a row address and / or a control signal output from the timing controller 1260, and generates a control signal for selecting and driving a row of the CIS pixel array 1210 indicated by the row address and / or the control signal. For example, the row decoder 1220 may generate a selection signal VSEL, a reset signal VRST, and a transmission signal VTG, and may transmit the generated signals VSEL, VRST, and VTG to a pixel corresponding to the selected row.

[0050] The correlated double sampler 1230 may sequentially sample and hold a set of reference signals and image signals provided from the CIS pixel array 1210 through the column lines CL1 to CLn. In other words, the correlated double sampler 1230 may sample and hold the levels of the reference signal and image signal corresponding to each column. The correlated double sampler 1230 may provide the set of reference signals and image signals sampled for each column to the analog-to-digital converter 1240 under the control of the timing controller 1260.

[0051] The analog-to-digital converter 1240 may convert the correlated double sampling signal of each column output from the correlated double sampler 1230 into a digital signal. In an embodiment, the analog-to-digital converter 1240 may compare the correlated double sampling signal with the ramp signal output from the ramp generator 1270, and may generate a digital signal corresponding to the comparison result.

[0052] The output buffer 1250 may temporarily store the digital signal provided from the analog-to-digital converter 1240 .

[0053] The timing controller 1260 may control the operation of at least one of the CIS pixel array 1210 , the row decoder 1220 , the correlated double sampler 1230 , the analog-to-digital converter 1240 , the output buffer 1250 , and the ramp generator 1270 .

[0054] The ramp generator 1270 may generate a ramp signal, and may provide the ramp signal to the analog-to-digital converter 1240 .

[0055] For example, at least a portion of the row decoder 1220 , the correlated double sampler 1230 , the analog-to-digital converter 1240 , the output buffer 1250 , the timing controller 1260 , and the ramp generator 1270 may be referred to as a “CIS peripheral circuit”.

[0056] Figure 3 Shows Figure 2 1. An exemplary configuration of a CIS pixel 1211. In an embodiment, the CIS pixel 1211 may have a four-transistor (4TR) structure including four transistors. The CIS pixel 1211 may include a photoelectric conversion device PSD, a transfer transistor TG, a reset transistor RT, a drive transistor DT, and a selection transistor ST.

[0057] The photoelectric conversion device PSD can generate photoelectrons (hereinafter referred to as "charges") in response to incident light. That is, the photoelectric conversion device PSD can convert an optical signal into an electrical signal to generate a photocurrent IP. For example, the photoelectric conversion device PSD may include a photodiode, a phototransistor, a pinned photodiode, or any other similar device.

[0058] The transfer transistor TG may transfer the charge generated by the photoelectric conversion device PSD to the floating diffusion region FD. For example, the source terminal of the transfer transistor TG may be connected to the photoelectric conversion device PSD, and the drain terminal of the transfer transistor TG may be connected to the floating diffusion region FD. In response to the gate of the transfer transistor TG from the row decoder 1220 (reference Figure 2 ) receives the transmission signal VTG, the transmission transistor TG can be turned on or off.

[0059] The floating diffusion region FD may have a function of detecting a charge corresponding to the amount of incident light. During the time when the transmission signal VTG is activated, the charge provided from the photoelectric conversion device PSD may be accumulated in the floating diffusion region FD. The floating diffusion region FD may be connected to the gate terminal of the driving transistor DT operating as a source follower amplifier. The floating diffusion region FD may be reset to a power supply voltage VDD provided when the reset transistor RT is turned on.

[0060] The reset transistor RT may be reset by a reset signal VRST, and the power supply voltage VDD may be supplied to the floating diffusion region FD. In this case, the charge accumulated in the floating diffusion region FD may be moved to the terminal of the power supply voltage VDD, and the voltage of the floating diffusion region FD may be reset. Even if a description is given in which the power supply voltage VDD is used as the voltage to be applied to the floating diffusion region FD, various levels of voltages (i.e., reset voltages) may be used to reset the floating diffusion region FD.

[0061] The driving transistor DT may function as a source follower amplifier, and may amplify a change in the potential of the floating diffusion region FD, and may output an output voltage VOUT corresponding to the amplification result through the first column line CL1. Figure 3 FIG. 4 shows an embodiment in which the CIS pixel 1211 is connected to the first column line CL1 .

[0062] The selection transistor ST may be driven by the selection signal VSEL and may select pixels to be read in units of rows. When the selection transistor ST is turned on, the potential of the floating diffusion region FD may be amplified by the driving transistor DT and may be transmitted to the drain electrode of the selection transistor ST.

[0063] In an embodiment, the driving transistor DT and the selecting transistor ST may be referred to as a “readout circuit.” That is, the readout circuit may generate an output voltage VOUT corresponding to charges accumulated in the floating diffusion region FD.

[0064] Figure 4 Shows Figure 1 An exemplary configuration of a dynamic vision sensor 1300 is shown.

[0065] The dynamic vision sensor 1300 may include a DVS pixel array 1310, a column address event representation (AER) circuit 1320, a row AER circuit 1330, and an output buffer 1340. The dynamic vision sensor 1300 may detect an event in which the intensity of light incident on the DVS pixel changes, may determine the type of the detected event (i.e., whether the detected event is an event in which the intensity of the light increases or an event in which the intensity of the light decreases), and may output a value corresponding to the event. For example, the event may mainly occur in the outline of a moving object. Figure 1 ), the dynamic vision sensor 1300 may output only the value corresponding to the light whose intensity changes, thereby significantly reducing the amount of light generated by the dynamic vision sensor 1300 and / or the image signal processor 1100 (see Figure 1 )The amount of data to be processed.

[0066] The DVS pixel array 1310 may include a plurality of DVS pixels arranged along a plurality of rows and a plurality of columns in a matrix form. A DVS pixel that detects an event among the plurality of DVS pixels of the DVS pixel array 1310 may output a signal (i.e., a column request) CR indicating an event of an increase or decrease in the intensity of light to the column AER circuit 1320.

[0067] The column AER circuit 1320 may output an acknowledgement signal ACK to the DVS pixel in response to the column request CR received from the DVS pixel detecting the event. The DVS pixel receiving the acknowledgement signal ACK may output polarity information PoI of the event to the row AER circuit 1330. The column AER circuit 1320 may generate a column address C_ADDR of the DVS pixel detecting the event based on the column request CR received from the pixel detecting the event.

[0068] The row AER circuit 1330 may receive polarity information PoI from the DVS pixel that detects the event. The row AER circuit 1330 may generate a timestamp including information about the time when the event occurs based on the polarity information PoI. In an embodiment, the timestamp may be generated by a timestamp generator 1332 provided in the row AER circuit 1330. For example, the timestamp generator 1332 may be implemented by using a time period generated in units of several microseconds to tens of microseconds. The row AER circuit 1330 may output a reset signal RST to the DVS pixel that detects the event in response to the polarity information PoI. The DVS pixel that detects the event may be reset by the reset signal RST. In addition, the row AER circuit 1330 may generate a row address R_ADDR of the DVS pixel that detects the event.

[0069] The row AER circuit 1330 may control the period during which the reset signal RST is generated. For example, in order to prevent the workload from increasing due to a large number of events occurring, the row AER circuit 1330 may control the period during which the reset signal RST is generated so that no event occurs during a specific period. That is, the row AER circuit 1330 may control the refractory period during which an event occurs.

[0070] The output buffer 1340 may generate a packet based on the timestamp, the column address C_ADDR, the row address R_ADDR, and the polarity information PoI. The output buffer 1340 may add a header indicating the start of the packet to the front of the packet and a trailer indicating the end of the packet to the end of the packet.

[0071] For example, at least a portion of the column AER circuit 1320 , the row AER circuit 1330 , and the output buffer 1340 may be referred to as a “DVS peripheral circuit.”

[0072] Figure 5 Shows Figure 4FIG. 1 is a circuit diagram of a DVS pixel array of FIG. 1311 . The DVS pixel 1311 may include a photoreceptor 1313 and a DVS pixel backend circuit 1315 .

[0073] The photoreceptor 1313 may include a logarithmic amplifier LA and a feedback transistor FB. However, unlike a general DVS pixel, the photoreceptor 1313 may not include a photoelectric conversion device PSD. Figure 5 The photoelectric conversion device PSD shown may be a CIS pixel 1211 (see Figure 3 ) component. The logarithmic amplifier LA amplifies the voltage corresponding to the photocurrent IP generated by the photoelectric conversion device PSD of the CIS pixel 1211. The logarithmic amplifier LA can output a logarithmic voltage VLOG of a logarithmic scale. The feedback transistor FB can connect the photoreceptor 1313 to the reference signal below. Figure 6 The differentiator 1316 is described separately.

[0074] The DVS pixel back-end circuit 1315 may perform various processing on the logarithmic voltage VLOG. In an embodiment, the DVS pixel back-end circuit 1315 may amplify the logarithmic voltage VLOG, compare the amplified voltage with a reference voltage to determine whether the light incident on the photoelectric conversion device PSD is light whose intensity increases or decreases, and output an event signal corresponding to the determination result (i.e., an on-event or an off-event). After the DVS pixel back-end circuit 1315 outputs an on-event or an off-event, the DVS pixel back-end circuit 1315 may be reset by a reset signal RST.

[0075] Figure 6 Shows Figure 5 The DVS pixel back-end circuit 1315 may include a differentiator 1316 , a comparator 1317 , and a readout circuit 1318 .

[0076] The differentiator 1316 may amplify the voltage VLOG to generate a voltage VDIFF. For example, the differentiator 1316 may include capacitors C1 and C2, a differential amplifier DA, and a switch SW, and the switch SW may operate in response to a reset signal RST. For example, the capacitors C1 and C2 may store electrical energy generated by at least one photoelectric conversion device PSD. For example, the capacitances of the capacitors C1 and C2 may be appropriately selected in consideration of the shortest time (e.g., refractory period) between two events that can occur consecutively at one pixel. When the switch SW is closed by the reset signal RST, the pixel may be initialized (or reset). The AER circuit 1330 (refer to Figure 3 ) receives the reset signal RST.

[0077] The comparator 1317 can compare the level of the output voltage VDIFF of the differential amplifier DA with the level of the reference voltage Vref, and can determine whether the event detected by the pixel is a turn-on event or a turn-off event. When an event of an increase in light intensity is detected, the comparator 1317 can output a signal ON indicating that the detected event is a turn-on event; when an event of a decrease in light intensity is detected, the comparator 1317 can output a signal OFF indicating that the detected event is a turn-off event.

[0078] The readout circuit 1318 may output information about an event occurring at the pixel. The information about the event output from the readout circuit 1318 may include information (e.g., a bit) indicating whether the event occurring is a turn-on event or a turn-off event. The information indicating the event output from the readout circuit 1318 may be referred to as “polarity information PoI” (reference Figure 4 ). The polarity information PoI may be provided to the row AER circuit 1330 (refer to Figure 4 ).

[0079] at the same time, Figure 5 and Figure 6 The configuration of the pixel shown in the embodiment is exemplary, and the event detection can be applied to various configurations of DVS pixels configured to determine an event type based on a result of detecting light intensity.

[0080] Figure 7 A CIS pixel and a DVS pixel sharing a photoelectric conversion device PSD according to an embodiment of the present disclosure are shown.

[0081] In an embodiment, in a plan view (i.e., viewing the pixel in the Z-axis direction), four CIS pixels may correspond to one DVS pixel. The reason is that the size of the DVS pixel is larger than the size of the CIS pixel. However, the number of CIS pixels corresponding to one DVS pixel may vary depending on the size of each pixel and is not limited to Figure 7 ratio.

[0082] The photoelectric conversion device PSD of each CIS pixel 1211 can be connected to the DVS pixel 1311 through the interconnector IC. Figure 1 )When operating in the DVS mode, the photoelectric conversion device PSD of the DVS pixel 1311 and the component of the CIS pixel 1211 alone can work. The charge generated by the photoelectric conversion device PSD is transmitted to the DVS pixel 1311 through the interconnector IC. In an embodiment, the interconnector IC may represent various configurations for electrically connecting the CIS pixel 1211 and the DVS pixel 1311. For example, the interconnector IC may include at least one of a wire, a conductor, a solder ball, a bump, and a through silicon via (TSV).

[0083] Figure 8 FIG. 2 shows a cross-sectional view of an image sensor according to an embodiment of the present disclosure. Figure 3 and Figure 5 A case where the image sensor 1000 operates in the DVS mode is described together.

[0084] The image sensor 1000 includes a CIS pixel array 1210 and a DVS pixel array 1310, wherein the CIS pixel array 1210 includes CIS pixels 1211 and the DVS pixel array 1310 includes DVS pixels 1311. The lens 1201 can be arranged on the CIS pixel array 1210. The DVS pixels can be isolated from each other by a deep trench isolation structure DTI. The deep trench isolation structure DTI may include an insulating material layer, such as a silicon oxide layer, a silicon nitride layer, a silicon oxynitride layer, or a combination thereof. In addition, the deep trench isolation structure DTI may include a polysilicon pattern arranged therein. The CIS pixel array 1210 and the DVS pixel array 1310 may be formed on different substrates, respectively.

[0085] In an embodiment, a first substrate including a CIS pixel array 1210 and a second substrate including a DVS pixel array 1310 may be electrically connected via a solder ball 5 in a flip chip manner. Alternatively, the first substrate including the CIS pixel array 1210 and the second substrate including the DVS pixel array 1310 may be electrically connected via a wire. Alternatively, the first substrate including the CIS pixel array 1210 and the second substrate including the DVS pixel array 1310 may be electrically connected via TSV. Alternatively, the first substrate including the CIS pixel array 1210 and the second substrate including the DVS pixel array 1310 may be electrically connected via Cu to Cu bonding. However, the above coupling manner is exemplary, and the electrical connection is not limited to the above coupling manner.

[0086] The CIS pixel 1211 includes a photoelectric conversion device PSD, which includes a first impurity injection region 2 and a second impurity injection region 3. The first impurity injection region 2 and the second impurity injection region 3 may be doped with different impurities. In an embodiment, the first impurity injection region 2 may be doped with p-type impurities, and the second impurity injection region 3 may be doped with n-type impurities. When light is incident on the photoelectric conversion device PSD through the lens 1201, electron-hole pairs EHP corresponding to the intensity of the absorbed light are generated.

[0087] The CIS pixel 1211 includes a transfer transistor TG and a floating diffusion region FD, for example, as described above with respect to Figure 3 The CIS pixel 1211 may also include a reset transistor RT, a drive transistor DT and a selection transistor ST, for example, as described above. Figure 3When the transfer transistor TG is turned on in response to the transfer signal VTG applied to the gate electrode of the transfer transistor TG, the charges generated in the first impurity injection region 2 and the second impurity injection region 3 can move to the floating diffusion region FD. The charges of the floating diffusion region FD are transferred to the DVS pixel 1311 through the internal wire 4, the solder ball 5 and the internal wire 6.

[0088] The DVS pixel 1311 may include a photoreceptor 1313 and a DVS pixel back-end circuit 1315. In an embodiment, one DVS pixel 1311 may determine whether a detected event is an event of a decrease in light intensity or an event of an increase in light intensity based on charges received from a plurality of photoelectric conversion devices PSD. Information about the determined event may be output as a signal through an internal wire 7 (e.g., to a CIS peripheral circuit, a DVS peripheral circuit, or a DVS back-end circuit). Figure 1 1100).

[0089] at the same time, Figure 8 10 and the DVS pixel array 1310 are shown as an example of direct electrical connection between the upper layer and the lower layer, but the configuration is not limited thereto. For example, at least one of the image signal processor 1100, the CIS peripheral circuit, and the DVS peripheral circuit may be inserted between the CIS pixel array 1210 and the DVS pixel array 1310. However, in any case, the components for transferring the charge of the floating diffusion region FD to the DVS pixel 1311 (i.e., the internal wires such as the internal wire 4, the internal wire 5, and the internal wire 6) may be the same as Figure 8 The structure is provided as such.

[0090] like Figure 8 As shown, the size of the photoelectric conversion device PSD implemented by using the first impurity injection region 2 and the second impurity injection region 3 is quite large, resulting in an increase in chip size. However, according to an embodiment of the present disclosure, the DVS pixel 1311 shares the photoelectric conversion devices of multiple CIS pixels 1211. Therefore, because the DVS pixel 1311 does not implement an additional photoelectric conversion device, the size of the image sensor can be reduced and the manufacturing cost can be reduced.

[0091] Fig. 9 1 shows a circuit diagram of an image sensor according to an embodiment of the present disclosure. The image sensor 1000 includes a CIS pixel 1211 and a DVS pixel 1311. Fig. 9 , four CIS pixels 1211 are commonly connected to one DVS pixel 1311. However, as described above, the connection ratio between the CIS pixel and the DVS pixel may be differently set according to their sizes.

[0092] The CIS pixel 1211 is configured to output an output voltage VOUT corresponding to the charges accumulated in the floating diffusion region FD. Figure 3 The construction and operation of the CIS pixel 1211 are described. Figure 3 Differently, the floating diffusion region FD of the CIS pixel 1211 may be connected to the DVS pixel 1311 through the reset transistor RT. In detail, the floating diffusion region FD may be connected to a component (e.g., SW1 and / or SW2) for changing the operation mode of the image sensor 1000 through the reset transistor RT. That is, the CIS pixel 1211 may be selectively connected to the power supply voltage VDD or the feedback transistor FB according to the operation mode corresponding to the open or closed state of the switch SW1 and the switch SW2.

[0093] The DVS pixel 1311 is configured to determine whether a detected event is a turn-on event or a turn-off event through the charge generated by the photoelectric conversion device PSD of the CIS pixel 1211. Figure 5 The construction and operation of the DVS pixel 1311 are described. Figure 5 and Figure 6 Unlike the DVS pixel 1311 shown in FIG. 1 , the DVS pixel 1311 may further include a component (e.g., a first switch SW1 and a second switch SW2) for changing the operation mode of the image sensor 1000. The first switch SW1 and the second switch SW2 may be controlled by the image signal processor 1100 or the row AER circuit 1330 (see FIG. 1 ). Figure 4 ) is controlled by the switch control signal SWC generated.

[0094] In an embodiment, the first switch SW1 and the second switch SW2 may not be closed or opened at the same time in the same period. For example, when the first switch SW1 is implemented by an NMOS transistor, the second switch SW2 may be implemented by a PMOS transistor (or vice versa). In this case, the first switch SW1 and the second switch SW2 may be controlled by a switch control signal SWC.

[0095] In an embodiment, the first switch SW1 and the second switch SW2 may be implemented with the same type of switch. For example, each of the first switch SW1 and the second switch SW2 may be implemented with an NMOS transistor. In this case, a component (e.g., an inverter) for inverting the switch control signal SWC may be further provided so that the first switch SW1 and the second switch SW2 are not closed or opened at the same time in the same period. For example, the switch control signal SWC may be applied to the first switch SW1, and the inverted switch control signal SWC may be applied to the second switch SW2.

[0096] In an embodiment, the first switch SW1 and the second switch SW2 may be implemented with the same type of switches. For example, control signals for controlling the first switch SW1 and the second switch SW2 may be applied to the first switch SW1 and the second switch SW2, respectively.

[0097] Meanwhile, the first switch SW1 and the second switch SW2 are exemplary. That is, in other embodiments, various components that selectively connect the CIS pixel 1211 to the power supply voltage VDD or the feedback transistor FB may be adopted. In other embodiments, the first switch SW1 and the second switch SW2 may be disposed outside the DVS pixel 1311, or may be disposed inside the CIS pixel 1211. That is, Fig. 9 The illustrated configuration and layout of the first switch SW1 and the second switch SW2 are not intended to limit the configuration. The configuration and operation of the first switch SW1 and the second switch SW2 described above may be applied to the embodiments described below.

[0098] Fig.10 It is shown Fig. 9 FIG. 1 is a diagram of an image sensor operating in a first mode.

[0099] In the first mode, the image sensor 1000 can operate in the CIS mode. The first switch SW1 is closed by the switch control signal SWC, and the second switch SW2 is opened by the switch control signal SWC. In this case, the power supply voltage VDD is applied to the drain electrode of the reset transistor RT through the interconnector IC. In the period when the CIS pixel 1211 is reset, when the reset transistor RT is turned on by the reset signal VRST, the floating diffusion area FD can be reset to the power supply voltage VDD. On the contrary, in the first mode, the remaining components of the DVS pixel 1311 except the first switch SW1 and the second switch SW2 do not work.

[0100] Fig.11 It is shown Fig. 9 FIG. 1 is a diagram of an image sensor operating in a second mode.

[0101] In the second mode, the image sensor 1000 can operate in the DVS mode. The first switch SW1 is disconnected by the switch control signal SWC, and the second switch SW2 is closed by the switch control signal SWC. When the transfer transistor TG is turned on, the charge generated by the photoelectric conversion device PSD moves to the floating diffusion area FD. When the reset transistor RT is turned on by the reset signal VRST, the charge accumulated in the floating diffusion area FD is input to the logarithmic amplifier LA. That is, in the second mode, the remaining components of the CIS pixel 1211 except the photoelectric conversion device PSD, the transfer transistor TG and the reset transistor RT do not work. When the photocurrent IP is generated by the movement of the charge, the DVS pixel 1311 can work.

[0102] Fig.12 A circuit diagram of an image sensor according to an embodiment of the present disclosure is shown.

[0103] The construction and operation of the image sensor 1000 are similar to those of the reference Figures 9 to 11 However, unlike Figures 9 to 11 In different embodiments, the CIS pixel 1211 may further include a switch transistor SWT. The DVS pixel 1311 may include only the first switch SW1. Figure 1 ) or row decoder 1220 (refer to Figure 2 ) can generate a DVS enable signal EN_DVS for controlling the switching transistor SWT.

[0104] In the first mode, the image sensor 1000 can operate in the CIS mode. The switch transistor SWT is turned off by the DVS enable signal EN_DVS, and the remaining components of the CIS pixel 1211 operate as in a general CIS pixel. The DVS pixel 1311 does not operate.

[0105] In the second mode, the image sensor 1000 can operate in the DVS mode. The switch transistor SWT is turned on by the DVS enable signal EN_DVS. The remaining components of the CIS pixel 1211 except the photoelectric conversion device PSD and the switch transistor SWT do not work. The first switch SW1 is also closed by the switch control signal SWC. As the charge generated by the photoelectric conversion device PSD moves, a photocurrent IP is generated. When the photocurrent IP is input to the logarithmic amplifier LA, the DVS pixel 1311 can work.

[0106] Fig.13 A circuit diagram of an image sensor according to an embodiment of the present disclosure is shown. Fig.13 Examples and Fig.12 The embodiment of FIG. 1 is similar in that the DVS pixel 1311 includes a first switch SW1 and the CIS pixel 1211 includes a switch transistor SWT. However, the switch transistor SWT may be connected to the floating diffusion region FD.

[0107] In the first mode, the image sensor 1000 can operate in the CIS mode. The switch transistor SWT is turned off by the DVS enable signal EN_DVS, and the remaining components of the CIS pixel 1211 operate as in a general CIS pixel. The DVS pixel 1311 does not work. That is, in the first mode, the operation of the CIS pixel 1211 is the same as that of the DVS pixel 1311. Fig.12 The operation of the embodiment is the same.

[0108] In the second mode, the image sensor 1000 can operate in the DVS mode. The switch transistor SWT is turned on by the DVS enable signal EN_DVS. The remaining components of the CIS pixel 1211 except the photoelectric conversion device PSD, the transfer transistor TG and the switch transistor SWT do not work. That is, Fig.13 Examples and Fig.12 The embodiment of FIG. 1 is different in that the transfer transistor TG operates. The first switch SW1 is also turned on by the switch control signal SWC. As the photocurrent IP is generated by the movement of the charges generated by the photoelectric conversion device PSD, the DVS pixel 1311 can operate.

[0109] Fig.14 A circuit diagram of an image sensor according to an embodiment of the present disclosure is shown.

[0110] The CIS pixel 1211 may include a photoelectric conversion device PSD, a reset transistor RT, a drive transistor DT, and a selection transistor ST. That is, unlike the above-mentioned embodiment, the CIS pixel 1211 includes three transistors and does not include a transfer transistor (eg, Fig. 9 of TG).

[0111] In the first mode, the image sensor 1000 can operate in the CIS mode. The first switch SW1 is closed by the switch control signal SWC, and the second switch SW2 is opened by the switch control signal SWC. The charge generated by the photoelectric conversion device PSD can be directly transferred to the floating diffusion area FD. The process of outputting the output voltage VOUT corresponding to the charge of the floating diffusion area FD when the selection transistor ST is turned on by the selection signal VSEL is similar to the reference Figure 3 The process described in the embodiment.

[0112] In the second mode, the image sensor 1000 can operate in the DVS mode. The first switch SW1 is opened by the switch control signal SWC, and the second switch SW2 is closed by the switch control signal SWC. The reset transistor RT is turned on by the reset signal VRST. As the photocurrent IP is generated by the movement of the charge generated by the photoelectric conversion device PSD, the DVS pixel 1311 can operate.

[0113] Fig.15 A circuit diagram of an image sensor according to an embodiment of the present disclosure is shown.

[0114] The CIS pixel 1211 may include a photoelectric conversion device PSD, a transfer transistor TG, a reset transistor RT, a drive transistor DT, a first selection transistor ST1, and a second selection transistor ST2. That is, the CIS pixel 1211 may have a five-transistor (5TR) structure. The second selection transistor ST2 is turned on by the selection signal VSEL and transmits the transmission signal VTG to the gate electrode of the transfer transistor TG. The gate electrodes of the first selection transistor ST1 and the second selection transistor ST2 may be interconnected to receive the selection signal VSEL.

[0115] In the first mode, the image sensor 1000 can operate in the CIS mode. The first switch SW1 is closed by the switch control signal SWC, and the second switch SW2 is opened by the switch control signal SWC. In order to transfer the charge generated by the photoelectric conversion device PSD to the floating diffusion area FD, the selection signal VSEL can be applied to the first selection transistor ST1 and the second selection transistor ST2. When the second selection transistor ST2 is turned on, the transfer signal VTG is applied to the transfer transistor TG, and the transfer transistor TG is turned on. In this case, the charge is transferred to the floating diffusion area FD. Except for the addition of the second selection transistor ST2, the operation of the CIS pixel 1211 is similar to that of the reference Figures 9 to 11 The operation described in the embodiment.

[0116] In the second mode, the image sensor 1000 can operate in the DVS mode. The second selection transistor ST2 is turned on by the selection signal VSEL. When the transmission signal VTG is applied to the gate electrode of the transmission transistor TG, the transmission transistor TG is turned on. The reset transistor RT is turned on by the reset signal VRST. The first switch SW1 is opened by the switch control signal SWC, and the second switch SW2 is closed by the switch control signal SWC. As the photocurrent IP is generated by the movement of the charge generated by the photoelectric conversion device PSD, the DVS pixel 1311 can operate based on the photocurrent IP.

[0117] Fig.16 Shows Figure 2 Circuit diagram of the structure of a CIS pixel.

[0118] The CIS pixel 1211 may include photoelectric conversion devices PSD1 to PSD4, transfer transistors TG1 to TG4, reset transistor RT, drive transistor DT, and select transistor ST. The first photoelectric conversion device PSD1, the first transfer transistor TG1, the reset transistor RT, the drive transistor DT, and the select transistor ST may constitute a first sub CIS pixel 1211a. Fig.16An example is shown in which the first sub-CIS pixel 1211a only surrounds the first photoelectric conversion device PSD1 and the first transfer transistor TG1, but this is for the purpose of simplifying the description. As described above, the second photoelectric conversion device PSD2, the second transfer transistor TG2, the reset transistor RT, the drive transistor DT, and the selection transistor ST may constitute the second sub-CIS pixel 1211b. The configurations of the third sub-CIS pixel 1211c and the fourth sub-CIS pixel 1211d are the same as those described above.

[0119] The first to fourth sub-CIS pixels 1211a to 1211d may share a floating diffusion region FD. In an embodiment, the first sub-CIS pixel 1211a may include a green filter, the second sub-CIS pixel 1211b may include a blue filter, the third sub-CIS pixel 1211c may include a red filter, and the fourth sub-CIS pixel 1211d may include a green filter. The red filter may transmit light in a red wavelength band, the green filter may transmit light in a green wavelength band, and the blue filter may transmit light in a blue wavelength band.

[0120] In an embodiment, the first to fourth sub-CIS pixels 1211a to 1211d may be operated sequentially. For example, in the operation of the first sub-CIS pixel 1211a, when the first transfer transistor TG1 is turned on by the first transfer signal VTG1, the charge generated by the first photoelectric conversion device PSD1 is transferred to the floating diffusion region FD. When the selection transistor ST is turned on by the selection signal VSEL, an output voltage VOUT corresponding to the charge of the floating diffusion region FD is output. When the reset transistor RT is turned on by the reset signal VRST, the floating diffusion region FD is reset.

[0121] After the operation of the first sub CIS pixel 1211a, the second sub CIS pixel 1211b may operate similarly to the first sub CIS pixel 1211a. The third sub CIS pixel 1211c and the fourth sub CIS pixel 1211d may operate similarly to the first sub CIS pixel 1211a.

[0122] However, the layout of the color filter in the pixel group, the number of CIS pixels connected to the floating diffusion region FD, the configuration of the pixel group, and the operation of the pixel group are exemplary. The configuration is not limited thereto. For example, the configuration can be applied to CIS image sensors of various configurations in which multiple photoelectric conversion devices share the floating diffusion region FD.

[0123] Fig.17 A circuit diagram of an image sensor according to an embodiment of the present disclosure is shown.

[0124] Fig.17 The CIS pixel 1211 shown in FIG. Fig.16The CIS pixels 1211 are substantially the same. Therefore, Fig.17 The component can be similar to Fig.16 The components of the first sub-CIS pixel 1211a, the second sub-CIS pixel 1211b, the third sub-CIS pixel 1211c, and the fourth sub-CIS pixel 1211d are referred to as the first sub-CIS pixel 1211a, the second sub-CIS pixel 1211b, the third sub-CIS pixel 1211c, and the fourth sub-CIS pixel 1211d. For example, the first photoelectric conversion device PSD1, the first transfer transistor TG1, the reset transistor RT, the drive transistor DT, and the selection transistor ST are referred to as the "first sub-CIS pixel 1211a". The second sub-CIS pixel 1211b to the fourth sub-CIS pixel 1211d are also similar to the above description. For clarity of explanation, the above description is omitted. Fig.16 Reference numerals 1211a, 1211b, 1211c and 1211d are shown in FIG.

[0125] In the first mode, the image sensor 1000 can operate in the CIS mode. The first switch SW1 is closed by the switch control signal SWC, and the second switch SW2 is opened by the switch control signal SWC. Fig.16 The operation of the sub-CIS pixels constituting the CIS pixel 1211 in the CIS mode is described, and therefore, redundant description is omitted.

[0126] In the second mode, the image sensor 1000 can operate in the DVS mode. The transfer transistors TG1 to TG4 are turned on in response to the transfer signals VTG1 to VTG4 applied to the gate electrodes of the transfer transistors TG1 to TG4. The reset transistor RT is turned on by the reset signal VRST. The first switch SW1 is opened by the switch control signal SWC, and the second switch SW2 is closed by the switch control signal SWC. As the photocurrent IP is generated by the movement of the charges generated by the photoelectric conversion devices PSD1 to PSD4, the DVS pixel 1311 can operate based on the photocurrent IP.

[0127] In an embodiment, only a portion of the transmission transistors TG1 to TG4 may be turned on to adjust the sensitivity (or intensity) of the received light. Fig.17 In the embodiment of FIG. 1 , 16 CIS pixels may be connected to one DVS pixel. Therefore, only a portion of the 16 transfer transistors may be turned on to adjust the sensitivity (or intensity) of received light or to reduce power consumption of the image sensor 1000.

[0128] Fig.18 An image sensor according to an embodiment of the present disclosure is shown.

[0129] The image sensor 1000 includes a plurality of photoelectric conversion devices PSD, a first transistor T1, a second transistor T2, a logarithmic current source ILOG, and a DVS pixel back-end circuit 1315. In an embodiment, Fig.18Only components of the image sensor that are associated with generating event signals are shown. Fig.18 The components shown in φI correspond to components operating in the DVS mode among the components of the image sensor, and some components of the CIS pixel are not shown.

[0130] Below, the operation of the components shown will be described. The second transistor T2 can be turned on by the photocurrent IP generated by the charge of the plurality of photoelectric conversion devices PSD. The first transistor T1 can be turned on by the logarithmic voltage VLOG based on the logarithmic current source ILOG. Here, the amplitude of the logarithmic voltage VLOG can have a value of a logarithmic scale. For example, the node that outputs the current of the logarithmic current source ILOG is called a "logarithmic voltage node".

[0131] In an embodiment, the logarithmic current source ILOG may be a component of a DVS pixel. The first transistor T1 and the second transistor T2 and the photoelectric conversion device PSD may be components of a CIS pixel. Fig.18 In the embodiment of the present invention, the DVS pixel may not include any other components (eg, the first transistor T1 and the second transistor T2) and the photoelectric conversion device PSD. Therefore, the size of the general DVS pixel can be further reduced. Fig.19 The structure of an image sensor is described in which DVS pixels share some components of CIS pixels.

[0132] Fig.19 FIG. 1 shows a circuit diagram of an image sensor according to an embodiment of the present disclosure. In an embodiment, Fig.19 Shown is a method for implementing Fig.18 The image sensor 1000 has a circuit structure of FIG. 1 . The image sensor 1000 includes a CIS pixel 1211 and a DVS pixel 1311 . Fig.19 FIG. 4 shows an embodiment in which four CIS pixels 1211 are commonly connected to one DVS pixel 1311 .

[0133] The CIS pixel 1211 is configured to output an output voltage VOUT corresponding to the charges accumulated in the floating diffusion region FD. The configuration and operation of the CIS pixel 1211 are similar to those of the reference Fig. 9 The construction and operation of the CIS pixel 1211 are substantially the same. However, there may be differences in the connection between the CIS pixel 1211 and the DVS pixel 1311. In detail, the gate electrode of the reset transistor RT can be connected to a component (e.g., SW1 and / or SW2) for changing the operation mode of the image sensor 1000 through a first interconnector IC1. In detail, one end of the drive transistor DT can be connected to a component (e.g., SW2 and / or switch SW3) for changing the operation mode of the image sensor 1000 through a second interconnector IC2.

[0134] The DVS pixel 1311 is configured to determine whether a detected event is a turn-on event or a turn-off event by the charge generated by the photoelectric conversion device PSD of the CIS pixel 1211. However, the DVS pixel 1311 according to the above embodiment does not include the photoelectric conversion device PSD; Fig.19 The DVS pixel 1311 of the embodiment does not include a transistor (e.g., Fig.18 In contrast, the DVS pixel 1311 may further include a component (e.g., a first switch SW1 to a third switch SW3) for changing the operation mode of the image sensor 1000. The image signal processor 1100 or the row AER circuit 1330 (see Figure 4 ) to control the first switch SW1 to the third switch SW3.

[0135] Meanwhile, the image sensor 1000 may include a fourth switch SW4 for selectively providing a power supply voltage VDD to be applied to the driving transistor DT in the CIS mode. For example, the fourth switch SW4 may be connected to the second interconnector IC2 and may selectively provide the power supply voltage VDD to the driving transistor DT. For example, the first to fourth switches SW1 to SW4 may be referred to as a “switch circuit”.

[0136] Fig. 20 It is shown Fig.19 FIG. 1 is a diagram of an image sensor operating in a first mode.

[0137] In the first mode, the image sensor 1000 can operate in the CIS mode. The first switch SW1 can be closed or opened by the switch control signal SWC. In detail, the first switch SW1 can be closed to reset the floating diffusion area FD. The second switch SW2 and the third switch SW3 are opened. In this case, the fourth switch SW4 can be closed.

[0138] Fig.21 It is shown Fig.19 FIG. 1 is a diagram of an image sensor operating in a second mode.

[0139] In the second mode, the image sensor 1000 can operate in the DVS mode. The first switch SW1 and the fourth switch SW4 are disconnected by the switch control signal SWC, and the second switch SW2 and the third switch SW3 are closed by the switch control signal SWC. That is, the gate electrode of the reset transistor RT and the drain electrode of the drive transistor DT can be connected to the logarithmic voltage node. The transfer transistor TG is turned on by the transfer signal VTG.

[0140] The source electrode of the selection transistor ST from which the output voltage VOUT is output may be grounded. Although not shown for clarity of illustration, a circuit for selectively connecting the source electrode of the selection transistor ST to a ground terminal or a column line (eg, Figure 3 CL1) of the component (e.g., switch).

[0141] will correspond to Fig.21 The circuit diagram of the switching state is Fig.18 Compared with the circuit diagram, it can be understood that Fig.18 The image sensor 1000 and Fig.21 That is, Fig.18 The first transistor T1 and the second transistor T2 are respectively connected to Fig.21 The reset transistor RT corresponds to the drive transistor DT.

[0142] Fig. 22 A circuit diagram of an image sensor according to an embodiment of the present disclosure is shown.

[0143] Fig. 22 An embodiment similar to Figures 19 to 21 However, with Figures 19 to 21 Compared with the embodiment, Fig. 22 Embodiments of the present invention may differ in the configuration and layout of switches SW1 to SW3. In an embodiment, the third switch SW3 may be selectively connected to the power supply voltage VDD or the logarithmic current source ILOG according to the operation mode. For example, the third switch SW3 may be connected to the power supply voltage VDD in the first mode, and may be connected to the logarithmic current source ILOG in the second mode.

[0144] However, the configuration for applying the reset signal VRST to the gate electrode of the reset transistor RT in the first mode, applying the power supply voltage VDD to the drive transistor DT, and connecting the logarithmic current source ILOG to the gate electrodes of the drive transistor DT and the reset transistor RT in the second mode is not limited thereto. Figures 19 to 22 For implementing the embodiments other than Fig.18 Various switch configurations of the circuit structure.

[0145] Fig.23 A circuit diagram of an image sensor according to an embodiment of the present disclosure is shown.

[0146] The image sensor 1000 includes a plurality of photoelectric conversion devices PSD, a first transistor T1, a second transistor T2, a logarithmic current source ILOG, and a DVS pixel back-end circuit 1315. In an embodiment, Fig.23 Only the components of the image sensor that are associated with generating the event signal are shown. Fig.23 The components shown in FIG. 1 correspond to components operating in the DVS mode among components of the image sensor, and some components of the CIS pixel are not shown.

[0147] Fig.23 The circuit diagram and Fig.18 The circuit diagram of is similar. However, the first transistor T1 can be replaced by a PMOS transistor, and one end of the first transistor T1 is connected to the logarithmic voltage node of the current outputting the logarithmic current source ILOG. The logarithmic current source ILOG can be a component of a DVS pixel, and the first transistor T1 and the second transistor T2 and the photoelectric conversion device PSD can be components of a CIS pixel. The second transistor T2 can be turned on by the photocurrent IP generated by the charge generated by the photoelectric conversion device PSD. The first transistor T1 can be turned on by a separate voltage "V". The logarithmic voltage node can have a voltage value in a logarithmic scale.

[0148] Fig.24 FIG. 1 shows a circuit diagram of an image sensor according to an embodiment of the present disclosure. In an embodiment, Fig.24 Shown is the method for implementing Fig.23 The image sensor 1000 has a circuit structure of FIG. 1 . The image sensor 1000 includes a CIS pixel 1211 and a DVS pixel 1311 .

[0149] The structure of CIS pixel 1211 is similar to Fig.19 However, the reset transistor RT may be implemented with a PMOS transistor. One end of the reset transistor RT may be connected to a component (e.g., SW1 and / or SW2) for changing the operating mode of the image sensor 1000 through a first interconnector IC1. One end of the drive transistor DT may be connected to a component (e.g., SW2 and / or SW3) for changing the operating mode of the image sensor 1000 through a second interconnector IC2.

[0150] In addition to providing the power supply voltage VDD to the CIS pixel 1211 through the first switch SW1, Fig.24 The DVS pixel 1311 is constructed with Fig.19 Therefore, redundant description will be omitted.

[0151] In the first mode, the image sensor 1000 may operate in the CIS mode. In a period for resetting the floating diffusion region FD, the first switch SW1 may be closed by the switch control signal SWC, and the first switch SW1 may be opened in the remaining period. The second switch SW2 and the third switch SW3 are opened. In this case, the fourth switch SW4 may be closed.

[0152] In the second mode, the image sensor 1000 can operate in the DVS mode. The first switch SW1 and the fourth switch SW4 are disconnected by the switch control signal SWC, and the second switch SW2 and the third switch SW3 are closed by the switch control signal SWC. That is, one end of the reset transistor RT and one end of the drive transistor DT can be connected to the logarithmic voltage node. The transfer transistor TG is turned on by the transfer signal VTG. The reset transistor RT is turned on by the reset signal VRST.

[0153] According to the above embodiments, the DVS pixel of the present disclosure does not include a photoelectric conversion device. Instead, the DVS pixel determines the type of event by using the photoelectric conversion device PSD of the CIS pixel. In addition, in some embodiments, the DVS pixel without PSD does not include some transistors and uses the transistors of the CIS pixel. Therefore, the proposed structure can reduce the size of the image sensor and reduce the manufacturing cost.

[0154] According to an embodiment of the present disclosure, a dynamic vision sensor uses a photoelectric conversion device included in a CMOS image sensor.

[0155] Therefore, the size of the image sensor can be reduced and the manufacturing cost can be reduced.

[0156] While the present disclosure has been described with reference to the embodiments thereof, it will be apparent to those skilled in the art that various changes and modifications can be made thereto without departing from the spirit and scope of the present disclosure as set forth in the appended claims.

Claims

1. A sensor, comprising: a first substrate including a plurality of photoelectric conversion devices and a floating diffusion region connected to the plurality of photoelectric conversion devices; as well as a second substrate configured to receive charges from the plurality of photoelectric conversion devices and determine a change in intensity of light incident on the plurality of photoelectric conversion devices based on the charges, wherein the first substrate is coupled to the second substrate via a plurality of metal-to-metal bonds, and Wherein, the plurality of photoelectric conversion devices form a single dynamic vision sensor pixel.

2. The sensor according to claim 1, further comprising a plurality of lenses on the plurality of photoelectric conversion devices, in, The plurality of metal-to-metal bonds vertically overlap the plurality of lenses.

3. The sensor according to claim 2, wherein: The plurality of photoelectric conversion devices are arranged in an N×N matrix form, and Here, N is an integer greater than 1.

4. The sensor according to claim 3, wherein: N is 2.

5. The sensor according to claim 2, wherein: The sensor is configured to send the event signal as a packet-based signal.

6. The sensor according to claim 2, wherein: The sensor is configured to send the event signal as a frame-based signal.

7. The sensor of claim 5, wherein the first substrate further comprises a plurality of transmission transistors, and in, Each of the plurality of transfer transistors is connected to a corresponding one of the plurality of photoelectric conversion devices.

8. The sensor according to claim 5, wherein: The second substrate includes a logarithmic amplifier and a feedback transistor configured to determine the change in the light intensity.

9. The sensor according to claim 8, wherein: The sensor is configured to receive an operation mode signal from an image signal processor, and Wherein, the sensor is configured to output the event signal in response to the operation mode signal.

10. A sensor comprising: a first substrate comprising a plurality of photoelectric conversion devices configured to generate charge; as well as a second substrate configured to receive the first plurality of charges from the first substrate and to receive the second plurality of charges from the first substrate, wherein the first substrate is stacked with the second substrate via a plurality of metal-to-metal bonds, and wherein the second substrate includes a logarithmic amplifier and a feedback transistor configured to determine a change in light intensity, wherein the sensor is configured to output an image signal about the object based on the first plurality of charges, and to output an event signal based on the second plurality of charges, and The event signal indicates the movement of the object.

11. The sensor according to claim 10, wherein: The sensor is configured to output the event signal as a packet-based signal.

12. The sensor of claim 11, further comprising a plurality of lenses on the plurality of photoelectric conversion devices, in, The plurality of metal-to-metal bonds vertically overlap the plurality of lenses.

13. The sensor of claim 12, wherein: The sensor is configured to output the image signal as a frame-based signal.

14. The sensor of claim 13, wherein: The sensor further includes an analog-to-digital converter, a correlated double sampler, and an output buffer configured to output the image signal.

15. The sensor of claim 14, wherein: The sensor is configured to receive an operation mode signal from an image signal processor, and Wherein, the sensor is configured to output the event signal or the image signal in response to the operation mode signal.

16. The sensor of claim 15, wherein: The second substrate is configured to receive the first plurality of charges via a first path and receive the second plurality of charges via a second path different from the first path in response to the operation mode signal.

17. The sensor of claim 16, wherein: The sensor is configured to output the image signal or the event signal to the image signal processor.

18. A sensor comprising: A first substrate including a plurality of photoelectric conversion devices; as well as a second substrate configured to receive charges from the plurality of photoelectric conversion devices, the second substrate being coupled to the first substrate, wherein the second substrate includes a logarithmic amplifier and a feedback transistor configured to determine a change in light intensity, and The sensor is configured to output an event signal associated with movement of the object as a packet-based signal, or to output an image signal associated with an image of the object as a frame-based signal.

19. The sensor of claim 18, further comprising a plurality of lenses on the plurality of photoelectric conversion devices, and in, The first substrate is coupled to the second substrate via a plurality of metal-to-metal bonds.

20. The sensor of claim 19, wherein: The sensor is configured to output the event signal or the image signal to the same image signal processor.

Images